opcodes/ChangeLog

   1 2018-03-01  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
   4         vpsub[bwdq] instructions.
   5         * i386-tbl.h: Regenerated.
   6
   7 2018-03-01  Alan Modra  <amodra@gmail.com>
   8
   9         * configure.ac (ALL_LINGUAS): Sort.
  10         * configure: Regenerate.
  11
  12 2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  13
  14         * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
  15         macro by assignements.
  16
  17 2018-02-27  H.J. Lu  <hongjiu.lu@intel.com>
  18
  19         PR gas/22871
  20         * i386-gen.c (opcode_modifiers): Add Optimize.
  21         * i386-opc.h (Optimize): New enum.
  22         (i386_opcode_modifier): Add optimize.
  23         * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
  24         "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
  25         "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
  26         "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
  27         vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
  28         vpxord and vpxorq.
  29         * i386-tbl.h: Regenerated.
  30
  31 2018-02-26  Alan Modra  <amodra@gmail.com>
  32
  33         * crx-dis.c (getregliststring): Allocate a large enough buffer
  34         to silence false positive gcc8 warning.
  35
  36 2018-02-22  Shea Levy <shea@shealevy.com>
  37
  38         * disassemble.c (ARCH_riscv): Define if ARCH_all.
  39
  40 2018-02-22  H.J. Lu  <hongjiu.lu@intel.com>
  41
  42         * i386-opc.tbl: Add {rex},
  43         * i386-tbl.h: Regenerated.
  44
  45 2018-02-20  Maciej W. Rozycki  <macro@mips.com>
  46
  47         * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
  48         (mips16_opcodes): Replace `M' with `m' for "restore".
  49
  50 2018-02-19  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  51
  52         * arm-dis.c (thumb_opcodes): Fix BXNS mask.
  53
  54 2018-02-13  Maciej W. Rozycki  <macro@mips.com>
  55
  56         * wasm32-dis.c (print_insn_wasm32): Rename `index' local
  57         variable to `function_index'.
  58
  59 2018-02-13  Nick Clifton  <nickc@redhat.com>
  60
  61         PR 22823
  62         * metag-dis.c (print_fmmov): Double buffer size to avoid warning
  63         about truncation of printing.
  64
  65 2018-02-12  Henry Wong <henry@stuffedcow.net>
  66
  67         * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
  68
  69 2018-02-05  Nick Clifton  <nickc@redhat.com>
  70
  71         * po/pt_BR.po: Updated Brazilian Portuguese translation.
  72
  73 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
  74
  75         * i386-dis.c (enum): Add pconfig.
  76         * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
  77         (cpu_flags): Add CpuPCONFIG.
  78         * i386-opc.h (enum): Add CpuPCONFIG.
  79         (i386_cpu_flags): Add cpupconfig.
  80         * i386-opc.tbl: Add PCONFIG instruction.
  81         * i386-init.h: Regenerate.
  82         * i386-tbl.h: Likewise.
  83
  84 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
  85
  86         * i386-dis.c (enum): Add PREFIX_0F09.
  87         * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
  88         (cpu_flags): Add CpuWBNOINVD.
  89         * i386-opc.h (enum): Add CpuWBNOINVD.
  90         (i386_cpu_flags): Add cpuwbnoinvd.
  91         * i386-opc.tbl: Add WBNOINVD instruction.
  92         * i386-init.h: Regenerate.
  93         * i386-tbl.h: Likewise.
  94
  95 2018-01-17  Jim Wilson  <jimw@sifive.com>
  96
  97         * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
  98
  99 2018-01-17  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 100
 101         * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
 102         Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
 103         CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
 104         (cpu_flags): Add CpuIBT, CpuSHSTK.
 105         * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
 106         (i386_cpu_flags): Add cpuibt, cpushstk.
 107         * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
 108         * i386-init.h: Regenerate.
 109         * i386-tbl.h: Likewise.
 110
 111 2018-01-16  Nick Clifton  <nickc@redhat.com>
 112
 113         * po/pt_BR.po: Updated Brazilian Portugese translation.
 114         * po/de.po: Updated German translation.
 115
 116 2018-01-15  Jim Wilson  <jimw@sifive.com>
 117
 118         * riscv-opc.c (match_c_nop): New.
 119         (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
 120
 121 2018-01-15  Nick Clifton  <nickc@redhat.com>
 122
 123         * po/uk.po: Updated Ukranian translation.
 124
 125 2018-01-13  Nick Clifton  <nickc@redhat.com>
 126
 127         * po/opcodes.pot: Regenerated.
 128
 129 2018-01-13  Nick Clifton  <nickc@redhat.com>
 130
 131         * configure: Regenerate.
 132
 133 2018-01-13  Nick Clifton  <nickc@redhat.com>
 134
 135         2.30 branch created.
 136
 137 2018-01-11  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 138
 139         * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
 140         * i386-tbl.h: Regenerate.
 141
 142 2018-01-10  Jan Beulich  <jbeulich@suse.com>
 143
 144         * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
 145         * i386-tbl.h: Re-generate.
 146
 147 2018-01-10  Jan Beulich  <jbeulich@suse.com>
 148
 149         * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
 150         vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
 151         vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
 152         vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
 153         vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
 154         Disp8MemShift of AVX512VL forms.
 155         * i386-tbl.h: Re-generate.
 156
 157 2018-01-09  Jim Wilson  <jimw@sifive.com>
 158
 159         * riscv-dis.c (maybe_print_address): If base_reg is zero,
 160         then the hi_addr value is zero.
 161
 162 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 163
 164         * arm-dis.c (arm_opcodes): Add csdb.
 165         (thumb32_opcodes): Add csdb.
 166
 167 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 168
 169         * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
 170         * aarch64-asm-2.c: Regenerate.
 171         * aarch64-dis-2.c: Regenerate.
 172         * aarch64-opc-2.c: Regenerate.
 173
 174 2018-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 175
 176         PR gas/22681
 177         * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
 178         Remove AVX512 vmovd with 64-bit operands.
 179         * i386-tbl.h: Regenerated.
 180
 181 2018-01-05  Jim Wilson  <jimw@sifive.com>
 182
 183         * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
 184         jalr.
 185
 186 2018-01-03  Alan Modra  <amodra@gmail.com>
 187
 188         Update year range in copyright notice of all files.
 189
 190 2018-01-02  Jan Beulich  <jbeulich@suse.com>
 191
 192         * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
 193         and OPERAND_TYPE_REGZMM entries.
 194
 195 For older changes see ChangeLog-2017
 196 \f
 197 Copyright (C) 2018 Free Software Foundation, Inc.
 198
 199 Copying and distribution of this file, with or without modification,
 200 are permitted in any medium without royalty provided the copyright
 201 notice and this notice are preserved.
 202
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