opcodes/ChangeLog

   1 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
   2
   3         PR 6825
   4         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
   5
   6 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         * i386-opc.tbl: Add syscall and sysret for Cpu64.
   9
  10         * i386-tbl.h: Regenerated.
  11
  12 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
  13
  14         * Makefile.am (POTFILES.in): Set LC_ALL=C.
  15         * Makefile.in: Regenerate.
  16         * po/POTFILES.in: Regenerate.
  17
  18 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
  19
  20         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
  21         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
  22         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
  23         * ppc-opc.c (insert_xt6): New static function.
  24         (extract_xt6): Likewise.
  25         (insert_xa6): Likewise.
  26         (extract_xa6: Likewise.
  27         (insert_xb6): Likewise.
  28         (extract_xb6): Likewise.
  29         (insert_xb6s): Likewise.
  30         (extract_xb6s): Likewise.
  31         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
  32         XX3DM_MASK, PPCVSX): New.
  33         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
  34         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
  35
  36 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
  37
  38         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
  39         * Makefile.in: Regenerate.
  40
  41 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
  42
  43         * i386-reg.tbl: Use Dw2Inval on AVX registers.
  44         * i386-tbl.h: Regenerated.
  45
  46 2008-07-30  Michael J. Eager  <eager@eagercon.com>
  47
  48         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
  49         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
  50         (insert_sprg, PPC405): Use PPC_OPCODE_405.
  51         (powerpc_opcodes): Add Xilinx APU related opcodes.
  52
  53 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
  54
  55         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
  56
  57 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
  58
  59         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
  60
  61 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
  62
  63         * mips-opc.c (CP): New macro.
  64         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
  65         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
  66         dmtc2 Octeon instructions.
  67
  68 2008-07-07  Stan Shebs  <stan@codesourcery.com>
  69
  70         * dis-init.c (init_disassemble_info): Init endian_code field.
  71         * arm-dis.c (print_insn): Disassemble code according to
  72         setting of endian_code.
  73         (print_insn_big_arm): Detect when BE8 extension flag has been set.
  74
  75 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
  76
  77         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
  78         for ELF symbols.
  79
  80 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
  81
  82         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
  83         (print_ppc_disassembler_options): Likewise.
  84         * ppc-opc.c (PPC464): Define.
  85         (powerpc_opcodes): Add mfdcrux and mtdcrux.
  86
  87 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  88
  89         * configure: Regenerate.
  90
  91 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
  92
  93         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
  94         ppc_cpu_t typedef.
  95         (struct dis_private): New.
  96         (POWERPC_DIALECT): New define.
  97         (powerpc_dialect): Renamed to...
  98         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
  99         struct dis_private.
 100         (print_insn_big_powerpc): Update for using structure in
 101         info->private_data.
 102         (print_insn_little_powerpc): Likewise.
 103         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 104         (skip_optional_operands): Likewise.
 105         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 106         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 107         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 108         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 109         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 110         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 111         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 112         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 113         param to be of type ppc_cpu_t.  Update prototype.
 114
 115 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 116
 117         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 118         +s, +S.
 119         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 120         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 121         syncw, syncws, vm3mulu, vm0 and vmulu.
 122
 123         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 124         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 125         seqi, sne and snei.
 126
 127 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 128
 129         * i386-opc.tbl: Add vmovd with 64bit operand.
 130         * i386-tbl.h: Regenerated.
 131
 132 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 133
 134         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 135
 136 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 137
 138         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 139         * i386-tbl.h: Regenerated.
 140
 141 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 142
 143         PR gas/6517
 144         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 145         into 32bit and 64bit.  Remove Reg64|Qword and add
 146         IgnoreSize|No_qSuf on 32bit version.
 147         * i386-tbl.h: Regenerated.
 148
 149 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 150
 151         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 152         * i386-tbl.h: Regenerated.
 153
 154 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 155
 156         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 157
 158 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 159
 160         * Makefile.am: Run "make dep-am".
 161         * Makefile.in: Regenerate.
 162
 163 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 164
 165         * i386-dis.c (MOVBE_Fixup): New.
 166         (Mo): Likewise.
 167         (PREFIX_0F3880): Likewise.
 168         (PREFIX_0F3881): Likewise.
 169         (PREFIX_0F38F0): Updated.
 170         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 171         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 172         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 173
 174         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 175         CPU_EPT_FLAGS.
 176         (cpu_flags): Add CpuMovbe and CpuEPT.
 177
 178         * i386-opc.h (CpuMovbe): New.
 179         (CpuEPT): Likewise.
 180         (CpuLM): Updated.
 181         (i386_cpu_flags): Add cpumovbe and cpuept.
 182
 183         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 184         * i386-init.h: Regenerated.
 185         * i386-tbl.h: Likewise.
 186
 187 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 188
 189         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 190         the two drem and the two dremu macros.
 191
 192 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 193
 194         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 195         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 196         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 197         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 198
 199 2008-04-25  David S. Miller  <davem@davemloft.net>
 200
 201         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 202         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 203
 204 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 205
 206         * aclocal.m4: Regenerate.
 207         * configure: Regenerate.
 208
 209 2008-04-23  David S. Miller  <davem@davemloft.net>
 210
 211         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 212         extended values.
 213         (prefetch_table): Add missing values.
 214
 215 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 216
 217         * i386-gen.c (opcode_modifiers): Add NoAVX.
 218
 219         * i386-opc.h (NoAVX): New.
 220         (OldGcc): Updated.
 221         (i386_opcode_modifier): Add noavx.
 222
 223         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 224         instructions which don't have AVX equivalent.
 225         * i386-tbl.h: Regenerated.
 226
 227 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 228
 229         * i386-dis.c (OP_VEX_FMA): New.
 230         (OP_EX_VexImmW): Likewise.
 231         (VexFMA): Likewise.
 232         (Vex128FMA): Likewise.
 233         (EXVexImmW): Likewise.
 234         (get_vex_imm8): Likewise.
 235         (OP_EX_VexReg): Likewise.
 236         (vex_i4_done): Renamed to ...
 237         (vex_w_done): This.
 238         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 239         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 240         FMA instructions.
 241         (print_insn): Updated.
 242         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 243         (OP_REG_VexI4): Check invalid high registers.
 244
 245 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 246             Michael Meissner  <michael.meissner@amd.com>
 247
 248         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 249         * i386-tbl.h: Regenerate from i386-opc.tbl.
 250
 251 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 252
 253         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 254         accept Power E500MC instructions.
 255         (print_ppc_disassembler_options): Document -Me500mc.
 256         * ppc-opc.c (DUIS, DUI, T): New.
 257         (XRT, XRTRA): Likewise.
 258         (E500MC): Likewise.
 259         (powerpc_opcodes): Add new Power E500MC instructions.
 260
 261 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 262
 263         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 264         (print_s390_disassembler_options): New function.
 265         * disassemble.c (disassembler_usage): Invoke
 266         print_s390_disassembler_options.
 267
 268 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 269
 270         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 271         of local variables used for mnemonic parsing: prefix, suffix and
 272         number.
 273
 274 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 275
 276         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 277         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 278         (s390_crb_extensions): New extensions table.
 279         (insertExpandedMnemonic): Handle '$' tag.
 280         * s390-opc.txt: Remove conditional jump variants which can now
 281         be expanded automatically.
 282         Replace '*' tag with '$' in the compare and branch instructions.
 283
 284 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 285
 286         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 287         (PREFIX_VEX_3AXX): Likewis.
 288
 289 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 290
 291         * i386-opc.tbl: Remove 4 extra blank lines.
 292
 293 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 294
 295         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 296         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 297         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 298         * i386-opc.tbl: Likewise.
 299
 300         * i386-opc.h (CpuCLMUL): Renamed to ...
 301         (CpuPCLMUL): This.
 302         (CpuFMA): Updated.
 303         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 304
 305         * i386-init.h: Regenerated.
 306
 307 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 308
 309         * i386-dis.c (OP_E_register): New.
 310         (OP_E_memory): Likewise.
 311         (OP_VEX): Likewise.
 312         (OP_EX_Vex): Likewise.
 313         (OP_EX_VexW): Likewise.
 314         (OP_XMM_Vex): Likewise.
 315         (OP_XMM_VexW): Likewise.
 316         (OP_REG_VexI4): Likewise.
 317         (PCLMUL_Fixup): Likewise.
 318         (VEXI4_Fixup): Likewise.
 319         (VZERO_Fixup): Likewise.
 320         (VCMP_Fixup): Likewise.
 321         (VPERMIL2_Fixup): Likewise.
 322         (rex_original): Likewise.
 323         (rex_ignored): Likewise.
 324         (Mxmm): Likewise.
 325         (XMM): Likewise.
 326         (EXxmm): Likewise.
 327         (EXxmmq): Likewise.
 328         (EXymmq): Likewise.
 329         (Vex): Likewise.
 330         (Vex128): Likewise.
 331         (Vex256): Likewise.
 332         (VexI4): Likewise.
 333         (EXdVex): Likewise.
 334         (EXqVex): Likewise.
 335         (EXVexW): Likewise.
 336         (EXdVexW): Likewise.
 337         (EXqVexW): Likewise.
 338         (XMVex): Likewise.
 339         (XMVexW): Likewise.
 340         (XMVexI4): Likewise.
 341         (PCLMUL): Likewise.
 342         (VZERO): Likewise.
 343         (VCMP): Likewise.
 344         (VPERMIL2): Likewise.
 345         (xmm_mode): Likewise.
 346         (xmmq_mode): Likewise.
 347         (ymmq_mode): Likewise.
 348         (vex_mode): Likewise.
 349         (vex128_mode): Likewise.
 350         (vex256_mode): Likewise.
 351         (USE_VEX_C4_TABLE): Likewise.
 352         (USE_VEX_C5_TABLE): Likewise.
 353         (USE_VEX_LEN_TABLE): Likewise.
 354         (VEX_C4_TABLE): Likewise.
 355         (VEX_C5_TABLE): Likewise.
 356         (VEX_LEN_TABLE): Likewise.
 357         (REG_VEX_XX): Likewise.
 358         (MOD_VEX_XXX): Likewise.
 359         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 360         (PREFIX_0F3A44): Likewise.
 361         (PREFIX_0F3ADF): Likewise.
 362         (PREFIX_VEX_XXX): Likewise.
 363         (VEX_OF): Likewise.
 364         (VEX_OF38): Likewise.
 365         (VEX_OF3A): Likewise.
 366         (VEX_LEN_XXX): Likewise.
 367         (vex): Likewise.
 368         (need_vex): Likewise.
 369         (need_vex_reg): Likewise.
 370         (vex_i4_done): Likewise.
 371         (vex_table): Likewise.
 372         (vex_len_table): Likewise.
 373         (OP_REG_VexI4): Likewise.
 374         (vex_cmp_op): Likewise.
 375         (pclmul_op): Likewise.
 376         (vpermil2_op): Likewise.
 377         (m_mode): Updated.
 378         (es_reg): Likewise.
 379         (PREFIX_0F38F0): Likewise.
 380         (PREFIX_0F3A60): Likewise.
 381         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 382         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 383         and PREFIX_VEX_XXX entries.
 384         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 385         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 386         PREFIX_0F3ADF.
 387         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 388         Add MOD_VEX_XXX entries.
 389         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 390         REX byte in rex_original.
 391         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 392         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 393         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 394         calling get_valid_dis386.  Use rex_original and rex_ignored when
 395         printing out REX.
 396         (putop): Handle "XY".
 397         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 398         ymmq_mode.
 399         (OP_E_extended): Updated to use OP_E_register and
 400         OP_E_memory.
 401         (OP_XMM): Handle VEX.
 402         (OP_EX): Likewise.
 403         (XMM_Fixup): Likewise.
 404         (CMP_Fixup): Use ARRAY_SIZE.
 405
 406         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 407         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 408         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 409         OPERAND_TYPE_VEX_IMM4.
 410         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 411         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 412         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 413         VexImmExt and SSE2AVX.
 414         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 415
 416         * i386-opc.h (CpuAVX): New.
 417         (CpuAES): Likewise.
 418         (CpuCLMUL): Likewise.
 419         (CpuFMA): Likewise.
 420         (Vex): Likewise.
 421         (Vex256): Likewise.
 422         (VexNDS): Likewise.
 423         (VexNDD): Likewise.
 424         (VexW0): Likewise.
 425         (VexW1): Likewise.
 426         (Vex0F): Likewise.
 427         (Vex0F38): Likewise.
 428         (Vex0F3A): Likewise.
 429         (Vex3Sources): Likewise.
 430         (VexImmExt): Likewise.
 431         (SSE2AVX): Likewise.
 432         (RegYMM): Likewise.
 433         (Ymmword): Likewise.
 434         (Vex_Imm4): Likewise.
 435         (Implicit1stXmm0): Likewise.
 436         (CpuXsave): Updated.
 437         (CpuLM): Likewise.
 438         (ByteOkIntel): Likewise.
 439         (OldGcc): Likewise.
 440         (Control): Likewise.
 441         (Unspecified): Likewise.
 442         (OTMax): Likewise.
 443         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 444         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 445         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 446         vex3sources, veximmext and sse2avx.
 447         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 448
 449         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 450
 451         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 452
 453         * i386-init.h: Regenerated.
 454         * i386-tbl.h: Likewise.
 455
 456 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 457
 458         From  Robin Getz  <robin.getz@analog.com>
 459         * bfin-dis.c (bu32): Typedef.
 460         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 461         (constant_formats[]): Add uimm32 and huimm16.
 462         (fmtconst_val): New.
 463         (uimm32): Define.
 464         (huimm32): Define.
 465         (imm16_val): Define.
 466         (luimm16_val): Define.
 467         (struct saved_state): Define.
 468         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 469         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 470         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 471         (get_allreg): New.
 472         (decode_LDIMMhalf_0): Print out the whole register value.
 473
 474         From Jie Zhang  <jie.zhang@analog.com>
 475         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 476         multiply and multiply-accumulate to data register instruction.
 477
 478         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 479         c_imm32, c_huimm32e): Define.
 480         (constant_formats): Add flags for printing decimal, leading spaces, and
 481         exact symbols.
 482         (comment, parallel): Add global flags in all disassembly.
 483         (fmtconst): Take advantage of new flags, and print default in hex.
 484         (fmtconst_val): Likewise.
 485         (decode_macfunc): Be consistant with spaces, tabs, comments,
 486         capitalization in disassembly, fix minor coding style issues.
 487         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 488         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 489         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 490         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 491         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 492         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 493         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 494         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 495         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 496         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 497         _print_insn_bfin, print_insn_bfin): Likewise.
 498
 499 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 500
 501         * aclocal.m4: Regenerate.
 502         * configure: Likewise.
 503         * Makefile.in: Likewise.
 504
 505 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 506
 507         * Makefile.am: Run "make dep-am".
 508         * Makefile.in: Regenerate.
 509         * configure: Regenerate.
 510
 511 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 512
 513         * ppc-opc.c (powerpc_opcodes): Order and format.
 514
 515 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 516
 517         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 518         * i386-tbl.h: Regenerated.
 519
 520 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 521
 522         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 523         x86-64.
 524         * i386-tbl.h: Regenerated.
 525
 526 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 527
 528         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 529         and Fword for far indirect jmp. Allow Reg16 and Word for near
 530         indirect jmp on x86-64. Disallow Fword for lcall.
 531         * i386-tbl.h: Re-generate.
 532
 533 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 534
 535         * cr16-opc.c  (cr16_num_optab): Defined
 536
 537 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 538
 539         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 540         * i386-init.h: Regenerated.
 541
 542 2008-02-14  Nick Clifton  <nickc@redhat.com>
 543
 544         PR binutils/5524
 545         * configure.in (SHARED_LIBADD): Select the correct host specific
 546         file extension for shared libraries.
 547         * configure: Regenerate.
 548
 549 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 550
 551         * i386-opc.h (RegFlat): New.
 552         * i386-reg.tbl (flat): Add.
 553         * i386-tbl.h: Re-generate.
 554
 555 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 556
 557         * i386-dis.c (a_mode): New.
 558         (cond_jump_mode): Adjust.
 559         (Ma): Change to a_mode.
 560         (intel_operand_size): Handle a_mode.
 561         * i386-opc.tbl: Allow Dword and Qword for bound.
 562         * i386-tbl.h: Re-generate.
 563
 564 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 565
 566         * i386-gen.c (process_i386_registers): Process new fields.
 567         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 568         unsigned char. Add dw2_regnum and Dw2Inval.
 569         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 570         register names.
 571         * i386-tbl.h: Re-generate.
 572
 573 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 574
 575         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 576         * i386-init.h: Updated.
 577
 578 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 579
 580         * i386-gen.c (cpu_flags): Add CpuXsave.
 581
 582         * i386-opc.h (CpuXsave): New.
 583         (CpuLM): Updated.
 584         (i386_cpu_flags): Add cpuxsave.
 585
 586         * i386-dis.c (MOD_0FAE_REG_4): New.
 587         (RM_0F01_REG_2): Likewise.
 588         (MOD_0FAE_REG_5): Updated.
 589         (RM_0F01_REG_3): Likewise.
 590         (reg_table): Use MOD_0FAE_REG_4.
 591         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 592         for xrstor.
 593         (rm_table): Add RM_0F01_REG_2.
 594
 595         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 596         * i386-init.h: Regenerated.
 597         * i386-tbl.h: Likewise.
 598
 599 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 600
 601         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 602         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 603         * i386-tbl.h: Re-generate.
 604
 605 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 606
 607         PR 5715
 608         * configure: Regenerated.
 609
 610 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 611
 612         * mips-dis.c: Update copyright.
 613         (mips_arch_choices): Add Octeon.
 614         * mips-opc.c: Update copyright.
 615         (IOCT): New macro.
 616         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 617
 618 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 619
 620         * ppc-opc.c: Support optional L form mtmsr.
 621
 622 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 623
 624         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 625
 626 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 627
 628         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 629         * i386-init.h: Regenerated.
 630
 631 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 632
 633         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 634         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 635
 636 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 637
 638         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 639         (cpu_flags): Likewise.
 640
 641         * i386-opc.h (CpuMMX2): Removed.
 642         (CpuSSE): Updated.
 643
 644         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 645         * i386-init.h: Regenerated.
 646         * i386-tbl.h: Likewise.
 647
 648 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 649
 650         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 651         CPU_SMX_FLAGS.
 652         * i386-init.h: Regenerated.
 653
 654 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 655
 656         * i386-opc.tbl: Use Qword on movddup.
 657         * i386-tbl.h: Regenerated.
 658
 659 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 660
 661         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 662         * i386-tbl.h: Regenerated.
 663
 664 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 665
 666         * i386-dis.c (Mx): New.
 667         (PREFIX_0FC3): Likewise.
 668         (PREFIX_0FC7_REG_6): Updated.
 669         (dis386_twobyte): Use PREFIX_0FC3.
 670         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 671         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 672         movntss.
 673
 674 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 675
 676         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 677         (operand_types): Add Mem.
 678
 679         * i386-opc.h (IntelSyntax): New.
 680         * i386-opc.h (Mem): New.
 681         (Byte): Updated.
 682         (Opcode_Modifier_Max): Updated.
 683         (i386_opcode_modifier): Add intelsyntax.
 684         (i386_operand_type): Add mem.
 685
 686         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 687         instructions.
 688
 689         * i386-reg.tbl: Add size for accumulator.
 690
 691         * i386-init.h: Regenerated.
 692         * i386-tbl.h: Likewise.
 693
 694 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 695
 696         * i386-opc.h (Byte): Fix a typo.
 697
 698 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 699
 700         PR gas/5534
 701         * i386-gen.c (operand_type_init): Add Dword to
 702         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 703         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 704         Qword and Xmmword.
 705         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 706         Xmmword, Unspecified and Anysize.
 707         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 708         an alias of Xmmword.
 709
 710         * i386-opc.h (CheckSize): Removed.
 711         (Byte): Updated.
 712         (Word): Likewise.
 713         (Dword): Likewise.
 714         (Qword): Likewise.
 715         (Xmmword): Likewise.
 716         (FWait): Updated.
 717         (OTMax): Likewise.
 718         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 719         qword and xmmword.
 720         (Fword): New.
 721         (TBYTE): Likewise.
 722         (Unspecified): Likewise.
 723         (Anysize): Likewise.
 724         (i386_operand_type): Add byte, word, dword, fword, qword,
 725         tbyte xmmword, unspecified and anysize.
 726
 727         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 728         Tbyte, Xmmword, Unspecified and Anysize.
 729
 730         * i386-reg.tbl: Add size for accumulator.
 731
 732         * i386-init.h: Regenerated.
 733         * i386-tbl.h: Likewise.
 734
 735 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 736
 737         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 738         (REG_0F18): Updated.
 739         (reg_table): Updated.
 740         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 741         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 742
 743 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 744
 745         * i386-gen.c (set_bitfield): Use fail () on error.
 746
 747 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 748
 749         * i386-gen.c (lineno): New.
 750         (filename): Likewise.
 751         (set_bitfield): Report filename and line numer on error.
 752         (process_i386_opcodes): Set filename and update lineno.
 753         (process_i386_registers): Likewise.
 754
 755 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 756
 757         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 758         ATTSyntax.
 759
 760         * i386-opc.h (IntelMnemonic): Renamed to ..
 761         (ATTSyntax): This
 762         (Opcode_Modifier_Max): Updated.
 763         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 764         and intelsyntax.
 765
 766         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 767         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 768         * i386-tbl.h: Regenerated.
 769
 770 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 771
 772         * i386-gen.c: Update copyright to 2008.
 773         * i386-opc.h: Likewise.
 774         * i386-opc.tbl: Likewise.
 775
 776         * i386-init.h: Regenerated.
 777         * i386-tbl.h: Likewise.
 778
 779 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 780
 781         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 782         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 783         * i386-tbl.h: Regenerated.
 784
 785 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 786
 787         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 788         CpuSSE4_2_Or_ABM.
 789         (cpu_flags): Likewise.
 790
 791         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 792         (CpuSSE4_2_Or_ABM): Likewise.
 793         (CpuLM): Updated.
 794         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 795
 796         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 797         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 798         and CpuPadLock, respectively.
 799         * i386-init.h: Regenerated.
 800         * i386-tbl.h: Likewise.
 801
 802 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 803
 804         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 805
 806         * i386-opc.h (No_xSuf): Removed.
 807         (CheckSize): Updated.
 808
 809         * i386-tbl.h: Regenerated.
 810
 811 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 812
 813         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 814         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 815         CPU_SSE5_FLAGS.
 816         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 817
 818         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 819         (CpuLM): Updated.
 820         (i386_cpu_flags): Add cpusse4_2_or_abm.
 821
 822         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 823         CpuABM|CpuSSE4_2 on popcnt.
 824         * i386-init.h: Regenerated.
 825         * i386-tbl.h: Likewise.
 826
 827 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 828
 829         * i386-opc.h: Update comments.
 830
 831 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 832
 833         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 834         * i386-opc.h: Likewise.
 835         * i386-opc.tbl: Likewise.
 836
 837 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 838
 839         PR gas/5534
 840         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 841         Byte, Word, Dword, QWord and Xmmword.
 842
 843         * i386-opc.h (No_xSuf): New.
 844         (CheckSize): Likewise.
 845         (Byte): Likewise.
 846         (Word): Likewise.
 847         (Dword): Likewise.
 848         (QWord): Likewise.
 849         (Xmmword): Likewise.
 850         (FWait): Updated.
 851         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 852         Dword, QWord and Xmmword.
 853
 854         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 855         used.
 856         * i386-tbl.h: Regenerated.
 857
 858 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 859
 860         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 861         From Miod Vallat.
 862
 863 For older changes see ChangeLog-2007
 864 \f
 865 Local Variables:
 866 mode: change-log
 867 left-margin: 8
 868 fill-column: 74
 869 version-control: never
 870 End: