opcodes/ChangeLog

   1 2010-09-22  Robin Getz  <robin.getz@analog.com>
   2
   3         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
   4
   5 2010-09-22  Robin Getz  <robin.getz@analog.com>
   6
   7         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
   8         (reg_names): Likewise.
   9         (decode_statbits): Likewise; while reformatting to make manageable.
  10
  11 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  12
  13         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
  14         (decode_pseudoOChar_0): New function.
  15         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
  16
  17 2010-09-22  Robin Getz  <robin.getz@analog.com>
  18
  19         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
  20         LSHIFT instead of SHIFT.
  21
  22 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  23
  24         * bfin-dis.c (constant_formats): Constify the whole structure.
  25         (fmtconst): Add const to return value.
  26         (reg_names): Mark const.
  27         (decode_multfunc): Mark s0/s1 as const.
  28         (decode_macfunc): Mark a/sop as const.
  29
  30 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
  31
  32         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
  33
  34 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
  35
  36         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
  37         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
  38
  39 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
  40
  41         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
  42         dlx_insn_type array.
  43
  44 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
  45
  46         PR binutils/11960
  47         * i386-dis.c (sIv): New.
  48         (dis386): Replace Iq with sIv on "pushT".
  49         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
  50         (x86_64_table): Replace {T|}/{P|} with P.
  51         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
  52         (OP_sI): Update v_mode.  Remove w_mode.
  53
  54 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
  55
  56         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
  57         on E500 and E500MC.
  58
  59 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
  60
  61         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
  62         prefetchw.
  63
  64 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  65
  66         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
  67         to processor flags for PENTIUMPRO processors and later.
  68         * i386-opc.h (enum): Add CpuNop.
  69         (i386_cpu_flags): Add cpunop bit.
  70         * i386-opc.tbl: Change nop cpu_flags.
  71         * i386-init.h: Regenerated.
  72         * i386-tbl.h: Likewise.
  73
  74 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  75
  76         * i386-opc.h (enum): Fix typos in comments.
  77
  78 2010-08-06  Alan Modra  <amodra@gmail.com>
  79
  80         * disassemble.c: Formatting.
  81         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
  82
  83 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  84
  85         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
  86         * i386-tbl.h: Regenerated.
  87
  88 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  89
  90         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
  91
  92         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
  93         * i386-tbl.h: Regenerated.
  94
  95 2010-07-29  DJ Delorie  <dj@redhat.com>
  96
  97         * rx-decode.opc (SRR): New.
  98         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
  99         r0,r0) and NOP3 (max r0,r0) special cases.
 100         * rx-decode.c: Regenerate.
 101
 102 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 103
 104         * i386-dis.c: Add 0F to VEX opcode enums.
 105
 106 2010-07-27  DJ Delorie  <dj@redhat.com>
 107
 108         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 109         (rx_decode_opcode): Likewise.
 110         * rx-decode.c: Regenerate.
 111
 112 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 113             Ina Pandit  <ina.pandit@kpitcummins.com>
 114
 115         * v850-dis.c (v850_sreg_names): Updated structure for system
 116         registers.
 117         (float_cc_names): new structure for condition codes.
 118         (print_value): Update the function that prints value.
 119         (get_operand_value): New function to get the operand value.
 120         (disassemble): Updated to handle the disassembly of instructions.
 121         (print_insn_v850): Updated function to print instruction for different
 122         families.
 123         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 124         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 125         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 126         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 127         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 128         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 129         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 130         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 131         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 132         (v850_operands): Update with the relocation name. Also update
 133         the instructions with specific set of processors.
 134
 135 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 136
 137         * arm-dis.c (print_insn_arm): Add cases for printing more
 138         symbolic operands.
 139         (print_insn_thumb32): Likewise.
 140
 141 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 142
 143         * mips-dis.c (print_insn_mips): Correct branch instruction type
 144         determination.
 145
 146 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 147
 148         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 149         type and delay slot determination.
 150         (print_insn_mips16): Extend branch instruction type and delay
 151         slot determination to cover all instructions.
 152         * mips16-opc.c (BR): Remove macro.
 153         (UBR, CBR): New macros.
 154         (mips16_opcodes): Update branch annotation for "b", "beqz",
 155         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 156         and "jrc".
 157
 158 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 159
 160         AVX Programming Reference (June, 2010)
 161         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 162         * i386-opc.tbl: Likewise.
 163         * i386-tbl.h: Regenerated.
 164
 165 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 166
 167         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 168
 169 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 170
 171         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 172         ppc_cpu_t before inverting.
 173         (ppc_parse_cpu): Likewise.
 174         (print_insn_powerpc): Likewise.
 175
 176 2010-07-03  Alan Modra  <amodra@gmail.com>
 177
 178         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 179         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 180         (PPC64, MFDEC2): Update.
 181         (NON32, NO371): Define.
 182         (powerpc_opcode): Update to not use old opcode flags, and avoid
 183         -m601 duplicates.
 184
 185 2010-07-03  DJ Delorie  <dj@delorie.com>
 186
 187         * m32c-ibld.c: Regenerate.
 188
 189 2010-07-03  Alan Modra  <amodra@gmail.com>
 190
 191         * ppc-opc.c (PWR2COM): Define.
 192         (PPCPWR2): Add PPC_OPCODE_COMMON.
 193         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 194         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 195         "rac" from -mcom.
 196
 197 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 198
 199         AVX Programming Reference (June, 2010)
 200         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 201         (PREFIX_0FAE_REG_1): Likewise.
 202         (PREFIX_0FAE_REG_2): Likewise.
 203         (PREFIX_0FAE_REG_3): Likewise.
 204         (PREFIX_VEX_3813): Likewise.
 205         (PREFIX_VEX_3A1D): Likewise.
 206         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 207         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 208         PREFIX_VEX_3A1D.
 209         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 210         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 211         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 212
 213         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 214         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 215         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 216
 217         * i386-opc.h (CpuXsaveopt): New.
 218         (CpuFSGSBase): Likewise.
 219         (CpuRdRnd): Likewise.
 220         (CpuF16C): Likewise.
 221         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 222         cpuf16c.
 223
 224         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 225         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 226         * i386-init.h: Regenerated.
 227         * i386-tbl.h: Likewise.
 228
 229 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 230
 231         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 232         and mtocrf on EFS.
 233
 234 2010-06-29  Alan Modra  <amodra@gmail.com>
 235
 236         * maxq-dis.c: Delete file.
 237         * Makefile.am: Remove references to maxq.
 238         * configure.in: Likewise.
 239         * disassemble.c: Likewise.
 240         * Makefile.in: Regenerate.
 241         * configure: Regenerate.
 242         * po/POTFILES.in: Regenerate.
 243
 244 2010-06-29  Alan Modra  <amodra@gmail.com>
 245
 246         * mep-dis.c: Regenerate.
 247
 248 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 249
 250         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 251
 252 2010-06-27  Alan Modra  <amodra@gmail.com>
 253
 254         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 255         (decodeInstr): Likewise.
 256         * dlx-dis.c (print_insn_dlx): Likewise.
 257         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 258         * maxq-dis.c (check_move, print_insn): Likewise.
 259         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 260         * msp430-dis.c (msp430_branchinstr): Likewise.
 261         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 262         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 263         * sparc-dis.c (print_insn_sparc): Likewise.
 264         * fr30-asm.c: Regenerate.
 265         * frv-asm.c: Regenerate.
 266         * ip2k-asm.c: Regenerate.
 267         * iq2000-asm.c: Regenerate.
 268         * lm32-asm.c: Regenerate.
 269         * m32c-asm.c: Regenerate.
 270         * m32r-asm.c: Regenerate.
 271         * mep-asm.c: Regenerate.
 272         * mt-asm.c: Regenerate.
 273         * openrisc-asm.c: Regenerate.
 274         * xc16x-asm.c: Regenerate.
 275         * xstormy16-asm.c: Regenerate.
 276
 277 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 278
 279         PR gas/11673
 280         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 281
 282 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 283
 284         PR binutils/11676
 285         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 286
 287 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 288
 289         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 290         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 291         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 292         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 293         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 294         Treat lwsync as msync on e500.
 295
 296 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 297
 298         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 299
 300 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 301
 302         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 303         constants is the same on 32-bit and 64-bit hosts.
 304
 305 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 306
 307         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 308         .short directives so that they can be reassembled.
 309
 310 2010-05-26  Catherine Moore <clm@codesourcery.com>
 311             David Ung  <davidu@mips.com>
 312
 313         * mips-opc.c: Change membership to I1 for instructions ssnop and
 314         ehb.
 315
 316 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 317
 318         * i386-dis.c (sib): New.
 319         (get_sib): Likewise.
 320         (print_insn): Call get_sib.
 321         OP_E_memory): Use sib.
 322
 323 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 324
 325         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 326         * mips-opc.c (I16): Remove.
 327         (mips_builtin_op): Reclassify jalx.
 328
 329 2010-05-19  Alan Modra  <amodra@gmail.com>
 330
 331         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 332         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 333
 334 2010-05-13  Alan Modra  <amodra@gmail.com>
 335
 336         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 337
 338 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 339
 340         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 341         format.
 342         (print_insn_thumb16): Add support for new %W format.
 343
 344 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 345
 346         * Makefile.in: Regenerate with automake 1.11.1.
 347         * aclocal.m4: Ditto.
 348
 349 2010-05-05  Nick Clifton  <nickc@redhat.com>
 350
 351         * po/es.po: Updated Spanish translation.
 352
 353 2010-04-22  Nick Clifton  <nickc@redhat.com>
 354
 355         * po/opcodes.pot: Updated by the Translation project.
 356         * po/vi.po: Updated Vietnamese translation.
 357
 358 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 359
 360         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 361         bits in opcode.
 362
 363 2010-04-09  Nick Clifton  <nickc@redhat.com>
 364
 365         * i386-dis.c (print_insn): Remove unused variable op.
 366         (OP_sI): Remove unused variable mask.
 367
 368 2010-04-07  Alan Modra  <amodra@gmail.com>
 369
 370         * configure: Regenerate.
 371
 372 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 373
 374         * ppc-opc.c (RBOPT): New define.
 375         ("dccci"): Enable for PPCA2.  Make operands optional.
 376         ("iccci"): Likewise.  Do not deprecate for PPC476.
 377
 378 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 379
 380         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 381
 382 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 383
 384         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 385         * Makefile.in: Regenerate.
 386         * configure.in (bfd_tic6x_arch): New.
 387         * configure: Regenerate.
 388         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 389         (disassembler): Handle TI C6X.
 390         * tic6x-dis.c: New.
 391
 392 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 393
 394         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 395
 396 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 397
 398         * dis-buf.c (buffer_read_memory): Give error for reading just
 399         before the start of memory.
 400
 401 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 402             Quentin Neill <quentin.neill@amd.com>
 403
 404         * i386-dis.c (OP_LWP_I): Removed.
 405         (reg_table): Do not use OP_LWP_I, use Iq.
 406         (OP_LWPCB_E): Remove use of names16.
 407         (OP_LWP_E): Same.
 408         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 409         should not set the Vex.length bit.
 410         * i386-tbl.h: Regenerated.
 411
 412 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 413
 414         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 415
 416 2010-02-24  Nick Clifton  <nickc@redhat.com>
 417
 418         PR binutils/6773
 419         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 420         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 421         (thumb32_opcodes): Likewise.
 422
 423 2010-02-15  Nick Clifton  <nickc@redhat.com>
 424
 425         * po/vi.po: Updated Vietnamese translation.
 426
 427 2010-02-12  Doug Evans  <dje@sebabeach.org>
 428
 429         * lm32-opinst.c: Regenerate.
 430
 431 2010-02-11  Doug Evans  <dje@sebabeach.org>
 432
 433         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 434         (print_address): Delete CGEN_PRINT_ADDRESS.
 435         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 436         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 437         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 438         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 439
 440         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 441         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 442         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 443         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 444         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 445         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 446         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 447         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 448         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 449         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 450         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 451         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 452
 453 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 454
 455         * i386-dis.c: Update copyright.
 456         * i386-gen.c: Likewise.
 457         * i386-opc.h: Likewise.
 458         * i386-opc.tbl: Likewise.
 459
 460 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 461             Sebastian Pop  <sebastian.pop@amd.com>
 462
 463         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 464         function to handle 5th imm8 operand.
 465         (PREFIX_VEX_3A48): Added.
 466         (PREFIX_VEX_3A49): Added.
 467         (VEX_W_3A48_P_2): Added.
 468         (VEX_W_3A49_P_2): Added.
 469         (prefix table): Added entries for PREFIX_VEX_3A48
 470         and PREFIX_VEX_3A49.
 471         (vex table): Added entries for VEX_W_3A48_P_2 and
 472         and VEX_W_3A49_P_2.
 473         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 474         for Vec_Imm4 operands.
 475         * i386-opc.h (enum): Added Vec_Imm4.
 476         (i386_operand_type): Added vec_imm4.
 477         * i386-opc.tbl: Add entries for vpermilp[ds].
 478         * i386-init.h: Regenerated.
 479         * i386-tbl.h: Regenerated.
 480
 481 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 482
 483         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 484         and "pwr7".  Move "a2" into alphabetical order.
 485
 486 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 487
 488         * ppc-dis.c (ppc_opts): Add titan entry.
 489         * ppc-opc.c (TITAN, MULHW): Define.
 490         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 491
 492 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 493
 494         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 495         to CPU_BDVER1_FLAGS
 496         * i386-init.h: Regenerated.
 497
 498 2010-02-03  Anthony Green  <green@moxielogic.com>
 499
 500         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 501         0x0f, and make 0x00 an illegal instruction.
 502
 503 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 504
 505         * opcodes/arm-dis.c (struct arm_private_data): New.
 506         (print_insn_coprocessor, print_insn_arm): Update to use struct
 507         arm_private_data.
 508         (is_mapping_symbol, get_map_sym_type): New functions.
 509         (get_sym_code_type): Check the symbol's section.  Do not check
 510         mapping symbols.
 511         (print_insn): Default to disassembling ARM mode code.  Check
 512         for mapping symbols separately from other symbols.  Use
 513         struct arm_private_data.
 514
 515 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 516
 517         * i386-dis.c (EXVexWdqScalar): New.
 518         (vex_scalar_w_dq_mode): Likewise.
 519         (prefix_table): Update entries for PREFIX_VEX_3899,
 520         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 521         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 522         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 523         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 524         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 525         (OP_EX): Likewise.
 526
 527 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 528
 529         * i386-dis.c (XMScalar): New.
 530         (EXdScalar): Likewise.
 531         (EXqScalar): Likewise.
 532         (EXqScalarS): Likewise.
 533         (VexScalar): Likewise.
 534         (EXdVexScalarS): Likewise.
 535         (EXqVexScalarS): Likewise.
 536         (XMVexScalar): Likewise.
 537         (scalar_mode): Likewise.
 538         (d_scalar_mode): Likewise.
 539         (d_scalar_swap_mode): Likewise.
 540         (q_scalar_mode): Likewise.
 541         (q_scalar_swap_mode): Likewise.
 542         (vex_scalar_mode): Likewise.
 543         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 544         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 545         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 546         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 547         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 548         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 549         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 550         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 551         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 552         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 553         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 554         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 555         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 556         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 557         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 558         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 559         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 560         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 561         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 562         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 563         q_scalar_mode, q_scalar_swap_mode.
 564         (OP_XMM): Handle scalar_mode.
 565         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 566         and q_scalar_swap_mode.
 567         (OP_VEX): Handle vex_scalar_mode.
 568
 569 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 570
 571         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 572
 573 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 574
 575         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 576
 577 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 578
 579         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 580
 581 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 582
 583         * i386-dis.c (Bad_Opcode): New.
 584         (bad_opcode): Likewise.
 585         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 586         (dis386_twobyte): Likewise.
 587         (reg_table): Likewise.
 588         (prefix_table): Likewise.
 589         (x86_64_table): Likewise.
 590         (vex_len_table): Likewise.
 591         (vex_w_table): Likewise.
 592         (mod_table): Likewise.
 593         (rm_table): Likewise.
 594         (float_reg): Likewise.
 595         (reg_table): Remove trailing "(bad)" entries.
 596         (prefix_table): Likewise.
 597         (x86_64_table): Likewise.
 598         (vex_len_table): Likewise.
 599         (vex_w_table): Likewise.
 600         (mod_table): Likewise.
 601         (rm_table): Likewise.
 602         (get_valid_dis386): Handle bytemode 0.
 603
 604 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 605
 606         * i386-opc.h (VEXScalar): New.
 607
 608         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 609         instructions.
 610         * i386-tbl.h: Regenerated.
 611
 612 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 613
 614         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 615
 616         * i386-opc.tbl: Add xsave64 and xrstor64.
 617         * i386-tbl.h: Regenerated.
 618
 619 2010-01-20  Nick Clifton  <nickc@redhat.com>
 620
 621         PR 11170
 622         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 623         based post-indexed addressing.
 624
 625 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 626
 627         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 628         * i386-tbl.h: Regenerated.
 629
 630 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 631
 632         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 633         comments.
 634
 635 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 636
 637         * i386-dis.c (names_mm): New.
 638         (intel_names_mm): Likewise.
 639         (att_names_mm): Likewise.
 640         (names_xmm): Likewise.
 641         (intel_names_xmm): Likewise.
 642         (att_names_xmm): Likewise.
 643         (names_ymm): Likewise.
 644         (intel_names_ymm): Likewise.
 645         (att_names_ymm): Likewise.
 646         (print_insn): Set names_mm, names_xmm and names_ymm.
 647         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 648         (OP_XMM): Likewise.
 649         (OP_EM): Likewise.
 650         (OP_EMC): Likewise.
 651         (OP_MXC): Likewise.
 652         (OP_EX): Likewise.
 653         (XMM_Fixup): Likewise.
 654         (OP_VEX): Likewise.
 655         (OP_EX_VexReg): Likewise.
 656         (OP_Vex_2src): Likewise.
 657         (OP_Vex_2src_1): Likewise.
 658         (OP_Vex_2src_2): Likewise.
 659         (OP_REG_VexI4): Likewise.
 660
 661 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 662
 663         * i386-dis.c (print_insn): Update comments.
 664
 665 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 666
 667         * i386-dis.c (rex_original): Removed.
 668         (ckprefix): Remove rex_original.
 669         (print_insn): Update comments.
 670
 671 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 672
 673         * Makefile.in: Regenerate.
 674         * configure: Regenerate.
 675
 676 2010-01-07  Doug Evans  <dje@sebabeach.org>
 677
 678         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 679         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 680         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 681         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 682         * xstormy16-ibld.c: Regenerate.
 683
 684 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 685
 686         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 687         * i386-init.h: Regenerated.
 688
 689 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 690
 691         * arm-dis.c (print_insn): Fixed search for next symbol and data
 692         dumping condition, and the initial mapping symbol state.
 693
 694 2010-01-05  Doug Evans  <dje@sebabeach.org>
 695
 696         * cgen-ibld.in: #include "cgen/basic-modes.h".
 697         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 698         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 699         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 700         * xstormy16-ibld.c: Regenerate.
 701
 702 2010-01-04  Nick Clifton  <nickc@redhat.com>
 703
 704         PR 11123
 705         * arm-dis.c (print_insn_coprocessor): Initialise value.
 706
 707 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 708
 709         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 710
 711 2010-01-02  Doug Evans  <dje@sebabeach.org>
 712
 713         * cgen-asm.in: Update copyright year.
 714         * cgen-dis.in: Update copyright year.
 715         * cgen-ibld.in: Update copyright year.
 716         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 717         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 718         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 719         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 720         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 721         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 722         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 723         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 724         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 725         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 726         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 727         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 728         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 729         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 730         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 731         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 732         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 733         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 734         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 735         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 736         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 737
 738 For older changes see ChangeLog-2009
 739 \f
 740 Local Variables:
 741 mode: change-log
 742 left-margin: 8
 743 fill-column: 74
 744 version-control: never
 745 End: