opcodes/ChangeLog

   1 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
   2
   3         * cr16-opc.c (cr16_instruction): Fix typo in comment.
   4
   5 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
   6
   7         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
   8         * Makefile.in: Regenerate.
   9         * configure.in (bfd_tic6x_arch): New.
  10         * configure: Regenerate.
  11         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
  12         (disassembler): Handle TI C6X.
  13         * tic6x-dis.c: New.
  14
  15 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
  16
  17         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
  18
  19 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
  20
  21         * dis-buf.c (buffer_read_memory): Give error for reading just
  22         before the start of memory.
  23
  24 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
  25             Quentin Neill <quentin.neill@amd.com>
  26
  27         * i386-dis.c (OP_LWP_I): Removed.
  28         (reg_table): Do not use OP_LWP_I, use Iq.
  29         (OP_LWPCB_E): Remove use of names16.
  30         (OP_LWP_E): Same.
  31         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
  32         should not set the Vex.length bit.
  33         * i386-tbl.h: Regenerated.
  34
  35 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
  36
  37         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
  38
  39 2010-02-24  Nick Clifton  <nickc@redhat.com>
  40
  41         PR binutils/6773
  42         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
  43         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
  44         (thumb32_opcodes): Likewise.
  45
  46 2010-02-15  Nick Clifton  <nickc@redhat.com>
  47
  48         * po/vi.po: Updated Vietnamese translation.
  49
  50 2010-02-12  Doug Evans  <dje@sebabeach.org>
  51
  52         * lm32-opinst.c: Regenerate.
  53
  54 2010-02-11  Doug Evans  <dje@sebabeach.org>
  55
  56         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
  57         (print_address): Delete CGEN_PRINT_ADDRESS.
  58         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
  59         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
  60         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
  61         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
  62
  63         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
  64         * frv-desc.c, * frv-desc.h, * frv-opc.c,
  65         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
  66         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
  67         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
  68         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
  69         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
  70         * mep-desc.c, * mep-desc.h, * mep-opc.c,
  71         * mt-desc.c, * mt-desc.h, * mt-opc.c,
  72         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
  73         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
  74         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
  75
  76 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
  77
  78         * i386-dis.c: Update copyright.
  79         * i386-gen.c: Likewise.
  80         * i386-opc.h: Likewise.
  81         * i386-opc.tbl: Likewise.
  82
  83 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
  84             Sebastian Pop  <sebastian.pop@amd.com>
  85
  86         * i386-dis.c (OP_EX_VexImmW): Reintroduced
  87         function to handle 5th imm8 operand.
  88         (PREFIX_VEX_3A48): Added.
  89         (PREFIX_VEX_3A49): Added.
  90         (VEX_W_3A48_P_2): Added.
  91         (VEX_W_3A49_P_2): Added.
  92         (prefix table): Added entries for PREFIX_VEX_3A48
  93         and PREFIX_VEX_3A49.
  94         (vex table): Added entries for VEX_W_3A48_P_2 and
  95         and VEX_W_3A49_P_2.
  96         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
  97         for Vec_Imm4 operands.
  98         * i386-opc.h (enum): Added Vec_Imm4.
  99         (i386_operand_type): Added vec_imm4.
 100         * i386-opc.tbl: Add entries for vpermilp[ds].
 101         * i386-init.h: Regenerated.
 102         * i386-tbl.h: Regenerated.
 103
 104 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 105
 106         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 107         and "pwr7".  Move "a2" into alphabetical order.
 108
 109 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 110
 111         * ppc-dis.c (ppc_opts): Add titan entry.
 112         * ppc-opc.c (TITAN, MULHW): Define.
 113         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 114
 115 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 116
 117         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 118         to CPU_BDVER1_FLAGS
 119         * i386-init.h: Regenerated.
 120
 121 2010-02-03  Anthony Green  <green@moxielogic.com>
 122
 123         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 124         0x0f, and make 0x00 an illegal instruction.
 125
 126 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 127
 128         * opcodes/arm-dis.c (struct arm_private_data): New.
 129         (print_insn_coprocessor, print_insn_arm): Update to use struct
 130         arm_private_data.
 131         (is_mapping_symbol, get_map_sym_type): New functions.
 132         (get_sym_code_type): Check the symbol's section.  Do not check
 133         mapping symbols.
 134         (print_insn): Default to disassembling ARM mode code.  Check
 135         for mapping symbols separately from other symbols.  Use
 136         struct arm_private_data.
 137
 138 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 139
 140         * i386-dis.c (EXVexWdqScalar): New.
 141         (vex_scalar_w_dq_mode): Likewise.
 142         (prefix_table): Update entries for PREFIX_VEX_3899,
 143         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 144         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 145         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 146         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 147         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 148         (OP_EX): Likewise.
 149
 150 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 151
 152         * i386-dis.c (XMScalar): New.
 153         (EXdScalar): Likewise.
 154         (EXqScalar): Likewise.
 155         (EXqScalarS): Likewise.
 156         (VexScalar): Likewise.
 157         (EXdVexScalarS): Likewise.
 158         (EXqVexScalarS): Likewise.
 159         (XMVexScalar): Likewise.
 160         (scalar_mode): Likewise.
 161         (d_scalar_mode): Likewise.
 162         (d_scalar_swap_mode): Likewise.
 163         (q_scalar_mode): Likewise.
 164         (q_scalar_swap_mode): Likewise.
 165         (vex_scalar_mode): Likewise.
 166         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 167         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 168         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 169         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 170         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 171         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 172         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 173         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 174         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 175         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 176         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 177         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 178         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 179         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 180         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 181         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 182         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 183         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 184         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 185         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 186         q_scalar_mode, q_scalar_swap_mode.
 187         (OP_XMM): Handle scalar_mode.
 188         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 189         and q_scalar_swap_mode.
 190         (OP_VEX): Handle vex_scalar_mode.
 191
 192 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 193
 194         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 195
 196 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 197
 198         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 199
 200 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 201
 202         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 203
 204 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 205
 206         * i386-dis.c (Bad_Opcode): New.
 207         (bad_opcode): Likewise.
 208         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 209         (dis386_twobyte): Likewise.
 210         (reg_table): Likewise.
 211         (prefix_table): Likewise.
 212         (x86_64_table): Likewise.
 213         (vex_len_table): Likewise.
 214         (vex_w_table): Likewise.
 215         (mod_table): Likewise.
 216         (rm_table): Likewise.
 217         (float_reg): Likewise.
 218         (reg_table): Remove trailing "(bad)" entries.
 219         (prefix_table): Likewise.
 220         (x86_64_table): Likewise.
 221         (vex_len_table): Likewise.
 222         (vex_w_table): Likewise.
 223         (mod_table): Likewise.
 224         (rm_table): Likewise.
 225         (get_valid_dis386): Handle bytemode 0.
 226
 227 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 228
 229         * i386-opc.h (VEXScalar): New.
 230
 231         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 232         instructions.
 233         * i386-tbl.h: Regenerated.
 234
 235 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 236
 237         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 238
 239         * i386-opc.tbl: Add xsave64 and xrstor64.
 240         * i386-tbl.h: Regenerated.
 241
 242 2010-01-20  Nick Clifton  <nickc@redhat.com>
 243
 244         PR 11170
 245         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 246         based post-indexed addressing.
 247
 248 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 249
 250         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 251         * i386-tbl.h: Regenerated.
 252
 253 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 254
 255         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 256         comments.
 257
 258 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 259
 260         * i386-dis.c (names_mm): New.
 261         (intel_names_mm): Likewise.
 262         (att_names_mm): Likewise.
 263         (names_xmm): Likewise.
 264         (intel_names_xmm): Likewise.
 265         (att_names_xmm): Likewise.
 266         (names_ymm): Likewise.
 267         (intel_names_ymm): Likewise.
 268         (att_names_ymm): Likewise.
 269         (print_insn): Set names_mm, names_xmm and names_ymm.
 270         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 271         (OP_XMM): Likewise.
 272         (OP_EM): Likewise.
 273         (OP_EMC): Likewise.
 274         (OP_MXC): Likewise.
 275         (OP_EX): Likewise.
 276         (XMM_Fixup): Likewise.
 277         (OP_VEX): Likewise.
 278         (OP_EX_VexReg): Likewise.
 279         (OP_Vex_2src): Likewise.
 280         (OP_Vex_2src_1): Likewise.
 281         (OP_Vex_2src_2): Likewise.
 282         (OP_REG_VexI4): Likewise.
 283
 284 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 285
 286         * i386-dis.c (print_insn): Update comments.
 287
 288 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 289
 290         * i386-dis.c (rex_original): Removed.
 291         (ckprefix): Remove rex_original.
 292         (print_insn): Update comments.
 293
 294 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 295
 296         * Makefile.in: Regenerate.
 297         * configure: Regenerate.
 298
 299 2010-01-07  Doug Evans  <dje@sebabeach.org>
 300
 301         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 302         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 303         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 304         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 305         * xstormy16-ibld.c: Regenerate.
 306
 307 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 308
 309         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 310         * i386-init.h: Regenerated.
 311
 312 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 313
 314         * arm-dis.c (print_insn): Fixed search for next symbol and data
 315         dumping condition, and the initial mapping symbol state.
 316
 317 2010-01-05  Doug Evans  <dje@sebabeach.org>
 318
 319         * cgen-ibld.in: #include "cgen/basic-modes.h".
 320         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 321         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 322         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 323         * xstormy16-ibld.c: Regenerate.
 324
 325 2010-01-04  Nick Clifton  <nickc@redhat.com>
 326
 327         PR 11123
 328         * arm-dis.c (print_insn_coprocessor): Initialise value.
 329
 330 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 331
 332         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 333
 334 2010-01-02  Doug Evans  <dje@sebabeach.org>
 335
 336         * cgen-asm.in: Update copyright year.
 337         * cgen-dis.in: Update copyright year.
 338         * cgen-ibld.in: Update copyright year.
 339         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 340         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 341         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 342         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 343         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 344         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 345         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 346         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 347         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 348         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 349         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 350         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 351         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 352         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 353         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 354         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 355         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 356         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 357         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 358         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 359         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 360
 361 For older changes see ChangeLog-2009
 362 \f
 363 Local Variables:
 364 mode: change-log
 365 left-margin: 8
 366 fill-column: 74
 367 version-control: never
 368 End: