1 2008-12-23 Nick Clifton <nickc@redhat.com>
3 * po/ga.po: Updated Irish translation.
5 2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
7 * i386-dis.c (EbS): New.
12 (b_swap_mode): Likewise.
13 (v_swap_mode): Likewise.
14 (q_swap_mode): Likewise.
15 (x_swap_mode): Likewise.
20 (swap_operand): Likewise.
21 (dis386): Use EbS on movB. Use EvS on moveS.
22 (dis386_twobyte): Use EXxS on movapX.
23 (prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
24 vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
25 (vex_table): Use EXxS on vmovapX.
26 (vex_len_table): Use EXqS on vmovq.
27 (intel_operand_size): Handle b_swap_mode, v_swap_mode,
28 q_swap_mode and x_swap_mode.
29 (OP_E_register): Handle b_swap_mode and v_swap_mode.
30 (OP_EM): Handle v_swap_mode.
31 (OP_EX): x_swap_mode and q_swap_mode.
33 * i386-gen.c (opcode_modifiers): Add S.
35 * i386-opc.h (S): New.
37 (i386_opcode_modifier): Add s.
39 * i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
40 movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
41 * i386-tbl.h: Regenerated.
43 2008-12-18 H.J. Lu <hongjiu.lu@intel.com>
45 * i386-dis.c (mnemonicendp): New.
47 (print_insn): Use mnemonicendp.
48 (OP_3DNowSuffix): Likewise.
49 (CMP_Fixup): Likewise.
50 (CMPXCHG8B_Fixup): Likewise.
51 (CRC32_Fixup): Likewise.
52 (OP_DREX_FCMP): Likewise.
53 (OP_DREX_ICMP): Likewise.
54 (VZERO_Fixup): Likewise.
55 (VCMP_Fixup): Likewise.
56 (PCLMUL_Fixup): Likewise.
57 (VPERMIL2_Fixup): Likewise.
58 (MOVBE_Fixup): Likewise.
59 (putop): Update mnemonicendp.
60 (oappend): Use stpcpy.
61 (simd_cmp_op): Changed to struct op.
62 (vex_cmp_op): Likewise.
63 (pclmul_op): Likewise.
64 (vpermil2_op): Likewise.
66 2008-12-18 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
68 * configure: Regenerate.
70 2008-12-15 Richard Earnshaw <rearnsha@arm.com>
72 * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
75 2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
77 * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
79 2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
81 * i386-dis.c (putop): Remove strayed comments.
83 2008-12-04 Ben Elliston <bje@au.ibm.com>
85 * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
87 (print_ppc_disassembler_options): Update usage.
88 * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
90 (PPCCHLK64): Likewise.
91 (powerpc_opcodes): Remove all BOOKE64 instructions.
93 2008-11-28 Joshua Kinard <kumba@gentoo.org>
95 * mips-dis.c (mips_arch_choices): Add r14000, r16000.
97 2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
99 * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
100 adjusted the mask for 32-bit branch instruction.
102 2008-11-27 Alan Modra <amodra@bigpond.net.au>
104 * ppc-opc.c (extract_sprg): Correct operand range check.
106 2008-11-26 Andreas Schwab <schwab@suse.de>
108 * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
109 (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
110 (save_printer, save_print_address): Remove.
111 (fetch_data): Don't use them.
112 (match_insn_m68k): Always restore printing functions.
113 (print_insn_m68k): Don't save/restore printing functions.
115 2008-11-25 Nick Clifton <nickc@redhat.com>
117 * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
119 2008-11-18 Catherine Moore <clm@codesourcery.com>
121 * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
123 (neon_opcodes): Likewise.
124 (print_insn_coprocessor): Print 't' or 'b' for vcvt
127 2008-11-14 Tristan Gingold <gingold@adacore.com>
129 * makefile.vms (OBJS): Update list of objects.
133 2008-11-06 Chao-ying Fu <fu@mips.com>
135 * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
137 (sync): New instruction with 5-bit sync type.
138 * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
140 2008-11-06 Nick Clifton <nickc@redhat.com>
142 * avr-dis.c: Replace uses of sprintf without a format string with
145 2008-11-03 H.J. Lu <hongjiu.lu@intel.com>
147 * i386-opc.tbl: Add cmovpe and cmovpo.
148 * i386-tbl.h: Regenerated.
150 2008-10-22 Nick Clifton <nickc@redhat.com>
153 * configure.in (SHARED_LIBADD): Revert previous change.
154 Add a comment explaining why.
155 (SHARED_DEPENDENCIES): Revert previous change.
156 * configure: Regenerate.
158 2008-10-10 Nick Clifton <nickc@redhat.com>
161 * configure.in (SHARED_LIBADD): Add libiberty.a.
162 (SHARED_DEPENDENCIES): Add libiberty.a.
164 2008-09-30 H.J. Lu <hongjiu.lu@intel.com>
166 * i386-gen.c: Include "hashtab.h".
167 (next_field): Take a new argument, last. Check last.
168 (process_i386_cpu_flag): Updated.
169 (process_i386_opcode_modifier): Likewise.
170 (process_i386_operand_type): Likewise.
171 (process_i386_registers): Likewise.
172 (output_i386_opcode): New.
173 (opcode_hash_entry): Likewise.
174 (opcode_hash_table): Likewise.
175 (opcode_hash_hash): Likewise.
176 (opcode_hash_eq): Likewise.
177 (process_i386_opcodes): Use opcode hash table and opcode array.
179 2008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
181 * s390-opc.txt (stdy, stey): Fix description
183 2008-09-30 Alan Modra <amodra@bigpond.net.au>
185 * Makefile.am: Run "make dep-am".
186 * Makefile.in: Regenerate.
188 2008-09-29 H.J. Lu <hongjiu.lu@intel.com>
190 * aclocal.m4: Regenerated.
191 * configure: Likewise.
192 * Makefile.in: Likewise.
194 2008-09-29 Nick Clifton <nickc@redhat.com>
196 * po/vi.po: Updated Vietnamese translation.
197 * po/fr.po: Updated French translation.
199 2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
201 * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
202 (cfxr, cfdr, cfer, clclu): Add esa flag.
203 (sqd): Instruction added.
204 (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
205 * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
207 2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
209 * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
210 (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
212 2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
214 * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
215 * i386-tbl.h: Regenerated.
217 2008-08-28 Jan Beulich <jbeulich@novell.com>
219 * i386-dis.c (dis386): Adjust far return mnemonics.
220 * i386-opc.tbl: Add retf.
221 * i386-tbl.h: Re-generate.
223 2008-08-28 Jan Beulich <jbeulich@novell.com>
225 * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
227 2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
229 * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
230 * ia64-gen.c (lookup_specifier): Likewise.
232 * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
233 * ia64-raw.tbl: Likewise.
234 * ia64-waw.tbl: Likewise.
235 * ia64-asmtab.c: Regenerated.
237 2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
239 * i386-opc.tbl: Correct fidivr operand size.
241 * i386-tbl.h: Regenerated.
243 2008-08-24 Alan Modra <amodra@bigpond.net.au>
245 * configure.in: Update a number of obsolete autoconf macros.
246 * aclocal.m4: Regenerate.
248 2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
250 AVX Programming Reference (August, 2008)
251 * i386-dis.c (PREFIX_VEX_38DB): New.
252 (PREFIX_VEX_38DC): Likewise.
253 (PREFIX_VEX_38DD): Likewise.
254 (PREFIX_VEX_38DE): Likewise.
255 (PREFIX_VEX_38DF): Likewise.
256 (PREFIX_VEX_3ADF): Likewise.
257 (VEX_LEN_38DB_P_2): Likewise.
258 (VEX_LEN_38DC_P_2): Likewise.
259 (VEX_LEN_38DD_P_2): Likewise.
260 (VEX_LEN_38DE_P_2): Likewise.
261 (VEX_LEN_38DF_P_2): Likewise.
262 (VEX_LEN_3ADF_P_2): Likewise.
263 (PREFIX_VEX_3A04): Updated.
264 (VEX_LEN_3A06_P_2): Likewise.
265 (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
266 PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
267 (x86_64_table): Likewise.
268 (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
269 VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
272 * i386-opc.tbl: Add AES + AVX instructions.
273 * i386-init.h: Regenerated.
274 * i386-tbl.h: Likewise.
276 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
278 * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
279 * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
281 2008-08-15 Alan Modra <amodra@bigpond.net.au>
284 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
285 * Makefile.in: Regenerate.
286 * aclocal.m4: Regenerate.
287 * config.in: Regenerate.
288 * configure: Regenerate.
290 2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
293 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
295 2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
297 * i386-opc.tbl: Add syscall and sysret for Cpu64.
299 * i386-tbl.h: Regenerated.
301 2008-08-04 Alan Modra <amodra@bigpond.net.au>
303 * Makefile.am (POTFILES.in): Set LC_ALL=C.
304 * Makefile.in: Regenerate.
305 * po/POTFILES.in: Regenerate.
307 2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
309 * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
310 (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
311 (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
312 * ppc-opc.c (insert_xt6): New static function.
313 (extract_xt6): Likewise.
314 (insert_xa6): Likewise.
315 (extract_xa6: Likewise.
316 (insert_xb6): Likewise.
317 (extract_xb6): Likewise.
318 (insert_xb6s): Likewise.
319 (extract_xb6s): Likewise.
320 (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
321 XX3DM_MASK, PPCVSX): New.
322 (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
323 "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
325 2008-08-01 Pedro Alves <pedro@codesourcery.com>
327 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
328 * Makefile.in: Regenerate.
330 2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
332 * i386-reg.tbl: Use Dw2Inval on AVX registers.
333 * i386-tbl.h: Regenerated.
335 2008-07-30 Michael J. Eager <eager@eagercon.com>
337 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
338 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
339 (insert_sprg, PPC405): Use PPC_OPCODE_405.
340 (powerpc_opcodes): Add Xilinx APU related opcodes.
342 2008-07-30 Alan Modra <amodra@bigpond.net.au>
344 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
346 2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
348 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
350 2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
352 * mips-opc.c (CP): New macro.
353 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
354 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
355 dmtc2 Octeon instructions.
357 2008-07-07 Stan Shebs <stan@codesourcery.com>
359 * dis-init.c (init_disassemble_info): Init endian_code field.
360 * arm-dis.c (print_insn): Disassemble code according to
361 setting of endian_code.
362 (print_insn_big_arm): Detect when BE8 extension flag has been set.
364 2008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
366 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
369 2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
371 * ppc-dis.c (powerpc_init_dialect): Handle -M464.
372 (print_ppc_disassembler_options): Likewise.
373 * ppc-opc.c (PPC464): Define.
374 (powerpc_opcodes): Add mfdcrux and mtdcrux.
376 2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
378 * configure: Regenerate.
380 2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
382 * ppc-dis.c (print_insn_powerpc): Update prototye to use new
384 (struct dis_private): New.
385 (POWERPC_DIALECT): New define.
386 (powerpc_dialect): Renamed to...
387 (powerpc_init_dialect): This. Update to use ppc_cpu_t and
389 (print_insn_big_powerpc): Update for using structure in
391 (print_insn_little_powerpc): Likewise.
392 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
393 (skip_optional_operands): Likewise.
394 (print_insn_powerpc): Likewise. Remove initialization of dialect.
395 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
396 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
397 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
398 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
399 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
400 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
401 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
402 param to be of type ppc_cpu_t. Update prototype.
404 2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
406 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
408 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
409 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
410 syncw, syncws, vm3mulu, vm0 and vmulu.
412 * mips-dis.c (print_insn_args): Handle field descriptor +Q.
413 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
416 2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
418 * i386-opc.tbl: Add vmovd with 64bit operand.
419 * i386-tbl.h: Regenerated.
421 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
423 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
425 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
427 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
428 * i386-tbl.h: Regenerated.
430 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
433 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
434 into 32bit and 64bit. Remove Reg64|Qword and add
435 IgnoreSize|No_qSuf on 32bit version.
436 * i386-tbl.h: Regenerated.
438 2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
440 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
441 * i386-tbl.h: Regenerated.
443 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
445 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
447 2008-05-14 Alan Modra <amodra@bigpond.net.au>
449 * Makefile.am: Run "make dep-am".
450 * Makefile.in: Regenerate.
452 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
454 * i386-dis.c (MOVBE_Fixup): New.
456 (PREFIX_0F3880): Likewise.
457 (PREFIX_0F3881): Likewise.
458 (PREFIX_0F38F0): Updated.
459 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
460 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
461 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
463 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
465 (cpu_flags): Add CpuMovbe and CpuEPT.
467 * i386-opc.h (CpuMovbe): New.
470 (i386_cpu_flags): Add cpumovbe and cpuept.
472 * i386-opc.tbl: Add entries for movbe and EPT instructions.
473 * i386-init.h: Regenerated.
474 * i386-tbl.h: Likewise.
476 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
478 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
479 the two drem and the two dremu macros.
481 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
483 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
484 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
485 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
486 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
488 2008-04-25 David S. Miller <davem@davemloft.net>
490 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
491 instead of %sys_tick_cmpr, as suggested in architecture manuals.
493 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
495 * aclocal.m4: Regenerate.
496 * configure: Regenerate.
498 2008-04-23 David S. Miller <davem@davemloft.net>
500 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
502 (prefetch_table): Add missing values.
504 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
506 * i386-gen.c (opcode_modifiers): Add NoAVX.
508 * i386-opc.h (NoAVX): New.
510 (i386_opcode_modifier): Add noavx.
512 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
513 instructions which don't have AVX equivalent.
514 * i386-tbl.h: Regenerated.
516 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
518 * i386-dis.c (OP_VEX_FMA): New.
519 (OP_EX_VexImmW): Likewise.
521 (Vex128FMA): Likewise.
522 (EXVexImmW): Likewise.
523 (get_vex_imm8): Likewise.
524 (OP_EX_VexReg): Likewise.
525 (vex_i4_done): Renamed to ...
527 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
528 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
530 (print_insn): Updated.
531 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
532 (OP_REG_VexI4): Check invalid high registers.
534 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
535 Michael Meissner <michael.meissner@amd.com>
537 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
538 * i386-tbl.h: Regenerate from i386-opc.tbl.
540 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
542 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
543 accept Power E500MC instructions.
544 (print_ppc_disassembler_options): Document -Me500mc.
545 * ppc-opc.c (DUIS, DUI, T): New.
546 (XRT, XRTRA): Likewise.
548 (powerpc_opcodes): Add new Power E500MC instructions.
550 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
552 * s390-dis.c (init_disasm): Evaluate disassembler_options.
553 (print_s390_disassembler_options): New function.
554 * disassemble.c (disassembler_usage): Invoke
555 print_s390_disassembler_options.
557 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
559 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
560 of local variables used for mnemonic parsing: prefix, suffix and
563 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
565 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
566 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
567 (s390_crb_extensions): New extensions table.
568 (insertExpandedMnemonic): Handle '$' tag.
569 * s390-opc.txt: Remove conditional jump variants which can now
570 be expanded automatically.
571 Replace '*' tag with '$' in the compare and branch instructions.
573 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
575 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
576 (PREFIX_VEX_3AXX): Likewis.
578 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
580 * i386-opc.tbl: Remove 4 extra blank lines.
582 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
584 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
585 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
586 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
587 * i386-opc.tbl: Likewise.
589 * i386-opc.h (CpuCLMUL): Renamed to ...
592 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
594 * i386-init.h: Regenerated.
596 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
598 * i386-dis.c (OP_E_register): New.
599 (OP_E_memory): Likewise.
601 (OP_EX_Vex): Likewise.
602 (OP_EX_VexW): Likewise.
603 (OP_XMM_Vex): Likewise.
604 (OP_XMM_VexW): Likewise.
605 (OP_REG_VexI4): Likewise.
606 (PCLMUL_Fixup): Likewise.
607 (VEXI4_Fixup): Likewise.
608 (VZERO_Fixup): Likewise.
609 (VCMP_Fixup): Likewise.
610 (VPERMIL2_Fixup): Likewise.
611 (rex_original): Likewise.
612 (rex_ignored): Likewise.
633 (VPERMIL2): Likewise.
634 (xmm_mode): Likewise.
635 (xmmq_mode): Likewise.
636 (ymmq_mode): Likewise.
637 (vex_mode): Likewise.
638 (vex128_mode): Likewise.
639 (vex256_mode): Likewise.
640 (USE_VEX_C4_TABLE): Likewise.
641 (USE_VEX_C5_TABLE): Likewise.
642 (USE_VEX_LEN_TABLE): Likewise.
643 (VEX_C4_TABLE): Likewise.
644 (VEX_C5_TABLE): Likewise.
645 (VEX_LEN_TABLE): Likewise.
646 (REG_VEX_XX): Likewise.
647 (MOD_VEX_XXX): Likewise.
648 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
649 (PREFIX_0F3A44): Likewise.
650 (PREFIX_0F3ADF): Likewise.
651 (PREFIX_VEX_XXX): Likewise.
653 (VEX_OF38): Likewise.
654 (VEX_OF3A): Likewise.
655 (VEX_LEN_XXX): Likewise.
657 (need_vex): Likewise.
658 (need_vex_reg): Likewise.
659 (vex_i4_done): Likewise.
660 (vex_table): Likewise.
661 (vex_len_table): Likewise.
662 (OP_REG_VexI4): Likewise.
663 (vex_cmp_op): Likewise.
664 (pclmul_op): Likewise.
665 (vpermil2_op): Likewise.
668 (PREFIX_0F38F0): Likewise.
669 (PREFIX_0F3A60): Likewise.
670 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
671 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
672 and PREFIX_VEX_XXX entries.
673 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
674 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
676 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
677 Add MOD_VEX_XXX entries.
678 (ckprefix): Initialize rex_original and rex_ignored. Store the
679 REX byte in rex_original.
680 (get_valid_dis386): Handle the implicit prefix in VEX prefix
681 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
682 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
683 calling get_valid_dis386. Use rex_original and rex_ignored when
685 (putop): Handle "XY".
686 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
688 (OP_E_extended): Updated to use OP_E_register and
690 (OP_XMM): Handle VEX.
692 (XMM_Fixup): Likewise.
693 (CMP_Fixup): Use ARRAY_SIZE.
695 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
696 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
697 (operand_type_init): Add OPERAND_TYPE_REGYMM and
698 OPERAND_TYPE_VEX_IMM4.
699 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
700 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
701 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
702 VexImmExt and SSE2AVX.
703 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
705 * i386-opc.h (CpuAVX): New.
707 (CpuCLMUL): Likewise.
718 (Vex3Sources): Likewise.
719 (VexImmExt): Likewise.
723 (Vex_Imm4): Likewise.
724 (Implicit1stXmm0): Likewise.
727 (ByteOkIntel): Likewise.
730 (Unspecified): Likewise.
732 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
733 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
734 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
735 vex3sources, veximmext and sse2avx.
736 (i386_operand_type): Add regymm, ymmword and vex_imm4.
738 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
740 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
742 * i386-init.h: Regenerated.
743 * i386-tbl.h: Likewise.
745 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
747 From Robin Getz <robin.getz@analog.com>
748 * bfin-dis.c (bu32): Typedef.
749 (enum const_forms_t): Add c_uimm32 and c_huimm32.
750 (constant_formats[]): Add uimm32 and huimm16.
755 (luimm16_val): Define.
756 (struct saved_state): Define.
757 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
758 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
759 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
761 (decode_LDIMMhalf_0): Print out the whole register value.
763 From Jie Zhang <jie.zhang@analog.com>
764 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
765 multiply and multiply-accumulate to data register instruction.
767 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
768 c_imm32, c_huimm32e): Define.
769 (constant_formats): Add flags for printing decimal, leading spaces, and
771 (comment, parallel): Add global flags in all disassembly.
772 (fmtconst): Take advantage of new flags, and print default in hex.
773 (fmtconst_val): Likewise.
774 (decode_macfunc): Be consistant with spaces, tabs, comments,
775 capitalization in disassembly, fix minor coding style issues.
776 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
777 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
778 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
779 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
780 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
781 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
782 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
783 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
784 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
785 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
786 _print_insn_bfin, print_insn_bfin): Likewise.
788 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
790 * aclocal.m4: Regenerate.
791 * configure: Likewise.
792 * Makefile.in: Likewise.
794 2008-03-13 Alan Modra <amodra@bigpond.net.au>
796 * Makefile.am: Run "make dep-am".
797 * Makefile.in: Regenerate.
798 * configure: Regenerate.
800 2008-03-07 Alan Modra <amodra@bigpond.net.au>
802 * ppc-opc.c (powerpc_opcodes): Order and format.
804 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
806 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
807 * i386-tbl.h: Regenerated.
809 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
811 * i386-opc.tbl: Disallow 16-bit near indirect branches for
813 * i386-tbl.h: Regenerated.
815 2008-02-21 Jan Beulich <jbeulich@novell.com>
817 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
818 and Fword for far indirect jmp. Allow Reg16 and Word for near
819 indirect jmp on x86-64. Disallow Fword for lcall.
820 * i386-tbl.h: Re-generate.
822 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
824 * cr16-opc.c (cr16_num_optab): Defined
826 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
828 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
829 * i386-init.h: Regenerated.
831 2008-02-14 Nick Clifton <nickc@redhat.com>
834 * configure.in (SHARED_LIBADD): Select the correct host specific
835 file extension for shared libraries.
836 * configure: Regenerate.
838 2008-02-13 Jan Beulich <jbeulich@novell.com>
840 * i386-opc.h (RegFlat): New.
841 * i386-reg.tbl (flat): Add.
842 * i386-tbl.h: Re-generate.
844 2008-02-13 Jan Beulich <jbeulich@novell.com>
846 * i386-dis.c (a_mode): New.
847 (cond_jump_mode): Adjust.
848 (Ma): Change to a_mode.
849 (intel_operand_size): Handle a_mode.
850 * i386-opc.tbl: Allow Dword and Qword for bound.
851 * i386-tbl.h: Re-generate.
853 2008-02-13 Jan Beulich <jbeulich@novell.com>
855 * i386-gen.c (process_i386_registers): Process new fields.
856 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
857 unsigned char. Add dw2_regnum and Dw2Inval.
858 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
860 * i386-tbl.h: Re-generate.
862 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
864 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
865 * i386-init.h: Updated.
867 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
869 * i386-gen.c (cpu_flags): Add CpuXsave.
871 * i386-opc.h (CpuXsave): New.
873 (i386_cpu_flags): Add cpuxsave.
875 * i386-dis.c (MOD_0FAE_REG_4): New.
876 (RM_0F01_REG_2): Likewise.
877 (MOD_0FAE_REG_5): Updated.
878 (RM_0F01_REG_3): Likewise.
879 (reg_table): Use MOD_0FAE_REG_4.
880 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
882 (rm_table): Add RM_0F01_REG_2.
884 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
885 * i386-init.h: Regenerated.
886 * i386-tbl.h: Likewise.
888 2008-02-11 Jan Beulich <jbeulich@novell.com>
890 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
891 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
892 * i386-tbl.h: Re-generate.
894 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
897 * configure: Regenerated.
899 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
901 * mips-dis.c: Update copyright.
902 (mips_arch_choices): Add Octeon.
903 * mips-opc.c: Update copyright.
905 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
907 2008-01-29 Alan Modra <amodra@bigpond.net.au>
909 * ppc-opc.c: Support optional L form mtmsr.
911 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
913 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
915 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
917 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
918 * i386-init.h: Regenerated.
920 2008-01-23 Tristan Gingold <gingold@adacore.com>
922 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
923 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
925 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
927 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
928 (cpu_flags): Likewise.
930 * i386-opc.h (CpuMMX2): Removed.
933 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
934 * i386-init.h: Regenerated.
935 * i386-tbl.h: Likewise.
937 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
939 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
941 * i386-init.h: Regenerated.
943 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
945 * i386-opc.tbl: Use Qword on movddup.
946 * i386-tbl.h: Regenerated.
948 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
950 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
951 * i386-tbl.h: Regenerated.
953 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
955 * i386-dis.c (Mx): New.
956 (PREFIX_0FC3): Likewise.
957 (PREFIX_0FC7_REG_6): Updated.
958 (dis386_twobyte): Use PREFIX_0FC3.
959 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
960 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
963 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
965 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
966 (operand_types): Add Mem.
968 * i386-opc.h (IntelSyntax): New.
969 * i386-opc.h (Mem): New.
971 (Opcode_Modifier_Max): Updated.
972 (i386_opcode_modifier): Add intelsyntax.
973 (i386_operand_type): Add mem.
975 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
978 * i386-reg.tbl: Add size for accumulator.
980 * i386-init.h: Regenerated.
981 * i386-tbl.h: Likewise.
983 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
985 * i386-opc.h (Byte): Fix a typo.
987 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
990 * i386-gen.c (operand_type_init): Add Dword to
991 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
992 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
994 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
995 Xmmword, Unspecified and Anysize.
996 (set_bitfield): Make Mmword an alias of Qword. Make Oword
999 * i386-opc.h (CheckSize): Removed.
1004 (Xmmword): Likewise.
1007 (i386_opcode_modifier): Remove checksize, byte, word, dword,
1011 (Unspecified): Likewise.
1012 (Anysize): Likewise.
1013 (i386_operand_type): Add byte, word, dword, fword, qword,
1014 tbyte xmmword, unspecified and anysize.
1016 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
1017 Tbyte, Xmmword, Unspecified and Anysize.
1019 * i386-reg.tbl: Add size for accumulator.
1021 * i386-init.h: Regenerated.
1022 * i386-tbl.h: Likewise.
1024 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
1026 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
1027 (REG_0F18): Updated.
1028 (reg_table): Updated.
1029 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
1030 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
1032 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
1034 * i386-gen.c (set_bitfield): Use fail () on error.
1036 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
1038 * i386-gen.c (lineno): New.
1039 (filename): Likewise.
1040 (set_bitfield): Report filename and line numer on error.
1041 (process_i386_opcodes): Set filename and update lineno.
1042 (process_i386_registers): Likewise.
1044 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
1046 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
1049 * i386-opc.h (IntelMnemonic): Renamed to ..
1051 (Opcode_Modifier_Max): Updated.
1052 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
1055 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
1056 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
1057 * i386-tbl.h: Regenerated.
1059 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
1061 * i386-gen.c: Update copyright to 2008.
1062 * i386-opc.h: Likewise.
1063 * i386-opc.tbl: Likewise.
1065 * i386-init.h: Regenerated.
1066 * i386-tbl.h: Likewise.
1068 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
1070 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
1071 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
1072 * i386-tbl.h: Regenerated.
1074 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
1076 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
1078 (cpu_flags): Likewise.
1080 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
1081 (CpuSSE4_2_Or_ABM): Likewise.
1083 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
1085 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
1086 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
1087 and CpuPadLock, respectively.
1088 * i386-init.h: Regenerated.
1089 * i386-tbl.h: Likewise.
1091 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
1093 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
1095 * i386-opc.h (No_xSuf): Removed.
1096 (CheckSize): Updated.
1098 * i386-tbl.h: Regenerated.
1100 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1102 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
1103 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1105 (cpu_flags): Add CpuSSE4_2_Or_ABM.
1107 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1109 (i386_cpu_flags): Add cpusse4_2_or_abm.
1111 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1112 CpuABM|CpuSSE4_2 on popcnt.
1113 * i386-init.h: Regenerated.
1114 * i386-tbl.h: Likewise.
1116 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1118 * i386-opc.h: Update comments.
1120 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1122 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1123 * i386-opc.h: Likewise.
1124 * i386-opc.tbl: Likewise.
1126 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1129 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1130 Byte, Word, Dword, QWord and Xmmword.
1132 * i386-opc.h (No_xSuf): New.
1133 (CheckSize): Likewise.
1138 (Xmmword): Likewise.
1140 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1141 Dword, QWord and Xmmword.
1143 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1145 * i386-tbl.h: Regenerated.
1147 2008-01-02 Mark Kettenis <kettenis@gnu.org>
1149 * m88k-dis.c (instructions): Fix fcvt.* instructions.
1152 For older changes see ChangeLog-2007
1158 version-control: never