opcodes/ChangeLog

   1 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
   2
   3         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
   4         * ia64-gen.c: Promote completer index type to longlong.
   5         (irf_operand): Add new register recognition.
   6         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
   7         (lookup_specifier): Add new resource recognition.
   8         (insert_bit_table_ent): Relax abort condition according to the
   9         changed completer index type.
  10         (print_dis_table): Fix printf format for completer index.
  11         * ia64-ic.tbl: Add a new instruction class.
  12         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
  13         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
  14         * ia64-opc.h: Define short names for new operand types.
  15         * ia64-raw.tbl: Add new RAW resource for DAHR register.
  16         * ia64-waw.tbl: Add new WAW resource for DAHR register.
  17         * ia64-asmtab.c: Regenerate.
  18
  19 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
  20
  21         * ppc-opc.c (VXASHB_MASK): New define.
  22         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
  23
  24 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
  25
  26         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
  27         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
  28         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
  29         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
  30         vupklsh>: Use VXVA_MASK.
  31         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
  32         <mfvscr>: Use VXVAVB_MASK.
  33         <mtvscr>: Use VXVDVA_MASK.
  34         <vspltb>: Use VXUIMM4_MASK.
  35         <vsplth>: Use VXUIMM3_MASK.
  36         <vspltw>: Use VXUIMM2_MASK.
  37
  38 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  39
  40         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
  41
  42 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  43
  44         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
  45
  46 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  47
  48         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
  49
  50 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  51
  52         * arm-dis.c (neon_opcodes): Add support for AES instructions.
  53
  54 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  55
  56         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
  57         conversions.
  58
  59 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
  60
  61         * arm-dis.c (coprocessor_opcodes): Add VRINT.
  62         (neon_opcodes): Likewise.
  63
  64 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  65
  66         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
  67         variants.
  68         (neon_opcodes): Likewise.
  69
  70 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  71
  72         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
  73         (neon_opcodes): Likewise.
  74
  75 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  76
  77         * arm-dis.c (coprocessor_opcodes): Add VSEL.
  78         (print_insn_coprocessor): Add new %<>c bitfield format
  79         specifier.
  80
  81 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  82
  83         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
  84         (thumb32_opcodes): Likewise.
  85         (print_arm_insn): Add support for %<>T formatter.
  86
  87 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  88
  89         * arm-dis.c (arm_opcodes): Add HLT.
  90         (thumb_opcodes): Likewise.
  91
  92 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  93
  94         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
  95
  96 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  97
  98         * arm-dis.c (arm_opcodes): Add SEVL.
  99         (thumb_opcodes): Likewise.
 100         (thumb32_opcodes): Likewise.
 101
 102 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 103
 104         * arm-dis.c (data_barrier_option): New function.
 105         (print_insn_arm): Use data_barrier_option.
 106         (print_insn_thumb32): Use data_barrier_option.
 107
 108 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 109
 110         * arm-dis.c (COND_UNCOND): New constant.
 111         (print_insn_coprocessor): Add support for %u format specifier.
 112         (print_insn_neon): Likewise.
 113
 114 2012-08-21  David S. Miller  <davem@davemloft.net>
 115
 116         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 117         F3F4 macro.
 118
 119 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 120
 121         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 122         vabsduh, vabsduw, mviwsplt.
 123
 124 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 125
 126         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 127         CPU_BTVER2_FLAGS.
 128
 129         * i386-opc.h: Update CpuPRFCHW comment.
 130
 131         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 132         * i386-init.h: Regenerated.
 133         * i386-tbl.h: Likewise.
 134
 135 2012-08-17  Nick Clifton  <nickc@redhat.com>
 136
 137         * po/uk.po: New Ukranian translation.
 138         * configure.in (ALL_LINGUAS): Add uk.
 139         * configure: Regenerate.
 140
 141 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 142
 143         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 144         RBX for the third operand.
 145         <"lswi">: Use RAX for second and NBI for the third operand.
 146
 147 2012-08-15  DJ Delorie  <dj@redhat.com>
 148
 149         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 150         operands, so that data addresses can be corrected when not
 151         ES-overridden.
 152         * rl78-decode.c: Regenerate.
 153         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 154         irrelevent.  When the 'e' specifier is used on an operand and no
 155         ES prefix is provided, adjust address to make it absolute.
 156
 157 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 158
 159         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 160
 161 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 162
 163         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 164
 165 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 166
 167         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 168         macros, use local variables for info struct member accesses,
 169         update the type of the variable used to hold the instruction
 170         word.
 171         (print_insn_mips, print_mips16_insn_arg): Likewise.
 172         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 173         local variables for info struct member accesses.
 174         (print_insn_micromips): Add GET_OP_S local macro.
 175         (_print_insn_mips): Update the type of the variable used to hold
 176         the instruction word.
 177
 178 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 179             Laurent Desnogues  <laurent.desnogues@arm.com>
 180             Jim MacArthur  <jim.macarthur@arm.com>
 181             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 182             Nigel Stephens  <nigel.stephens@arm.com>
 183             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 184             Richard Earnshaw  <rearnsha@arm.com>
 185             Sofiane Naci  <sofiane.naci@arm.com>
 186             Tejas Belagod  <tejas.belagod@arm.com>
 187             Yufeng Zhang  <yufeng.zhang@arm.com>
 188
 189         * Makefile.am: Add AArch64.
 190         * Makefile.in: Regenerate.
 191         * aarch64-asm.c: New file.
 192         * aarch64-asm.h: New file.
 193         * aarch64-dis.c: New file.
 194         * aarch64-dis.h: New file.
 195         * aarch64-gen.c: New file.
 196         * aarch64-opc.c: New file.
 197         * aarch64-opc.h: New file.
 198         * aarch64-tbl.h: New file.
 199         * configure.in: Add AArch64.
 200         * configure: Regenerate.
 201         * disassemble.c: Add AArch64.
 202         * aarch64-asm-2.c: New file (automatically generated).
 203         * aarch64-dis-2.c: New file (automatically generated).
 204         * aarch64-opc-2.c: New file (automatically generated).
 205         * po/POTFILES.in: Regenerate.
 206
 207 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 208
 209         * micromips-opc.c (micromips_opcodes): Update comment.
 210         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 211         instructions for IOCT as appropriate.
 212         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 213         opcode_is_member.
 214         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 215         the result of a check for the -Wno-missing-field-initializers
 216         GCC option.
 217         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 218         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 219         compilation.
 220         (mips16-opc.lo): Likewise.
 221         (micromips-opc.lo): Likewise.
 222         * aclocal.m4: Regenerate.
 223         * configure: Regenerate.
 224         * Makefile.in: Regenerate.
 225
 226 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 227
 228         PR gas/14423
 229         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 230         * i386-init.h: Regenerated.
 231
 232 2012-08-09  Nick Clifton  <nickc@redhat.com>
 233
 234         * po/vi.po: Updated Vietnamese translation.
 235
 236 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 237
 238         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 239         AMD-reserved cases as "prefetch".
 240         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 241         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 242         (reg_table): Use those under REG_0F18.
 243         (mod_table): Add those cases as "nop/reserved".
 244
 245 2012-08-07  Jan Beulich <jbeulich@suse.com>
 246
 247         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 248
 249 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 250
 251         * i386-dis.c (print_insn): Print spaces between multiple excess
 252         prefixes.  Return actual number of excess prefixes consumed,
 253         not always one.
 254
 255         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 256
 257 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 258             Victor Khimenko  <khim@google.com>
 259             H.J. Lu  <hongjiu.lu@intel.com>
 260
 261         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 262         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 263         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 264         (OP_E_register): Likewise.
 265         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 266
 267 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 268
 269         * configure.in: Formatting.
 270         * configure: Regenerate.
 271
 272 2012-08-01  Alan Modra  <amodra@gmail.com>
 273
 274         * h8300-dis.c: Fix printf arg warnings.
 275         * i960-dis.c: Likewise.
 276         * mips-dis.c: Likewise.
 277         * pdp11-dis.c: Likewise.
 278         * sh-dis.c: Likewise.
 279         * v850-dis.c: Likewise.
 280         * configure.in: Formatting.
 281         * configure: Regenerate.
 282         * rl78-decode.c: Regenerate.
 283         * po/POTFILES.in: Regenerate.
 284
 285 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 286             Catherine Moore  <clm@codesourcery.com>
 287             Maciej W. Rozycki  <macro@codesourcery.com>
 288
 289         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 290         (DSP_VOLA): Likewise.
 291         (D32, D33): Likewise.
 292         (micromips_opcodes): Add DSP ASE instructions.
 293         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 294         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 295
 296 2012-07-31  Jan Beulich <jbeulich@suse.com>
 297
 298         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 299         instruction group. Mark as requiring AVX2.
 300         * i386-tbl.h: Re-generate.
 301
 302 2012-07-30  Nick Clifton  <nickc@redhat.com>
 303
 304         * po/opcodes.pot: Updated template.
 305         * po/es.po: Updated Spanish translation.
 306         * po/fi.po: Updated Finnish translation.
 307
 308 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 309
 310         * configure.in (BFD_VERSION): Run bfd/configure --version and
 311         parse the output of that.
 312         * configure: Regenerate.
 313
 314 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 315
 316         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 317
 318 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 319             Dr David Alan Gilbert  <dave@treblig.org>
 320
 321         PR binutils/13135
 322         * arm-dis.c: Add necessary casts for printing integer values.
 323         Use %s when printing string values.
 324         * hppa-dis.c: Likewise.
 325         * m68k-dis.c: Likewise.
 326         * microblaze-dis.c: Likewise.
 327         * mips-dis.c: Likewise.
 328         * sparc-dis.c: Likewise.
 329
 330 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 331
 332         PR binutils/14355
 333         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 334         (VEX_LEN_0FXOP_08_CD): Likewise.
 335         (VEX_LEN_0FXOP_08_CE): Likewise.
 336         (VEX_LEN_0FXOP_08_CF): Likewise.
 337         (VEX_LEN_0FXOP_08_EC): Likewise.
 338         (VEX_LEN_0FXOP_08_ED): Likewise.
 339         (VEX_LEN_0FXOP_08_EE): Likewise.
 340         (VEX_LEN_0FXOP_08_EF): Likewise.
 341         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 342         vpcomub, vpcomuw, vpcomud, vpcomuq.
 343         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 344         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 345         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 346         VEX_LEN_0FXOP_08_EF.
 347
 348 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 349
 350         * i386-dis.c (PREFIX_0F38F6): New.
 351         (prefix_table): Add adcx, adox instructions.
 352         (three_byte_table): Use PREFIX_0F38F6.
 353         (mod_table): Add rdseed instruction.
 354         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 355         (cpu_flags): Likewise.
 356         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 357         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 358         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 359         prefetchw.
 360         * i386-tbl.h: Regenerate.
 361         * i386-init.h: Likewise.
 362
 363 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 364
 365         * mips-dis.c: Remove gratuitous newline.
 366
 367 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 368
 369         * xgate-dis.c: Removed an IF statement that will
 370         always be false due to overlapping operand masks.
 371         * xgate-opc.c: Corrected 'com' opcode entry and
 372         fixed spacing.
 373
 374 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 375
 376         * i386-opc.tbl: Add RepPrefixOk to nop.
 377         * i386-tbl.h: Regenerate.
 378
 379 2012-06-28  Nick Clifton  <nickc@redhat.com>
 380
 381         * po/vi.po: Updated Vietnamese translation.
 382
 383 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 384
 385         * i386-opc.tbl: Add RepPrefixOk to ret.
 386         * i386-tbl.h: Regenerate.
 387
 388         * i386-opc.h (RepPrefixOk): New enum constant.
 389         (i386_opcode_modifier): New bitfield 'repprefixok'.
 390         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 391         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 392         instructions that have IsString.
 393         * i386-tbl.h: Regenerate.
 394
 395 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 396
 397         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 398         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 399         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 400         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 401         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 402         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 403         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 404         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 405         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 406
 407 2012-05-19  Alan Modra  <amodra@gmail.com>
 408
 409         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 410         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 411
 412 2012-05-18  Alan Modra  <amodra@gmail.com>
 413
 414         * ia64-opc.c: Remove #include "ansidecl.h".
 415         * z8kgen.c: Include sysdep.h first.
 416
 417         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 418         * bfin-dis.c: Likewise.
 419         * i860-dis.c: Likewise.
 420         * ia64-dis.c: Likewise.
 421         * ia64-gen.c: Likewise.
 422         * m68hc11-dis.c: Likewise.
 423         * mmix-dis.c: Likewise.
 424         * msp430-dis.c: Likewise.
 425         * or32-dis.c: Likewise.
 426         * rl78-dis.c: Likewise.
 427         * rx-dis.c: Likewise.
 428         * tic4x-dis.c: Likewise.
 429         * tilegx-opc.c: Likewise.
 430         * tilepro-opc.c: Likewise.
 431         * rx-decode.c: Regenerate.
 432
 433 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 434
 435         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 436
 437 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 438
 439         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 440
 441 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 442             Nick Clifton  <nickc@redhat.com>
 443
 444         PR 14072
 445         * configure.in: Add check that sysdep.h has been included before
 446         any system header files.
 447         * configure: Regenerate.
 448         * config.in: Regenerate.
 449         * sysdep.h: Generate an error if included before config.h.
 450         * alpha-opc.c: Include sysdep.h before any other header file.
 451         * alpha-dis.c: Likewise.
 452         * avr-dis.c: Likewise.
 453         * cgen-opc.c: Likewise.
 454         * cr16-dis.c: Likewise.
 455         * cris-dis.c: Likewise.
 456         * crx-dis.c: Likewise.
 457         * d10v-dis.c: Likewise.
 458         * d10v-opc.c: Likewise.
 459         * d30v-dis.c: Likewise.
 460         * d30v-opc.c: Likewise.
 461         * h8500-dis.c: Likewise.
 462         * i370-dis.c: Likewise.
 463         * i370-opc.c: Likewise.
 464         * m10200-dis.c: Likewise.
 465         * m10300-dis.c: Likewise.
 466         * micromips-opc.c: Likewise.
 467         * mips-opc.c: Likewise.
 468         * mips61-opc.c: Likewise.
 469         * moxie-dis.c: Likewise.
 470         * or32-opc.c: Likewise.
 471         * pj-dis.c: Likewise.
 472         * ppc-dis.c: Likewise.
 473         * ppc-opc.c: Likewise.
 474         * s390-dis.c: Likewise.
 475         * sh-dis.c: Likewise.
 476         * sh64-dis.c: Likewise.
 477         * sparc-dis.c: Likewise.
 478         * sparc-opc.c: Likewise.
 479         * spu-dis.c: Likewise.
 480         * tic30-dis.c: Likewise.
 481         * tic54x-dis.c: Likewise.
 482         * tic80-dis.c: Likewise.
 483         * tic80-opc.c: Likewise.
 484         * tilegx-dis.c: Likewise.
 485         * tilepro-dis.c: Likewise.
 486         * v850-dis.c: Likewise.
 487         * v850-opc.c: Likewise.
 488         * vax-dis.c: Likewise.
 489         * w65-dis.c: Likewise.
 490         * xgate-dis.c: Likewise.
 491         * xtensa-dis.c: Likewise.
 492         * rl78-decode.opc: Likewise.
 493         * rl78-decode.c: Regenerate.
 494         * rx-decode.opc: Likewise.
 495         * rx-decode.c: Regenerate.
 496
 497 2012-05-17  Alan Modra  <amodra@gmail.com>
 498
 499         * ppc_dis.c: Don't include elf/ppc.h.
 500
 501 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 502
 503         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 504         to PUSH/POP {reg}.
 505
 506 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 507             Stephane Carrez <stcarrez@nerim.fr>
 508
 509         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 510         target.
 511         * disassemble.c: Likewise.
 512         * configure: Regenerate.
 513         * m68hc11-dis.c: Make objdump output more consistent, use hex
 514         instead of decimal and use 0x prefix for hex.
 515         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 516
 517 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 518
 519         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 520         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 521         (vle_opcd_indices): New array.
 522         (lookup_vle): New function.
 523         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 524         (print_insn_powerpc): Likewise.
 525         * ppc-opc.c: Likewise.
 526
 527 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 528             Maciej W. Rozycki  <macro@codesourcery.com>
 529             Rhonda Wittels  <rhonda@codesourcery.com>
 530             Nathan Froyd <froydnj@codesourcery.com>
 531
 532         * ppc-opc.c (insert_arx, extract_arx): New functions.
 533         (insert_ary, extract_ary): New functions.
 534         (insert_li20, extract_li20): New functions.
 535         (insert_rx, extract_rx): New functions.
 536         (insert_ry, extract_ry): New functions.
 537         (insert_sci8, extract_sci8): New functions.
 538         (insert_sci8n, extract_sci8n): New functions.
 539         (insert_sd4h, extract_sd4h): New functions.
 540         (insert_sd4w, extract_sd4w): New functions.
 541         (insert_vlesi, extract_vlesi): New functions.
 542         (insert_vlensi, extract_vlensi): New functions.
 543         (insert_vleui, extract_vleui): New functions.
 544         (insert_vleil, extract_vleil): New functions.
 545         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 546         (BI16, BI32, BO32, B8): New.
 547         (B15, B24, CRD32, CRS): New.
 548         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 549         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 550         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 551         (SH6_MASK): Use PPC_OPSHIFT_INV.
 552         (SI8, UI5, OIMM5, UI7, BO16): New.
 553         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 554         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 555         (ALLOW8_SPRG): New.
 556         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 557         (OPVUP, OPVUP_MASK OPVUP): New
 558         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 559         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 560         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 561         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 562         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 563         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 564         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 565         (SE_IM5, SE_IM5_MASK): New.
 566         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 567         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 568         (BO32DNZ, BO32DZ): New.
 569         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 570         (PPCVLE): New.
 571         (powerpc_opcodes): Add new VLE instructions.  Update existing
 572         instruction to include PPCVLE if supported.
 573         * ppc-dis.c (ppc_opts): Add vle entry.
 574         (get_powerpc_dialect): New function.
 575         (powerpc_init_dialect): VLE support.
 576         (print_insn_big_powerpc): Call get_powerpc_dialect.
 577         (print_insn_little_powerpc): Likewise.
 578         (operand_value_powerpc): Handle negative shift counts.
 579         (print_insn_powerpc): Handle 2-byte instruction lengths.
 580
 581 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 582
 583         PR binutils/14028
 584         * configure.in: Invoke ACX_HEADER_STRING.
 585         * configure: Regenerate.
 586         * config.in: Regenerate.
 587         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 588         string.h and strings.h.
 589
 590 2012-05-11  Nick Clifton  <nickc@redhat.com>
 591
 592         PR binutils/14006
 593         * arm-dis.c (print_insn): Fix detection of instruction mode in
 594         files containing multiple executable sections.
 595
 596 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 597
 598         * Makefile.in, configure: regenerate
 599         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 600         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 601         New functions.
 602         * configure.in: Recognize xgate.
 603         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 604         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 605         and opcode generation for xgate.
 606
 607 2012-04-30  DJ Delorie  <dj@redhat.com>
 608
 609         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 610         already the maximum bit size.
 611         * rx-decode.c: Regenerate.
 612
 613 2012-04-27  David S. Miller  <davem@davemloft.net>
 614
 615         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 616         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 617
 618         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 619         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 620
 621         * sparc-opc.c (CBCOND): New define.
 622         (CBCOND_XCC): Likewise.
 623         (cbcond): New helper macro.
 624         (sparc_opcodes): Add compare-and-branch instructions.
 625
 626         * sparc-dis.c (print_insn_sparc): Handle ')'.
 627         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 628
 629         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 630         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 631
 632 2012-04-12  David S. Miller  <davem@davemloft.net>
 633
 634         * sparc-dis.c (X_DISP10): Define.
 635         (print_insn_sparc): Handle '='.
 636
 637 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 638
 639         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 640         sprintf call and the '*' field width.
 641
 642 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 643
 644         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 645
 646 2012-03-16  Alan Modra  <amodra@gmail.com>
 647
 648         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 649         (powerpc_opcd_indices): Bump array size.
 650         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 651         corresponding to unused opcodes to following entry.
 652         (lookup_powerpc): New function, extracted and optimised from..
 653         (print_insn_powerpc): ..here.
 654
 655 2012-03-15  Alan Modra  <amodra@gmail.com>
 656             James Lemke  <jwlemke@codesourcery.com>
 657
 658         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 659         * ppc-dis.c (private): New var.
 660         (powerpc_init_dialect): Don't return calloc failure, instead use
 661         private.
 662         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 663         (powerpc_opcd_indices): New array.
 664         (disassemble_init_powerpc): New function.
 665         (print_insn_big_powerpc): Don't init dialect here.
 666         (print_insn_little_powerpc): Likewise.
 667         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 668
 669 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 670
 671         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 672         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 673         (PPCVEC2, PPCTMR, E6500): New short names.
 674         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 675         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 676         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 677         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 678         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 679         optional operands on sync instruction for E6500 target.
 680
 681 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 682
 683         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 684
 685 2012-02-27  Alan Modra  <amodra@gmail.com>
 686
 687         * mt-dis.c: Regenerate.
 688
 689 2012-02-27  Alan Modra  <amodra@gmail.com>
 690
 691         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 692         is the inverse of corresponding insert function.
 693         (extract_d22, extract_u9, extract_r4): Likewise.
 694         (extract_d9): Correct sign extension.
 695         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 696         rely on implementation defined behaviour for shift right of
 697         signed types.
 698         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 699         (extract_d23): Likewise, and correct mask.
 700
 701 2012-02-27  Alan Modra  <amodra@gmail.com>
 702
 703         * crx-dis.c (print_arg): Mask constant to 32 bits.
 704         * crx-opc.c (cst4_map): Use int array.
 705
 706 2012-02-27  Alan Modra  <amodra@gmail.com>
 707
 708         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 709         (FIELDD): Sign extend with xor,sub.
 710
 711 2012-02-25  Walter Lee  <walt@tilera.com>
 712
 713         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 714         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 715         TILEPRO_OPC_LW_TLS_SN.
 716
 717 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 718
 719         * i386-opc.h (HLEPrefixNone): New.
 720         (HLEPrefixLock): Likewise.
 721         (HLEPrefixAny): Likewise.
 722         (HLEPrefixRelease): Likewise.
 723
 724 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 725
 726         * i386-dis.c (HLE_Fixup1): New.
 727         (HLE_Fixup2): Likewise.
 728         (HLE_Fixup3): Likewise.
 729         (Ebh1): Likewise.
 730         (Evh1): Likewise.
 731         (Ebh2): Likewise.
 732         (Evh2): Likewise.
 733         (Ebh3): Likewise.
 734         (Evh3): Likewise.
 735         (MOD_C6_REG_7): Likewise.
 736         (MOD_C7_REG_7): Likewise.
 737         (RM_C6_REG_7): Likewise.
 738         (RM_C7_REG_7): Likewise.
 739         (XACQUIRE_PREFIX): Likewise.
 740         (XRELEASE_PREFIX): Likewise.
 741         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 742         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 743         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 744         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 745         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 746         MOD_C6_REG_7 and MOD_C7_REG_7.
 747         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 748         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 749         xtest.
 750         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 751         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 752
 753         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 754         CPU_RTM_FLAGS.
 755         (cpu_flags): Add CpuHLE and CpuRTM.
 756         (opcode_modifiers): Add HLEPrefixOk.
 757
 758         * i386-opc.h (CpuHLE): New.
 759         (CpuRTM): Likewise.
 760         (HLEPrefixOk): Likewise.
 761         (i386_cpu_flags): Add cpuhle and cpurtm.
 762         (i386_opcode_modifier): Add hleprefixok.
 763
 764         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 765         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 766         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 767         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 768         xtest.
 769         * i386-init.h: Regenerated.
 770         * i386-tbl.h: Likewise.
 771
 772 2012-01-24  DJ Delorie  <dj@redhat.com>
 773
 774         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 775         * rl78-decode.c: Regenerate.
 776
 777 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 778
 779         PR binutils/10173
 780         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 781
 782 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 783
 784         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 785         register and move them after pmove with PSR/PCSR register.
 786
 787 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 788
 789         * i386-dis.c (mod_table): Add vmfunc.
 790
 791         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 792         (cpu_flags): CpuVMFUNC.
 793
 794         * i386-opc.h (CpuVMFUNC): New.
 795         (i386_cpu_flags): Add cpuvmfunc.
 796
 797         * i386-opc.tbl: Add vmfunc.
 798         * i386-init.h: Regenerated.
 799         * i386-tbl.h: Likewise.
 800
 801 For older changes see ChangeLog-2011
 802 \f
 803 Local Variables:
 804 mode: change-log
 805 left-margin: 8
 806 fill-column: 74
 807 version-control: never
 808 End: