opcodes/ChangeLog

   1 2008-07-07  Stan Shebs  <stan@codesourcery.com>
   2
   3         * dis-init.c (init_disassemble_info): Init endian_code field.
   4         * arm-dis.c (print_insn): Disassemble code according to
   5         setting of endian_code.
   6         (print_insn_big_arm): Detect when BE8 extension flag has been set.
   7
   8 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
   9
  10         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
  11         for ELF symbols.
  12
  13 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
  14
  15         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
  16         (print_ppc_disassembler_options): Likewise.
  17         * ppc-opc.c (PPC464): Define.
  18         (powerpc_opcodes): Add mfdcrux and mtdcrux.
  19
  20 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  21
  22         * configure: Regenerate.
  23
  24 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
  25
  26         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
  27         ppc_cpu_t typedef.
  28         (struct dis_private): New.
  29         (POWERPC_DIALECT): New define.
  30         (powerpc_dialect): Renamed to...
  31         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
  32         struct dis_private.
  33         (print_insn_big_powerpc): Update for using structure in
  34         info->private_data.
  35         (print_insn_little_powerpc): Likewise.
  36         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
  37         (skip_optional_operands): Likewise.
  38         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
  39         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
  40         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
  41         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
  42         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
  43         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
  44         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
  45         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
  46         param to be of type ppc_cpu_t.  Update prototype.
  47
  48 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
  49
  50         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
  51         +s, +S.
  52         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
  53         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
  54         syncw, syncws, vm3mulu, vm0 and vmulu.
  55
  56         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
  57         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
  58         seqi, sne and snei.
  59
  60 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
  61
  62         * i386-opc.tbl: Add vmovd with 64bit operand.
  63         * i386-tbl.h: Regenerated.
  64
  65 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  66
  67         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
  68
  69 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
  70
  71         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
  72         * i386-tbl.h: Regenerated.
  73
  74 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
  75
  76         PR gas/6517
  77         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
  78         into 32bit and 64bit.  Remove Reg64|Qword and add
  79         IgnoreSize|No_qSuf on 32bit version.
  80         * i386-tbl.h: Regenerated.
  81
  82 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
  83
  84         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
  85         * i386-tbl.h: Regenerated.
  86
  87 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
  88
  89         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
  90
  91 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
  92
  93         * Makefile.am: Run "make dep-am".
  94         * Makefile.in: Regenerate.
  95
  96 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
  97
  98         * i386-dis.c (MOVBE_Fixup): New.
  99         (Mo): Likewise.
 100         (PREFIX_0F3880): Likewise.
 101         (PREFIX_0F3881): Likewise.
 102         (PREFIX_0F38F0): Updated.
 103         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 104         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 105         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 106
 107         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 108         CPU_EPT_FLAGS.
 109         (cpu_flags): Add CpuMovbe and CpuEPT.
 110
 111         * i386-opc.h (CpuMovbe): New.
 112         (CpuEPT): Likewise.
 113         (CpuLM): Updated.
 114         (i386_cpu_flags): Add cpumovbe and cpuept.
 115
 116         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 117         * i386-init.h: Regenerated.
 118         * i386-tbl.h: Likewise.
 119
 120 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 121
 122         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 123         the two drem and the two dremu macros.
 124
 125 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 126
 127         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 128         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 129         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 130         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 131
 132 2008-04-25  David S. Miller  <davem@davemloft.net>
 133
 134         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 135         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 136
 137 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 138
 139         * aclocal.m4: Regenerate.
 140         * configure: Regenerate.
 141
 142 2008-04-23  David S. Miller  <davem@davemloft.net>
 143
 144         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 145         extended values.
 146         (prefetch_table): Add missing values.
 147
 148 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 149
 150         * i386-gen.c (opcode_modifiers): Add NoAVX.
 151
 152         * i386-opc.h (NoAVX): New.
 153         (OldGcc): Updated.
 154         (i386_opcode_modifier): Add noavx.
 155
 156         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 157         instructions which don't have AVX equivalent.
 158         * i386-tbl.h: Regenerated.
 159
 160 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 161
 162         * i386-dis.c (OP_VEX_FMA): New.
 163         (OP_EX_VexImmW): Likewise.
 164         (VexFMA): Likewise.
 165         (Vex128FMA): Likewise.
 166         (EXVexImmW): Likewise.
 167         (get_vex_imm8): Likewise.
 168         (OP_EX_VexReg): Likewise.
 169         (vex_i4_done): Renamed to ...
 170         (vex_w_done): This.
 171         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 172         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 173         FMA instructions.
 174         (print_insn): Updated.
 175         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 176         (OP_REG_VexI4): Check invalid high registers.
 177
 178 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 179             Michael Meissner  <michael.meissner@amd.com>
 180
 181         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 182         * i386-tbl.h: Regenerate from i386-opc.tbl.
 183
 184 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 185
 186         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 187         accept Power E500MC instructions.
 188         (print_ppc_disassembler_options): Document -Me500mc.
 189         * ppc-opc.c (DUIS, DUI, T): New.
 190         (XRT, XRTRA): Likewise.
 191         (E500MC): Likewise.
 192         (powerpc_opcodes): Add new Power E500MC instructions.
 193
 194 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 195
 196         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 197         (print_s390_disassembler_options): New function.
 198         * disassemble.c (disassembler_usage): Invoke
 199         print_s390_disassembler_options.
 200
 201 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 202
 203         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 204         of local variables used for mnemonic parsing: prefix, suffix and
 205         number.
 206
 207 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 208
 209         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 210         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 211         (s390_crb_extensions): New extensions table.
 212         (insertExpandedMnemonic): Handle '$' tag.
 213         * s390-opc.txt: Remove conditional jump variants which can now
 214         be expanded automatically.
 215         Replace '*' tag with '$' in the compare and branch instructions.
 216
 217 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 218
 219         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 220         (PREFIX_VEX_3AXX): Likewis.
 221
 222 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 223
 224         * i386-opc.tbl: Remove 4 extra blank lines.
 225
 226 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 227
 228         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 229         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 230         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 231         * i386-opc.tbl: Likewise.
 232
 233         * i386-opc.h (CpuCLMUL): Renamed to ...
 234         (CpuPCLMUL): This.
 235         (CpuFMA): Updated.
 236         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 237
 238         * i386-init.h: Regenerated.
 239
 240 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 241
 242         * i386-dis.c (OP_E_register): New.
 243         (OP_E_memory): Likewise.
 244         (OP_VEX): Likewise.
 245         (OP_EX_Vex): Likewise.
 246         (OP_EX_VexW): Likewise.
 247         (OP_XMM_Vex): Likewise.
 248         (OP_XMM_VexW): Likewise.
 249         (OP_REG_VexI4): Likewise.
 250         (PCLMUL_Fixup): Likewise.
 251         (VEXI4_Fixup): Likewise.
 252         (VZERO_Fixup): Likewise.
 253         (VCMP_Fixup): Likewise.
 254         (VPERMIL2_Fixup): Likewise.
 255         (rex_original): Likewise.
 256         (rex_ignored): Likewise.
 257         (Mxmm): Likewise.
 258         (XMM): Likewise.
 259         (EXxmm): Likewise.
 260         (EXxmmq): Likewise.
 261         (EXymmq): Likewise.
 262         (Vex): Likewise.
 263         (Vex128): Likewise.
 264         (Vex256): Likewise.
 265         (VexI4): Likewise.
 266         (EXdVex): Likewise.
 267         (EXqVex): Likewise.
 268         (EXVexW): Likewise.
 269         (EXdVexW): Likewise.
 270         (EXqVexW): Likewise.
 271         (XMVex): Likewise.
 272         (XMVexW): Likewise.
 273         (XMVexI4): Likewise.
 274         (PCLMUL): Likewise.
 275         (VZERO): Likewise.
 276         (VCMP): Likewise.
 277         (VPERMIL2): Likewise.
 278         (xmm_mode): Likewise.
 279         (xmmq_mode): Likewise.
 280         (ymmq_mode): Likewise.
 281         (vex_mode): Likewise.
 282         (vex128_mode): Likewise.
 283         (vex256_mode): Likewise.
 284         (USE_VEX_C4_TABLE): Likewise.
 285         (USE_VEX_C5_TABLE): Likewise.
 286         (USE_VEX_LEN_TABLE): Likewise.
 287         (VEX_C4_TABLE): Likewise.
 288         (VEX_C5_TABLE): Likewise.
 289         (VEX_LEN_TABLE): Likewise.
 290         (REG_VEX_XX): Likewise.
 291         (MOD_VEX_XXX): Likewise.
 292         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 293         (PREFIX_0F3A44): Likewise.
 294         (PREFIX_0F3ADF): Likewise.
 295         (PREFIX_VEX_XXX): Likewise.
 296         (VEX_OF): Likewise.
 297         (VEX_OF38): Likewise.
 298         (VEX_OF3A): Likewise.
 299         (VEX_LEN_XXX): Likewise.
 300         (vex): Likewise.
 301         (need_vex): Likewise.
 302         (need_vex_reg): Likewise.
 303         (vex_i4_done): Likewise.
 304         (vex_table): Likewise.
 305         (vex_len_table): Likewise.
 306         (OP_REG_VexI4): Likewise.
 307         (vex_cmp_op): Likewise.
 308         (pclmul_op): Likewise.
 309         (vpermil2_op): Likewise.
 310         (m_mode): Updated.
 311         (es_reg): Likewise.
 312         (PREFIX_0F38F0): Likewise.
 313         (PREFIX_0F3A60): Likewise.
 314         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 315         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 316         and PREFIX_VEX_XXX entries.
 317         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 318         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 319         PREFIX_0F3ADF.
 320         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 321         Add MOD_VEX_XXX entries.
 322         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 323         REX byte in rex_original.
 324         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 325         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 326         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 327         calling get_valid_dis386.  Use rex_original and rex_ignored when
 328         printing out REX.
 329         (putop): Handle "XY".
 330         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 331         ymmq_mode.
 332         (OP_E_extended): Updated to use OP_E_register and
 333         OP_E_memory.
 334         (OP_XMM): Handle VEX.
 335         (OP_EX): Likewise.
 336         (XMM_Fixup): Likewise.
 337         (CMP_Fixup): Use ARRAY_SIZE.
 338
 339         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 340         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 341         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 342         OPERAND_TYPE_VEX_IMM4.
 343         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 344         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 345         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 346         VexImmExt and SSE2AVX.
 347         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 348
 349         * i386-opc.h (CpuAVX): New.
 350         (CpuAES): Likewise.
 351         (CpuCLMUL): Likewise.
 352         (CpuFMA): Likewise.
 353         (Vex): Likewise.
 354         (Vex256): Likewise.
 355         (VexNDS): Likewise.
 356         (VexNDD): Likewise.
 357         (VexW0): Likewise.
 358         (VexW1): Likewise.
 359         (Vex0F): Likewise.
 360         (Vex0F38): Likewise.
 361         (Vex0F3A): Likewise.
 362         (Vex3Sources): Likewise.
 363         (VexImmExt): Likewise.
 364         (SSE2AVX): Likewise.
 365         (RegYMM): Likewise.
 366         (Ymmword): Likewise.
 367         (Vex_Imm4): Likewise.
 368         (Implicit1stXmm0): Likewise.
 369         (CpuXsave): Updated.
 370         (CpuLM): Likewise.
 371         (ByteOkIntel): Likewise.
 372         (OldGcc): Likewise.
 373         (Control): Likewise.
 374         (Unspecified): Likewise.
 375         (OTMax): Likewise.
 376         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 377         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 378         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 379         vex3sources, veximmext and sse2avx.
 380         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 381
 382         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 383
 384         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 385
 386         * i386-init.h: Regenerated.
 387         * i386-tbl.h: Likewise.
 388
 389 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 390
 391         From  Robin Getz  <robin.getz@analog.com>
 392         * bfin-dis.c (bu32): Typedef.
 393         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 394         (constant_formats[]): Add uimm32 and huimm16.
 395         (fmtconst_val): New.
 396         (uimm32): Define.
 397         (huimm32): Define.
 398         (imm16_val): Define.
 399         (luimm16_val): Define.
 400         (struct saved_state): Define.
 401         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 402         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 403         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 404         (get_allreg): New.
 405         (decode_LDIMMhalf_0): Print out the whole register value.
 406
 407         From Jie Zhang  <jie.zhang@analog.com>
 408         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 409         multiply and multiply-accumulate to data register instruction.
 410
 411         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 412         c_imm32, c_huimm32e): Define.
 413         (constant_formats): Add flags for printing decimal, leading spaces, and
 414         exact symbols.
 415         (comment, parallel): Add global flags in all disassembly.
 416         (fmtconst): Take advantage of new flags, and print default in hex.
 417         (fmtconst_val): Likewise.
 418         (decode_macfunc): Be consistant with spaces, tabs, comments,
 419         capitalization in disassembly, fix minor coding style issues.
 420         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 421         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 422         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 423         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 424         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 425         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 426         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 427         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 428         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 429         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 430         _print_insn_bfin, print_insn_bfin): Likewise.
 431
 432 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 433
 434         * aclocal.m4: Regenerate.
 435         * configure: Likewise.
 436         * Makefile.in: Likewise.
 437
 438 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 439
 440         * Makefile.am: Run "make dep-am".
 441         * Makefile.in: Regenerate.
 442         * configure: Regenerate.
 443
 444 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 445
 446         * ppc-opc.c (powerpc_opcodes): Order and format.
 447
 448 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 449
 450         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 451         * i386-tbl.h: Regenerated.
 452
 453 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 454
 455         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 456         x86-64.
 457         * i386-tbl.h: Regenerated.
 458
 459 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 460
 461         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 462         and Fword for far indirect jmp. Allow Reg16 and Word for near
 463         indirect jmp on x86-64. Disallow Fword for lcall.
 464         * i386-tbl.h: Re-generate.
 465
 466 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 467
 468         * cr16-opc.c  (cr16_num_optab): Defined
 469
 470 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 471
 472         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 473         * i386-init.h: Regenerated.
 474
 475 2008-02-14  Nick Clifton  <nickc@redhat.com>
 476
 477         PR binutils/5524
 478         * configure.in (SHARED_LIBADD): Select the correct host specific
 479         file extension for shared libraries.
 480         * configure: Regenerate.
 481
 482 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 483
 484         * i386-opc.h (RegFlat): New.
 485         * i386-reg.tbl (flat): Add.
 486         * i386-tbl.h: Re-generate.
 487
 488 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 489
 490         * i386-dis.c (a_mode): New.
 491         (cond_jump_mode): Adjust.
 492         (Ma): Change to a_mode.
 493         (intel_operand_size): Handle a_mode.
 494         * i386-opc.tbl: Allow Dword and Qword for bound.
 495         * i386-tbl.h: Re-generate.
 496
 497 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 498
 499         * i386-gen.c (process_i386_registers): Process new fields.
 500         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 501         unsigned char. Add dw2_regnum and Dw2Inval.
 502         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 503         register names.
 504         * i386-tbl.h: Re-generate.
 505
 506 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 507
 508         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 509         * i386-init.h: Updated.
 510
 511 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 512
 513         * i386-gen.c (cpu_flags): Add CpuXsave.
 514
 515         * i386-opc.h (CpuXsave): New.
 516         (CpuLM): Updated.
 517         (i386_cpu_flags): Add cpuxsave.
 518
 519         * i386-dis.c (MOD_0FAE_REG_4): New.
 520         (RM_0F01_REG_2): Likewise.
 521         (MOD_0FAE_REG_5): Updated.
 522         (RM_0F01_REG_3): Likewise.
 523         (reg_table): Use MOD_0FAE_REG_4.
 524         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 525         for xrstor.
 526         (rm_table): Add RM_0F01_REG_2.
 527
 528         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 529         * i386-init.h: Regenerated.
 530         * i386-tbl.h: Likewise.
 531
 532 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 533
 534         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 535         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 536         * i386-tbl.h: Re-generate.
 537
 538 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 539
 540         PR 5715
 541         * configure: Regenerated.
 542
 543 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 544
 545         * mips-dis.c: Update copyright.
 546         (mips_arch_choices): Add Octeon.
 547         * mips-opc.c: Update copyright.
 548         (IOCT): New macro.
 549         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 550
 551 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 552
 553         * ppc-opc.c: Support optional L form mtmsr.
 554
 555 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 556
 557         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 558
 559 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 560
 561         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 562         * i386-init.h: Regenerated.
 563
 564 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 565
 566         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 567         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 568
 569 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 570
 571         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 572         (cpu_flags): Likewise.
 573
 574         * i386-opc.h (CpuMMX2): Removed.
 575         (CpuSSE): Updated.
 576
 577         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 578         * i386-init.h: Regenerated.
 579         * i386-tbl.h: Likewise.
 580
 581 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 582
 583         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 584         CPU_SMX_FLAGS.
 585         * i386-init.h: Regenerated.
 586
 587 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 588
 589         * i386-opc.tbl: Use Qword on movddup.
 590         * i386-tbl.h: Regenerated.
 591
 592 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 593
 594         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 595         * i386-tbl.h: Regenerated.
 596
 597 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 598
 599         * i386-dis.c (Mx): New.
 600         (PREFIX_0FC3): Likewise.
 601         (PREFIX_0FC7_REG_6): Updated.
 602         (dis386_twobyte): Use PREFIX_0FC3.
 603         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 604         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 605         movntss.
 606
 607 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 608
 609         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 610         (operand_types): Add Mem.
 611
 612         * i386-opc.h (IntelSyntax): New.
 613         * i386-opc.h (Mem): New.
 614         (Byte): Updated.
 615         (Opcode_Modifier_Max): Updated.
 616         (i386_opcode_modifier): Add intelsyntax.
 617         (i386_operand_type): Add mem.
 618
 619         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 620         instructions.
 621
 622         * i386-reg.tbl: Add size for accumulator.
 623
 624         * i386-init.h: Regenerated.
 625         * i386-tbl.h: Likewise.
 626
 627 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 628
 629         * i386-opc.h (Byte): Fix a typo.
 630
 631 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 632
 633         PR gas/5534
 634         * i386-gen.c (operand_type_init): Add Dword to
 635         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 636         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 637         Qword and Xmmword.
 638         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 639         Xmmword, Unspecified and Anysize.
 640         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 641         an alias of Xmmword.
 642
 643         * i386-opc.h (CheckSize): Removed.
 644         (Byte): Updated.
 645         (Word): Likewise.
 646         (Dword): Likewise.
 647         (Qword): Likewise.
 648         (Xmmword): Likewise.
 649         (FWait): Updated.
 650         (OTMax): Likewise.
 651         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 652         qword and xmmword.
 653         (Fword): New.
 654         (TBYTE): Likewise.
 655         (Unspecified): Likewise.
 656         (Anysize): Likewise.
 657         (i386_operand_type): Add byte, word, dword, fword, qword,
 658         tbyte xmmword, unspecified and anysize.
 659
 660         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 661         Tbyte, Xmmword, Unspecified and Anysize.
 662
 663         * i386-reg.tbl: Add size for accumulator.
 664
 665         * i386-init.h: Regenerated.
 666         * i386-tbl.h: Likewise.
 667
 668 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 669
 670         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 671         (REG_0F18): Updated.
 672         (reg_table): Updated.
 673         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 674         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 675
 676 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 677
 678         * i386-gen.c (set_bitfield): Use fail () on error.
 679
 680 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 681
 682         * i386-gen.c (lineno): New.
 683         (filename): Likewise.
 684         (set_bitfield): Report filename and line numer on error.
 685         (process_i386_opcodes): Set filename and update lineno.
 686         (process_i386_registers): Likewise.
 687
 688 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 689
 690         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 691         ATTSyntax.
 692
 693         * i386-opc.h (IntelMnemonic): Renamed to ..
 694         (ATTSyntax): This
 695         (Opcode_Modifier_Max): Updated.
 696         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 697         and intelsyntax.
 698
 699         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 700         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 701         * i386-tbl.h: Regenerated.
 702
 703 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 704
 705         * i386-gen.c: Update copyright to 2008.
 706         * i386-opc.h: Likewise.
 707         * i386-opc.tbl: Likewise.
 708
 709         * i386-init.h: Regenerated.
 710         * i386-tbl.h: Likewise.
 711
 712 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 713
 714         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 715         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 716         * i386-tbl.h: Regenerated.
 717
 718 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 719
 720         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 721         CpuSSE4_2_Or_ABM.
 722         (cpu_flags): Likewise.
 723
 724         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 725         (CpuSSE4_2_Or_ABM): Likewise.
 726         (CpuLM): Updated.
 727         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 728
 729         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 730         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 731         and CpuPadLock, respectively.
 732         * i386-init.h: Regenerated.
 733         * i386-tbl.h: Likewise.
 734
 735 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 736
 737         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 738
 739         * i386-opc.h (No_xSuf): Removed.
 740         (CheckSize): Updated.
 741
 742         * i386-tbl.h: Regenerated.
 743
 744 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 745
 746         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 747         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 748         CPU_SSE5_FLAGS.
 749         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 750
 751         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 752         (CpuLM): Updated.
 753         (i386_cpu_flags): Add cpusse4_2_or_abm.
 754
 755         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 756         CpuABM|CpuSSE4_2 on popcnt.
 757         * i386-init.h: Regenerated.
 758         * i386-tbl.h: Likewise.
 759
 760 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 761
 762         * i386-opc.h: Update comments.
 763
 764 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 765
 766         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 767         * i386-opc.h: Likewise.
 768         * i386-opc.tbl: Likewise.
 769
 770 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 771
 772         PR gas/5534
 773         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 774         Byte, Word, Dword, QWord and Xmmword.
 775
 776         * i386-opc.h (No_xSuf): New.
 777         (CheckSize): Likewise.
 778         (Byte): Likewise.
 779         (Word): Likewise.
 780         (Dword): Likewise.
 781         (QWord): Likewise.
 782         (Xmmword): Likewise.
 783         (FWait): Updated.
 784         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 785         Dword, QWord and Xmmword.
 786
 787         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 788         used.
 789         * i386-tbl.h: Regenerated.
 790
 791 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 792
 793         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 794         From Miod Vallat.
 795
 796 For older changes see ChangeLog-2007
 797 \f
 798 Local Variables:
 799 mode: change-log
 800 left-margin: 8
 801 fill-column: 74
 802 version-control: never
 803 End: