include/opcode/
[binutils-gdb.git] / opcodes / ChangeLog
1 2010-07-03 Alan Modra <amodra@gmail.com>
2
3 * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
4 * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
5 (PPC64, MFDEC2): Update.
6 (NON32, NO371): Define.
7 (powerpc_opcode): Update to not use old opcode flags, and avoid
8 -m601 duplicates.
9
10 2010-07-03 DJ Delorie <dj@delorie.com>
11
12 * m32c-ibld.c: Regenerate.
13
14 2010-07-03 Alan Modra <amodra@gmail.com>
15
16 * ppc-opc.c (PWR2COM): Define.
17 (PPCPWR2): Add PPC_OPCODE_COMMON.
18 (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
19 "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
20 "rac" from -mcom.
21
22 2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
23
24 AVX Programming Reference (June, 2010)
25 * i386-dis.c (PREFIX_0FAE_REG_0): New.
26 (PREFIX_0FAE_REG_1): Likewise.
27 (PREFIX_0FAE_REG_2): Likewise.
28 (PREFIX_0FAE_REG_3): Likewise.
29 (PREFIX_VEX_3813): Likewise.
30 (PREFIX_VEX_3A1D): Likewise.
31 (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
32 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
33 PREFIX_VEX_3A1D.
34 (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
35 (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
36 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
37
38 * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
39 CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
40 (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
41
42 * i386-opc.h (CpuXsaveopt): New.
43 (CpuFSGSBase):Likewise.
44 (CpuRdRnd): Likewise.
45 (CpuF16C): Likewise.
46 (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
47 cpuf16c.
48
49 * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
50 wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
51 * i386-init.h: Regenerated.
52 * i386-tbl.h: Likewise.
53
54 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
55
56 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
57 and mtocrf on EFS.
58
59 2010-06-29 Alan Modra <amodra@gmail.com>
60
61 * maxq-dis.c: Delete file.
62 * Makefile.am: Remove references to maxq.
63 * configure.in: Likewise.
64 * disassemble.c: Likewise.
65 * Makefile.in: Regenerate.
66 * configure: Regenerate.
67 * po/POTFILES.in: Regenerate.
68
69 2010-06-29 Alan Modra <amodra@gmail.com>
70
71 * mep-dis.c: Regenerate.
72
73 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
74
75 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
76
77 2010-06-27 Alan Modra <amodra@gmail.com>
78
79 * arc-dis.c (arc_sprintf): Delete set but unused variables.
80 (decodeInstr): Likewise.
81 * dlx-dis.c (print_insn_dlx): Likewise.
82 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
83 * maxq-dis.c (check_move, print_insn): Likewise.
84 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
85 * msp430-dis.c (msp430_branchinstr): Likewise.
86 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
87 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
88 * sparc-dis.c (print_insn_sparc): Likewise.
89 * fr30-asm.c: Regenerate.
90 * frv-asm.c: Regenerate.
91 * ip2k-asm.c: Regenerate.
92 * iq2000-asm.c: Regenerate.
93 * lm32-asm.c: Regenerate.
94 * m32c-asm.c: Regenerate.
95 * m32r-asm.c: Regenerate.
96 * mep-asm.c: Regenerate.
97 * mt-asm.c: Regenerate.
98 * openrisc-asm.c: Regenerate.
99 * xc16x-asm.c: Regenerate.
100 * xstormy16-asm.c: Regenerate.
101
102 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
103
104 PR gas/11673
105 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
106
107 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
108
109 PR binutils/11676
110 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
111
112 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
113
114 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
115 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
116 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
117 touch floating point regs and are enabled by COM, PPC or PPCCOM.
118 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
119 Treat lwsync as msync on e500.
120
121 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
122
123 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
124
125 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
126
127 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
128 constants is the same on 32-bit and 64-bit hosts.
129
130 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
131
132 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
133 .short directives so that they can be reassembled.
134
135 2010-05-26 Catherine Moore <clm@codesourcery.com>
136 David Ung <davidu@mips.com>
137
138 * mips-opc.c: Change membership to I1 for instructions ssnop and
139 ehb.
140
141 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
142
143 * i386-dis.c (sib): New.
144 (get_sib): Likewise.
145 (print_insn): Call get_sib.
146 OP_E_memory): Use sib.
147
148 2010-05-26 Catherine Moore <clm@codesoourcery.com>
149
150 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
151 * mips-opc.c (I16): Remove.
152 (mips_builtin_op): Reclassify jalx.
153
154 2010-05-19 Alan Modra <amodra@gmail.com>
155
156 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
157 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
158
159 2010-05-13 Alan Modra <amodra@gmail.com>
160
161 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
162
163 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
164
165 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
166 format.
167 (print_insn_thumb16): Add support for new %W format.
168
169 2010-05-07 Tristan Gingold <gingold@adacore.com>
170
171 * Makefile.in: Regenerate with automake 1.11.1.
172 * aclocal.m4: Ditto.
173
174 2010-05-05 Nick Clifton <nickc@redhat.com>
175
176 * po/es.po: Updated Spanish translation.
177
178 2010-04-22 Nick Clifton <nickc@redhat.com>
179
180 * po/opcodes.pot: Updated by the Translation project.
181 * po/vi.po: Updated Vietnamese translation.
182
183 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
184
185 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
186 bits in opcode.
187
188 2010-04-09 Nick Clifton <nickc@redhat.com>
189
190 * i386-dis.c (print_insn): Remove unused variable op.
191 (OP_sI): Remove unused variable mask.
192
193 2010-04-07 Alan Modra <amodra@gmail.com>
194
195 * configure: Regenerate.
196
197 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
198
199 * ppc-opc.c (RBOPT): New define.
200 ("dccci"): Enable for PPCA2. Make operands optional.
201 ("iccci"): Likewise. Do not deprecate for PPC476.
202
203 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
204
205 * cr16-opc.c (cr16_instruction): Fix typo in comment.
206
207 2010-03-25 Joseph Myers <joseph@codesourcery.com>
208
209 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
210 * Makefile.in: Regenerate.
211 * configure.in (bfd_tic6x_arch): New.
212 * configure: Regenerate.
213 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
214 (disassembler): Handle TI C6X.
215 * tic6x-dis.c: New.
216
217 2010-03-24 Mike Frysinger <vapier@gentoo.org>
218
219 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
220
221 2010-03-23 Joseph Myers <joseph@codesourcery.com>
222
223 * dis-buf.c (buffer_read_memory): Give error for reading just
224 before the start of memory.
225
226 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
227 Quentin Neill <quentin.neill@amd.com>
228
229 * i386-dis.c (OP_LWP_I): Removed.
230 (reg_table): Do not use OP_LWP_I, use Iq.
231 (OP_LWPCB_E): Remove use of names16.
232 (OP_LWP_E): Same.
233 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
234 should not set the Vex.length bit.
235 * i386-tbl.h: Regenerated.
236
237 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
238
239 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
240
241 2010-02-24 Nick Clifton <nickc@redhat.com>
242
243 PR binutils/6773
244 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
245 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
246 (thumb32_opcodes): Likewise.
247
248 2010-02-15 Nick Clifton <nickc@redhat.com>
249
250 * po/vi.po: Updated Vietnamese translation.
251
252 2010-02-12 Doug Evans <dje@sebabeach.org>
253
254 * lm32-opinst.c: Regenerate.
255
256 2010-02-11 Doug Evans <dje@sebabeach.org>
257
258 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
259 (print_address): Delete CGEN_PRINT_ADDRESS.
260 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
261 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
262 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
263 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
264
265 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
266 * frv-desc.c, * frv-desc.h, * frv-opc.c,
267 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
268 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
269 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
270 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
271 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
272 * mep-desc.c, * mep-desc.h, * mep-opc.c,
273 * mt-desc.c, * mt-desc.h, * mt-opc.c,
274 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
275 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
276 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
277
278 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
279
280 * i386-dis.c: Update copyright.
281 * i386-gen.c: Likewise.
282 * i386-opc.h: Likewise.
283 * i386-opc.tbl: Likewise.
284
285 2010-02-10 Quentin Neill <quentin.neill@amd.com>
286 Sebastian Pop <sebastian.pop@amd.com>
287
288 * i386-dis.c (OP_EX_VexImmW): Reintroduced
289 function to handle 5th imm8 operand.
290 (PREFIX_VEX_3A48): Added.
291 (PREFIX_VEX_3A49): Added.
292 (VEX_W_3A48_P_2): Added.
293 (VEX_W_3A49_P_2): Added.
294 (prefix table): Added entries for PREFIX_VEX_3A48
295 and PREFIX_VEX_3A49.
296 (vex table): Added entries for VEX_W_3A48_P_2 and
297 and VEX_W_3A49_P_2.
298 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
299 for Vec_Imm4 operands.
300 * i386-opc.h (enum): Added Vec_Imm4.
301 (i386_operand_type): Added vec_imm4.
302 * i386-opc.tbl: Add entries for vpermilp[ds].
303 * i386-init.h: Regenerated.
304 * i386-tbl.h: Regenerated.
305
306 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
307
308 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
309 and "pwr7". Move "a2" into alphabetical order.
310
311 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
312
313 * ppc-dis.c (ppc_opts): Add titan entry.
314 * ppc-opc.c (TITAN, MULHW): Define.
315 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
316
317 2010-02-03 Quentin Neill <quentin.neill@amd.com>
318
319 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
320 to CPU_BDVER1_FLAGS
321 * i386-init.h: Regenerated.
322
323 2010-02-03 Anthony Green <green@moxielogic.com>
324
325 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
326 0x0f, and make 0x00 an illegal instruction.
327
328 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
329
330 * opcodes/arm-dis.c (struct arm_private_data): New.
331 (print_insn_coprocessor, print_insn_arm): Update to use struct
332 arm_private_data.
333 (is_mapping_symbol, get_map_sym_type): New functions.
334 (get_sym_code_type): Check the symbol's section. Do not check
335 mapping symbols.
336 (print_insn): Default to disassembling ARM mode code. Check
337 for mapping symbols separately from other symbols. Use
338 struct arm_private_data.
339
340 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
341
342 * i386-dis.c (EXVexWdqScalar): New.
343 (vex_scalar_w_dq_mode): Likewise.
344 (prefix_table): Update entries for PREFIX_VEX_3899,
345 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
346 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
347 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
348 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
349 (intel_operand_size): Handle vex_scalar_w_dq_mode.
350 (OP_EX): Likewise.
351
352 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
353
354 * i386-dis.c (XMScalar): New.
355 (EXdScalar): Likewise.
356 (EXqScalar): Likewise.
357 (EXqScalarS): Likewise.
358 (VexScalar): Likewise.
359 (EXdVexScalarS): Likewise.
360 (EXqVexScalarS): Likewise.
361 (XMVexScalar): Likewise.
362 (scalar_mode): Likewise.
363 (d_scalar_mode): Likewise.
364 (d_scalar_swap_mode): Likewise.
365 (q_scalar_mode): Likewise.
366 (q_scalar_swap_mode): Likewise.
367 (vex_scalar_mode): Likewise.
368 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
369 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
370 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
371 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
372 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
373 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
374 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
375 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
376 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
377 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
378 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
379 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
380 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
381 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
382 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
383 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
384 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
385 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
386 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
387 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
388 q_scalar_mode, q_scalar_swap_mode.
389 (OP_XMM): Handle scalar_mode.
390 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
391 and q_scalar_swap_mode.
392 (OP_VEX): Handle vex_scalar_mode.
393
394 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
395
396 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
397
398 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
399
400 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
401
402 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
403
404 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
405
406 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
407
408 * i386-dis.c (Bad_Opcode): New.
409 (bad_opcode): Likewise.
410 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
411 (dis386_twobyte): Likewise.
412 (reg_table): Likewise.
413 (prefix_table): Likewise.
414 (x86_64_table): Likewise.
415 (vex_len_table): Likewise.
416 (vex_w_table): Likewise.
417 (mod_table): Likewise.
418 (rm_table): Likewise.
419 (float_reg): Likewise.
420 (reg_table): Remove trailing "(bad)" entries.
421 (prefix_table): Likewise.
422 (x86_64_table): Likewise.
423 (vex_len_table): Likewise.
424 (vex_w_table): Likewise.
425 (mod_table): Likewise.
426 (rm_table): Likewise.
427 (get_valid_dis386): Handle bytemode 0.
428
429 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
430
431 * i386-opc.h (VEXScalar): New.
432
433 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
434 instructions.
435 * i386-tbl.h: Regenerated.
436
437 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
438
439 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
440
441 * i386-opc.tbl: Add xsave64 and xrstor64.
442 * i386-tbl.h: Regenerated.
443
444 2010-01-20 Nick Clifton <nickc@redhat.com>
445
446 PR 11170
447 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
448 based post-indexed addressing.
449
450 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
451
452 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
453 * i386-tbl.h: Regenerated.
454
455 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
456
457 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
458 comments.
459
460 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
461
462 * i386-dis.c (names_mm): New.
463 (intel_names_mm): Likewise.
464 (att_names_mm): Likewise.
465 (names_xmm): Likewise.
466 (intel_names_xmm): Likewise.
467 (att_names_xmm): Likewise.
468 (names_ymm): Likewise.
469 (intel_names_ymm): Likewise.
470 (att_names_ymm): Likewise.
471 (print_insn): Set names_mm, names_xmm and names_ymm.
472 (OP_MMX): Use names_mm, names_xmm and names_ymm.
473 (OP_XMM): Likewise.
474 (OP_EM): Likewise.
475 (OP_EMC): Likewise.
476 (OP_MXC): Likewise.
477 (OP_EX): Likewise.
478 (XMM_Fixup): Likewise.
479 (OP_VEX): Likewise.
480 (OP_EX_VexReg): Likewise.
481 (OP_Vex_2src): Likewise.
482 (OP_Vex_2src_1): Likewise.
483 (OP_Vex_2src_2): Likewise.
484 (OP_REG_VexI4): Likewise.
485
486 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
487
488 * i386-dis.c (print_insn): Update comments.
489
490 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
491
492 * i386-dis.c (rex_original): Removed.
493 (ckprefix): Remove rex_original.
494 (print_insn): Update comments.
495
496 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
497
498 * Makefile.in: Regenerate.
499 * configure: Regenerate.
500
501 2010-01-07 Doug Evans <dje@sebabeach.org>
502
503 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
504 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
505 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
506 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
507 * xstormy16-ibld.c: Regenerate.
508
509 2010-01-06 Quentin Neill <quentin.neill@amd.com>
510
511 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
512 * i386-init.h: Regenerated.
513
514 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
515
516 * arm-dis.c (print_insn): Fixed search for next symbol and data
517 dumping condition, and the initial mapping symbol state.
518
519 2010-01-05 Doug Evans <dje@sebabeach.org>
520
521 * cgen-ibld.in: #include "cgen/basic-modes.h".
522 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
523 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
524 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
525 * xstormy16-ibld.c: Regenerate.
526
527 2010-01-04 Nick Clifton <nickc@redhat.com>
528
529 PR 11123
530 * arm-dis.c (print_insn_coprocessor): Initialise value.
531
532 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
533
534 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
535
536 2010-01-02 Doug Evans <dje@sebabeach.org>
537
538 * cgen-asm.in: Update copyright year.
539 * cgen-dis.in: Update copyright year.
540 * cgen-ibld.in: Update copyright year.
541 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
542 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
543 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
544 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
545 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
546 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
547 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
548 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
549 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
550 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
551 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
552 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
553 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
554 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
555 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
556 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
557 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
558 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
559 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
560 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
561 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
562
563 For older changes see ChangeLog-2009
564 \f
565 Local Variables:
566 mode: change-log
567 left-margin: 8
568 fill-column: 74
569 version-control: never
570 End: