opcodes/ChangeLog

   1 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
   2
   3         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
   4         .short directives so that they can be reassembled.
   5
   6 2010-05-26  Catherine Moore <clm@codesourcery.com>
   7             David Ung  <davidu@mips.com>
   8
   9         * mips-opc.c: Change membership to I1 for instructions ssnop and
  10         ehb.
  11
  12 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
  13
  14         * i386-dis.c (sib): New.
  15         (get_sib): Likewise.
  16         (print_insn): Call get_sib.
  17         OP_E_memory): Use sib.
  18
  19 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
  20
  21         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
  22         * mips-opc.c (I16): Remove.
  23         (mips_builtin_op): Reclassify jalx.
  24
  25 2010-05-19  Alan Modra  <amodra@gmail.com>
  26
  27         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
  28         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
  29
  30 2010-05-13  Alan Modra  <amodra@gmail.com>
  31
  32         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
  33
  34 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  35
  36         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
  37         format.
  38         (print_insn_thumb16): Add support for new %W format.
  39
  40 2010-05-07  Tristan Gingold  <gingold@adacore.com>
  41
  42         * Makefile.in: Regenerate with automake 1.11.1.
  43         * aclocal.m4: Ditto.
  44
  45 2010-05-05  Nick Clifton  <nickc@redhat.com>
  46
  47         * po/es.po: Updated Spanish translation.
  48
  49 2010-04-22  Nick Clifton  <nickc@redhat.com>
  50
  51         * po/opcodes.pot: Updated by the Translation project.
  52         * po/vi.po: Updated Vietnamese translation.
  53
  54 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
  55
  56         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
  57         bits in opcode.
  58
  59 2010-04-09  Nick Clifton  <nickc@redhat.com>
  60
  61         * i386-dis.c (print_insn): Remove unused variable op.
  62         (OP_sI): Remove unused variable mask.
  63
  64 2010-04-07  Alan Modra  <amodra@gmail.com>
  65
  66         * configure: Regenerate.
  67
  68 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
  69
  70         * ppc-opc.c (RBOPT): New define.
  71         ("dccci"): Enable for PPCA2.  Make operands optional.
  72         ("iccci"): Likewise.  Do not deprecate for PPC476.
  73
  74 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
  75
  76         * cr16-opc.c (cr16_instruction): Fix typo in comment.
  77
  78 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
  79
  80         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
  81         * Makefile.in: Regenerate.
  82         * configure.in (bfd_tic6x_arch): New.
  83         * configure: Regenerate.
  84         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
  85         (disassembler): Handle TI C6X.
  86         * tic6x-dis.c: New.
  87
  88 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
  89
  90         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
  91
  92 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
  93
  94         * dis-buf.c (buffer_read_memory): Give error for reading just
  95         before the start of memory.
  96
  97 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
  98             Quentin Neill <quentin.neill@amd.com>
  99
 100         * i386-dis.c (OP_LWP_I): Removed.
 101         (reg_table): Do not use OP_LWP_I, use Iq.
 102         (OP_LWPCB_E): Remove use of names16.
 103         (OP_LWP_E): Same.
 104         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 105         should not set the Vex.length bit.
 106         * i386-tbl.h: Regenerated.
 107
 108 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 109
 110         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 111
 112 2010-02-24  Nick Clifton  <nickc@redhat.com>
 113
 114         PR binutils/6773
 115         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 116         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 117         (thumb32_opcodes): Likewise.
 118
 119 2010-02-15  Nick Clifton  <nickc@redhat.com>
 120
 121         * po/vi.po: Updated Vietnamese translation.
 122
 123 2010-02-12  Doug Evans  <dje@sebabeach.org>
 124
 125         * lm32-opinst.c: Regenerate.
 126
 127 2010-02-11  Doug Evans  <dje@sebabeach.org>
 128
 129         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 130         (print_address): Delete CGEN_PRINT_ADDRESS.
 131         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 132         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 133         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 134         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 135
 136         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 137         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 138         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 139         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 140         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 141         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 142         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 143         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 144         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 145         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 146         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 147         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 148
 149 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 150
 151         * i386-dis.c: Update copyright.
 152         * i386-gen.c: Likewise.
 153         * i386-opc.h: Likewise.
 154         * i386-opc.tbl: Likewise.
 155
 156 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 157             Sebastian Pop  <sebastian.pop@amd.com>
 158
 159         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 160         function to handle 5th imm8 operand.
 161         (PREFIX_VEX_3A48): Added.
 162         (PREFIX_VEX_3A49): Added.
 163         (VEX_W_3A48_P_2): Added.
 164         (VEX_W_3A49_P_2): Added.
 165         (prefix table): Added entries for PREFIX_VEX_3A48
 166         and PREFIX_VEX_3A49.
 167         (vex table): Added entries for VEX_W_3A48_P_2 and
 168         and VEX_W_3A49_P_2.
 169         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 170         for Vec_Imm4 operands.
 171         * i386-opc.h (enum): Added Vec_Imm4.
 172         (i386_operand_type): Added vec_imm4.
 173         * i386-opc.tbl: Add entries for vpermilp[ds].
 174         * i386-init.h: Regenerated.
 175         * i386-tbl.h: Regenerated.
 176
 177 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 178
 179         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 180         and "pwr7".  Move "a2" into alphabetical order.
 181
 182 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 183
 184         * ppc-dis.c (ppc_opts): Add titan entry.
 185         * ppc-opc.c (TITAN, MULHW): Define.
 186         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 187
 188 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 189
 190         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 191         to CPU_BDVER1_FLAGS
 192         * i386-init.h: Regenerated.
 193
 194 2010-02-03  Anthony Green  <green@moxielogic.com>
 195
 196         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 197         0x0f, and make 0x00 an illegal instruction.
 198
 199 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 200
 201         * opcodes/arm-dis.c (struct arm_private_data): New.
 202         (print_insn_coprocessor, print_insn_arm): Update to use struct
 203         arm_private_data.
 204         (is_mapping_symbol, get_map_sym_type): New functions.
 205         (get_sym_code_type): Check the symbol's section.  Do not check
 206         mapping symbols.
 207         (print_insn): Default to disassembling ARM mode code.  Check
 208         for mapping symbols separately from other symbols.  Use
 209         struct arm_private_data.
 210
 211 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 212
 213         * i386-dis.c (EXVexWdqScalar): New.
 214         (vex_scalar_w_dq_mode): Likewise.
 215         (prefix_table): Update entries for PREFIX_VEX_3899,
 216         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 217         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 218         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 219         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 220         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 221         (OP_EX): Likewise.
 222
 223 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 224
 225         * i386-dis.c (XMScalar): New.
 226         (EXdScalar): Likewise.
 227         (EXqScalar): Likewise.
 228         (EXqScalarS): Likewise.
 229         (VexScalar): Likewise.
 230         (EXdVexScalarS): Likewise.
 231         (EXqVexScalarS): Likewise.
 232         (XMVexScalar): Likewise.
 233         (scalar_mode): Likewise.
 234         (d_scalar_mode): Likewise.
 235         (d_scalar_swap_mode): Likewise.
 236         (q_scalar_mode): Likewise.
 237         (q_scalar_swap_mode): Likewise.
 238         (vex_scalar_mode): Likewise.
 239         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 240         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 241         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 242         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 243         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 244         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 245         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 246         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 247         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 248         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 249         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 250         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 251         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 252         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 253         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 254         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 255         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 256         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 257         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 258         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 259         q_scalar_mode, q_scalar_swap_mode.
 260         (OP_XMM): Handle scalar_mode.
 261         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 262         and q_scalar_swap_mode.
 263         (OP_VEX): Handle vex_scalar_mode.
 264
 265 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 266
 267         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 268
 269 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 270
 271         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 272
 273 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 274
 275         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 276
 277 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 278
 279         * i386-dis.c (Bad_Opcode): New.
 280         (bad_opcode): Likewise.
 281         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 282         (dis386_twobyte): Likewise.
 283         (reg_table): Likewise.
 284         (prefix_table): Likewise.
 285         (x86_64_table): Likewise.
 286         (vex_len_table): Likewise.
 287         (vex_w_table): Likewise.
 288         (mod_table): Likewise.
 289         (rm_table): Likewise.
 290         (float_reg): Likewise.
 291         (reg_table): Remove trailing "(bad)" entries.
 292         (prefix_table): Likewise.
 293         (x86_64_table): Likewise.
 294         (vex_len_table): Likewise.
 295         (vex_w_table): Likewise.
 296         (mod_table): Likewise.
 297         (rm_table): Likewise.
 298         (get_valid_dis386): Handle bytemode 0.
 299
 300 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 301
 302         * i386-opc.h (VEXScalar): New.
 303
 304         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 305         instructions.
 306         * i386-tbl.h: Regenerated.
 307
 308 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 309
 310         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 311
 312         * i386-opc.tbl: Add xsave64 and xrstor64.
 313         * i386-tbl.h: Regenerated.
 314
 315 2010-01-20  Nick Clifton  <nickc@redhat.com>
 316
 317         PR 11170
 318         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 319         based post-indexed addressing.
 320
 321 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 322
 323         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 324         * i386-tbl.h: Regenerated.
 325
 326 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 327
 328         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 329         comments.
 330
 331 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 332
 333         * i386-dis.c (names_mm): New.
 334         (intel_names_mm): Likewise.
 335         (att_names_mm): Likewise.
 336         (names_xmm): Likewise.
 337         (intel_names_xmm): Likewise.
 338         (att_names_xmm): Likewise.
 339         (names_ymm): Likewise.
 340         (intel_names_ymm): Likewise.
 341         (att_names_ymm): Likewise.
 342         (print_insn): Set names_mm, names_xmm and names_ymm.
 343         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 344         (OP_XMM): Likewise.
 345         (OP_EM): Likewise.
 346         (OP_EMC): Likewise.
 347         (OP_MXC): Likewise.
 348         (OP_EX): Likewise.
 349         (XMM_Fixup): Likewise.
 350         (OP_VEX): Likewise.
 351         (OP_EX_VexReg): Likewise.
 352         (OP_Vex_2src): Likewise.
 353         (OP_Vex_2src_1): Likewise.
 354         (OP_Vex_2src_2): Likewise.
 355         (OP_REG_VexI4): Likewise.
 356
 357 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 358
 359         * i386-dis.c (print_insn): Update comments.
 360
 361 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 362
 363         * i386-dis.c (rex_original): Removed.
 364         (ckprefix): Remove rex_original.
 365         (print_insn): Update comments.
 366
 367 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 368
 369         * Makefile.in: Regenerate.
 370         * configure: Regenerate.
 371
 372 2010-01-07  Doug Evans  <dje@sebabeach.org>
 373
 374         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 375         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 376         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 377         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 378         * xstormy16-ibld.c: Regenerate.
 379
 380 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 381
 382         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 383         * i386-init.h: Regenerated.
 384
 385 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 386
 387         * arm-dis.c (print_insn): Fixed search for next symbol and data
 388         dumping condition, and the initial mapping symbol state.
 389
 390 2010-01-05  Doug Evans  <dje@sebabeach.org>
 391
 392         * cgen-ibld.in: #include "cgen/basic-modes.h".
 393         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 394         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 395         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 396         * xstormy16-ibld.c: Regenerate.
 397
 398 2010-01-04  Nick Clifton  <nickc@redhat.com>
 399
 400         PR 11123
 401         * arm-dis.c (print_insn_coprocessor): Initialise value.
 402
 403 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 404
 405         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 406
 407 2010-01-02  Doug Evans  <dje@sebabeach.org>
 408
 409         * cgen-asm.in: Update copyright year.
 410         * cgen-dis.in: Update copyright year.
 411         * cgen-ibld.in: Update copyright year.
 412         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 413         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 414         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 415         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 416         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 417         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 418         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 419         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 420         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 421         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 422         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 423         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 424         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 425         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 426         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 427         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 428         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 429         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 430         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 431         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 432         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 433
 434 For older changes see ChangeLog-2009
 435 \f
 436 Local Variables:
 437 mode: change-log
 438 left-margin: 8
 439 fill-column: 74
 440 version-control: never
 441 End: