opcodes/ChangeLog

   1 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
   2
   3         * mips-dis.c (print_insn_mips): Correct branch instruction type
   4         determination.
   5
   6 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
   7
   8         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
   9         type and delay slot determination.
  10         (print_insn_mips16): Extend branch instruction type and delay
  11         slot determination to cover all instructions.
  12         * mips16-opc.c (BR): Remove macro.
  13         (UBR, CBR): New macros.
  14         (mips16_opcodes): Update branch annotation for "b", "beqz",
  15         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
  16         and "jrc".
  17
  18 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
  19
  20         AVX Programming Reference (June, 2010)
  21         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
  22         * i386-opc.tbl: Likewise.
  23         * i386-tbl.h: Regenerated.
  24
  25 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
  26
  27         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
  28
  29 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
  30
  31         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
  32         ppc_cpu_t before inverting.
  33         (ppc_parse_cpu): Likewise.
  34         (print_insn_powerpc): Likewise.
  35
  36 2010-07-03  Alan Modra  <amodra@gmail.com>
  37
  38         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
  39         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
  40         (PPC64, MFDEC2): Update.
  41         (NON32, NO371): Define.
  42         (powerpc_opcode): Update to not use old opcode flags, and avoid
  43         -m601 duplicates.
  44
  45 2010-07-03  DJ Delorie  <dj@delorie.com>
  46
  47         * m32c-ibld.c: Regenerate.
  48
  49 2010-07-03  Alan Modra  <amodra@gmail.com>
  50
  51         * ppc-opc.c (PWR2COM): Define.
  52         (PPCPWR2): Add PPC_OPCODE_COMMON.
  53         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
  54         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
  55         "rac" from -mcom.
  56
  57 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
  58
  59         AVX Programming Reference (June, 2010)
  60         * i386-dis.c (PREFIX_0FAE_REG_0): New.
  61         (PREFIX_0FAE_REG_1): Likewise.
  62         (PREFIX_0FAE_REG_2): Likewise.
  63         (PREFIX_0FAE_REG_3): Likewise.
  64         (PREFIX_VEX_3813): Likewise.
  65         (PREFIX_VEX_3A1D): Likewise.
  66         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
  67         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
  68         PREFIX_VEX_3A1D.
  69         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
  70         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
  71         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
  72
  73         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
  74         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
  75         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
  76
  77         * i386-opc.h (CpuXsaveopt): New.
  78         (CpuFSGSBase): Likewise.
  79         (CpuRdRnd): Likewise.
  80         (CpuF16C): Likewise.
  81         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
  82         cpuf16c.
  83
  84         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
  85         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
  86         * i386-init.h: Regenerated.
  87         * i386-tbl.h: Likewise.
  88
  89 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
  90
  91         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
  92         and mtocrf on EFS.
  93
  94 2010-06-29  Alan Modra  <amodra@gmail.com>
  95
  96         * maxq-dis.c: Delete file.
  97         * Makefile.am: Remove references to maxq.
  98         * configure.in: Likewise.
  99         * disassemble.c: Likewise.
 100         * Makefile.in: Regenerate.
 101         * configure: Regenerate.
 102         * po/POTFILES.in: Regenerate.
 103
 104 2010-06-29  Alan Modra  <amodra@gmail.com>
 105
 106         * mep-dis.c: Regenerate.
 107
 108 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 109
 110         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 111
 112 2010-06-27  Alan Modra  <amodra@gmail.com>
 113
 114         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 115         (decodeInstr): Likewise.
 116         * dlx-dis.c (print_insn_dlx): Likewise.
 117         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 118         * maxq-dis.c (check_move, print_insn): Likewise.
 119         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 120         * msp430-dis.c (msp430_branchinstr): Likewise.
 121         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 122         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 123         * sparc-dis.c (print_insn_sparc): Likewise.
 124         * fr30-asm.c: Regenerate.
 125         * frv-asm.c: Regenerate.
 126         * ip2k-asm.c: Regenerate.
 127         * iq2000-asm.c: Regenerate.
 128         * lm32-asm.c: Regenerate.
 129         * m32c-asm.c: Regenerate.
 130         * m32r-asm.c: Regenerate.
 131         * mep-asm.c: Regenerate.
 132         * mt-asm.c: Regenerate.
 133         * openrisc-asm.c: Regenerate.
 134         * xc16x-asm.c: Regenerate.
 135         * xstormy16-asm.c: Regenerate.
 136
 137 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 138
 139         PR gas/11673
 140         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 141
 142 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 143
 144         PR binutils/11676
 145         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 146
 147 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 148
 149         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 150         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 151         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 152         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 153         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 154         Treat lwsync as msync on e500.
 155
 156 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 157
 158         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 159
 160 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 161
 162         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 163         constants is the same on 32-bit and 64-bit hosts.
 164
 165 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 166
 167         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 168         .short directives so that they can be reassembled.
 169
 170 2010-05-26  Catherine Moore <clm@codesourcery.com>
 171             David Ung  <davidu@mips.com>
 172
 173         * mips-opc.c: Change membership to I1 for instructions ssnop and
 174         ehb.
 175
 176 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 177
 178         * i386-dis.c (sib): New.
 179         (get_sib): Likewise.
 180         (print_insn): Call get_sib.
 181         OP_E_memory): Use sib.
 182
 183 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 184
 185         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 186         * mips-opc.c (I16): Remove.
 187         (mips_builtin_op): Reclassify jalx.
 188
 189 2010-05-19  Alan Modra  <amodra@gmail.com>
 190
 191         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 192         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 193
 194 2010-05-13  Alan Modra  <amodra@gmail.com>
 195
 196         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 197
 198 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 199
 200         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 201         format.
 202         (print_insn_thumb16): Add support for new %W format.
 203
 204 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 205
 206         * Makefile.in: Regenerate with automake 1.11.1.
 207         * aclocal.m4: Ditto.
 208
 209 2010-05-05  Nick Clifton  <nickc@redhat.com>
 210
 211         * po/es.po: Updated Spanish translation.
 212
 213 2010-04-22  Nick Clifton  <nickc@redhat.com>
 214
 215         * po/opcodes.pot: Updated by the Translation project.
 216         * po/vi.po: Updated Vietnamese translation.
 217
 218 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 219
 220         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 221         bits in opcode.
 222
 223 2010-04-09  Nick Clifton  <nickc@redhat.com>
 224
 225         * i386-dis.c (print_insn): Remove unused variable op.
 226         (OP_sI): Remove unused variable mask.
 227
 228 2010-04-07  Alan Modra  <amodra@gmail.com>
 229
 230         * configure: Regenerate.
 231
 232 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 233
 234         * ppc-opc.c (RBOPT): New define.
 235         ("dccci"): Enable for PPCA2.  Make operands optional.
 236         ("iccci"): Likewise.  Do not deprecate for PPC476.
 237
 238 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 239
 240         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 241
 242 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 243
 244         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 245         * Makefile.in: Regenerate.
 246         * configure.in (bfd_tic6x_arch): New.
 247         * configure: Regenerate.
 248         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 249         (disassembler): Handle TI C6X.
 250         * tic6x-dis.c: New.
 251
 252 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 253
 254         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 255
 256 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 257
 258         * dis-buf.c (buffer_read_memory): Give error for reading just
 259         before the start of memory.
 260
 261 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 262             Quentin Neill <quentin.neill@amd.com>
 263
 264         * i386-dis.c (OP_LWP_I): Removed.
 265         (reg_table): Do not use OP_LWP_I, use Iq.
 266         (OP_LWPCB_E): Remove use of names16.
 267         (OP_LWP_E): Same.
 268         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 269         should not set the Vex.length bit.
 270         * i386-tbl.h: Regenerated.
 271
 272 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 273
 274         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 275
 276 2010-02-24  Nick Clifton  <nickc@redhat.com>
 277
 278         PR binutils/6773
 279         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 280         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 281         (thumb32_opcodes): Likewise.
 282
 283 2010-02-15  Nick Clifton  <nickc@redhat.com>
 284
 285         * po/vi.po: Updated Vietnamese translation.
 286
 287 2010-02-12  Doug Evans  <dje@sebabeach.org>
 288
 289         * lm32-opinst.c: Regenerate.
 290
 291 2010-02-11  Doug Evans  <dje@sebabeach.org>
 292
 293         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 294         (print_address): Delete CGEN_PRINT_ADDRESS.
 295         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 296         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 297         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 298         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 299
 300         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 301         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 302         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 303         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 304         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 305         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 306         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 307         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 308         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 309         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 310         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 311         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 312
 313 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 314
 315         * i386-dis.c: Update copyright.
 316         * i386-gen.c: Likewise.
 317         * i386-opc.h: Likewise.
 318         * i386-opc.tbl: Likewise.
 319
 320 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 321             Sebastian Pop  <sebastian.pop@amd.com>
 322
 323         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 324         function to handle 5th imm8 operand.
 325         (PREFIX_VEX_3A48): Added.
 326         (PREFIX_VEX_3A49): Added.
 327         (VEX_W_3A48_P_2): Added.
 328         (VEX_W_3A49_P_2): Added.
 329         (prefix table): Added entries for PREFIX_VEX_3A48
 330         and PREFIX_VEX_3A49.
 331         (vex table): Added entries for VEX_W_3A48_P_2 and
 332         and VEX_W_3A49_P_2.
 333         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 334         for Vec_Imm4 operands.
 335         * i386-opc.h (enum): Added Vec_Imm4.
 336         (i386_operand_type): Added vec_imm4.
 337         * i386-opc.tbl: Add entries for vpermilp[ds].
 338         * i386-init.h: Regenerated.
 339         * i386-tbl.h: Regenerated.
 340
 341 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 342
 343         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 344         and "pwr7".  Move "a2" into alphabetical order.
 345
 346 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 347
 348         * ppc-dis.c (ppc_opts): Add titan entry.
 349         * ppc-opc.c (TITAN, MULHW): Define.
 350         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 351
 352 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 353
 354         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 355         to CPU_BDVER1_FLAGS
 356         * i386-init.h: Regenerated.
 357
 358 2010-02-03  Anthony Green  <green@moxielogic.com>
 359
 360         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 361         0x0f, and make 0x00 an illegal instruction.
 362
 363 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 364
 365         * opcodes/arm-dis.c (struct arm_private_data): New.
 366         (print_insn_coprocessor, print_insn_arm): Update to use struct
 367         arm_private_data.
 368         (is_mapping_symbol, get_map_sym_type): New functions.
 369         (get_sym_code_type): Check the symbol's section.  Do not check
 370         mapping symbols.
 371         (print_insn): Default to disassembling ARM mode code.  Check
 372         for mapping symbols separately from other symbols.  Use
 373         struct arm_private_data.
 374
 375 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 376
 377         * i386-dis.c (EXVexWdqScalar): New.
 378         (vex_scalar_w_dq_mode): Likewise.
 379         (prefix_table): Update entries for PREFIX_VEX_3899,
 380         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 381         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 382         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 383         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 384         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 385         (OP_EX): Likewise.
 386
 387 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 388
 389         * i386-dis.c (XMScalar): New.
 390         (EXdScalar): Likewise.
 391         (EXqScalar): Likewise.
 392         (EXqScalarS): Likewise.
 393         (VexScalar): Likewise.
 394         (EXdVexScalarS): Likewise.
 395         (EXqVexScalarS): Likewise.
 396         (XMVexScalar): Likewise.
 397         (scalar_mode): Likewise.
 398         (d_scalar_mode): Likewise.
 399         (d_scalar_swap_mode): Likewise.
 400         (q_scalar_mode): Likewise.
 401         (q_scalar_swap_mode): Likewise.
 402         (vex_scalar_mode): Likewise.
 403         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 404         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 405         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 406         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 407         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 408         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 409         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 410         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 411         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 412         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 413         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 414         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 415         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 416         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 417         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 418         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 419         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 420         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 421         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 422         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 423         q_scalar_mode, q_scalar_swap_mode.
 424         (OP_XMM): Handle scalar_mode.
 425         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 426         and q_scalar_swap_mode.
 427         (OP_VEX): Handle vex_scalar_mode.
 428
 429 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 430
 431         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 432
 433 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 434
 435         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 436
 437 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 438
 439         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 440
 441 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 442
 443         * i386-dis.c (Bad_Opcode): New.
 444         (bad_opcode): Likewise.
 445         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 446         (dis386_twobyte): Likewise.
 447         (reg_table): Likewise.
 448         (prefix_table): Likewise.
 449         (x86_64_table): Likewise.
 450         (vex_len_table): Likewise.
 451         (vex_w_table): Likewise.
 452         (mod_table): Likewise.
 453         (rm_table): Likewise.
 454         (float_reg): Likewise.
 455         (reg_table): Remove trailing "(bad)" entries.
 456         (prefix_table): Likewise.
 457         (x86_64_table): Likewise.
 458         (vex_len_table): Likewise.
 459         (vex_w_table): Likewise.
 460         (mod_table): Likewise.
 461         (rm_table): Likewise.
 462         (get_valid_dis386): Handle bytemode 0.
 463
 464 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 465
 466         * i386-opc.h (VEXScalar): New.
 467
 468         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 469         instructions.
 470         * i386-tbl.h: Regenerated.
 471
 472 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 473
 474         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 475
 476         * i386-opc.tbl: Add xsave64 and xrstor64.
 477         * i386-tbl.h: Regenerated.
 478
 479 2010-01-20  Nick Clifton  <nickc@redhat.com>
 480
 481         PR 11170
 482         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 483         based post-indexed addressing.
 484
 485 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 486
 487         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 488         * i386-tbl.h: Regenerated.
 489
 490 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 491
 492         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 493         comments.
 494
 495 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 496
 497         * i386-dis.c (names_mm): New.
 498         (intel_names_mm): Likewise.
 499         (att_names_mm): Likewise.
 500         (names_xmm): Likewise.
 501         (intel_names_xmm): Likewise.
 502         (att_names_xmm): Likewise.
 503         (names_ymm): Likewise.
 504         (intel_names_ymm): Likewise.
 505         (att_names_ymm): Likewise.
 506         (print_insn): Set names_mm, names_xmm and names_ymm.
 507         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 508         (OP_XMM): Likewise.
 509         (OP_EM): Likewise.
 510         (OP_EMC): Likewise.
 511         (OP_MXC): Likewise.
 512         (OP_EX): Likewise.
 513         (XMM_Fixup): Likewise.
 514         (OP_VEX): Likewise.
 515         (OP_EX_VexReg): Likewise.
 516         (OP_Vex_2src): Likewise.
 517         (OP_Vex_2src_1): Likewise.
 518         (OP_Vex_2src_2): Likewise.
 519         (OP_REG_VexI4): Likewise.
 520
 521 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 522
 523         * i386-dis.c (print_insn): Update comments.
 524
 525 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 526
 527         * i386-dis.c (rex_original): Removed.
 528         (ckprefix): Remove rex_original.
 529         (print_insn): Update comments.
 530
 531 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 532
 533         * Makefile.in: Regenerate.
 534         * configure: Regenerate.
 535
 536 2010-01-07  Doug Evans  <dje@sebabeach.org>
 537
 538         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 539         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 540         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 541         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 542         * xstormy16-ibld.c: Regenerate.
 543
 544 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 545
 546         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 547         * i386-init.h: Regenerated.
 548
 549 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 550
 551         * arm-dis.c (print_insn): Fixed search for next symbol and data
 552         dumping condition, and the initial mapping symbol state.
 553
 554 2010-01-05  Doug Evans  <dje@sebabeach.org>
 555
 556         * cgen-ibld.in: #include "cgen/basic-modes.h".
 557         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 558         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 559         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 560         * xstormy16-ibld.c: Regenerate.
 561
 562 2010-01-04  Nick Clifton  <nickc@redhat.com>
 563
 564         PR 11123
 565         * arm-dis.c (print_insn_coprocessor): Initialise value.
 566
 567 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 568
 569         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 570
 571 2010-01-02  Doug Evans  <dje@sebabeach.org>
 572
 573         * cgen-asm.in: Update copyright year.
 574         * cgen-dis.in: Update copyright year.
 575         * cgen-ibld.in: Update copyright year.
 576         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 577         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 578         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 579         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 580         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 581         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 582         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 583         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 584         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 585         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 586         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 587         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 588         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 589         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 590         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 591         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 592         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 593         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 594         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 595         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 596         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 597
 598 For older changes see ChangeLog-2009
 599 \f
 600 Local Variables:
 601 mode: change-log
 602 left-margin: 8
 603 fill-column: 74
 604 version-control: never
 605 End: