Support AVX Programming Reference (June, 2010)
[binutils-gdb.git] / opcodes / ChangeLog
1 2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
2
3 AVX Programming Reference (June, 2010)
4 * i386-dis.c (PREFIX_0FAE_REG_0): New.
5 (PREFIX_0FAE_REG_1): Likewise.
6 (PREFIX_0FAE_REG_2): Likewise.
7 (PREFIX_0FAE_REG_3): Likewise.
8 (PREFIX_VEX_3813): Likewise.
9 (PREFIX_VEX_3A1D): Likewise.
10 (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
11 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
12 PREFIX_VEX_3A1D.
13 (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
14 (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
15 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
16
17 * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
18 CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
19 (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
20
21 * i386-opc.h (CpuXsaveopt): New.
22 (CpuFSGSBase):Likewise.
23 (CpuRdRnd): Likewise.
24 (CpuF16C): Likewise.
25 (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
26 cpuf16c.
27
28 * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
29 wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
30
31 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
32
33 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
34 and mtocrf on EFS.
35
36 2010-06-29 Alan Modra <amodra@gmail.com>
37
38 * maxq-dis.c: Delete file.
39 * Makefile.am: Remove references to maxq.
40 * configure.in: Likewise.
41 * disassemble.c: Likewise.
42 * Makefile.in: Regenerate.
43 * configure: Regenerate.
44 * po/POTFILES.in: Regenerate.
45
46 2010-06-29 Alan Modra <amodra@gmail.com>
47
48 * mep-dis.c: Regenerate.
49
50 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
51
52 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
53
54 2010-06-27 Alan Modra <amodra@gmail.com>
55
56 * arc-dis.c (arc_sprintf): Delete set but unused variables.
57 (decodeInstr): Likewise.
58 * dlx-dis.c (print_insn_dlx): Likewise.
59 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
60 * maxq-dis.c (check_move, print_insn): Likewise.
61 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
62 * msp430-dis.c (msp430_branchinstr): Likewise.
63 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
64 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
65 * sparc-dis.c (print_insn_sparc): Likewise.
66 * fr30-asm.c: Regenerate.
67 * frv-asm.c: Regenerate.
68 * ip2k-asm.c: Regenerate.
69 * iq2000-asm.c: Regenerate.
70 * lm32-asm.c: Regenerate.
71 * m32c-asm.c: Regenerate.
72 * m32r-asm.c: Regenerate.
73 * mep-asm.c: Regenerate.
74 * mt-asm.c: Regenerate.
75 * openrisc-asm.c: Regenerate.
76 * xc16x-asm.c: Regenerate.
77 * xstormy16-asm.c: Regenerate.
78
79 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
80
81 PR gas/11673
82 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
83
84 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
85
86 PR binutils/11676
87 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
88
89 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
90
91 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
92 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
93 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
94 touch floating point regs and are enabled by COM, PPC or PPCCOM.
95 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
96 Treat lwsync as msync on e500.
97
98 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
99
100 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
101
102 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
103
104 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
105 constants is the same on 32-bit and 64-bit hosts.
106
107 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
108
109 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
110 .short directives so that they can be reassembled.
111
112 2010-05-26 Catherine Moore <clm@codesourcery.com>
113 David Ung <davidu@mips.com>
114
115 * mips-opc.c: Change membership to I1 for instructions ssnop and
116 ehb.
117
118 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
119
120 * i386-dis.c (sib): New.
121 (get_sib): Likewise.
122 (print_insn): Call get_sib.
123 OP_E_memory): Use sib.
124
125 2010-05-26 Catherine Moore <clm@codesoourcery.com>
126
127 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
128 * mips-opc.c (I16): Remove.
129 (mips_builtin_op): Reclassify jalx.
130
131 2010-05-19 Alan Modra <amodra@gmail.com>
132
133 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
134 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
135
136 2010-05-13 Alan Modra <amodra@gmail.com>
137
138 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
139
140 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
141
142 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
143 format.
144 (print_insn_thumb16): Add support for new %W format.
145
146 2010-05-07 Tristan Gingold <gingold@adacore.com>
147
148 * Makefile.in: Regenerate with automake 1.11.1.
149 * aclocal.m4: Ditto.
150
151 2010-05-05 Nick Clifton <nickc@redhat.com>
152
153 * po/es.po: Updated Spanish translation.
154
155 2010-04-22 Nick Clifton <nickc@redhat.com>
156
157 * po/opcodes.pot: Updated by the Translation project.
158 * po/vi.po: Updated Vietnamese translation.
159
160 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
161
162 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
163 bits in opcode.
164
165 2010-04-09 Nick Clifton <nickc@redhat.com>
166
167 * i386-dis.c (print_insn): Remove unused variable op.
168 (OP_sI): Remove unused variable mask.
169
170 2010-04-07 Alan Modra <amodra@gmail.com>
171
172 * configure: Regenerate.
173
174 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
175
176 * ppc-opc.c (RBOPT): New define.
177 ("dccci"): Enable for PPCA2. Make operands optional.
178 ("iccci"): Likewise. Do not deprecate for PPC476.
179
180 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
181
182 * cr16-opc.c (cr16_instruction): Fix typo in comment.
183
184 2010-03-25 Joseph Myers <joseph@codesourcery.com>
185
186 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
187 * Makefile.in: Regenerate.
188 * configure.in (bfd_tic6x_arch): New.
189 * configure: Regenerate.
190 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
191 (disassembler): Handle TI C6X.
192 * tic6x-dis.c: New.
193
194 2010-03-24 Mike Frysinger <vapier@gentoo.org>
195
196 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
197
198 2010-03-23 Joseph Myers <joseph@codesourcery.com>
199
200 * dis-buf.c (buffer_read_memory): Give error for reading just
201 before the start of memory.
202
203 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
204 Quentin Neill <quentin.neill@amd.com>
205
206 * i386-dis.c (OP_LWP_I): Removed.
207 (reg_table): Do not use OP_LWP_I, use Iq.
208 (OP_LWPCB_E): Remove use of names16.
209 (OP_LWP_E): Same.
210 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
211 should not set the Vex.length bit.
212 * i386-tbl.h: Regenerated.
213
214 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
215
216 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
217
218 2010-02-24 Nick Clifton <nickc@redhat.com>
219
220 PR binutils/6773
221 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
222 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
223 (thumb32_opcodes): Likewise.
224
225 2010-02-15 Nick Clifton <nickc@redhat.com>
226
227 * po/vi.po: Updated Vietnamese translation.
228
229 2010-02-12 Doug Evans <dje@sebabeach.org>
230
231 * lm32-opinst.c: Regenerate.
232
233 2010-02-11 Doug Evans <dje@sebabeach.org>
234
235 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
236 (print_address): Delete CGEN_PRINT_ADDRESS.
237 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
238 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
239 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
240 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
241
242 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
243 * frv-desc.c, * frv-desc.h, * frv-opc.c,
244 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
245 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
246 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
247 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
248 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
249 * mep-desc.c, * mep-desc.h, * mep-opc.c,
250 * mt-desc.c, * mt-desc.h, * mt-opc.c,
251 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
252 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
253 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
254
255 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
256
257 * i386-dis.c: Update copyright.
258 * i386-gen.c: Likewise.
259 * i386-opc.h: Likewise.
260 * i386-opc.tbl: Likewise.
261
262 2010-02-10 Quentin Neill <quentin.neill@amd.com>
263 Sebastian Pop <sebastian.pop@amd.com>
264
265 * i386-dis.c (OP_EX_VexImmW): Reintroduced
266 function to handle 5th imm8 operand.
267 (PREFIX_VEX_3A48): Added.
268 (PREFIX_VEX_3A49): Added.
269 (VEX_W_3A48_P_2): Added.
270 (VEX_W_3A49_P_2): Added.
271 (prefix table): Added entries for PREFIX_VEX_3A48
272 and PREFIX_VEX_3A49.
273 (vex table): Added entries for VEX_W_3A48_P_2 and
274 and VEX_W_3A49_P_2.
275 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
276 for Vec_Imm4 operands.
277 * i386-opc.h (enum): Added Vec_Imm4.
278 (i386_operand_type): Added vec_imm4.
279 * i386-opc.tbl: Add entries for vpermilp[ds].
280 * i386-init.h: Regenerated.
281 * i386-tbl.h: Regenerated.
282
283 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
284
285 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
286 and "pwr7". Move "a2" into alphabetical order.
287
288 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
289
290 * ppc-dis.c (ppc_opts): Add titan entry.
291 * ppc-opc.c (TITAN, MULHW): Define.
292 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
293
294 2010-02-03 Quentin Neill <quentin.neill@amd.com>
295
296 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
297 to CPU_BDVER1_FLAGS
298 * i386-init.h: Regenerated.
299
300 2010-02-03 Anthony Green <green@moxielogic.com>
301
302 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
303 0x0f, and make 0x00 an illegal instruction.
304
305 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
306
307 * opcodes/arm-dis.c (struct arm_private_data): New.
308 (print_insn_coprocessor, print_insn_arm): Update to use struct
309 arm_private_data.
310 (is_mapping_symbol, get_map_sym_type): New functions.
311 (get_sym_code_type): Check the symbol's section. Do not check
312 mapping symbols.
313 (print_insn): Default to disassembling ARM mode code. Check
314 for mapping symbols separately from other symbols. Use
315 struct arm_private_data.
316
317 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
318
319 * i386-dis.c (EXVexWdqScalar): New.
320 (vex_scalar_w_dq_mode): Likewise.
321 (prefix_table): Update entries for PREFIX_VEX_3899,
322 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
323 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
324 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
325 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
326 (intel_operand_size): Handle vex_scalar_w_dq_mode.
327 (OP_EX): Likewise.
328
329 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
330
331 * i386-dis.c (XMScalar): New.
332 (EXdScalar): Likewise.
333 (EXqScalar): Likewise.
334 (EXqScalarS): Likewise.
335 (VexScalar): Likewise.
336 (EXdVexScalarS): Likewise.
337 (EXqVexScalarS): Likewise.
338 (XMVexScalar): Likewise.
339 (scalar_mode): Likewise.
340 (d_scalar_mode): Likewise.
341 (d_scalar_swap_mode): Likewise.
342 (q_scalar_mode): Likewise.
343 (q_scalar_swap_mode): Likewise.
344 (vex_scalar_mode): Likewise.
345 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
346 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
347 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
348 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
349 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
350 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
351 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
352 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
353 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
354 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
355 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
356 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
357 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
358 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
359 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
360 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
361 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
362 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
363 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
364 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
365 q_scalar_mode, q_scalar_swap_mode.
366 (OP_XMM): Handle scalar_mode.
367 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
368 and q_scalar_swap_mode.
369 (OP_VEX): Handle vex_scalar_mode.
370
371 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
372
373 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
374
375 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
376
377 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
378
379 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
380
381 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
382
383 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
384
385 * i386-dis.c (Bad_Opcode): New.
386 (bad_opcode): Likewise.
387 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
388 (dis386_twobyte): Likewise.
389 (reg_table): Likewise.
390 (prefix_table): Likewise.
391 (x86_64_table): Likewise.
392 (vex_len_table): Likewise.
393 (vex_w_table): Likewise.
394 (mod_table): Likewise.
395 (rm_table): Likewise.
396 (float_reg): Likewise.
397 (reg_table): Remove trailing "(bad)" entries.
398 (prefix_table): Likewise.
399 (x86_64_table): Likewise.
400 (vex_len_table): Likewise.
401 (vex_w_table): Likewise.
402 (mod_table): Likewise.
403 (rm_table): Likewise.
404 (get_valid_dis386): Handle bytemode 0.
405
406 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
407
408 * i386-opc.h (VEXScalar): New.
409
410 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
411 instructions.
412 * i386-tbl.h: Regenerated.
413
414 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
415
416 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
417
418 * i386-opc.tbl: Add xsave64 and xrstor64.
419 * i386-tbl.h: Regenerated.
420
421 2010-01-20 Nick Clifton <nickc@redhat.com>
422
423 PR 11170
424 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
425 based post-indexed addressing.
426
427 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
428
429 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
430 * i386-tbl.h: Regenerated.
431
432 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
433
434 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
435 comments.
436
437 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
438
439 * i386-dis.c (names_mm): New.
440 (intel_names_mm): Likewise.
441 (att_names_mm): Likewise.
442 (names_xmm): Likewise.
443 (intel_names_xmm): Likewise.
444 (att_names_xmm): Likewise.
445 (names_ymm): Likewise.
446 (intel_names_ymm): Likewise.
447 (att_names_ymm): Likewise.
448 (print_insn): Set names_mm, names_xmm and names_ymm.
449 (OP_MMX): Use names_mm, names_xmm and names_ymm.
450 (OP_XMM): Likewise.
451 (OP_EM): Likewise.
452 (OP_EMC): Likewise.
453 (OP_MXC): Likewise.
454 (OP_EX): Likewise.
455 (XMM_Fixup): Likewise.
456 (OP_VEX): Likewise.
457 (OP_EX_VexReg): Likewise.
458 (OP_Vex_2src): Likewise.
459 (OP_Vex_2src_1): Likewise.
460 (OP_Vex_2src_2): Likewise.
461 (OP_REG_VexI4): Likewise.
462
463 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
464
465 * i386-dis.c (print_insn): Update comments.
466
467 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
468
469 * i386-dis.c (rex_original): Removed.
470 (ckprefix): Remove rex_original.
471 (print_insn): Update comments.
472
473 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
474
475 * Makefile.in: Regenerate.
476 * configure: Regenerate.
477
478 2010-01-07 Doug Evans <dje@sebabeach.org>
479
480 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
481 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
482 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
483 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
484 * xstormy16-ibld.c: Regenerate.
485
486 2010-01-06 Quentin Neill <quentin.neill@amd.com>
487
488 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
489 * i386-init.h: Regenerated.
490
491 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
492
493 * arm-dis.c (print_insn): Fixed search for next symbol and data
494 dumping condition, and the initial mapping symbol state.
495
496 2010-01-05 Doug Evans <dje@sebabeach.org>
497
498 * cgen-ibld.in: #include "cgen/basic-modes.h".
499 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
500 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
501 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
502 * xstormy16-ibld.c: Regenerate.
503
504 2010-01-04 Nick Clifton <nickc@redhat.com>
505
506 PR 11123
507 * arm-dis.c (print_insn_coprocessor): Initialise value.
508
509 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
510
511 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
512
513 2010-01-02 Doug Evans <dje@sebabeach.org>
514
515 * cgen-asm.in: Update copyright year.
516 * cgen-dis.in: Update copyright year.
517 * cgen-ibld.in: Update copyright year.
518 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
519 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
520 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
521 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
522 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
523 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
524 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
525 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
526 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
527 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
528 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
529 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
530 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
531 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
532 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
533 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
534 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
535 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
536 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
537 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
538 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
539
540 For older changes see ChangeLog-2009
541 \f
542 Local Variables:
543 mode: change-log
544 left-margin: 8
545 fill-column: 74
546 version-control: never
547 End: