opcodes/
[binutils-gdb.git] / opcodes / ChangeLog
1 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
2
3 * ppc-opc.c (RBOPT): New define.
4 ("dccci"): Enable for PPCA2. Make operands optional.
5 ("iccci"): Likewise. Do not deprecate for PPC476.
6
7 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
8
9 * cr16-opc.c (cr16_instruction): Fix typo in comment.
10
11 2010-03-25 Joseph Myers <joseph@codesourcery.com>
12
13 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
14 * Makefile.in: Regenerate.
15 * configure.in (bfd_tic6x_arch): New.
16 * configure: Regenerate.
17 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
18 (disassembler): Handle TI C6X.
19 * tic6x-dis.c: New.
20
21 2010-03-24 Mike Frysinger <vapier@gentoo.org>
22
23 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
24
25 2010-03-23 Joseph Myers <joseph@codesourcery.com>
26
27 * dis-buf.c (buffer_read_memory): Give error for reading just
28 before the start of memory.
29
30 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
31 Quentin Neill <quentin.neill@amd.com>
32
33 * i386-dis.c (OP_LWP_I): Removed.
34 (reg_table): Do not use OP_LWP_I, use Iq.
35 (OP_LWPCB_E): Remove use of names16.
36 (OP_LWP_E): Same.
37 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
38 should not set the Vex.length bit.
39 * i386-tbl.h: Regenerated.
40
41 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
42
43 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
44
45 2010-02-24 Nick Clifton <nickc@redhat.com>
46
47 PR binutils/6773
48 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
49 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
50 (thumb32_opcodes): Likewise.
51
52 2010-02-15 Nick Clifton <nickc@redhat.com>
53
54 * po/vi.po: Updated Vietnamese translation.
55
56 2010-02-12 Doug Evans <dje@sebabeach.org>
57
58 * lm32-opinst.c: Regenerate.
59
60 2010-02-11 Doug Evans <dje@sebabeach.org>
61
62 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
63 (print_address): Delete CGEN_PRINT_ADDRESS.
64 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
65 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
66 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
67 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
68
69 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
70 * frv-desc.c, * frv-desc.h, * frv-opc.c,
71 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
72 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
73 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
74 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
75 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
76 * mep-desc.c, * mep-desc.h, * mep-opc.c,
77 * mt-desc.c, * mt-desc.h, * mt-opc.c,
78 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
79 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
80 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
81
82 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
83
84 * i386-dis.c: Update copyright.
85 * i386-gen.c: Likewise.
86 * i386-opc.h: Likewise.
87 * i386-opc.tbl: Likewise.
88
89 2010-02-10 Quentin Neill <quentin.neill@amd.com>
90 Sebastian Pop <sebastian.pop@amd.com>
91
92 * i386-dis.c (OP_EX_VexImmW): Reintroduced
93 function to handle 5th imm8 operand.
94 (PREFIX_VEX_3A48): Added.
95 (PREFIX_VEX_3A49): Added.
96 (VEX_W_3A48_P_2): Added.
97 (VEX_W_3A49_P_2): Added.
98 (prefix table): Added entries for PREFIX_VEX_3A48
99 and PREFIX_VEX_3A49.
100 (vex table): Added entries for VEX_W_3A48_P_2 and
101 and VEX_W_3A49_P_2.
102 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
103 for Vec_Imm4 operands.
104 * i386-opc.h (enum): Added Vec_Imm4.
105 (i386_operand_type): Added vec_imm4.
106 * i386-opc.tbl: Add entries for vpermilp[ds].
107 * i386-init.h: Regenerated.
108 * i386-tbl.h: Regenerated.
109
110 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
111
112 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
113 and "pwr7". Move "a2" into alphabetical order.
114
115 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
116
117 * ppc-dis.c (ppc_opts): Add titan entry.
118 * ppc-opc.c (TITAN, MULHW): Define.
119 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
120
121 2010-02-03 Quentin Neill <quentin.neill@amd.com>
122
123 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
124 to CPU_BDVER1_FLAGS
125 * i386-init.h: Regenerated.
126
127 2010-02-03 Anthony Green <green@moxielogic.com>
128
129 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
130 0x0f, and make 0x00 an illegal instruction.
131
132 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
133
134 * opcodes/arm-dis.c (struct arm_private_data): New.
135 (print_insn_coprocessor, print_insn_arm): Update to use struct
136 arm_private_data.
137 (is_mapping_symbol, get_map_sym_type): New functions.
138 (get_sym_code_type): Check the symbol's section. Do not check
139 mapping symbols.
140 (print_insn): Default to disassembling ARM mode code. Check
141 for mapping symbols separately from other symbols. Use
142 struct arm_private_data.
143
144 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
145
146 * i386-dis.c (EXVexWdqScalar): New.
147 (vex_scalar_w_dq_mode): Likewise.
148 (prefix_table): Update entries for PREFIX_VEX_3899,
149 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
150 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
151 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
152 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
153 (intel_operand_size): Handle vex_scalar_w_dq_mode.
154 (OP_EX): Likewise.
155
156 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
157
158 * i386-dis.c (XMScalar): New.
159 (EXdScalar): Likewise.
160 (EXqScalar): Likewise.
161 (EXqScalarS): Likewise.
162 (VexScalar): Likewise.
163 (EXdVexScalarS): Likewise.
164 (EXqVexScalarS): Likewise.
165 (XMVexScalar): Likewise.
166 (scalar_mode): Likewise.
167 (d_scalar_mode): Likewise.
168 (d_scalar_swap_mode): Likewise.
169 (q_scalar_mode): Likewise.
170 (q_scalar_swap_mode): Likewise.
171 (vex_scalar_mode): Likewise.
172 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
173 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
174 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
175 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
176 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
177 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
178 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
179 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
180 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
181 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
182 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
183 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
184 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
185 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
186 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
187 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
188 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
189 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
190 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
191 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
192 q_scalar_mode, q_scalar_swap_mode.
193 (OP_XMM): Handle scalar_mode.
194 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
195 and q_scalar_swap_mode.
196 (OP_VEX): Handle vex_scalar_mode.
197
198 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
199
200 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
201
202 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
203
204 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
205
206 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
207
208 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
209
210 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
211
212 * i386-dis.c (Bad_Opcode): New.
213 (bad_opcode): Likewise.
214 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
215 (dis386_twobyte): Likewise.
216 (reg_table): Likewise.
217 (prefix_table): Likewise.
218 (x86_64_table): Likewise.
219 (vex_len_table): Likewise.
220 (vex_w_table): Likewise.
221 (mod_table): Likewise.
222 (rm_table): Likewise.
223 (float_reg): Likewise.
224 (reg_table): Remove trailing "(bad)" entries.
225 (prefix_table): Likewise.
226 (x86_64_table): Likewise.
227 (vex_len_table): Likewise.
228 (vex_w_table): Likewise.
229 (mod_table): Likewise.
230 (rm_table): Likewise.
231 (get_valid_dis386): Handle bytemode 0.
232
233 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
234
235 * i386-opc.h (VEXScalar): New.
236
237 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
238 instructions.
239 * i386-tbl.h: Regenerated.
240
241 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
242
243 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
244
245 * i386-opc.tbl: Add xsave64 and xrstor64.
246 * i386-tbl.h: Regenerated.
247
248 2010-01-20 Nick Clifton <nickc@redhat.com>
249
250 PR 11170
251 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
252 based post-indexed addressing.
253
254 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
255
256 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
257 * i386-tbl.h: Regenerated.
258
259 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
260
261 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
262 comments.
263
264 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
265
266 * i386-dis.c (names_mm): New.
267 (intel_names_mm): Likewise.
268 (att_names_mm): Likewise.
269 (names_xmm): Likewise.
270 (intel_names_xmm): Likewise.
271 (att_names_xmm): Likewise.
272 (names_ymm): Likewise.
273 (intel_names_ymm): Likewise.
274 (att_names_ymm): Likewise.
275 (print_insn): Set names_mm, names_xmm and names_ymm.
276 (OP_MMX): Use names_mm, names_xmm and names_ymm.
277 (OP_XMM): Likewise.
278 (OP_EM): Likewise.
279 (OP_EMC): Likewise.
280 (OP_MXC): Likewise.
281 (OP_EX): Likewise.
282 (XMM_Fixup): Likewise.
283 (OP_VEX): Likewise.
284 (OP_EX_VexReg): Likewise.
285 (OP_Vex_2src): Likewise.
286 (OP_Vex_2src_1): Likewise.
287 (OP_Vex_2src_2): Likewise.
288 (OP_REG_VexI4): Likewise.
289
290 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
291
292 * i386-dis.c (print_insn): Update comments.
293
294 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
295
296 * i386-dis.c (rex_original): Removed.
297 (ckprefix): Remove rex_original.
298 (print_insn): Update comments.
299
300 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
301
302 * Makefile.in: Regenerate.
303 * configure: Regenerate.
304
305 2010-01-07 Doug Evans <dje@sebabeach.org>
306
307 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
308 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
309 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
310 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
311 * xstormy16-ibld.c: Regenerate.
312
313 2010-01-06 Quentin Neill <quentin.neill@amd.com>
314
315 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
316 * i386-init.h: Regenerated.
317
318 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
319
320 * arm-dis.c (print_insn): Fixed search for next symbol and data
321 dumping condition, and the initial mapping symbol state.
322
323 2010-01-05 Doug Evans <dje@sebabeach.org>
324
325 * cgen-ibld.in: #include "cgen/basic-modes.h".
326 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
327 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
328 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
329 * xstormy16-ibld.c: Regenerate.
330
331 2010-01-04 Nick Clifton <nickc@redhat.com>
332
333 PR 11123
334 * arm-dis.c (print_insn_coprocessor): Initialise value.
335
336 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
337
338 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
339
340 2010-01-02 Doug Evans <dje@sebabeach.org>
341
342 * cgen-asm.in: Update copyright year.
343 * cgen-dis.in: Update copyright year.
344 * cgen-ibld.in: Update copyright year.
345 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
346 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
347 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
348 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
349 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
350 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
351 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
352 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
353 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
354 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
355 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
356 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
357 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
358 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
359 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
360 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
361 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
362 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
363 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
364 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
365 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
366
367 For older changes see ChangeLog-2009
368 \f
369 Local Variables:
370 mode: change-log
371 left-margin: 8
372 fill-column: 74
373 version-control: never
374 End: