opcodes/ChangeLog

   1 2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
   2
   3         * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
   4         (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
   5
   6 2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
   9         * i386-tbl.h: Regenerated.
  10
  11 2008-08-28  Jan Beulich  <jbeulich@novell.com>
  12
  13         * i386-dis.c (dis386): Adjust far return mnemonics.
  14         * i386-opc.tbl: Add retf.
  15         * i386-tbl.h: Re-generate.
  16
  17 2008-08-28  Jan Beulich  <jbeulich@novell.com>
  18
  19         * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
  20
  21 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
  22
  23         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
  24         * ia64-gen.c (lookup_specifier): Likewise.
  25
  26         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
  27         * ia64-raw.tbl: Likewise.
  28         * ia64-waw.tbl: Likewise.
  29         * ia64-asmtab.c: Regenerated.
  30
  31 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
  32
  33         * i386-opc.tbl: Correct fidivr operand size.
  34
  35         * i386-tbl.h: Regenerated.
  36
  37 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
  38
  39         * configure.in: Update a number of obsolete autoconf macros.
  40         * aclocal.m4: Regenerate.
  41
  42 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
  43
  44         AVX Programming Reference (August, 2008)
  45         * i386-dis.c (PREFIX_VEX_38DB): New.
  46         (PREFIX_VEX_38DC): Likewise.
  47         (PREFIX_VEX_38DD): Likewise.
  48         (PREFIX_VEX_38DE): Likewise.
  49         (PREFIX_VEX_38DF): Likewise.
  50         (PREFIX_VEX_3ADF): Likewise.
  51         (VEX_LEN_38DB_P_2): Likewise.
  52         (VEX_LEN_38DC_P_2): Likewise.
  53         (VEX_LEN_38DD_P_2): Likewise.
  54         (VEX_LEN_38DE_P_2): Likewise.
  55         (VEX_LEN_38DF_P_2): Likewise.
  56         (VEX_LEN_3ADF_P_2): Likewise.
  57         (PREFIX_VEX_3A04): Updated.
  58         (VEX_LEN_3A06_P_2): Likewise.
  59         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
  60         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
  61         (x86_64_table): Likewise.
  62         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
  63         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
  64         VEX_LEN_3ADF_P_2.
  65
  66         * i386-opc.tbl: Add AES + AVX instructions.
  67         * i386-init.h: Regenerated.
  68         * i386-tbl.h: Likewise.
  69
  70 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  71
  72         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
  73         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
  74
  75 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
  76
  77         PR 6526
  78         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
  79         * Makefile.in: Regenerate.
  80         * aclocal.m4: Regenerate.
  81         * config.in: Regenerate.
  82         * configure: Regenerate.
  83
  84 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
  85
  86         PR 6825
  87         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
  88
  89 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
  90
  91         * i386-opc.tbl: Add syscall and sysret for Cpu64.
  92
  93         * i386-tbl.h: Regenerated.
  94
  95 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
  96
  97         * Makefile.am (POTFILES.in): Set LC_ALL=C.
  98         * Makefile.in: Regenerate.
  99         * po/POTFILES.in: Regenerate.
 100
 101 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
 102
 103         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
 104         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
 105         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
 106         * ppc-opc.c (insert_xt6): New static function.
 107         (extract_xt6): Likewise.
 108         (insert_xa6): Likewise.
 109         (extract_xa6: Likewise.
 110         (insert_xb6): Likewise.
 111         (extract_xb6): Likewise.
 112         (insert_xb6s): Likewise.
 113         (extract_xb6s): Likewise.
 114         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
 115         XX3DM_MASK, PPCVSX): New.
 116         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
 117         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 118
 119 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 120
 121         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 122         * Makefile.in: Regenerate.
 123
 124 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 125
 126         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 127         * i386-tbl.h: Regenerated.
 128
 129 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 130
 131         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 132         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 133         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 134         (powerpc_opcodes): Add Xilinx APU related opcodes.
 135
 136 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 137
 138         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 139
 140 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 141
 142         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 143
 144 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 145
 146         * mips-opc.c (CP): New macro.
 147         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 148         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 149         dmtc2 Octeon instructions.
 150
 151 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 152
 153         * dis-init.c (init_disassemble_info): Init endian_code field.
 154         * arm-dis.c (print_insn): Disassemble code according to
 155         setting of endian_code.
 156         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 157
 158 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 159
 160         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 161         for ELF symbols.
 162
 163 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 164
 165         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 166         (print_ppc_disassembler_options): Likewise.
 167         * ppc-opc.c (PPC464): Define.
 168         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 169
 170 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 171
 172         * configure: Regenerate.
 173
 174 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 175
 176         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 177         ppc_cpu_t typedef.
 178         (struct dis_private): New.
 179         (POWERPC_DIALECT): New define.
 180         (powerpc_dialect): Renamed to...
 181         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 182         struct dis_private.
 183         (print_insn_big_powerpc): Update for using structure in
 184         info->private_data.
 185         (print_insn_little_powerpc): Likewise.
 186         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 187         (skip_optional_operands): Likewise.
 188         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 189         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 190         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 191         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 192         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 193         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 194         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 195         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 196         param to be of type ppc_cpu_t.  Update prototype.
 197
 198 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 199
 200         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 201         +s, +S.
 202         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 203         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 204         syncw, syncws, vm3mulu, vm0 and vmulu.
 205
 206         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 207         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 208         seqi, sne and snei.
 209
 210 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 211
 212         * i386-opc.tbl: Add vmovd with 64bit operand.
 213         * i386-tbl.h: Regenerated.
 214
 215 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 216
 217         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 218
 219 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 220
 221         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 222         * i386-tbl.h: Regenerated.
 223
 224 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 225
 226         PR gas/6517
 227         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 228         into 32bit and 64bit.  Remove Reg64|Qword and add
 229         IgnoreSize|No_qSuf on 32bit version.
 230         * i386-tbl.h: Regenerated.
 231
 232 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 233
 234         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 235         * i386-tbl.h: Regenerated.
 236
 237 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 238
 239         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 240
 241 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 242
 243         * Makefile.am: Run "make dep-am".
 244         * Makefile.in: Regenerate.
 245
 246 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 247
 248         * i386-dis.c (MOVBE_Fixup): New.
 249         (Mo): Likewise.
 250         (PREFIX_0F3880): Likewise.
 251         (PREFIX_0F3881): Likewise.
 252         (PREFIX_0F38F0): Updated.
 253         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 254         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 255         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 256
 257         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 258         CPU_EPT_FLAGS.
 259         (cpu_flags): Add CpuMovbe and CpuEPT.
 260
 261         * i386-opc.h (CpuMovbe): New.
 262         (CpuEPT): Likewise.
 263         (CpuLM): Updated.
 264         (i386_cpu_flags): Add cpumovbe and cpuept.
 265
 266         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 267         * i386-init.h: Regenerated.
 268         * i386-tbl.h: Likewise.
 269
 270 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 271
 272         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 273         the two drem and the two dremu macros.
 274
 275 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 276
 277         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 278         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 279         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 280         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 281
 282 2008-04-25  David S. Miller  <davem@davemloft.net>
 283
 284         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 285         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 286
 287 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 288
 289         * aclocal.m4: Regenerate.
 290         * configure: Regenerate.
 291
 292 2008-04-23  David S. Miller  <davem@davemloft.net>
 293
 294         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 295         extended values.
 296         (prefetch_table): Add missing values.
 297
 298 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 299
 300         * i386-gen.c (opcode_modifiers): Add NoAVX.
 301
 302         * i386-opc.h (NoAVX): New.
 303         (OldGcc): Updated.
 304         (i386_opcode_modifier): Add noavx.
 305
 306         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 307         instructions which don't have AVX equivalent.
 308         * i386-tbl.h: Regenerated.
 309
 310 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 311
 312         * i386-dis.c (OP_VEX_FMA): New.
 313         (OP_EX_VexImmW): Likewise.
 314         (VexFMA): Likewise.
 315         (Vex128FMA): Likewise.
 316         (EXVexImmW): Likewise.
 317         (get_vex_imm8): Likewise.
 318         (OP_EX_VexReg): Likewise.
 319         (vex_i4_done): Renamed to ...
 320         (vex_w_done): This.
 321         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 322         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 323         FMA instructions.
 324         (print_insn): Updated.
 325         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 326         (OP_REG_VexI4): Check invalid high registers.
 327
 328 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 329             Michael Meissner  <michael.meissner@amd.com>
 330
 331         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 332         * i386-tbl.h: Regenerate from i386-opc.tbl.
 333
 334 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 335
 336         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 337         accept Power E500MC instructions.
 338         (print_ppc_disassembler_options): Document -Me500mc.
 339         * ppc-opc.c (DUIS, DUI, T): New.
 340         (XRT, XRTRA): Likewise.
 341         (E500MC): Likewise.
 342         (powerpc_opcodes): Add new Power E500MC instructions.
 343
 344 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 345
 346         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 347         (print_s390_disassembler_options): New function.
 348         * disassemble.c (disassembler_usage): Invoke
 349         print_s390_disassembler_options.
 350
 351 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 352
 353         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 354         of local variables used for mnemonic parsing: prefix, suffix and
 355         number.
 356
 357 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 358
 359         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 360         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 361         (s390_crb_extensions): New extensions table.
 362         (insertExpandedMnemonic): Handle '$' tag.
 363         * s390-opc.txt: Remove conditional jump variants which can now
 364         be expanded automatically.
 365         Replace '*' tag with '$' in the compare and branch instructions.
 366
 367 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 368
 369         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 370         (PREFIX_VEX_3AXX): Likewis.
 371
 372 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 373
 374         * i386-opc.tbl: Remove 4 extra blank lines.
 375
 376 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 377
 378         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 379         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 380         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 381         * i386-opc.tbl: Likewise.
 382
 383         * i386-opc.h (CpuCLMUL): Renamed to ...
 384         (CpuPCLMUL): This.
 385         (CpuFMA): Updated.
 386         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 387
 388         * i386-init.h: Regenerated.
 389
 390 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 391
 392         * i386-dis.c (OP_E_register): New.
 393         (OP_E_memory): Likewise.
 394         (OP_VEX): Likewise.
 395         (OP_EX_Vex): Likewise.
 396         (OP_EX_VexW): Likewise.
 397         (OP_XMM_Vex): Likewise.
 398         (OP_XMM_VexW): Likewise.
 399         (OP_REG_VexI4): Likewise.
 400         (PCLMUL_Fixup): Likewise.
 401         (VEXI4_Fixup): Likewise.
 402         (VZERO_Fixup): Likewise.
 403         (VCMP_Fixup): Likewise.
 404         (VPERMIL2_Fixup): Likewise.
 405         (rex_original): Likewise.
 406         (rex_ignored): Likewise.
 407         (Mxmm): Likewise.
 408         (XMM): Likewise.
 409         (EXxmm): Likewise.
 410         (EXxmmq): Likewise.
 411         (EXymmq): Likewise.
 412         (Vex): Likewise.
 413         (Vex128): Likewise.
 414         (Vex256): Likewise.
 415         (VexI4): Likewise.
 416         (EXdVex): Likewise.
 417         (EXqVex): Likewise.
 418         (EXVexW): Likewise.
 419         (EXdVexW): Likewise.
 420         (EXqVexW): Likewise.
 421         (XMVex): Likewise.
 422         (XMVexW): Likewise.
 423         (XMVexI4): Likewise.
 424         (PCLMUL): Likewise.
 425         (VZERO): Likewise.
 426         (VCMP): Likewise.
 427         (VPERMIL2): Likewise.
 428         (xmm_mode): Likewise.
 429         (xmmq_mode): Likewise.
 430         (ymmq_mode): Likewise.
 431         (vex_mode): Likewise.
 432         (vex128_mode): Likewise.
 433         (vex256_mode): Likewise.
 434         (USE_VEX_C4_TABLE): Likewise.
 435         (USE_VEX_C5_TABLE): Likewise.
 436         (USE_VEX_LEN_TABLE): Likewise.
 437         (VEX_C4_TABLE): Likewise.
 438         (VEX_C5_TABLE): Likewise.
 439         (VEX_LEN_TABLE): Likewise.
 440         (REG_VEX_XX): Likewise.
 441         (MOD_VEX_XXX): Likewise.
 442         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 443         (PREFIX_0F3A44): Likewise.
 444         (PREFIX_0F3ADF): Likewise.
 445         (PREFIX_VEX_XXX): Likewise.
 446         (VEX_OF): Likewise.
 447         (VEX_OF38): Likewise.
 448         (VEX_OF3A): Likewise.
 449         (VEX_LEN_XXX): Likewise.
 450         (vex): Likewise.
 451         (need_vex): Likewise.
 452         (need_vex_reg): Likewise.
 453         (vex_i4_done): Likewise.
 454         (vex_table): Likewise.
 455         (vex_len_table): Likewise.
 456         (OP_REG_VexI4): Likewise.
 457         (vex_cmp_op): Likewise.
 458         (pclmul_op): Likewise.
 459         (vpermil2_op): Likewise.
 460         (m_mode): Updated.
 461         (es_reg): Likewise.
 462         (PREFIX_0F38F0): Likewise.
 463         (PREFIX_0F3A60): Likewise.
 464         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 465         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 466         and PREFIX_VEX_XXX entries.
 467         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 468         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 469         PREFIX_0F3ADF.
 470         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 471         Add MOD_VEX_XXX entries.
 472         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 473         REX byte in rex_original.
 474         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 475         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 476         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 477         calling get_valid_dis386.  Use rex_original and rex_ignored when
 478         printing out REX.
 479         (putop): Handle "XY".
 480         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 481         ymmq_mode.
 482         (OP_E_extended): Updated to use OP_E_register and
 483         OP_E_memory.
 484         (OP_XMM): Handle VEX.
 485         (OP_EX): Likewise.
 486         (XMM_Fixup): Likewise.
 487         (CMP_Fixup): Use ARRAY_SIZE.
 488
 489         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 490         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 491         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 492         OPERAND_TYPE_VEX_IMM4.
 493         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 494         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 495         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 496         VexImmExt and SSE2AVX.
 497         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 498
 499         * i386-opc.h (CpuAVX): New.
 500         (CpuAES): Likewise.
 501         (CpuCLMUL): Likewise.
 502         (CpuFMA): Likewise.
 503         (Vex): Likewise.
 504         (Vex256): Likewise.
 505         (VexNDS): Likewise.
 506         (VexNDD): Likewise.
 507         (VexW0): Likewise.
 508         (VexW1): Likewise.
 509         (Vex0F): Likewise.
 510         (Vex0F38): Likewise.
 511         (Vex0F3A): Likewise.
 512         (Vex3Sources): Likewise.
 513         (VexImmExt): Likewise.
 514         (SSE2AVX): Likewise.
 515         (RegYMM): Likewise.
 516         (Ymmword): Likewise.
 517         (Vex_Imm4): Likewise.
 518         (Implicit1stXmm0): Likewise.
 519         (CpuXsave): Updated.
 520         (CpuLM): Likewise.
 521         (ByteOkIntel): Likewise.
 522         (OldGcc): Likewise.
 523         (Control): Likewise.
 524         (Unspecified): Likewise.
 525         (OTMax): Likewise.
 526         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 527         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 528         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 529         vex3sources, veximmext and sse2avx.
 530         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 531
 532         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 533
 534         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 535
 536         * i386-init.h: Regenerated.
 537         * i386-tbl.h: Likewise.
 538
 539 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 540
 541         From  Robin Getz  <robin.getz@analog.com>
 542         * bfin-dis.c (bu32): Typedef.
 543         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 544         (constant_formats[]): Add uimm32 and huimm16.
 545         (fmtconst_val): New.
 546         (uimm32): Define.
 547         (huimm32): Define.
 548         (imm16_val): Define.
 549         (luimm16_val): Define.
 550         (struct saved_state): Define.
 551         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 552         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 553         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 554         (get_allreg): New.
 555         (decode_LDIMMhalf_0): Print out the whole register value.
 556
 557         From Jie Zhang  <jie.zhang@analog.com>
 558         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 559         multiply and multiply-accumulate to data register instruction.
 560
 561         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 562         c_imm32, c_huimm32e): Define.
 563         (constant_formats): Add flags for printing decimal, leading spaces, and
 564         exact symbols.
 565         (comment, parallel): Add global flags in all disassembly.
 566         (fmtconst): Take advantage of new flags, and print default in hex.
 567         (fmtconst_val): Likewise.
 568         (decode_macfunc): Be consistant with spaces, tabs, comments,
 569         capitalization in disassembly, fix minor coding style issues.
 570         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 571         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 572         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 573         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 574         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 575         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 576         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 577         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 578         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 579         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 580         _print_insn_bfin, print_insn_bfin): Likewise.
 581
 582 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 583
 584         * aclocal.m4: Regenerate.
 585         * configure: Likewise.
 586         * Makefile.in: Likewise.
 587
 588 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 589
 590         * Makefile.am: Run "make dep-am".
 591         * Makefile.in: Regenerate.
 592         * configure: Regenerate.
 593
 594 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 595
 596         * ppc-opc.c (powerpc_opcodes): Order and format.
 597
 598 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 599
 600         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 601         * i386-tbl.h: Regenerated.
 602
 603 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 604
 605         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 606         x86-64.
 607         * i386-tbl.h: Regenerated.
 608
 609 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 610
 611         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 612         and Fword for far indirect jmp. Allow Reg16 and Word for near
 613         indirect jmp on x86-64. Disallow Fword for lcall.
 614         * i386-tbl.h: Re-generate.
 615
 616 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 617
 618         * cr16-opc.c  (cr16_num_optab): Defined
 619
 620 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 621
 622         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 623         * i386-init.h: Regenerated.
 624
 625 2008-02-14  Nick Clifton  <nickc@redhat.com>
 626
 627         PR binutils/5524
 628         * configure.in (SHARED_LIBADD): Select the correct host specific
 629         file extension for shared libraries.
 630         * configure: Regenerate.
 631
 632 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 633
 634         * i386-opc.h (RegFlat): New.
 635         * i386-reg.tbl (flat): Add.
 636         * i386-tbl.h: Re-generate.
 637
 638 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 639
 640         * i386-dis.c (a_mode): New.
 641         (cond_jump_mode): Adjust.
 642         (Ma): Change to a_mode.
 643         (intel_operand_size): Handle a_mode.
 644         * i386-opc.tbl: Allow Dword and Qword for bound.
 645         * i386-tbl.h: Re-generate.
 646
 647 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 648
 649         * i386-gen.c (process_i386_registers): Process new fields.
 650         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 651         unsigned char. Add dw2_regnum and Dw2Inval.
 652         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 653         register names.
 654         * i386-tbl.h: Re-generate.
 655
 656 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 657
 658         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 659         * i386-init.h: Updated.
 660
 661 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 662
 663         * i386-gen.c (cpu_flags): Add CpuXsave.
 664
 665         * i386-opc.h (CpuXsave): New.
 666         (CpuLM): Updated.
 667         (i386_cpu_flags): Add cpuxsave.
 668
 669         * i386-dis.c (MOD_0FAE_REG_4): New.
 670         (RM_0F01_REG_2): Likewise.
 671         (MOD_0FAE_REG_5): Updated.
 672         (RM_0F01_REG_3): Likewise.
 673         (reg_table): Use MOD_0FAE_REG_4.
 674         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 675         for xrstor.
 676         (rm_table): Add RM_0F01_REG_2.
 677
 678         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 679         * i386-init.h: Regenerated.
 680         * i386-tbl.h: Likewise.
 681
 682 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 683
 684         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 685         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 686         * i386-tbl.h: Re-generate.
 687
 688 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 689
 690         PR 5715
 691         * configure: Regenerated.
 692
 693 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 694
 695         * mips-dis.c: Update copyright.
 696         (mips_arch_choices): Add Octeon.
 697         * mips-opc.c: Update copyright.
 698         (IOCT): New macro.
 699         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 700
 701 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 702
 703         * ppc-opc.c: Support optional L form mtmsr.
 704
 705 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 706
 707         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 708
 709 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 710
 711         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 712         * i386-init.h: Regenerated.
 713
 714 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 715
 716         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 717         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 718
 719 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 720
 721         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 722         (cpu_flags): Likewise.
 723
 724         * i386-opc.h (CpuMMX2): Removed.
 725         (CpuSSE): Updated.
 726
 727         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 728         * i386-init.h: Regenerated.
 729         * i386-tbl.h: Likewise.
 730
 731 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 732
 733         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 734         CPU_SMX_FLAGS.
 735         * i386-init.h: Regenerated.
 736
 737 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 738
 739         * i386-opc.tbl: Use Qword on movddup.
 740         * i386-tbl.h: Regenerated.
 741
 742 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 743
 744         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 745         * i386-tbl.h: Regenerated.
 746
 747 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 748
 749         * i386-dis.c (Mx): New.
 750         (PREFIX_0FC3): Likewise.
 751         (PREFIX_0FC7_REG_6): Updated.
 752         (dis386_twobyte): Use PREFIX_0FC3.
 753         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 754         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 755         movntss.
 756
 757 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 758
 759         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 760         (operand_types): Add Mem.
 761
 762         * i386-opc.h (IntelSyntax): New.
 763         * i386-opc.h (Mem): New.
 764         (Byte): Updated.
 765         (Opcode_Modifier_Max): Updated.
 766         (i386_opcode_modifier): Add intelsyntax.
 767         (i386_operand_type): Add mem.
 768
 769         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 770         instructions.
 771
 772         * i386-reg.tbl: Add size for accumulator.
 773
 774         * i386-init.h: Regenerated.
 775         * i386-tbl.h: Likewise.
 776
 777 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 778
 779         * i386-opc.h (Byte): Fix a typo.
 780
 781 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 782
 783         PR gas/5534
 784         * i386-gen.c (operand_type_init): Add Dword to
 785         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 786         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 787         Qword and Xmmword.
 788         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 789         Xmmword, Unspecified and Anysize.
 790         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 791         an alias of Xmmword.
 792
 793         * i386-opc.h (CheckSize): Removed.
 794         (Byte): Updated.
 795         (Word): Likewise.
 796         (Dword): Likewise.
 797         (Qword): Likewise.
 798         (Xmmword): Likewise.
 799         (FWait): Updated.
 800         (OTMax): Likewise.
 801         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 802         qword and xmmword.
 803         (Fword): New.
 804         (TBYTE): Likewise.
 805         (Unspecified): Likewise.
 806         (Anysize): Likewise.
 807         (i386_operand_type): Add byte, word, dword, fword, qword,
 808         tbyte xmmword, unspecified and anysize.
 809
 810         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 811         Tbyte, Xmmword, Unspecified and Anysize.
 812
 813         * i386-reg.tbl: Add size for accumulator.
 814
 815         * i386-init.h: Regenerated.
 816         * i386-tbl.h: Likewise.
 817
 818 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 819
 820         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 821         (REG_0F18): Updated.
 822         (reg_table): Updated.
 823         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 824         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 825
 826 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 827
 828         * i386-gen.c (set_bitfield): Use fail () on error.
 829
 830 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 831
 832         * i386-gen.c (lineno): New.
 833         (filename): Likewise.
 834         (set_bitfield): Report filename and line numer on error.
 835         (process_i386_opcodes): Set filename and update lineno.
 836         (process_i386_registers): Likewise.
 837
 838 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 839
 840         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 841         ATTSyntax.
 842
 843         * i386-opc.h (IntelMnemonic): Renamed to ..
 844         (ATTSyntax): This
 845         (Opcode_Modifier_Max): Updated.
 846         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 847         and intelsyntax.
 848
 849         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 850         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 851         * i386-tbl.h: Regenerated.
 852
 853 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 854
 855         * i386-gen.c: Update copyright to 2008.
 856         * i386-opc.h: Likewise.
 857         * i386-opc.tbl: Likewise.
 858
 859         * i386-init.h: Regenerated.
 860         * i386-tbl.h: Likewise.
 861
 862 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 863
 864         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 865         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 866         * i386-tbl.h: Regenerated.
 867
 868 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 869
 870         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 871         CpuSSE4_2_Or_ABM.
 872         (cpu_flags): Likewise.
 873
 874         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 875         (CpuSSE4_2_Or_ABM): Likewise.
 876         (CpuLM): Updated.
 877         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 878
 879         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 880         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 881         and CpuPadLock, respectively.
 882         * i386-init.h: Regenerated.
 883         * i386-tbl.h: Likewise.
 884
 885 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 886
 887         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 888
 889         * i386-opc.h (No_xSuf): Removed.
 890         (CheckSize): Updated.
 891
 892         * i386-tbl.h: Regenerated.
 893
 894 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 895
 896         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 897         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 898         CPU_SSE5_FLAGS.
 899         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 900
 901         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 902         (CpuLM): Updated.
 903         (i386_cpu_flags): Add cpusse4_2_or_abm.
 904
 905         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 906         CpuABM|CpuSSE4_2 on popcnt.
 907         * i386-init.h: Regenerated.
 908         * i386-tbl.h: Likewise.
 909
 910 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 911
 912         * i386-opc.h: Update comments.
 913
 914 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 915
 916         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 917         * i386-opc.h: Likewise.
 918         * i386-opc.tbl: Likewise.
 919
 920 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 921
 922         PR gas/5534
 923         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 924         Byte, Word, Dword, QWord and Xmmword.
 925
 926         * i386-opc.h (No_xSuf): New.
 927         (CheckSize): Likewise.
 928         (Byte): Likewise.
 929         (Word): Likewise.
 930         (Dword): Likewise.
 931         (QWord): Likewise.
 932         (Xmmword): Likewise.
 933         (FWait): Updated.
 934         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 935         Dword, QWord and Xmmword.
 936
 937         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 938         used.
 939         * i386-tbl.h: Regenerated.
 940
 941 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 942
 943         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 944         From Miod Vallat.
 945
 946 For older changes see ChangeLog-2007
 947 \f
 948 Local Variables:
 949 mode: change-log
 950 left-margin: 8
 951 fill-column: 74
 952 version-control: never
 953 End: