opcodes/ChangeLog

   1 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * configure.in: Update a number of obsolete autoconf macros.
   4         * aclocal.m4: Regenerate.
   5
   6 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         AVX Programming Reference (August, 2008)
   9         * i386-dis.c (PREFIX_VEX_38DB): New.
  10         (PREFIX_VEX_38DC): Likewise.
  11         (PREFIX_VEX_38DD): Likewise.
  12         (PREFIX_VEX_38DE): Likewise.
  13         (PREFIX_VEX_38DF): Likewise.
  14         (PREFIX_VEX_3ADF): Likewise.
  15         (VEX_LEN_38DB_P_2): Likewise.
  16         (VEX_LEN_38DC_P_2): Likewise.
  17         (VEX_LEN_38DD_P_2): Likewise.
  18         (VEX_LEN_38DE_P_2): Likewise.
  19         (VEX_LEN_38DF_P_2): Likewise.
  20         (VEX_LEN_3ADF_P_2): Likewise.
  21         (PREFIX_VEX_3A04): Updated.
  22         (VEX_LEN_3A06_P_2): Likewise.
  23         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
  24         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
  25         (x86_64_table): Likewise.
  26         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
  27         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
  28         VEX_LEN_3ADF_P_2.
  29
  30         * i386-opc.tbl: Add AES + AVX instructions.
  31         * i386-init.h: Regenerated.
  32         * i386-tbl.h: Likewise.
  33
  34 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  35
  36         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
  37         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
  38
  39 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
  40
  41         PR 6526
  42         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
  43         * Makefile.in: Regenerate.
  44         * aclocal.m4: Regenerate.
  45         * config.in: Regenerate.
  46         * configure: Regenerate.
  47
  48 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
  49
  50         PR 6825
  51         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
  52
  53 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
  54
  55         * i386-opc.tbl: Add syscall and sysret for Cpu64.
  56
  57         * i386-tbl.h: Regenerated.
  58
  59 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
  60
  61         * Makefile.am (POTFILES.in): Set LC_ALL=C.
  62         * Makefile.in: Regenerate.
  63         * po/POTFILES.in: Regenerate.
  64
  65 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
  66
  67         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
  68         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
  69         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
  70         * ppc-opc.c (insert_xt6): New static function.
  71         (extract_xt6): Likewise.
  72         (insert_xa6): Likewise.
  73         (extract_xa6: Likewise.
  74         (insert_xb6): Likewise.
  75         (extract_xb6): Likewise.
  76         (insert_xb6s): Likewise.
  77         (extract_xb6s): Likewise.
  78         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
  79         XX3DM_MASK, PPCVSX): New.
  80         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
  81         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
  82
  83 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
  84
  85         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
  86         * Makefile.in: Regenerate.
  87
  88 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
  89
  90         * i386-reg.tbl: Use Dw2Inval on AVX registers.
  91         * i386-tbl.h: Regenerated.
  92
  93 2008-07-30  Michael J. Eager  <eager@eagercon.com>
  94
  95         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
  96         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
  97         (insert_sprg, PPC405): Use PPC_OPCODE_405.
  98         (powerpc_opcodes): Add Xilinx APU related opcodes.
  99
 100 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 101
 102         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 103
 104 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 105
 106         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 107
 108 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 109
 110         * mips-opc.c (CP): New macro.
 111         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 112         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 113         dmtc2 Octeon instructions.
 114
 115 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 116
 117         * dis-init.c (init_disassemble_info): Init endian_code field.
 118         * arm-dis.c (print_insn): Disassemble code according to
 119         setting of endian_code.
 120         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 121
 122 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 123
 124         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 125         for ELF symbols.
 126
 127 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 128
 129         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 130         (print_ppc_disassembler_options): Likewise.
 131         * ppc-opc.c (PPC464): Define.
 132         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 133
 134 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 135
 136         * configure: Regenerate.
 137
 138 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 139
 140         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 141         ppc_cpu_t typedef.
 142         (struct dis_private): New.
 143         (POWERPC_DIALECT): New define.
 144         (powerpc_dialect): Renamed to...
 145         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 146         struct dis_private.
 147         (print_insn_big_powerpc): Update for using structure in
 148         info->private_data.
 149         (print_insn_little_powerpc): Likewise.
 150         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 151         (skip_optional_operands): Likewise.
 152         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 153         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 154         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 155         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 156         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 157         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 158         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 159         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 160         param to be of type ppc_cpu_t.  Update prototype.
 161
 162 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 163
 164         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 165         +s, +S.
 166         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 167         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 168         syncw, syncws, vm3mulu, vm0 and vmulu.
 169
 170         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 171         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 172         seqi, sne and snei.
 173
 174 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 175
 176         * i386-opc.tbl: Add vmovd with 64bit operand.
 177         * i386-tbl.h: Regenerated.
 178
 179 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 180
 181         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 182
 183 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 184
 185         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 186         * i386-tbl.h: Regenerated.
 187
 188 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 189
 190         PR gas/6517
 191         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 192         into 32bit and 64bit.  Remove Reg64|Qword and add
 193         IgnoreSize|No_qSuf on 32bit version.
 194         * i386-tbl.h: Regenerated.
 195
 196 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 197
 198         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 199         * i386-tbl.h: Regenerated.
 200
 201 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 202
 203         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 204
 205 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 206
 207         * Makefile.am: Run "make dep-am".
 208         * Makefile.in: Regenerate.
 209
 210 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 211
 212         * i386-dis.c (MOVBE_Fixup): New.
 213         (Mo): Likewise.
 214         (PREFIX_0F3880): Likewise.
 215         (PREFIX_0F3881): Likewise.
 216         (PREFIX_0F38F0): Updated.
 217         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 218         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 219         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 220
 221         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 222         CPU_EPT_FLAGS.
 223         (cpu_flags): Add CpuMovbe and CpuEPT.
 224
 225         * i386-opc.h (CpuMovbe): New.
 226         (CpuEPT): Likewise.
 227         (CpuLM): Updated.
 228         (i386_cpu_flags): Add cpumovbe and cpuept.
 229
 230         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 231         * i386-init.h: Regenerated.
 232         * i386-tbl.h: Likewise.
 233
 234 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 235
 236         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 237         the two drem and the two dremu macros.
 238
 239 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 240
 241         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 242         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 243         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 244         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 245
 246 2008-04-25  David S. Miller  <davem@davemloft.net>
 247
 248         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 249         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 250
 251 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 252
 253         * aclocal.m4: Regenerate.
 254         * configure: Regenerate.
 255
 256 2008-04-23  David S. Miller  <davem@davemloft.net>
 257
 258         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 259         extended values.
 260         (prefetch_table): Add missing values.
 261
 262 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 263
 264         * i386-gen.c (opcode_modifiers): Add NoAVX.
 265
 266         * i386-opc.h (NoAVX): New.
 267         (OldGcc): Updated.
 268         (i386_opcode_modifier): Add noavx.
 269
 270         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 271         instructions which don't have AVX equivalent.
 272         * i386-tbl.h: Regenerated.
 273
 274 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 275
 276         * i386-dis.c (OP_VEX_FMA): New.
 277         (OP_EX_VexImmW): Likewise.
 278         (VexFMA): Likewise.
 279         (Vex128FMA): Likewise.
 280         (EXVexImmW): Likewise.
 281         (get_vex_imm8): Likewise.
 282         (OP_EX_VexReg): Likewise.
 283         (vex_i4_done): Renamed to ...
 284         (vex_w_done): This.
 285         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 286         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 287         FMA instructions.
 288         (print_insn): Updated.
 289         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 290         (OP_REG_VexI4): Check invalid high registers.
 291
 292 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 293             Michael Meissner  <michael.meissner@amd.com>
 294
 295         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 296         * i386-tbl.h: Regenerate from i386-opc.tbl.
 297
 298 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 299
 300         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 301         accept Power E500MC instructions.
 302         (print_ppc_disassembler_options): Document -Me500mc.
 303         * ppc-opc.c (DUIS, DUI, T): New.
 304         (XRT, XRTRA): Likewise.
 305         (E500MC): Likewise.
 306         (powerpc_opcodes): Add new Power E500MC instructions.
 307
 308 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 309
 310         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 311         (print_s390_disassembler_options): New function.
 312         * disassemble.c (disassembler_usage): Invoke
 313         print_s390_disassembler_options.
 314
 315 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 316
 317         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 318         of local variables used for mnemonic parsing: prefix, suffix and
 319         number.
 320
 321 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 322
 323         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 324         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 325         (s390_crb_extensions): New extensions table.
 326         (insertExpandedMnemonic): Handle '$' tag.
 327         * s390-opc.txt: Remove conditional jump variants which can now
 328         be expanded automatically.
 329         Replace '*' tag with '$' in the compare and branch instructions.
 330
 331 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 332
 333         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 334         (PREFIX_VEX_3AXX): Likewis.
 335
 336 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 337
 338         * i386-opc.tbl: Remove 4 extra blank lines.
 339
 340 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 341
 342         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 343         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 344         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 345         * i386-opc.tbl: Likewise.
 346
 347         * i386-opc.h (CpuCLMUL): Renamed to ...
 348         (CpuPCLMUL): This.
 349         (CpuFMA): Updated.
 350         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 351
 352         * i386-init.h: Regenerated.
 353
 354 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 355
 356         * i386-dis.c (OP_E_register): New.
 357         (OP_E_memory): Likewise.
 358         (OP_VEX): Likewise.
 359         (OP_EX_Vex): Likewise.
 360         (OP_EX_VexW): Likewise.
 361         (OP_XMM_Vex): Likewise.
 362         (OP_XMM_VexW): Likewise.
 363         (OP_REG_VexI4): Likewise.
 364         (PCLMUL_Fixup): Likewise.
 365         (VEXI4_Fixup): Likewise.
 366         (VZERO_Fixup): Likewise.
 367         (VCMP_Fixup): Likewise.
 368         (VPERMIL2_Fixup): Likewise.
 369         (rex_original): Likewise.
 370         (rex_ignored): Likewise.
 371         (Mxmm): Likewise.
 372         (XMM): Likewise.
 373         (EXxmm): Likewise.
 374         (EXxmmq): Likewise.
 375         (EXymmq): Likewise.
 376         (Vex): Likewise.
 377         (Vex128): Likewise.
 378         (Vex256): Likewise.
 379         (VexI4): Likewise.
 380         (EXdVex): Likewise.
 381         (EXqVex): Likewise.
 382         (EXVexW): Likewise.
 383         (EXdVexW): Likewise.
 384         (EXqVexW): Likewise.
 385         (XMVex): Likewise.
 386         (XMVexW): Likewise.
 387         (XMVexI4): Likewise.
 388         (PCLMUL): Likewise.
 389         (VZERO): Likewise.
 390         (VCMP): Likewise.
 391         (VPERMIL2): Likewise.
 392         (xmm_mode): Likewise.
 393         (xmmq_mode): Likewise.
 394         (ymmq_mode): Likewise.
 395         (vex_mode): Likewise.
 396         (vex128_mode): Likewise.
 397         (vex256_mode): Likewise.
 398         (USE_VEX_C4_TABLE): Likewise.
 399         (USE_VEX_C5_TABLE): Likewise.
 400         (USE_VEX_LEN_TABLE): Likewise.
 401         (VEX_C4_TABLE): Likewise.
 402         (VEX_C5_TABLE): Likewise.
 403         (VEX_LEN_TABLE): Likewise.
 404         (REG_VEX_XX): Likewise.
 405         (MOD_VEX_XXX): Likewise.
 406         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 407         (PREFIX_0F3A44): Likewise.
 408         (PREFIX_0F3ADF): Likewise.
 409         (PREFIX_VEX_XXX): Likewise.
 410         (VEX_OF): Likewise.
 411         (VEX_OF38): Likewise.
 412         (VEX_OF3A): Likewise.
 413         (VEX_LEN_XXX): Likewise.
 414         (vex): Likewise.
 415         (need_vex): Likewise.
 416         (need_vex_reg): Likewise.
 417         (vex_i4_done): Likewise.
 418         (vex_table): Likewise.
 419         (vex_len_table): Likewise.
 420         (OP_REG_VexI4): Likewise.
 421         (vex_cmp_op): Likewise.
 422         (pclmul_op): Likewise.
 423         (vpermil2_op): Likewise.
 424         (m_mode): Updated.
 425         (es_reg): Likewise.
 426         (PREFIX_0F38F0): Likewise.
 427         (PREFIX_0F3A60): Likewise.
 428         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 429         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 430         and PREFIX_VEX_XXX entries.
 431         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 432         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 433         PREFIX_0F3ADF.
 434         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 435         Add MOD_VEX_XXX entries.
 436         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 437         REX byte in rex_original.
 438         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 439         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 440         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 441         calling get_valid_dis386.  Use rex_original and rex_ignored when
 442         printing out REX.
 443         (putop): Handle "XY".
 444         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 445         ymmq_mode.
 446         (OP_E_extended): Updated to use OP_E_register and
 447         OP_E_memory.
 448         (OP_XMM): Handle VEX.
 449         (OP_EX): Likewise.
 450         (XMM_Fixup): Likewise.
 451         (CMP_Fixup): Use ARRAY_SIZE.
 452
 453         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 454         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 455         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 456         OPERAND_TYPE_VEX_IMM4.
 457         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 458         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 459         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 460         VexImmExt and SSE2AVX.
 461         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 462
 463         * i386-opc.h (CpuAVX): New.
 464         (CpuAES): Likewise.
 465         (CpuCLMUL): Likewise.
 466         (CpuFMA): Likewise.
 467         (Vex): Likewise.
 468         (Vex256): Likewise.
 469         (VexNDS): Likewise.
 470         (VexNDD): Likewise.
 471         (VexW0): Likewise.
 472         (VexW1): Likewise.
 473         (Vex0F): Likewise.
 474         (Vex0F38): Likewise.
 475         (Vex0F3A): Likewise.
 476         (Vex3Sources): Likewise.
 477         (VexImmExt): Likewise.
 478         (SSE2AVX): Likewise.
 479         (RegYMM): Likewise.
 480         (Ymmword): Likewise.
 481         (Vex_Imm4): Likewise.
 482         (Implicit1stXmm0): Likewise.
 483         (CpuXsave): Updated.
 484         (CpuLM): Likewise.
 485         (ByteOkIntel): Likewise.
 486         (OldGcc): Likewise.
 487         (Control): Likewise.
 488         (Unspecified): Likewise.
 489         (OTMax): Likewise.
 490         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 491         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 492         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 493         vex3sources, veximmext and sse2avx.
 494         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 495
 496         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 497
 498         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 499
 500         * i386-init.h: Regenerated.
 501         * i386-tbl.h: Likewise.
 502
 503 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 504
 505         From  Robin Getz  <robin.getz@analog.com>
 506         * bfin-dis.c (bu32): Typedef.
 507         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 508         (constant_formats[]): Add uimm32 and huimm16.
 509         (fmtconst_val): New.
 510         (uimm32): Define.
 511         (huimm32): Define.
 512         (imm16_val): Define.
 513         (luimm16_val): Define.
 514         (struct saved_state): Define.
 515         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 516         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 517         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 518         (get_allreg): New.
 519         (decode_LDIMMhalf_0): Print out the whole register value.
 520
 521         From Jie Zhang  <jie.zhang@analog.com>
 522         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 523         multiply and multiply-accumulate to data register instruction.
 524
 525         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 526         c_imm32, c_huimm32e): Define.
 527         (constant_formats): Add flags for printing decimal, leading spaces, and
 528         exact symbols.
 529         (comment, parallel): Add global flags in all disassembly.
 530         (fmtconst): Take advantage of new flags, and print default in hex.
 531         (fmtconst_val): Likewise.
 532         (decode_macfunc): Be consistant with spaces, tabs, comments,
 533         capitalization in disassembly, fix minor coding style issues.
 534         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 535         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 536         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 537         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 538         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 539         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 540         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 541         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 542         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 543         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 544         _print_insn_bfin, print_insn_bfin): Likewise.
 545
 546 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 547
 548         * aclocal.m4: Regenerate.
 549         * configure: Likewise.
 550         * Makefile.in: Likewise.
 551
 552 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 553
 554         * Makefile.am: Run "make dep-am".
 555         * Makefile.in: Regenerate.
 556         * configure: Regenerate.
 557
 558 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 559
 560         * ppc-opc.c (powerpc_opcodes): Order and format.
 561
 562 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 563
 564         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 565         * i386-tbl.h: Regenerated.
 566
 567 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 568
 569         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 570         x86-64.
 571         * i386-tbl.h: Regenerated.
 572
 573 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 574
 575         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 576         and Fword for far indirect jmp. Allow Reg16 and Word for near
 577         indirect jmp on x86-64. Disallow Fword for lcall.
 578         * i386-tbl.h: Re-generate.
 579
 580 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 581
 582         * cr16-opc.c  (cr16_num_optab): Defined
 583
 584 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 585
 586         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 587         * i386-init.h: Regenerated.
 588
 589 2008-02-14  Nick Clifton  <nickc@redhat.com>
 590
 591         PR binutils/5524
 592         * configure.in (SHARED_LIBADD): Select the correct host specific
 593         file extension for shared libraries.
 594         * configure: Regenerate.
 595
 596 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 597
 598         * i386-opc.h (RegFlat): New.
 599         * i386-reg.tbl (flat): Add.
 600         * i386-tbl.h: Re-generate.
 601
 602 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 603
 604         * i386-dis.c (a_mode): New.
 605         (cond_jump_mode): Adjust.
 606         (Ma): Change to a_mode.
 607         (intel_operand_size): Handle a_mode.
 608         * i386-opc.tbl: Allow Dword and Qword for bound.
 609         * i386-tbl.h: Re-generate.
 610
 611 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 612
 613         * i386-gen.c (process_i386_registers): Process new fields.
 614         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 615         unsigned char. Add dw2_regnum and Dw2Inval.
 616         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 617         register names.
 618         * i386-tbl.h: Re-generate.
 619
 620 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 621
 622         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 623         * i386-init.h: Updated.
 624
 625 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 626
 627         * i386-gen.c (cpu_flags): Add CpuXsave.
 628
 629         * i386-opc.h (CpuXsave): New.
 630         (CpuLM): Updated.
 631         (i386_cpu_flags): Add cpuxsave.
 632
 633         * i386-dis.c (MOD_0FAE_REG_4): New.
 634         (RM_0F01_REG_2): Likewise.
 635         (MOD_0FAE_REG_5): Updated.
 636         (RM_0F01_REG_3): Likewise.
 637         (reg_table): Use MOD_0FAE_REG_4.
 638         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 639         for xrstor.
 640         (rm_table): Add RM_0F01_REG_2.
 641
 642         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 643         * i386-init.h: Regenerated.
 644         * i386-tbl.h: Likewise.
 645
 646 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 647
 648         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 649         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 650         * i386-tbl.h: Re-generate.
 651
 652 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 653
 654         PR 5715
 655         * configure: Regenerated.
 656
 657 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 658
 659         * mips-dis.c: Update copyright.
 660         (mips_arch_choices): Add Octeon.
 661         * mips-opc.c: Update copyright.
 662         (IOCT): New macro.
 663         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 664
 665 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 666
 667         * ppc-opc.c: Support optional L form mtmsr.
 668
 669 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 670
 671         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 672
 673 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 674
 675         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 676         * i386-init.h: Regenerated.
 677
 678 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 679
 680         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 681         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 682
 683 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 684
 685         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 686         (cpu_flags): Likewise.
 687
 688         * i386-opc.h (CpuMMX2): Removed.
 689         (CpuSSE): Updated.
 690
 691         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 692         * i386-init.h: Regenerated.
 693         * i386-tbl.h: Likewise.
 694
 695 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 696
 697         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 698         CPU_SMX_FLAGS.
 699         * i386-init.h: Regenerated.
 700
 701 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 702
 703         * i386-opc.tbl: Use Qword on movddup.
 704         * i386-tbl.h: Regenerated.
 705
 706 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 707
 708         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 709         * i386-tbl.h: Regenerated.
 710
 711 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 712
 713         * i386-dis.c (Mx): New.
 714         (PREFIX_0FC3): Likewise.
 715         (PREFIX_0FC7_REG_6): Updated.
 716         (dis386_twobyte): Use PREFIX_0FC3.
 717         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 718         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 719         movntss.
 720
 721 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 722
 723         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 724         (operand_types): Add Mem.
 725
 726         * i386-opc.h (IntelSyntax): New.
 727         * i386-opc.h (Mem): New.
 728         (Byte): Updated.
 729         (Opcode_Modifier_Max): Updated.
 730         (i386_opcode_modifier): Add intelsyntax.
 731         (i386_operand_type): Add mem.
 732
 733         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 734         instructions.
 735
 736         * i386-reg.tbl: Add size for accumulator.
 737
 738         * i386-init.h: Regenerated.
 739         * i386-tbl.h: Likewise.
 740
 741 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 742
 743         * i386-opc.h (Byte): Fix a typo.
 744
 745 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 746
 747         PR gas/5534
 748         * i386-gen.c (operand_type_init): Add Dword to
 749         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 750         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 751         Qword and Xmmword.
 752         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 753         Xmmword, Unspecified and Anysize.
 754         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 755         an alias of Xmmword.
 756
 757         * i386-opc.h (CheckSize): Removed.
 758         (Byte): Updated.
 759         (Word): Likewise.
 760         (Dword): Likewise.
 761         (Qword): Likewise.
 762         (Xmmword): Likewise.
 763         (FWait): Updated.
 764         (OTMax): Likewise.
 765         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 766         qword and xmmword.
 767         (Fword): New.
 768         (TBYTE): Likewise.
 769         (Unspecified): Likewise.
 770         (Anysize): Likewise.
 771         (i386_operand_type): Add byte, word, dword, fword, qword,
 772         tbyte xmmword, unspecified and anysize.
 773
 774         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 775         Tbyte, Xmmword, Unspecified and Anysize.
 776
 777         * i386-reg.tbl: Add size for accumulator.
 778
 779         * i386-init.h: Regenerated.
 780         * i386-tbl.h: Likewise.
 781
 782 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 783
 784         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 785         (REG_0F18): Updated.
 786         (reg_table): Updated.
 787         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 788         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 789
 790 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 791
 792         * i386-gen.c (set_bitfield): Use fail () on error.
 793
 794 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 795
 796         * i386-gen.c (lineno): New.
 797         (filename): Likewise.
 798         (set_bitfield): Report filename and line numer on error.
 799         (process_i386_opcodes): Set filename and update lineno.
 800         (process_i386_registers): Likewise.
 801
 802 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 803
 804         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 805         ATTSyntax.
 806
 807         * i386-opc.h (IntelMnemonic): Renamed to ..
 808         (ATTSyntax): This
 809         (Opcode_Modifier_Max): Updated.
 810         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 811         and intelsyntax.
 812
 813         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 814         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 815         * i386-tbl.h: Regenerated.
 816
 817 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 818
 819         * i386-gen.c: Update copyright to 2008.
 820         * i386-opc.h: Likewise.
 821         * i386-opc.tbl: Likewise.
 822
 823         * i386-init.h: Regenerated.
 824         * i386-tbl.h: Likewise.
 825
 826 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 827
 828         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 829         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 830         * i386-tbl.h: Regenerated.
 831
 832 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 833
 834         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 835         CpuSSE4_2_Or_ABM.
 836         (cpu_flags): Likewise.
 837
 838         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 839         (CpuSSE4_2_Or_ABM): Likewise.
 840         (CpuLM): Updated.
 841         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 842
 843         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 844         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 845         and CpuPadLock, respectively.
 846         * i386-init.h: Regenerated.
 847         * i386-tbl.h: Likewise.
 848
 849 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 850
 851         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 852
 853         * i386-opc.h (No_xSuf): Removed.
 854         (CheckSize): Updated.
 855
 856         * i386-tbl.h: Regenerated.
 857
 858 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 859
 860         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 861         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 862         CPU_SSE5_FLAGS.
 863         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 864
 865         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 866         (CpuLM): Updated.
 867         (i386_cpu_flags): Add cpusse4_2_or_abm.
 868
 869         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 870         CpuABM|CpuSSE4_2 on popcnt.
 871         * i386-init.h: Regenerated.
 872         * i386-tbl.h: Likewise.
 873
 874 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 875
 876         * i386-opc.h: Update comments.
 877
 878 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 879
 880         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 881         * i386-opc.h: Likewise.
 882         * i386-opc.tbl: Likewise.
 883
 884 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 885
 886         PR gas/5534
 887         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 888         Byte, Word, Dword, QWord and Xmmword.
 889
 890         * i386-opc.h (No_xSuf): New.
 891         (CheckSize): Likewise.
 892         (Byte): Likewise.
 893         (Word): Likewise.
 894         (Dword): Likewise.
 895         (QWord): Likewise.
 896         (Xmmword): Likewise.
 897         (FWait): Updated.
 898         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 899         Dword, QWord and Xmmword.
 900
 901         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 902         used.
 903         * i386-tbl.h: Regenerated.
 904
 905 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 906
 907         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 908         From Miod Vallat.
 909
 910 For older changes see ChangeLog-2007
 911 \f
 912 Local Variables:
 913 mode: change-log
 914 left-margin: 8
 915 fill-column: 74
 916 version-control: never
 917 End: