1 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
3 * i386-dis.c (OP_VEX_FMA): New.
4 (OP_EX_VexImmW): Likewise.
8 (get_vex_imm8): Likewise.
9 (OP_EX_VexReg): Likewise.
10 (vex_i4_done): Renamed to ...
12 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
13 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
15 (print_insn): Updated.
16 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
17 (OP_REG_VexI4): Check invalid high registers.
19 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
20 Michael Meissner <michael.meissner@amd.com>
22 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
23 * i386-tbl.h: Regenerate from i386-opc.tbl.
25 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
27 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
28 accept Power E500MC instructions.
29 (print_ppc_disassembler_options): Document -Me500mc.
30 * ppc-opc.c (DUIS, DUI, T): New.
31 (XRT, XRTRA): Likewise.
33 (powerpc_opcodes): Add new Power E500MC instructions.
35 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
37 * s390-dis.c (init_disasm): Evaluate disassembler_options.
38 (print_s390_disassembler_options): New function.
39 * disassemble.c (disassembler_usage): Invoke
40 print_s390_disassembler_options.
42 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
44 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
45 of local variables used for mnemonic parsing: prefix, suffix and
48 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
50 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
51 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
52 (s390_crb_extensions): New extensions table.
53 (insertExpandedMnemonic): Handle '$' tag.
54 * s390-opc.txt: Remove conditional jump variants which can now
55 be expanded automatically.
56 Replace '*' tag with '$' in the compare and branch instructions.
58 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
60 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
61 (PREFIX_VEX_3AXX): Likewis.
63 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
65 * i386-opc.tbl: Remove 4 extra blank lines.
67 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
69 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
70 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
71 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
72 * i386-opc.tbl: Likewise.
74 * i386-opc.h (CpuCLMUL): Renamed to ...
77 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
79 * i386-init.h: Regenerated.
81 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
83 * i386-dis.c (OP_E_register): New.
84 (OP_E_memory): Likewise.
86 (OP_EX_Vex): Likewise.
87 (OP_EX_VexW): Likewise.
88 (OP_XMM_Vex): Likewise.
89 (OP_XMM_VexW): Likewise.
90 (OP_REG_VexI4): Likewise.
91 (PCLMUL_Fixup): Likewise.
92 (VEXI4_Fixup): Likewise.
93 (VZERO_Fixup): Likewise.
94 (VCMP_Fixup): Likewise.
95 (VPERMIL2_Fixup): Likewise.
96 (rex_original): Likewise.
97 (rex_ignored): Likewise.
118 (VPERMIL2): Likewise.
119 (xmm_mode): Likewise.
120 (xmmq_mode): Likewise.
121 (ymmq_mode): Likewise.
122 (vex_mode): Likewise.
123 (vex128_mode): Likewise.
124 (vex256_mode): Likewise.
125 (USE_VEX_C4_TABLE): Likewise.
126 (USE_VEX_C5_TABLE): Likewise.
127 (USE_VEX_LEN_TABLE): Likewise.
128 (VEX_C4_TABLE): Likewise.
129 (VEX_C5_TABLE): Likewise.
130 (VEX_LEN_TABLE): Likewise.
131 (REG_VEX_XX): Likewise.
132 (MOD_VEX_XXX): Likewise.
133 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
134 (PREFIX_0F3A44): Likewise.
135 (PREFIX_0F3ADF): Likewise.
136 (PREFIX_VEX_XXX): Likewise.
138 (VEX_OF38): Likewise.
139 (VEX_OF3A): Likewise.
140 (VEX_LEN_XXX): Likewise.
142 (need_vex): Likewise.
143 (need_vex_reg): Likewise.
144 (vex_i4_done): Likewise.
145 (vex_table): Likewise.
146 (vex_len_table): Likewise.
147 (OP_REG_VexI4): Likewise.
148 (vex_cmp_op): Likewise.
149 (pclmul_op): Likewise.
150 (vpermil2_op): Likewise.
153 (PREFIX_0F38F0): Likewise.
154 (PREFIX_0F3A60): Likewise.
155 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
156 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
157 and PREFIX_VEX_XXX entries.
158 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
159 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
161 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
162 Add MOD_VEX_XXX entries.
163 (ckprefix): Initialize rex_original and rex_ignored. Store the
164 REX byte in rex_original.
165 (get_valid_dis386): Handle the implicit prefix in VEX prefix
166 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
167 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
168 calling get_valid_dis386. Use rex_original and rex_ignored when
170 (putop): Handle "XY".
171 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
173 (OP_E_extended): Updated to use OP_E_register and
175 (OP_XMM): Handle VEX.
177 (XMM_Fixup): Likewise.
178 (CMP_Fixup): Use ARRAY_SIZE.
180 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
181 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
182 (operand_type_init): Add OPERAND_TYPE_REGYMM and
183 OPERAND_TYPE_VEX_IMM4.
184 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
185 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
186 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
187 VexImmExt and SSE2AVX.
188 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
190 * i386-opc.h (CpuAVX): New.
192 (CpuCLMUL): Likewise.
203 (Vex3Sources): Likewise.
204 (VexImmExt): Likewise.
208 (Vex_Imm4): Likewise.
209 (Implicit1stXmm0): Likewise.
212 (ByteOkIntel): Likewise.
215 (Unspecified): Likewise.
217 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
218 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
219 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
220 vex3sources, veximmext and sse2avx.
221 (i386_operand_type): Add regymm, ymmword and vex_imm4.
223 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
225 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
227 * i386-init.h: Regenerated.
228 * i386-tbl.h: Likewise.
230 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
232 From Robin Getz <robin.getz@analog.com>
233 * bfin-dis.c (bu32): Typedef.
234 (enum const_forms_t): Add c_uimm32 and c_huimm32.
235 (constant_formats[]): Add uimm32 and huimm16.
240 (luimm16_val): Define.
241 (struct saved_state): Define.
242 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
243 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
244 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
246 (decode_LDIMMhalf_0): Print out the whole register value.
248 From Jie Zhang <jie.zhang@analog.com>
249 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
250 multiply and multiply-accumulate to data register instruction.
252 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
253 c_imm32, c_huimm32e): Define.
254 (constant_formats): Add flags for printing decimal, leading spaces, and
256 (comment, parallel): Add global flags in all disassembly.
257 (fmtconst): Take advantage of new flags, and print default in hex.
258 (fmtconst_val): Likewise.
259 (decode_macfunc): Be consistant with spaces, tabs, comments,
260 capitalization in disassembly, fix minor coding style issues.
261 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
262 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
263 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
264 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
265 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
266 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
267 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
268 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
269 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
270 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
271 _print_insn_bfin, print_insn_bfin): Likewise.
273 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
275 * aclocal.m4: Regenerate.
276 * configure: Likewise.
277 * Makefile.in: Likewise.
279 2008-03-13 Alan Modra <amodra@bigpond.net.au>
281 * Makefile.am: Run "make dep-am".
282 * Makefile.in: Regenerate.
283 * configure: Regenerate.
285 2008-03-07 Alan Modra <amodra@bigpond.net.au>
287 * ppc-opc.c (powerpc_opcodes): Order and format.
289 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
291 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
292 * i386-tbl.h: Regenerated.
294 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
296 * i386-opc.tbl: Disallow 16-bit near indirect branches for
298 * i386-tbl.h: Regenerated.
300 2008-02-21 Jan Beulich <jbeulich@novell.com>
302 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
303 and Fword for far indirect jmp. Allow Reg16 and Word for near
304 indirect jmp on x86-64. Disallow Fword for lcall.
305 * i386-tbl.h: Re-generate.
307 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
309 * cr16-opc.c (cr16_num_optab): Defined
311 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
313 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
314 * i386-init.h: Regenerated.
316 2008-02-14 Nick Clifton <nickc@redhat.com>
319 * configure.in (SHARED_LIBADD): Select the correct host specific
320 file extension for shared libraries.
321 * configure: Regenerate.
323 2008-02-13 Jan Beulich <jbeulich@novell.com>
325 * i386-opc.h (RegFlat): New.
326 * i386-reg.tbl (flat): Add.
327 * i386-tbl.h: Re-generate.
329 2008-02-13 Jan Beulich <jbeulich@novell.com>
331 * i386-dis.c (a_mode): New.
332 (cond_jump_mode): Adjust.
333 (Ma): Change to a_mode.
334 (intel_operand_size): Handle a_mode.
335 * i386-opc.tbl: Allow Dword and Qword for bound.
336 * i386-tbl.h: Re-generate.
338 2008-02-13 Jan Beulich <jbeulich@novell.com>
340 * i386-gen.c (process_i386_registers): Process new fields.
341 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
342 unsigned char. Add dw2_regnum and Dw2Inval.
343 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
345 * i386-tbl.h: Re-generate.
347 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
349 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
350 * i386-init.h: Updated.
352 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
354 * i386-gen.c (cpu_flags): Add CpuXsave.
356 * i386-opc.h (CpuXsave): New.
358 (i386_cpu_flags): Add cpuxsave.
360 * i386-dis.c (MOD_0FAE_REG_4): New.
361 (RM_0F01_REG_2): Likewise.
362 (MOD_0FAE_REG_5): Updated.
363 (RM_0F01_REG_3): Likewise.
364 (reg_table): Use MOD_0FAE_REG_4.
365 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
367 (rm_table): Add RM_0F01_REG_2.
369 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
370 * i386-init.h: Regenerated.
371 * i386-tbl.h: Likewise.
373 2008-02-11 Jan Beulich <jbeulich@novell.com>
375 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
376 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
377 * i386-tbl.h: Re-generate.
379 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
382 * configure: Regenerated.
384 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
386 * mips-dis.c: Update copyright.
387 (mips_arch_choices): Add Octeon.
388 * mips-opc.c: Update copyright.
390 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
392 2008-01-29 Alan Modra <amodra@bigpond.net.au>
394 * ppc-opc.c: Support optional L form mtmsr.
396 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
398 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
400 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
402 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
403 * i386-init.h: Regenerated.
405 2008-01-23 Tristan Gingold <gingold@adacore.com>
407 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
408 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
410 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
412 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
413 (cpu_flags): Likewise.
415 * i386-opc.h (CpuMMX2): Removed.
418 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
419 * i386-init.h: Regenerated.
420 * i386-tbl.h: Likewise.
422 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
424 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
426 * i386-init.h: Regenerated.
428 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
430 * i386-opc.tbl: Use Qword on movddup.
431 * i386-tbl.h: Regenerated.
433 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
435 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
436 * i386-tbl.h: Regenerated.
438 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
440 * i386-dis.c (Mx): New.
441 (PREFIX_0FC3): Likewise.
442 (PREFIX_0FC7_REG_6): Updated.
443 (dis386_twobyte): Use PREFIX_0FC3.
444 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
445 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
448 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
450 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
451 (operand_types): Add Mem.
453 * i386-opc.h (IntelSyntax): New.
454 * i386-opc.h (Mem): New.
456 (Opcode_Modifier_Max): Updated.
457 (i386_opcode_modifier): Add intelsyntax.
458 (i386_operand_type): Add mem.
460 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
463 * i386-reg.tbl: Add size for accumulator.
465 * i386-init.h: Regenerated.
466 * i386-tbl.h: Likewise.
468 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
470 * i386-opc.h (Byte): Fix a typo.
472 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
475 * i386-gen.c (operand_type_init): Add Dword to
476 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
477 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
479 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
480 Xmmword, Unspecified and Anysize.
481 (set_bitfield): Make Mmword an alias of Qword. Make Oword
484 * i386-opc.h (CheckSize): Removed.
492 (i386_opcode_modifier): Remove checksize, byte, word, dword,
496 (Unspecified): Likewise.
498 (i386_operand_type): Add byte, word, dword, fword, qword,
499 tbyte xmmword, unspecified and anysize.
501 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
502 Tbyte, Xmmword, Unspecified and Anysize.
504 * i386-reg.tbl: Add size for accumulator.
506 * i386-init.h: Regenerated.
507 * i386-tbl.h: Likewise.
509 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
511 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
513 (reg_table): Updated.
514 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
515 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
517 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
519 * i386-gen.c (set_bitfield): Use fail () on error.
521 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
523 * i386-gen.c (lineno): New.
524 (filename): Likewise.
525 (set_bitfield): Report filename and line numer on error.
526 (process_i386_opcodes): Set filename and update lineno.
527 (process_i386_registers): Likewise.
529 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
531 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
534 * i386-opc.h (IntelMnemonic): Renamed to ..
536 (Opcode_Modifier_Max): Updated.
537 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
540 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
541 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
542 * i386-tbl.h: Regenerated.
544 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
546 * i386-gen.c: Update copyright to 2008.
547 * i386-opc.h: Likewise.
548 * i386-opc.tbl: Likewise.
550 * i386-init.h: Regenerated.
551 * i386-tbl.h: Likewise.
553 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
555 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
556 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
557 * i386-tbl.h: Regenerated.
559 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
561 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
563 (cpu_flags): Likewise.
565 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
566 (CpuSSE4_2_Or_ABM): Likewise.
568 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
570 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
571 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
572 and CpuPadLock, respectively.
573 * i386-init.h: Regenerated.
574 * i386-tbl.h: Likewise.
576 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
578 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
580 * i386-opc.h (No_xSuf): Removed.
581 (CheckSize): Updated.
583 * i386-tbl.h: Regenerated.
585 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
587 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
588 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
590 (cpu_flags): Add CpuSSE4_2_Or_ABM.
592 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
594 (i386_cpu_flags): Add cpusse4_2_or_abm.
596 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
597 CpuABM|CpuSSE4_2 on popcnt.
598 * i386-init.h: Regenerated.
599 * i386-tbl.h: Likewise.
601 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
603 * i386-opc.h: Update comments.
605 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
607 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
608 * i386-opc.h: Likewise.
609 * i386-opc.tbl: Likewise.
611 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
614 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
615 Byte, Word, Dword, QWord and Xmmword.
617 * i386-opc.h (No_xSuf): New.
618 (CheckSize): Likewise.
625 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
626 Dword, QWord and Xmmword.
628 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
630 * i386-tbl.h: Regenerated.
632 2008-01-02 Mark Kettenis <kettenis@gnu.org>
634 * m88k-dis.c (instructions): Fix fcvt.* instructions.
637 For older changes see ChangeLog-2007
643 version-control: never