opcodes/ChangeLog

   1 2010-06-29  Alan Modra  <amodra@gmail.com>
   2
   3         * mep-dis.c: Regenerate.
   4
   5 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
   6
   7         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
   8
   9 2010-06-27  Alan Modra  <amodra@gmail.com>
  10
  11         * arc-dis.c (arc_sprintf): Delete set but unused variables.
  12         (decodeInstr): Likewise.
  13         * dlx-dis.c (print_insn_dlx): Likewise.
  14         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
  15         * maxq-dis.c (check_move, print_insn): Likewise.
  16         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
  17         * msp430-dis.c (msp430_branchinstr): Likewise.
  18         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
  19         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
  20         * sparc-dis.c (print_insn_sparc): Likewise.
  21         * fr30-asm.c: Regenerate.
  22         * frv-asm.c: Regenerate.
  23         * ip2k-asm.c: Regenerate.
  24         * iq2000-asm.c: Regenerate.
  25         * lm32-asm.c: Regenerate.
  26         * m32c-asm.c: Regenerate.
  27         * m32r-asm.c: Regenerate.
  28         * mep-asm.c: Regenerate.
  29         * mt-asm.c: Regenerate.
  30         * openrisc-asm.c: Regenerate.
  31         * xc16x-asm.c: Regenerate.
  32         * xstormy16-asm.c: Regenerate.
  33
  34 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
  35
  36         PR gas/11673
  37         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
  38
  39 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
  40
  41         PR binutils/11676
  42         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
  43
  44 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
  45
  46         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
  47         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
  48         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
  49         touch floating point regs and are enabled by COM, PPC or PPCCOM.
  50         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
  51         Treat lwsync as msync on e500.
  52
  53 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  54
  55         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
  56
  57 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  58
  59         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
  60         constants is the same on 32-bit and 64-bit hosts.
  61
  62 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
  63
  64         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
  65         .short directives so that they can be reassembled.
  66
  67 2010-05-26  Catherine Moore <clm@codesourcery.com>
  68             David Ung  <davidu@mips.com>
  69
  70         * mips-opc.c: Change membership to I1 for instructions ssnop and
  71         ehb.
  72
  73 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
  74
  75         * i386-dis.c (sib): New.
  76         (get_sib): Likewise.
  77         (print_insn): Call get_sib.
  78         OP_E_memory): Use sib.
  79
  80 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
  81
  82         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
  83         * mips-opc.c (I16): Remove.
  84         (mips_builtin_op): Reclassify jalx.
  85
  86 2010-05-19  Alan Modra  <amodra@gmail.com>
  87
  88         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
  89         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
  90
  91 2010-05-13  Alan Modra  <amodra@gmail.com>
  92
  93         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
  94
  95 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  96
  97         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
  98         format.
  99         (print_insn_thumb16): Add support for new %W format.
 100
 101 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 102
 103         * Makefile.in: Regenerate with automake 1.11.1.
 104         * aclocal.m4: Ditto.
 105
 106 2010-05-05  Nick Clifton  <nickc@redhat.com>
 107
 108         * po/es.po: Updated Spanish translation.
 109
 110 2010-04-22  Nick Clifton  <nickc@redhat.com>
 111
 112         * po/opcodes.pot: Updated by the Translation project.
 113         * po/vi.po: Updated Vietnamese translation.
 114
 115 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 116
 117         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 118         bits in opcode.
 119
 120 2010-04-09  Nick Clifton  <nickc@redhat.com>
 121
 122         * i386-dis.c (print_insn): Remove unused variable op.
 123         (OP_sI): Remove unused variable mask.
 124
 125 2010-04-07  Alan Modra  <amodra@gmail.com>
 126
 127         * configure: Regenerate.
 128
 129 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 130
 131         * ppc-opc.c (RBOPT): New define.
 132         ("dccci"): Enable for PPCA2.  Make operands optional.
 133         ("iccci"): Likewise.  Do not deprecate for PPC476.
 134
 135 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 136
 137         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 138
 139 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 140
 141         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 142         * Makefile.in: Regenerate.
 143         * configure.in (bfd_tic6x_arch): New.
 144         * configure: Regenerate.
 145         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 146         (disassembler): Handle TI C6X.
 147         * tic6x-dis.c: New.
 148
 149 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 150
 151         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 152
 153 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 154
 155         * dis-buf.c (buffer_read_memory): Give error for reading just
 156         before the start of memory.
 157
 158 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 159             Quentin Neill <quentin.neill@amd.com>
 160
 161         * i386-dis.c (OP_LWP_I): Removed.
 162         (reg_table): Do not use OP_LWP_I, use Iq.
 163         (OP_LWPCB_E): Remove use of names16.
 164         (OP_LWP_E): Same.
 165         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 166         should not set the Vex.length bit.
 167         * i386-tbl.h: Regenerated.
 168
 169 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 170
 171         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 172
 173 2010-02-24  Nick Clifton  <nickc@redhat.com>
 174
 175         PR binutils/6773
 176         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 177         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 178         (thumb32_opcodes): Likewise.
 179
 180 2010-02-15  Nick Clifton  <nickc@redhat.com>
 181
 182         * po/vi.po: Updated Vietnamese translation.
 183
 184 2010-02-12  Doug Evans  <dje@sebabeach.org>
 185
 186         * lm32-opinst.c: Regenerate.
 187
 188 2010-02-11  Doug Evans  <dje@sebabeach.org>
 189
 190         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 191         (print_address): Delete CGEN_PRINT_ADDRESS.
 192         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 193         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 194         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 195         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 196
 197         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 198         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 199         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 200         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 201         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 202         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 203         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 204         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 205         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 206         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 207         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 208         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 209
 210 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 211
 212         * i386-dis.c: Update copyright.
 213         * i386-gen.c: Likewise.
 214         * i386-opc.h: Likewise.
 215         * i386-opc.tbl: Likewise.
 216
 217 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 218             Sebastian Pop  <sebastian.pop@amd.com>
 219
 220         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 221         function to handle 5th imm8 operand.
 222         (PREFIX_VEX_3A48): Added.
 223         (PREFIX_VEX_3A49): Added.
 224         (VEX_W_3A48_P_2): Added.
 225         (VEX_W_3A49_P_2): Added.
 226         (prefix table): Added entries for PREFIX_VEX_3A48
 227         and PREFIX_VEX_3A49.
 228         (vex table): Added entries for VEX_W_3A48_P_2 and
 229         and VEX_W_3A49_P_2.
 230         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 231         for Vec_Imm4 operands.
 232         * i386-opc.h (enum): Added Vec_Imm4.
 233         (i386_operand_type): Added vec_imm4.
 234         * i386-opc.tbl: Add entries for vpermilp[ds].
 235         * i386-init.h: Regenerated.
 236         * i386-tbl.h: Regenerated.
 237
 238 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 239
 240         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 241         and "pwr7".  Move "a2" into alphabetical order.
 242
 243 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 244
 245         * ppc-dis.c (ppc_opts): Add titan entry.
 246         * ppc-opc.c (TITAN, MULHW): Define.
 247         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 248
 249 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 250
 251         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 252         to CPU_BDVER1_FLAGS
 253         * i386-init.h: Regenerated.
 254
 255 2010-02-03  Anthony Green  <green@moxielogic.com>
 256
 257         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 258         0x0f, and make 0x00 an illegal instruction.
 259
 260 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 261
 262         * opcodes/arm-dis.c (struct arm_private_data): New.
 263         (print_insn_coprocessor, print_insn_arm): Update to use struct
 264         arm_private_data.
 265         (is_mapping_symbol, get_map_sym_type): New functions.
 266         (get_sym_code_type): Check the symbol's section.  Do not check
 267         mapping symbols.
 268         (print_insn): Default to disassembling ARM mode code.  Check
 269         for mapping symbols separately from other symbols.  Use
 270         struct arm_private_data.
 271
 272 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 273
 274         * i386-dis.c (EXVexWdqScalar): New.
 275         (vex_scalar_w_dq_mode): Likewise.
 276         (prefix_table): Update entries for PREFIX_VEX_3899,
 277         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 278         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 279         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 280         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 281         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 282         (OP_EX): Likewise.
 283
 284 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 285
 286         * i386-dis.c (XMScalar): New.
 287         (EXdScalar): Likewise.
 288         (EXqScalar): Likewise.
 289         (EXqScalarS): Likewise.
 290         (VexScalar): Likewise.
 291         (EXdVexScalarS): Likewise.
 292         (EXqVexScalarS): Likewise.
 293         (XMVexScalar): Likewise.
 294         (scalar_mode): Likewise.
 295         (d_scalar_mode): Likewise.
 296         (d_scalar_swap_mode): Likewise.
 297         (q_scalar_mode): Likewise.
 298         (q_scalar_swap_mode): Likewise.
 299         (vex_scalar_mode): Likewise.
 300         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 301         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 302         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 303         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 304         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 305         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 306         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 307         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 308         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 309         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 310         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 311         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 312         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 313         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 314         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 315         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 316         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 317         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 318         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 319         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 320         q_scalar_mode, q_scalar_swap_mode.
 321         (OP_XMM): Handle scalar_mode.
 322         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 323         and q_scalar_swap_mode.
 324         (OP_VEX): Handle vex_scalar_mode.
 325
 326 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 327
 328         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 329
 330 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 331
 332         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 333
 334 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 335
 336         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 337
 338 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 339
 340         * i386-dis.c (Bad_Opcode): New.
 341         (bad_opcode): Likewise.
 342         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 343         (dis386_twobyte): Likewise.
 344         (reg_table): Likewise.
 345         (prefix_table): Likewise.
 346         (x86_64_table): Likewise.
 347         (vex_len_table): Likewise.
 348         (vex_w_table): Likewise.
 349         (mod_table): Likewise.
 350         (rm_table): Likewise.
 351         (float_reg): Likewise.
 352         (reg_table): Remove trailing "(bad)" entries.
 353         (prefix_table): Likewise.
 354         (x86_64_table): Likewise.
 355         (vex_len_table): Likewise.
 356         (vex_w_table): Likewise.
 357         (mod_table): Likewise.
 358         (rm_table): Likewise.
 359         (get_valid_dis386): Handle bytemode 0.
 360
 361 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 362
 363         * i386-opc.h (VEXScalar): New.
 364
 365         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 366         instructions.
 367         * i386-tbl.h: Regenerated.
 368
 369 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 370
 371         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 372
 373         * i386-opc.tbl: Add xsave64 and xrstor64.
 374         * i386-tbl.h: Regenerated.
 375
 376 2010-01-20  Nick Clifton  <nickc@redhat.com>
 377
 378         PR 11170
 379         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 380         based post-indexed addressing.
 381
 382 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 383
 384         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 385         * i386-tbl.h: Regenerated.
 386
 387 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 388
 389         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 390         comments.
 391
 392 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 393
 394         * i386-dis.c (names_mm): New.
 395         (intel_names_mm): Likewise.
 396         (att_names_mm): Likewise.
 397         (names_xmm): Likewise.
 398         (intel_names_xmm): Likewise.
 399         (att_names_xmm): Likewise.
 400         (names_ymm): Likewise.
 401         (intel_names_ymm): Likewise.
 402         (att_names_ymm): Likewise.
 403         (print_insn): Set names_mm, names_xmm and names_ymm.
 404         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 405         (OP_XMM): Likewise.
 406         (OP_EM): Likewise.
 407         (OP_EMC): Likewise.
 408         (OP_MXC): Likewise.
 409         (OP_EX): Likewise.
 410         (XMM_Fixup): Likewise.
 411         (OP_VEX): Likewise.
 412         (OP_EX_VexReg): Likewise.
 413         (OP_Vex_2src): Likewise.
 414         (OP_Vex_2src_1): Likewise.
 415         (OP_Vex_2src_2): Likewise.
 416         (OP_REG_VexI4): Likewise.
 417
 418 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 419
 420         * i386-dis.c (print_insn): Update comments.
 421
 422 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 423
 424         * i386-dis.c (rex_original): Removed.
 425         (ckprefix): Remove rex_original.
 426         (print_insn): Update comments.
 427
 428 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 429
 430         * Makefile.in: Regenerate.
 431         * configure: Regenerate.
 432
 433 2010-01-07  Doug Evans  <dje@sebabeach.org>
 434
 435         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 436         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 437         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 438         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 439         * xstormy16-ibld.c: Regenerate.
 440
 441 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 442
 443         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 444         * i386-init.h: Regenerated.
 445
 446 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 447
 448         * arm-dis.c (print_insn): Fixed search for next symbol and data
 449         dumping condition, and the initial mapping symbol state.
 450
 451 2010-01-05  Doug Evans  <dje@sebabeach.org>
 452
 453         * cgen-ibld.in: #include "cgen/basic-modes.h".
 454         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 455         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 456         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 457         * xstormy16-ibld.c: Regenerate.
 458
 459 2010-01-04  Nick Clifton  <nickc@redhat.com>
 460
 461         PR 11123
 462         * arm-dis.c (print_insn_coprocessor): Initialise value.
 463
 464 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 465
 466         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 467
 468 2010-01-02  Doug Evans  <dje@sebabeach.org>
 469
 470         * cgen-asm.in: Update copyright year.
 471         * cgen-dis.in: Update copyright year.
 472         * cgen-ibld.in: Update copyright year.
 473         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 474         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 475         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 476         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 477         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 478         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 479         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 480         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 481         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 482         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 483         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 484         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 485         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 486         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 487         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 488         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 489         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 490         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 491         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 492         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 493         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 494
 495 For older changes see ChangeLog-2009
 496 \f
 497 Local Variables:
 498 mode: change-log
 499 left-margin: 8
 500 fill-column: 74
 501 version-control: never
 502 End: