opcodes/ChangeLog

   1 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-opc.tbl: Add syscall and sysret for Cpu64.
   4
   5         * i386-tbl.h: Regenerated.
   6
   7 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
   8
   9         * Makefile.am (POTFILES.in): Set LC_ALL=C.
  10         * Makefile.in: Regenerate.
  11         * po/POTFILES.in: Regenerate.
  12
  13 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
  14
  15         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
  16         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
  17         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
  18         * ppc-opc.c (insert_xt6): New static function.
  19         (extract_xt6): Likewise.
  20         (insert_xa6): Likewise.
  21         (extract_xa6: Likewise.
  22         (insert_xb6): Likewise.
  23         (extract_xb6): Likewise.
  24         (insert_xb6s): Likewise.
  25         (extract_xb6s): Likewise.
  26         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
  27         XX3DM_MASK, PPCVSX): New.
  28         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
  29         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
  30
  31 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
  32
  33         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
  34         * Makefile.in: Regenerate.
  35
  36 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
  37
  38         * i386-reg.tbl: Use Dw2Inval on AVX registers.
  39         * i386-tbl.h: Regenerated.
  40
  41 2008-07-30  Michael J. Eager  <eager@eagercon.com>
  42
  43         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
  44         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
  45         (insert_sprg, PPC405): Use PPC_OPCODE_405.
  46         (powerpc_opcodes): Add Xilinx APU related opcodes.
  47
  48 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
  49
  50         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
  51
  52 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
  53
  54         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
  55
  56 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
  57
  58         * mips-opc.c (CP): New macro.
  59         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
  60         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
  61         dmtc2 Octeon instructions.
  62
  63 2008-07-07  Stan Shebs  <stan@codesourcery.com>
  64
  65         * dis-init.c (init_disassemble_info): Init endian_code field.
  66         * arm-dis.c (print_insn): Disassemble code according to
  67         setting of endian_code.
  68         (print_insn_big_arm): Detect when BE8 extension flag has been set.
  69
  70 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
  71
  72         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
  73         for ELF symbols.
  74
  75 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
  76
  77         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
  78         (print_ppc_disassembler_options): Likewise.
  79         * ppc-opc.c (PPC464): Define.
  80         (powerpc_opcodes): Add mfdcrux and mtdcrux.
  81
  82 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  83
  84         * configure: Regenerate.
  85
  86 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
  87
  88         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
  89         ppc_cpu_t typedef.
  90         (struct dis_private): New.
  91         (POWERPC_DIALECT): New define.
  92         (powerpc_dialect): Renamed to...
  93         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
  94         struct dis_private.
  95         (print_insn_big_powerpc): Update for using structure in
  96         info->private_data.
  97         (print_insn_little_powerpc): Likewise.
  98         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
  99         (skip_optional_operands): Likewise.
 100         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 101         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 102         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 103         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 104         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 105         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 106         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 107         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 108         param to be of type ppc_cpu_t.  Update prototype.
 109
 110 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 111
 112         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 113         +s, +S.
 114         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 115         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 116         syncw, syncws, vm3mulu, vm0 and vmulu.
 117
 118         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 119         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 120         seqi, sne and snei.
 121
 122 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 123
 124         * i386-opc.tbl: Add vmovd with 64bit operand.
 125         * i386-tbl.h: Regenerated.
 126
 127 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 128
 129         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 130
 131 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 132
 133         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 134         * i386-tbl.h: Regenerated.
 135
 136 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 137
 138         PR gas/6517
 139         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 140         into 32bit and 64bit.  Remove Reg64|Qword and add
 141         IgnoreSize|No_qSuf on 32bit version.
 142         * i386-tbl.h: Regenerated.
 143
 144 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 145
 146         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 147         * i386-tbl.h: Regenerated.
 148
 149 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 150
 151         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 152
 153 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 154
 155         * Makefile.am: Run "make dep-am".
 156         * Makefile.in: Regenerate.
 157
 158 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 159
 160         * i386-dis.c (MOVBE_Fixup): New.
 161         (Mo): Likewise.
 162         (PREFIX_0F3880): Likewise.
 163         (PREFIX_0F3881): Likewise.
 164         (PREFIX_0F38F0): Updated.
 165         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 166         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 167         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 168
 169         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 170         CPU_EPT_FLAGS.
 171         (cpu_flags): Add CpuMovbe and CpuEPT.
 172
 173         * i386-opc.h (CpuMovbe): New.
 174         (CpuEPT): Likewise.
 175         (CpuLM): Updated.
 176         (i386_cpu_flags): Add cpumovbe and cpuept.
 177
 178         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 179         * i386-init.h: Regenerated.
 180         * i386-tbl.h: Likewise.
 181
 182 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 183
 184         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 185         the two drem and the two dremu macros.
 186
 187 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 188
 189         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 190         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 191         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 192         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 193
 194 2008-04-25  David S. Miller  <davem@davemloft.net>
 195
 196         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 197         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 198
 199 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 200
 201         * aclocal.m4: Regenerate.
 202         * configure: Regenerate.
 203
 204 2008-04-23  David S. Miller  <davem@davemloft.net>
 205
 206         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 207         extended values.
 208         (prefetch_table): Add missing values.
 209
 210 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 211
 212         * i386-gen.c (opcode_modifiers): Add NoAVX.
 213
 214         * i386-opc.h (NoAVX): New.
 215         (OldGcc): Updated.
 216         (i386_opcode_modifier): Add noavx.
 217
 218         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 219         instructions which don't have AVX equivalent.
 220         * i386-tbl.h: Regenerated.
 221
 222 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 223
 224         * i386-dis.c (OP_VEX_FMA): New.
 225         (OP_EX_VexImmW): Likewise.
 226         (VexFMA): Likewise.
 227         (Vex128FMA): Likewise.
 228         (EXVexImmW): Likewise.
 229         (get_vex_imm8): Likewise.
 230         (OP_EX_VexReg): Likewise.
 231         (vex_i4_done): Renamed to ...
 232         (vex_w_done): This.
 233         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 234         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 235         FMA instructions.
 236         (print_insn): Updated.
 237         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 238         (OP_REG_VexI4): Check invalid high registers.
 239
 240 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 241             Michael Meissner  <michael.meissner@amd.com>
 242
 243         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 244         * i386-tbl.h: Regenerate from i386-opc.tbl.
 245
 246 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 247
 248         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 249         accept Power E500MC instructions.
 250         (print_ppc_disassembler_options): Document -Me500mc.
 251         * ppc-opc.c (DUIS, DUI, T): New.
 252         (XRT, XRTRA): Likewise.
 253         (E500MC): Likewise.
 254         (powerpc_opcodes): Add new Power E500MC instructions.
 255
 256 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 257
 258         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 259         (print_s390_disassembler_options): New function.
 260         * disassemble.c (disassembler_usage): Invoke
 261         print_s390_disassembler_options.
 262
 263 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 264
 265         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 266         of local variables used for mnemonic parsing: prefix, suffix and
 267         number.
 268
 269 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 270
 271         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 272         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 273         (s390_crb_extensions): New extensions table.
 274         (insertExpandedMnemonic): Handle '$' tag.
 275         * s390-opc.txt: Remove conditional jump variants which can now
 276         be expanded automatically.
 277         Replace '*' tag with '$' in the compare and branch instructions.
 278
 279 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 280
 281         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 282         (PREFIX_VEX_3AXX): Likewis.
 283
 284 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 285
 286         * i386-opc.tbl: Remove 4 extra blank lines.
 287
 288 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 289
 290         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 291         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 292         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 293         * i386-opc.tbl: Likewise.
 294
 295         * i386-opc.h (CpuCLMUL): Renamed to ...
 296         (CpuPCLMUL): This.
 297         (CpuFMA): Updated.
 298         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 299
 300         * i386-init.h: Regenerated.
 301
 302 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 303
 304         * i386-dis.c (OP_E_register): New.
 305         (OP_E_memory): Likewise.
 306         (OP_VEX): Likewise.
 307         (OP_EX_Vex): Likewise.
 308         (OP_EX_VexW): Likewise.
 309         (OP_XMM_Vex): Likewise.
 310         (OP_XMM_VexW): Likewise.
 311         (OP_REG_VexI4): Likewise.
 312         (PCLMUL_Fixup): Likewise.
 313         (VEXI4_Fixup): Likewise.
 314         (VZERO_Fixup): Likewise.
 315         (VCMP_Fixup): Likewise.
 316         (VPERMIL2_Fixup): Likewise.
 317         (rex_original): Likewise.
 318         (rex_ignored): Likewise.
 319         (Mxmm): Likewise.
 320         (XMM): Likewise.
 321         (EXxmm): Likewise.
 322         (EXxmmq): Likewise.
 323         (EXymmq): Likewise.
 324         (Vex): Likewise.
 325         (Vex128): Likewise.
 326         (Vex256): Likewise.
 327         (VexI4): Likewise.
 328         (EXdVex): Likewise.
 329         (EXqVex): Likewise.
 330         (EXVexW): Likewise.
 331         (EXdVexW): Likewise.
 332         (EXqVexW): Likewise.
 333         (XMVex): Likewise.
 334         (XMVexW): Likewise.
 335         (XMVexI4): Likewise.
 336         (PCLMUL): Likewise.
 337         (VZERO): Likewise.
 338         (VCMP): Likewise.
 339         (VPERMIL2): Likewise.
 340         (xmm_mode): Likewise.
 341         (xmmq_mode): Likewise.
 342         (ymmq_mode): Likewise.
 343         (vex_mode): Likewise.
 344         (vex128_mode): Likewise.
 345         (vex256_mode): Likewise.
 346         (USE_VEX_C4_TABLE): Likewise.
 347         (USE_VEX_C5_TABLE): Likewise.
 348         (USE_VEX_LEN_TABLE): Likewise.
 349         (VEX_C4_TABLE): Likewise.
 350         (VEX_C5_TABLE): Likewise.
 351         (VEX_LEN_TABLE): Likewise.
 352         (REG_VEX_XX): Likewise.
 353         (MOD_VEX_XXX): Likewise.
 354         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 355         (PREFIX_0F3A44): Likewise.
 356         (PREFIX_0F3ADF): Likewise.
 357         (PREFIX_VEX_XXX): Likewise.
 358         (VEX_OF): Likewise.
 359         (VEX_OF38): Likewise.
 360         (VEX_OF3A): Likewise.
 361         (VEX_LEN_XXX): Likewise.
 362         (vex): Likewise.
 363         (need_vex): Likewise.
 364         (need_vex_reg): Likewise.
 365         (vex_i4_done): Likewise.
 366         (vex_table): Likewise.
 367         (vex_len_table): Likewise.
 368         (OP_REG_VexI4): Likewise.
 369         (vex_cmp_op): Likewise.
 370         (pclmul_op): Likewise.
 371         (vpermil2_op): Likewise.
 372         (m_mode): Updated.
 373         (es_reg): Likewise.
 374         (PREFIX_0F38F0): Likewise.
 375         (PREFIX_0F3A60): Likewise.
 376         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 377         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 378         and PREFIX_VEX_XXX entries.
 379         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 380         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 381         PREFIX_0F3ADF.
 382         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 383         Add MOD_VEX_XXX entries.
 384         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 385         REX byte in rex_original.
 386         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 387         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 388         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 389         calling get_valid_dis386.  Use rex_original and rex_ignored when
 390         printing out REX.
 391         (putop): Handle "XY".
 392         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 393         ymmq_mode.
 394         (OP_E_extended): Updated to use OP_E_register and
 395         OP_E_memory.
 396         (OP_XMM): Handle VEX.
 397         (OP_EX): Likewise.
 398         (XMM_Fixup): Likewise.
 399         (CMP_Fixup): Use ARRAY_SIZE.
 400
 401         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 402         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 403         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 404         OPERAND_TYPE_VEX_IMM4.
 405         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 406         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 407         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 408         VexImmExt and SSE2AVX.
 409         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 410
 411         * i386-opc.h (CpuAVX): New.
 412         (CpuAES): Likewise.
 413         (CpuCLMUL): Likewise.
 414         (CpuFMA): Likewise.
 415         (Vex): Likewise.
 416         (Vex256): Likewise.
 417         (VexNDS): Likewise.
 418         (VexNDD): Likewise.
 419         (VexW0): Likewise.
 420         (VexW1): Likewise.
 421         (Vex0F): Likewise.
 422         (Vex0F38): Likewise.
 423         (Vex0F3A): Likewise.
 424         (Vex3Sources): Likewise.
 425         (VexImmExt): Likewise.
 426         (SSE2AVX): Likewise.
 427         (RegYMM): Likewise.
 428         (Ymmword): Likewise.
 429         (Vex_Imm4): Likewise.
 430         (Implicit1stXmm0): Likewise.
 431         (CpuXsave): Updated.
 432         (CpuLM): Likewise.
 433         (ByteOkIntel): Likewise.
 434         (OldGcc): Likewise.
 435         (Control): Likewise.
 436         (Unspecified): Likewise.
 437         (OTMax): Likewise.
 438         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 439         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 440         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 441         vex3sources, veximmext and sse2avx.
 442         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 443
 444         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 445
 446         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 447
 448         * i386-init.h: Regenerated.
 449         * i386-tbl.h: Likewise.
 450
 451 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 452
 453         From  Robin Getz  <robin.getz@analog.com>
 454         * bfin-dis.c (bu32): Typedef.
 455         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 456         (constant_formats[]): Add uimm32 and huimm16.
 457         (fmtconst_val): New.
 458         (uimm32): Define.
 459         (huimm32): Define.
 460         (imm16_val): Define.
 461         (luimm16_val): Define.
 462         (struct saved_state): Define.
 463         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 464         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 465         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 466         (get_allreg): New.
 467         (decode_LDIMMhalf_0): Print out the whole register value.
 468
 469         From Jie Zhang  <jie.zhang@analog.com>
 470         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 471         multiply and multiply-accumulate to data register instruction.
 472
 473         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 474         c_imm32, c_huimm32e): Define.
 475         (constant_formats): Add flags for printing decimal, leading spaces, and
 476         exact symbols.
 477         (comment, parallel): Add global flags in all disassembly.
 478         (fmtconst): Take advantage of new flags, and print default in hex.
 479         (fmtconst_val): Likewise.
 480         (decode_macfunc): Be consistant with spaces, tabs, comments,
 481         capitalization in disassembly, fix minor coding style issues.
 482         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 483         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 484         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 485         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 486         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 487         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 488         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 489         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 490         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 491         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 492         _print_insn_bfin, print_insn_bfin): Likewise.
 493
 494 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 495
 496         * aclocal.m4: Regenerate.
 497         * configure: Likewise.
 498         * Makefile.in: Likewise.
 499
 500 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 501
 502         * Makefile.am: Run "make dep-am".
 503         * Makefile.in: Regenerate.
 504         * configure: Regenerate.
 505
 506 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 507
 508         * ppc-opc.c (powerpc_opcodes): Order and format.
 509
 510 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 511
 512         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 513         * i386-tbl.h: Regenerated.
 514
 515 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 516
 517         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 518         x86-64.
 519         * i386-tbl.h: Regenerated.
 520
 521 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 522
 523         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 524         and Fword for far indirect jmp. Allow Reg16 and Word for near
 525         indirect jmp on x86-64. Disallow Fword for lcall.
 526         * i386-tbl.h: Re-generate.
 527
 528 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 529
 530         * cr16-opc.c  (cr16_num_optab): Defined
 531
 532 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 533
 534         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 535         * i386-init.h: Regenerated.
 536
 537 2008-02-14  Nick Clifton  <nickc@redhat.com>
 538
 539         PR binutils/5524
 540         * configure.in (SHARED_LIBADD): Select the correct host specific
 541         file extension for shared libraries.
 542         * configure: Regenerate.
 543
 544 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 545
 546         * i386-opc.h (RegFlat): New.
 547         * i386-reg.tbl (flat): Add.
 548         * i386-tbl.h: Re-generate.
 549
 550 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 551
 552         * i386-dis.c (a_mode): New.
 553         (cond_jump_mode): Adjust.
 554         (Ma): Change to a_mode.
 555         (intel_operand_size): Handle a_mode.
 556         * i386-opc.tbl: Allow Dword and Qword for bound.
 557         * i386-tbl.h: Re-generate.
 558
 559 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 560
 561         * i386-gen.c (process_i386_registers): Process new fields.
 562         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 563         unsigned char. Add dw2_regnum and Dw2Inval.
 564         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 565         register names.
 566         * i386-tbl.h: Re-generate.
 567
 568 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 569
 570         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 571         * i386-init.h: Updated.
 572
 573 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 574
 575         * i386-gen.c (cpu_flags): Add CpuXsave.
 576
 577         * i386-opc.h (CpuXsave): New.
 578         (CpuLM): Updated.
 579         (i386_cpu_flags): Add cpuxsave.
 580
 581         * i386-dis.c (MOD_0FAE_REG_4): New.
 582         (RM_0F01_REG_2): Likewise.
 583         (MOD_0FAE_REG_5): Updated.
 584         (RM_0F01_REG_3): Likewise.
 585         (reg_table): Use MOD_0FAE_REG_4.
 586         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 587         for xrstor.
 588         (rm_table): Add RM_0F01_REG_2.
 589
 590         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 591         * i386-init.h: Regenerated.
 592         * i386-tbl.h: Likewise.
 593
 594 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 595
 596         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 597         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 598         * i386-tbl.h: Re-generate.
 599
 600 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 601
 602         PR 5715
 603         * configure: Regenerated.
 604
 605 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 606
 607         * mips-dis.c: Update copyright.
 608         (mips_arch_choices): Add Octeon.
 609         * mips-opc.c: Update copyright.
 610         (IOCT): New macro.
 611         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 612
 613 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 614
 615         * ppc-opc.c: Support optional L form mtmsr.
 616
 617 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 618
 619         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 620
 621 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 622
 623         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 624         * i386-init.h: Regenerated.
 625
 626 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 627
 628         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 629         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 630
 631 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 632
 633         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 634         (cpu_flags): Likewise.
 635
 636         * i386-opc.h (CpuMMX2): Removed.
 637         (CpuSSE): Updated.
 638
 639         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 640         * i386-init.h: Regenerated.
 641         * i386-tbl.h: Likewise.
 642
 643 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 644
 645         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 646         CPU_SMX_FLAGS.
 647         * i386-init.h: Regenerated.
 648
 649 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 650
 651         * i386-opc.tbl: Use Qword on movddup.
 652         * i386-tbl.h: Regenerated.
 653
 654 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 655
 656         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 657         * i386-tbl.h: Regenerated.
 658
 659 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 660
 661         * i386-dis.c (Mx): New.
 662         (PREFIX_0FC3): Likewise.
 663         (PREFIX_0FC7_REG_6): Updated.
 664         (dis386_twobyte): Use PREFIX_0FC3.
 665         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 666         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 667         movntss.
 668
 669 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 670
 671         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 672         (operand_types): Add Mem.
 673
 674         * i386-opc.h (IntelSyntax): New.
 675         * i386-opc.h (Mem): New.
 676         (Byte): Updated.
 677         (Opcode_Modifier_Max): Updated.
 678         (i386_opcode_modifier): Add intelsyntax.
 679         (i386_operand_type): Add mem.
 680
 681         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 682         instructions.
 683
 684         * i386-reg.tbl: Add size for accumulator.
 685
 686         * i386-init.h: Regenerated.
 687         * i386-tbl.h: Likewise.
 688
 689 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 690
 691         * i386-opc.h (Byte): Fix a typo.
 692
 693 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 694
 695         PR gas/5534
 696         * i386-gen.c (operand_type_init): Add Dword to
 697         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 698         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 699         Qword and Xmmword.
 700         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 701         Xmmword, Unspecified and Anysize.
 702         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 703         an alias of Xmmword.
 704
 705         * i386-opc.h (CheckSize): Removed.
 706         (Byte): Updated.
 707         (Word): Likewise.
 708         (Dword): Likewise.
 709         (Qword): Likewise.
 710         (Xmmword): Likewise.
 711         (FWait): Updated.
 712         (OTMax): Likewise.
 713         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 714         qword and xmmword.
 715         (Fword): New.
 716         (TBYTE): Likewise.
 717         (Unspecified): Likewise.
 718         (Anysize): Likewise.
 719         (i386_operand_type): Add byte, word, dword, fword, qword,
 720         tbyte xmmword, unspecified and anysize.
 721
 722         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 723         Tbyte, Xmmword, Unspecified and Anysize.
 724
 725         * i386-reg.tbl: Add size for accumulator.
 726
 727         * i386-init.h: Regenerated.
 728         * i386-tbl.h: Likewise.
 729
 730 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 731
 732         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 733         (REG_0F18): Updated.
 734         (reg_table): Updated.
 735         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 736         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 737
 738 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 739
 740         * i386-gen.c (set_bitfield): Use fail () on error.
 741
 742 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 743
 744         * i386-gen.c (lineno): New.
 745         (filename): Likewise.
 746         (set_bitfield): Report filename and line numer on error.
 747         (process_i386_opcodes): Set filename and update lineno.
 748         (process_i386_registers): Likewise.
 749
 750 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 751
 752         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 753         ATTSyntax.
 754
 755         * i386-opc.h (IntelMnemonic): Renamed to ..
 756         (ATTSyntax): This
 757         (Opcode_Modifier_Max): Updated.
 758         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 759         and intelsyntax.
 760
 761         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 762         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 763         * i386-tbl.h: Regenerated.
 764
 765 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 766
 767         * i386-gen.c: Update copyright to 2008.
 768         * i386-opc.h: Likewise.
 769         * i386-opc.tbl: Likewise.
 770
 771         * i386-init.h: Regenerated.
 772         * i386-tbl.h: Likewise.
 773
 774 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 775
 776         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 777         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 778         * i386-tbl.h: Regenerated.
 779
 780 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 781
 782         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 783         CpuSSE4_2_Or_ABM.
 784         (cpu_flags): Likewise.
 785
 786         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 787         (CpuSSE4_2_Or_ABM): Likewise.
 788         (CpuLM): Updated.
 789         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 790
 791         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 792         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 793         and CpuPadLock, respectively.
 794         * i386-init.h: Regenerated.
 795         * i386-tbl.h: Likewise.
 796
 797 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 798
 799         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 800
 801         * i386-opc.h (No_xSuf): Removed.
 802         (CheckSize): Updated.
 803
 804         * i386-tbl.h: Regenerated.
 805
 806 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 807
 808         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 809         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 810         CPU_SSE5_FLAGS.
 811         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 812
 813         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 814         (CpuLM): Updated.
 815         (i386_cpu_flags): Add cpusse4_2_or_abm.
 816
 817         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 818         CpuABM|CpuSSE4_2 on popcnt.
 819         * i386-init.h: Regenerated.
 820         * i386-tbl.h: Likewise.
 821
 822 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 823
 824         * i386-opc.h: Update comments.
 825
 826 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 827
 828         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 829         * i386-opc.h: Likewise.
 830         * i386-opc.tbl: Likewise.
 831
 832 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 833
 834         PR gas/5534
 835         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 836         Byte, Word, Dword, QWord and Xmmword.
 837
 838         * i386-opc.h (No_xSuf): New.
 839         (CheckSize): Likewise.
 840         (Byte): Likewise.
 841         (Word): Likewise.
 842         (Dword): Likewise.
 843         (QWord): Likewise.
 844         (Xmmword): Likewise.
 845         (FWait): Updated.
 846         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 847         Dword, QWord and Xmmword.
 848
 849         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 850         used.
 851         * i386-tbl.h: Regenerated.
 852
 853 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 854
 855         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 856         From Miod Vallat.
 857
 858 For older changes see ChangeLog-2007
 859 \f
 860 Local Variables:
 861 mode: change-log
 862 left-margin: 8
 863 fill-column: 74
 864 version-control: never
 865 End: