1 2008-12-18 H.J. Lu <hongjiu.lu@intel.com>
3 * i386-dis.c (mnemonicendp): New.
5 (print_insn): Use mnemonicendp.
6 (OP_3DNowSuffix): Likewise.
8 (CMPXCHG8B_Fixup): Likewise.
9 (CRC32_Fixup): Likewise.
10 (OP_DREX_FCMP): Likewise.
11 (OP_DREX_ICMP): Likewise.
12 (VZERO_Fixup): Likewise.
13 (VCMP_Fixup): Likewise.
14 (PCLMUL_Fixup): Likewise.
15 (VPERMIL2_Fixup): Likewise.
16 (MOVBE_Fixup): Likewise.
17 (putop): Update mnemonicendp.
18 (oappend): Use stpcpy.
19 (simd_cmp_op): Changed to struct op.
20 (vex_cmp_op): Likewise.
21 (pclmul_op): Likewise.
22 (vpermil2_op): Likewise.
24 2008-12-15 Richard Earnshaw <rearnsha@arm.com>
26 * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
29 2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
31 * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
33 2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
35 * i386-dis.c (putop): Remove strayed comments.
37 2008-12-04 Ben Elliston <bje@au.ibm.com>
39 * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
41 (print_ppc_disassembler_options): Update usage.
42 * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
44 (PPCCHLK64): Likewise.
45 (powerpc_opcodes): Remove all BOOKE64 instructions.
47 2008-11-28 Joshua Kinard <kumba@gentoo.org>
49 * mips-dis.c (mips_arch_choices): Add r14000, r16000.
51 2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
53 * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
54 adjusted the mask for 32-bit branch instruction.
56 2008-11-27 Alan Modra <amodra@bigpond.net.au>
58 * ppc-opc.c (extract_sprg): Correct operand range check.
60 2008-11-26 Andreas Schwab <schwab@suse.de>
62 * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
63 (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
64 (save_printer, save_print_address): Remove.
65 (fetch_data): Don't use them.
66 (match_insn_m68k): Always restore printing functions.
67 (print_insn_m68k): Don't save/restore printing functions.
69 2008-11-25 Nick Clifton <nickc@redhat.com>
71 * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
73 2008-11-18 Catherine Moore <clm@codesourcery.com>
75 * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
77 (neon_opcodes): Likewise.
78 (print_insn_coprocessor): Print 't' or 'b' for vcvt
81 2008-11-14 Tristan Gingold <gingold@adacore.com>
83 * makefile.vms (OBJS): Update list of objects.
87 2008-11-06 Chao-ying Fu <fu@mips.com>
89 * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
91 (sync): New instruction with 5-bit sync type.
92 * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
94 2008-11-06 Nick Clifton <nickc@redhat.com>
96 * avr-dis.c: Replace uses of sprintf without a format string with
99 2008-11-03 H.J. Lu <hongjiu.lu@intel.com>
101 * i386-opc.tbl: Add cmovpe and cmovpo.
102 * i386-tbl.h: Regenerated.
104 2008-10-22 Nick Clifton <nickc@redhat.com>
107 * configure.in (SHARED_LIBADD): Revert previous change.
108 Add a comment explaining why.
109 (SHARED_DEPENDENCIES): Revert previous change.
110 * configure: Regenerate.
112 2008-10-10 Nick Clifton <nickc@redhat.com>
115 * configure.in (SHARED_LIBADD): Add libiberty.a.
116 (SHARED_DEPENDENCIES): Add libiberty.a.
118 2008-09-30 H.J. Lu <hongjiu.lu@intel.com>
120 * i386-gen.c: Include "hashtab.h".
121 (next_field): Take a new argument, last. Check last.
122 (process_i386_cpu_flag): Updated.
123 (process_i386_opcode_modifier): Likewise.
124 (process_i386_operand_type): Likewise.
125 (process_i386_registers): Likewise.
126 (output_i386_opcode): New.
127 (opcode_hash_entry): Likewise.
128 (opcode_hash_table): Likewise.
129 (opcode_hash_hash): Likewise.
130 (opcode_hash_eq): Likewise.
131 (process_i386_opcodes): Use opcode hash table and opcode array.
133 2008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
135 * s390-opc.txt (stdy, stey): Fix description
137 2008-09-30 Alan Modra <amodra@bigpond.net.au>
139 * Makefile.am: Run "make dep-am".
140 * Makefile.in: Regenerate.
142 2008-09-29 H.J. Lu <hongjiu.lu@intel.com>
144 * aclocal.m4: Regenerated.
145 * configure: Likewise.
146 * Makefile.in: Likewise.
148 2008-09-29 Nick Clifton <nickc@redhat.com>
150 * po/vi.po: Updated Vietnamese translation.
151 * po/fr.po: Updated French translation.
153 2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
155 * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
156 (cfxr, cfdr, cfer, clclu): Add esa flag.
157 (sqd): Instruction added.
158 (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
159 * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
161 2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
163 * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
164 (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
166 2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
168 * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
169 * i386-tbl.h: Regenerated.
171 2008-08-28 Jan Beulich <jbeulich@novell.com>
173 * i386-dis.c (dis386): Adjust far return mnemonics.
174 * i386-opc.tbl: Add retf.
175 * i386-tbl.h: Re-generate.
177 2008-08-28 Jan Beulich <jbeulich@novell.com>
179 * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
181 2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
183 * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
184 * ia64-gen.c (lookup_specifier): Likewise.
186 * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
187 * ia64-raw.tbl: Likewise.
188 * ia64-waw.tbl: Likewise.
189 * ia64-asmtab.c: Regenerated.
191 2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
193 * i386-opc.tbl: Correct fidivr operand size.
195 * i386-tbl.h: Regenerated.
197 2008-08-24 Alan Modra <amodra@bigpond.net.au>
199 * configure.in: Update a number of obsolete autoconf macros.
200 * aclocal.m4: Regenerate.
202 2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
204 AVX Programming Reference (August, 2008)
205 * i386-dis.c (PREFIX_VEX_38DB): New.
206 (PREFIX_VEX_38DC): Likewise.
207 (PREFIX_VEX_38DD): Likewise.
208 (PREFIX_VEX_38DE): Likewise.
209 (PREFIX_VEX_38DF): Likewise.
210 (PREFIX_VEX_3ADF): Likewise.
211 (VEX_LEN_38DB_P_2): Likewise.
212 (VEX_LEN_38DC_P_2): Likewise.
213 (VEX_LEN_38DD_P_2): Likewise.
214 (VEX_LEN_38DE_P_2): Likewise.
215 (VEX_LEN_38DF_P_2): Likewise.
216 (VEX_LEN_3ADF_P_2): Likewise.
217 (PREFIX_VEX_3A04): Updated.
218 (VEX_LEN_3A06_P_2): Likewise.
219 (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
220 PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
221 (x86_64_table): Likewise.
222 (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
223 VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
226 * i386-opc.tbl: Add AES + AVX instructions.
227 * i386-init.h: Regenerated.
228 * i386-tbl.h: Likewise.
230 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
232 * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
233 * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
235 2008-08-15 Alan Modra <amodra@bigpond.net.au>
238 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
239 * Makefile.in: Regenerate.
240 * aclocal.m4: Regenerate.
241 * config.in: Regenerate.
242 * configure: Regenerate.
244 2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
247 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
249 2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
251 * i386-opc.tbl: Add syscall and sysret for Cpu64.
253 * i386-tbl.h: Regenerated.
255 2008-08-04 Alan Modra <amodra@bigpond.net.au>
257 * Makefile.am (POTFILES.in): Set LC_ALL=C.
258 * Makefile.in: Regenerate.
259 * po/POTFILES.in: Regenerate.
261 2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
263 * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
264 (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
265 (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
266 * ppc-opc.c (insert_xt6): New static function.
267 (extract_xt6): Likewise.
268 (insert_xa6): Likewise.
269 (extract_xa6: Likewise.
270 (insert_xb6): Likewise.
271 (extract_xb6): Likewise.
272 (insert_xb6s): Likewise.
273 (extract_xb6s): Likewise.
274 (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
275 XX3DM_MASK, PPCVSX): New.
276 (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
277 "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
279 2008-08-01 Pedro Alves <pedro@codesourcery.com>
281 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
282 * Makefile.in: Regenerate.
284 2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
286 * i386-reg.tbl: Use Dw2Inval on AVX registers.
287 * i386-tbl.h: Regenerated.
289 2008-07-30 Michael J. Eager <eager@eagercon.com>
291 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
292 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
293 (insert_sprg, PPC405): Use PPC_OPCODE_405.
294 (powerpc_opcodes): Add Xilinx APU related opcodes.
296 2008-07-30 Alan Modra <amodra@bigpond.net.au>
298 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
300 2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
302 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
304 2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
306 * mips-opc.c (CP): New macro.
307 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
308 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
309 dmtc2 Octeon instructions.
311 2008-07-07 Stan Shebs <stan@codesourcery.com>
313 * dis-init.c (init_disassemble_info): Init endian_code field.
314 * arm-dis.c (print_insn): Disassemble code according to
315 setting of endian_code.
316 (print_insn_big_arm): Detect when BE8 extension flag has been set.
318 2008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
320 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
323 2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
325 * ppc-dis.c (powerpc_init_dialect): Handle -M464.
326 (print_ppc_disassembler_options): Likewise.
327 * ppc-opc.c (PPC464): Define.
328 (powerpc_opcodes): Add mfdcrux and mtdcrux.
330 2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
332 * configure: Regenerate.
334 2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
336 * ppc-dis.c (print_insn_powerpc): Update prototye to use new
338 (struct dis_private): New.
339 (POWERPC_DIALECT): New define.
340 (powerpc_dialect): Renamed to...
341 (powerpc_init_dialect): This. Update to use ppc_cpu_t and
343 (print_insn_big_powerpc): Update for using structure in
345 (print_insn_little_powerpc): Likewise.
346 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
347 (skip_optional_operands): Likewise.
348 (print_insn_powerpc): Likewise. Remove initialization of dialect.
349 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
350 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
351 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
352 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
353 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
354 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
355 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
356 param to be of type ppc_cpu_t. Update prototype.
358 2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
360 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
362 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
363 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
364 syncw, syncws, vm3mulu, vm0 and vmulu.
366 * mips-dis.c (print_insn_args): Handle field descriptor +Q.
367 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
370 2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
372 * i386-opc.tbl: Add vmovd with 64bit operand.
373 * i386-tbl.h: Regenerated.
375 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
377 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
379 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
381 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
382 * i386-tbl.h: Regenerated.
384 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
387 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
388 into 32bit and 64bit. Remove Reg64|Qword and add
389 IgnoreSize|No_qSuf on 32bit version.
390 * i386-tbl.h: Regenerated.
392 2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
394 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
395 * i386-tbl.h: Regenerated.
397 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
399 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
401 2008-05-14 Alan Modra <amodra@bigpond.net.au>
403 * Makefile.am: Run "make dep-am".
404 * Makefile.in: Regenerate.
406 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
408 * i386-dis.c (MOVBE_Fixup): New.
410 (PREFIX_0F3880): Likewise.
411 (PREFIX_0F3881): Likewise.
412 (PREFIX_0F38F0): Updated.
413 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
414 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
415 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
417 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
419 (cpu_flags): Add CpuMovbe and CpuEPT.
421 * i386-opc.h (CpuMovbe): New.
424 (i386_cpu_flags): Add cpumovbe and cpuept.
426 * i386-opc.tbl: Add entries for movbe and EPT instructions.
427 * i386-init.h: Regenerated.
428 * i386-tbl.h: Likewise.
430 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
432 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
433 the two drem and the two dremu macros.
435 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
437 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
438 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
439 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
440 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
442 2008-04-25 David S. Miller <davem@davemloft.net>
444 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
445 instead of %sys_tick_cmpr, as suggested in architecture manuals.
447 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
449 * aclocal.m4: Regenerate.
450 * configure: Regenerate.
452 2008-04-23 David S. Miller <davem@davemloft.net>
454 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
456 (prefetch_table): Add missing values.
458 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
460 * i386-gen.c (opcode_modifiers): Add NoAVX.
462 * i386-opc.h (NoAVX): New.
464 (i386_opcode_modifier): Add noavx.
466 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
467 instructions which don't have AVX equivalent.
468 * i386-tbl.h: Regenerated.
470 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
472 * i386-dis.c (OP_VEX_FMA): New.
473 (OP_EX_VexImmW): Likewise.
475 (Vex128FMA): Likewise.
476 (EXVexImmW): Likewise.
477 (get_vex_imm8): Likewise.
478 (OP_EX_VexReg): Likewise.
479 (vex_i4_done): Renamed to ...
481 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
482 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
484 (print_insn): Updated.
485 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
486 (OP_REG_VexI4): Check invalid high registers.
488 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
489 Michael Meissner <michael.meissner@amd.com>
491 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
492 * i386-tbl.h: Regenerate from i386-opc.tbl.
494 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
496 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
497 accept Power E500MC instructions.
498 (print_ppc_disassembler_options): Document -Me500mc.
499 * ppc-opc.c (DUIS, DUI, T): New.
500 (XRT, XRTRA): Likewise.
502 (powerpc_opcodes): Add new Power E500MC instructions.
504 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
506 * s390-dis.c (init_disasm): Evaluate disassembler_options.
507 (print_s390_disassembler_options): New function.
508 * disassemble.c (disassembler_usage): Invoke
509 print_s390_disassembler_options.
511 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
513 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
514 of local variables used for mnemonic parsing: prefix, suffix and
517 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
519 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
520 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
521 (s390_crb_extensions): New extensions table.
522 (insertExpandedMnemonic): Handle '$' tag.
523 * s390-opc.txt: Remove conditional jump variants which can now
524 be expanded automatically.
525 Replace '*' tag with '$' in the compare and branch instructions.
527 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
529 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
530 (PREFIX_VEX_3AXX): Likewis.
532 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
534 * i386-opc.tbl: Remove 4 extra blank lines.
536 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
538 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
539 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
540 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
541 * i386-opc.tbl: Likewise.
543 * i386-opc.h (CpuCLMUL): Renamed to ...
546 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
548 * i386-init.h: Regenerated.
550 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
552 * i386-dis.c (OP_E_register): New.
553 (OP_E_memory): Likewise.
555 (OP_EX_Vex): Likewise.
556 (OP_EX_VexW): Likewise.
557 (OP_XMM_Vex): Likewise.
558 (OP_XMM_VexW): Likewise.
559 (OP_REG_VexI4): Likewise.
560 (PCLMUL_Fixup): Likewise.
561 (VEXI4_Fixup): Likewise.
562 (VZERO_Fixup): Likewise.
563 (VCMP_Fixup): Likewise.
564 (VPERMIL2_Fixup): Likewise.
565 (rex_original): Likewise.
566 (rex_ignored): Likewise.
587 (VPERMIL2): Likewise.
588 (xmm_mode): Likewise.
589 (xmmq_mode): Likewise.
590 (ymmq_mode): Likewise.
591 (vex_mode): Likewise.
592 (vex128_mode): Likewise.
593 (vex256_mode): Likewise.
594 (USE_VEX_C4_TABLE): Likewise.
595 (USE_VEX_C5_TABLE): Likewise.
596 (USE_VEX_LEN_TABLE): Likewise.
597 (VEX_C4_TABLE): Likewise.
598 (VEX_C5_TABLE): Likewise.
599 (VEX_LEN_TABLE): Likewise.
600 (REG_VEX_XX): Likewise.
601 (MOD_VEX_XXX): Likewise.
602 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
603 (PREFIX_0F3A44): Likewise.
604 (PREFIX_0F3ADF): Likewise.
605 (PREFIX_VEX_XXX): Likewise.
607 (VEX_OF38): Likewise.
608 (VEX_OF3A): Likewise.
609 (VEX_LEN_XXX): Likewise.
611 (need_vex): Likewise.
612 (need_vex_reg): Likewise.
613 (vex_i4_done): Likewise.
614 (vex_table): Likewise.
615 (vex_len_table): Likewise.
616 (OP_REG_VexI4): Likewise.
617 (vex_cmp_op): Likewise.
618 (pclmul_op): Likewise.
619 (vpermil2_op): Likewise.
622 (PREFIX_0F38F0): Likewise.
623 (PREFIX_0F3A60): Likewise.
624 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
625 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
626 and PREFIX_VEX_XXX entries.
627 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
628 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
630 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
631 Add MOD_VEX_XXX entries.
632 (ckprefix): Initialize rex_original and rex_ignored. Store the
633 REX byte in rex_original.
634 (get_valid_dis386): Handle the implicit prefix in VEX prefix
635 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
636 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
637 calling get_valid_dis386. Use rex_original and rex_ignored when
639 (putop): Handle "XY".
640 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
642 (OP_E_extended): Updated to use OP_E_register and
644 (OP_XMM): Handle VEX.
646 (XMM_Fixup): Likewise.
647 (CMP_Fixup): Use ARRAY_SIZE.
649 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
650 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
651 (operand_type_init): Add OPERAND_TYPE_REGYMM and
652 OPERAND_TYPE_VEX_IMM4.
653 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
654 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
655 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
656 VexImmExt and SSE2AVX.
657 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
659 * i386-opc.h (CpuAVX): New.
661 (CpuCLMUL): Likewise.
672 (Vex3Sources): Likewise.
673 (VexImmExt): Likewise.
677 (Vex_Imm4): Likewise.
678 (Implicit1stXmm0): Likewise.
681 (ByteOkIntel): Likewise.
684 (Unspecified): Likewise.
686 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
687 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
688 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
689 vex3sources, veximmext and sse2avx.
690 (i386_operand_type): Add regymm, ymmword and vex_imm4.
692 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
694 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
696 * i386-init.h: Regenerated.
697 * i386-tbl.h: Likewise.
699 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
701 From Robin Getz <robin.getz@analog.com>
702 * bfin-dis.c (bu32): Typedef.
703 (enum const_forms_t): Add c_uimm32 and c_huimm32.
704 (constant_formats[]): Add uimm32 and huimm16.
709 (luimm16_val): Define.
710 (struct saved_state): Define.
711 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
712 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
713 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
715 (decode_LDIMMhalf_0): Print out the whole register value.
717 From Jie Zhang <jie.zhang@analog.com>
718 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
719 multiply and multiply-accumulate to data register instruction.
721 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
722 c_imm32, c_huimm32e): Define.
723 (constant_formats): Add flags for printing decimal, leading spaces, and
725 (comment, parallel): Add global flags in all disassembly.
726 (fmtconst): Take advantage of new flags, and print default in hex.
727 (fmtconst_val): Likewise.
728 (decode_macfunc): Be consistant with spaces, tabs, comments,
729 capitalization in disassembly, fix minor coding style issues.
730 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
731 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
732 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
733 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
734 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
735 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
736 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
737 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
738 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
739 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
740 _print_insn_bfin, print_insn_bfin): Likewise.
742 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
744 * aclocal.m4: Regenerate.
745 * configure: Likewise.
746 * Makefile.in: Likewise.
748 2008-03-13 Alan Modra <amodra@bigpond.net.au>
750 * Makefile.am: Run "make dep-am".
751 * Makefile.in: Regenerate.
752 * configure: Regenerate.
754 2008-03-07 Alan Modra <amodra@bigpond.net.au>
756 * ppc-opc.c (powerpc_opcodes): Order and format.
758 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
760 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
761 * i386-tbl.h: Regenerated.
763 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
765 * i386-opc.tbl: Disallow 16-bit near indirect branches for
767 * i386-tbl.h: Regenerated.
769 2008-02-21 Jan Beulich <jbeulich@novell.com>
771 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
772 and Fword for far indirect jmp. Allow Reg16 and Word for near
773 indirect jmp on x86-64. Disallow Fword for lcall.
774 * i386-tbl.h: Re-generate.
776 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
778 * cr16-opc.c (cr16_num_optab): Defined
780 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
782 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
783 * i386-init.h: Regenerated.
785 2008-02-14 Nick Clifton <nickc@redhat.com>
788 * configure.in (SHARED_LIBADD): Select the correct host specific
789 file extension for shared libraries.
790 * configure: Regenerate.
792 2008-02-13 Jan Beulich <jbeulich@novell.com>
794 * i386-opc.h (RegFlat): New.
795 * i386-reg.tbl (flat): Add.
796 * i386-tbl.h: Re-generate.
798 2008-02-13 Jan Beulich <jbeulich@novell.com>
800 * i386-dis.c (a_mode): New.
801 (cond_jump_mode): Adjust.
802 (Ma): Change to a_mode.
803 (intel_operand_size): Handle a_mode.
804 * i386-opc.tbl: Allow Dword and Qword for bound.
805 * i386-tbl.h: Re-generate.
807 2008-02-13 Jan Beulich <jbeulich@novell.com>
809 * i386-gen.c (process_i386_registers): Process new fields.
810 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
811 unsigned char. Add dw2_regnum and Dw2Inval.
812 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
814 * i386-tbl.h: Re-generate.
816 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
818 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
819 * i386-init.h: Updated.
821 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
823 * i386-gen.c (cpu_flags): Add CpuXsave.
825 * i386-opc.h (CpuXsave): New.
827 (i386_cpu_flags): Add cpuxsave.
829 * i386-dis.c (MOD_0FAE_REG_4): New.
830 (RM_0F01_REG_2): Likewise.
831 (MOD_0FAE_REG_5): Updated.
832 (RM_0F01_REG_3): Likewise.
833 (reg_table): Use MOD_0FAE_REG_4.
834 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
836 (rm_table): Add RM_0F01_REG_2.
838 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
839 * i386-init.h: Regenerated.
840 * i386-tbl.h: Likewise.
842 2008-02-11 Jan Beulich <jbeulich@novell.com>
844 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
845 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
846 * i386-tbl.h: Re-generate.
848 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
851 * configure: Regenerated.
853 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
855 * mips-dis.c: Update copyright.
856 (mips_arch_choices): Add Octeon.
857 * mips-opc.c: Update copyright.
859 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
861 2008-01-29 Alan Modra <amodra@bigpond.net.au>
863 * ppc-opc.c: Support optional L form mtmsr.
865 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
867 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
869 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
871 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
872 * i386-init.h: Regenerated.
874 2008-01-23 Tristan Gingold <gingold@adacore.com>
876 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
877 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
879 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
881 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
882 (cpu_flags): Likewise.
884 * i386-opc.h (CpuMMX2): Removed.
887 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
888 * i386-init.h: Regenerated.
889 * i386-tbl.h: Likewise.
891 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
893 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
895 * i386-init.h: Regenerated.
897 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
899 * i386-opc.tbl: Use Qword on movddup.
900 * i386-tbl.h: Regenerated.
902 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
904 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
905 * i386-tbl.h: Regenerated.
907 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
909 * i386-dis.c (Mx): New.
910 (PREFIX_0FC3): Likewise.
911 (PREFIX_0FC7_REG_6): Updated.
912 (dis386_twobyte): Use PREFIX_0FC3.
913 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
914 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
917 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
919 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
920 (operand_types): Add Mem.
922 * i386-opc.h (IntelSyntax): New.
923 * i386-opc.h (Mem): New.
925 (Opcode_Modifier_Max): Updated.
926 (i386_opcode_modifier): Add intelsyntax.
927 (i386_operand_type): Add mem.
929 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
932 * i386-reg.tbl: Add size for accumulator.
934 * i386-init.h: Regenerated.
935 * i386-tbl.h: Likewise.
937 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
939 * i386-opc.h (Byte): Fix a typo.
941 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
944 * i386-gen.c (operand_type_init): Add Dword to
945 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
946 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
948 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
949 Xmmword, Unspecified and Anysize.
950 (set_bitfield): Make Mmword an alias of Qword. Make Oword
953 * i386-opc.h (CheckSize): Removed.
961 (i386_opcode_modifier): Remove checksize, byte, word, dword,
965 (Unspecified): Likewise.
967 (i386_operand_type): Add byte, word, dword, fword, qword,
968 tbyte xmmword, unspecified and anysize.
970 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
971 Tbyte, Xmmword, Unspecified and Anysize.
973 * i386-reg.tbl: Add size for accumulator.
975 * i386-init.h: Regenerated.
976 * i386-tbl.h: Likewise.
978 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
980 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
982 (reg_table): Updated.
983 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
984 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
986 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
988 * i386-gen.c (set_bitfield): Use fail () on error.
990 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
992 * i386-gen.c (lineno): New.
993 (filename): Likewise.
994 (set_bitfield): Report filename and line numer on error.
995 (process_i386_opcodes): Set filename and update lineno.
996 (process_i386_registers): Likewise.
998 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
1000 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
1003 * i386-opc.h (IntelMnemonic): Renamed to ..
1005 (Opcode_Modifier_Max): Updated.
1006 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
1009 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
1010 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
1011 * i386-tbl.h: Regenerated.
1013 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
1015 * i386-gen.c: Update copyright to 2008.
1016 * i386-opc.h: Likewise.
1017 * i386-opc.tbl: Likewise.
1019 * i386-init.h: Regenerated.
1020 * i386-tbl.h: Likewise.
1022 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
1024 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
1025 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
1026 * i386-tbl.h: Regenerated.
1028 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
1030 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
1032 (cpu_flags): Likewise.
1034 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
1035 (CpuSSE4_2_Or_ABM): Likewise.
1037 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
1039 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
1040 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
1041 and CpuPadLock, respectively.
1042 * i386-init.h: Regenerated.
1043 * i386-tbl.h: Likewise.
1045 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
1047 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
1049 * i386-opc.h (No_xSuf): Removed.
1050 (CheckSize): Updated.
1052 * i386-tbl.h: Regenerated.
1054 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1056 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
1057 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1059 (cpu_flags): Add CpuSSE4_2_Or_ABM.
1061 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1063 (i386_cpu_flags): Add cpusse4_2_or_abm.
1065 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1066 CpuABM|CpuSSE4_2 on popcnt.
1067 * i386-init.h: Regenerated.
1068 * i386-tbl.h: Likewise.
1070 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1072 * i386-opc.h: Update comments.
1074 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1076 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1077 * i386-opc.h: Likewise.
1078 * i386-opc.tbl: Likewise.
1080 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1083 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1084 Byte, Word, Dword, QWord and Xmmword.
1086 * i386-opc.h (No_xSuf): New.
1087 (CheckSize): Likewise.
1092 (Xmmword): Likewise.
1094 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1095 Dword, QWord and Xmmword.
1097 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1099 * i386-tbl.h: Regenerated.
1101 2008-01-02 Mark Kettenis <kettenis@gnu.org>
1103 * m88k-dis.c (instructions): Fix fcvt.* instructions.
1106 For older changes see ChangeLog-2007
1112 version-control: never