opcodes/ChangeLog

   1 2012-11-14  Edgar E. Iglesias <edgar.iglesias@gmail.com>
   2
   3         * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add clz insn
   4         * microblaze-opcm.h (microblaze_instr): add clz
   5
   6 2012-11-14  Edgar E. Iglesias <edgar.iglesias@gmail.com>
   7
   8         * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add lbur,
   9         lhur, lwr, sbr, shr, swr
  10         * microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr,
  11         swr
  12
  13 2012-11-09  Nick Clifton  <nickc@redhat.com>
  14
  15         * configure.in: Add bfd_v850_rh850_arch.
  16         * configure: Regenerate.
  17         * disassemble.c (disassembler): Likewise.
  18
  19 2012-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  20
  21         * aarch64-opc.h (gen_mask): Remove trailing redundant `;'.
  22         * ia64-gen.c (fetch_insn_class): Likewise.
  23
  24 2012-11-08  Alan Modra  <amodra@gmail.com>
  25
  26         * po/POTFILES.in: Regenerate.
  27
  28 2012-11-05  Alan Modra  <amodra@gmail.com>
  29
  30         * configure.in: Apply 2012-09-10 change to config.in here.
  31
  32 2012-10-26  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  33
  34         * s390-mkopc.c: Accept empty lines in s390-opc.txt.
  35         * s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2
  36         and RRF_RMRR.
  37         * s390-opc.txt: Add new instructions.  New instruction type for lptea.
  38
  39 2012-10-26  Christian Groessler  <chris@groessler.org>
  40
  41         * z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
  42         trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb).  Remove
  43         non-existing opcode trtrb.
  44         * z8k-opc.h: Regenerate.
  45
  46 2012-10-26  Alan Modra  <amodra@gmail.com>
  47
  48         * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.
  49
  50 2012-10-24  Roland McGrath  <mcgrathr@google.com>
  51
  52         * i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
  53         set rex_used to rex.
  54
  55 2012-10-22  Peter Bergner  <bergner@vnet.ibm.com>
  56
  57         * ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
  58
  59 2012-10-18  Tom Tromey  <tromey@redhat.com>
  60
  61         * tic54x-dis.c (print_instruction): Don't use K&R style.
  62         (print_parallel_instruction, sprint_dual_address)
  63         (sprint_indirect_address, sprint_direct_address, sprint_mmr)
  64         (sprint_cc2, sprint_condition): Likewise.
  65
  66 2012-10-18  Kai Tietz  <ktietz@redhat.com>
  67
  68         * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
  69         value with a default.
  70         (do_special_encoding): Likewise.
  71         (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
  72         variables with default.
  73         * arc-dis.c (write_comments_): Don't use strncat due
  74         size of state->commentBuffer pointer isn't predictable.
  75
  76 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
  77
  78         * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
  79         rmr_el3; remove daifset and daifclr.
  80
  81 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
  82
  83         * aarch64-opc.c (operand_general_constraint_met_p): Change to check
  84         the alignment of addr.offset.imm instead of that of shifter.amount for
  85         operand type AARCH64_OPND_ADDR_UIMM12.
  86
  87 2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  88
  89         * arm-dis.c: Use preferred form of vrint instruction variants
  90         for disassembly.
  91
  92 2012-10-09  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
  93
  94         * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
  95         * i386-init.h: Regenerated.
  96
  97 2012-10-05  Peter Bergner  <bergner@vnet.ibm.com>
  98
  99         * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
 100         * ppc-opc.c (VBA): New define.
 101         (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
 102         mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
 103
 104 2012-10-04  Nick Clifton  <nickc@redhat.com>
 105
 106         * v850-dis.c (disassemble): Place square parentheses around second
 107         register operand of clr1, not1, set1 and tst1 instructions.
 108
 109 2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 110
 111         * s390-mkopc.c: Support new option zEC12.
 112         * s390-opc.c: Add new instruction formats.
 113         * s390-opc.txt: Add new instructions for zEC12.
 114
 115 2012-09-27  Anthony Green  <green@moxielogic.com>
 116
 117         * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
 118         * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
 119
 120 2012-09-25  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 121
 122         * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
 123         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
 124         and CPU_BTVER2_FLAGS.
 125         * i386-init.h: Regenerated.
 126
 127 2012-09-20  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 128
 129         * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
 130         CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
 131         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
 132         CPU_BTVER2_FLAGS.  Add CPU_CX16_FLAGS.
 133         (cpu_flags): Add CpuCX16.
 134         * i386-opc.h (CpuCX16): New.
 135         (i386_cpu_flags): Add cpucx16.
 136         * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
 137         * i386-tbl.h: Regenerate.
 138         * i386-init.h: Likewise.
 139
 140 2012-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 141
 142         * arm-dis.c: Changed ldra and strl-form mnemonics
 143         to lda and stl-form.
 144
 145 2012-09-18  Chao-ying Fu  <fu@mips.com>
 146
 147         * micromips-opc.c (micromips_opcodes): Correct the encoding of
 148         the "swxc1" instruction.
 149
 150 2012-09-17  Yufeng Zhang  <yufeng.zhang@arm.com>
 151
 152         * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
 153         the parameter 'inst'.
 154         (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
 155         (convert_mov_to_movewide): Change to assert (0) when
 156         aarch64_wide_constant_p returns FALSE.
 157
 158 2012-09-14  David Edelsohn  <dje.gcc@gmail.com>
 159
 160         * configure: Regenerate.
 161
 162 2012-09-14  Anthony Green  <green@moxielogic.com>
 163
 164         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
 165         the address after the branch instruction.
 166
 167 2012-09-13  Anthony Green  <green@moxielogic.com>
 168
 169         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
 170
 171 2012-09-10  Matthias Klose  <doko@ubuntu.com>
 172
 173         * config.in: Disable sanity check for kfreebsd.
 174
 175 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
 176
 177         * configure: Regenerated.
 178
 179 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
 180
 181         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
 182         * ia64-gen.c: Promote completer index type to longlong.
 183         (irf_operand): Add new register recognition.
 184         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
 185         (lookup_specifier): Add new resource recognition.
 186         (insert_bit_table_ent): Relax abort condition according to the
 187         changed completer index type.
 188         (print_dis_table): Fix printf format for completer index.
 189         * ia64-ic.tbl: Add a new instruction class.
 190         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
 191         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
 192         * ia64-opc.h: Define short names for new operand types.
 193         * ia64-raw.tbl: Add new RAW resource for DAHR register.
 194         * ia64-waw.tbl: Add new WAW resource for DAHR register.
 195         * ia64-asmtab.c: Regenerate.
 196
 197 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
 198
 199         * ppc-opc.c (VXASHB_MASK): New define.
 200         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
 201
 202 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
 203
 204         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
 205         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
 206         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
 207         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
 208         vupklsh>: Use VXVA_MASK.
 209         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
 210         <mfvscr>: Use VXVAVB_MASK.
 211         <mtvscr>: Use VXVDVA_MASK.
 212         <vspltb>: Use VXUIMM4_MASK.
 213         <vsplth>: Use VXUIMM3_MASK.
 214         <vspltw>: Use VXUIMM2_MASK.
 215
 216 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 217
 218         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
 219
 220 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 221
 222         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
 223
 224 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 225
 226         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
 227
 228 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 229
 230         * arm-dis.c (neon_opcodes): Add support for AES instructions.
 231
 232 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 233
 234         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
 235         conversions.
 236
 237 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
 238
 239         * arm-dis.c (coprocessor_opcodes): Add VRINT.
 240         (neon_opcodes): Likewise.
 241
 242 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 243
 244         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
 245         variants.
 246         (neon_opcodes): Likewise.
 247
 248 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 249
 250         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
 251         (neon_opcodes): Likewise.
 252
 253 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 254
 255         * arm-dis.c (coprocessor_opcodes): Add VSEL.
 256         (print_insn_coprocessor): Add new %<>c bitfield format
 257         specifier.
 258
 259 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 260
 261         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 262         (thumb32_opcodes): Likewise.
 263         (print_arm_insn): Add support for %<>T formatter.
 264
 265 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 266
 267         * arm-dis.c (arm_opcodes): Add HLT.
 268         (thumb_opcodes): Likewise.
 269
 270 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 271
 272         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 273
 274 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 275
 276         * arm-dis.c (arm_opcodes): Add SEVL.
 277         (thumb_opcodes): Likewise.
 278         (thumb32_opcodes): Likewise.
 279
 280 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 281
 282         * arm-dis.c (data_barrier_option): New function.
 283         (print_insn_arm): Use data_barrier_option.
 284         (print_insn_thumb32): Use data_barrier_option.
 285
 286 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 287
 288         * arm-dis.c (COND_UNCOND): New constant.
 289         (print_insn_coprocessor): Add support for %u format specifier.
 290         (print_insn_neon): Likewise.
 291
 292 2012-08-21  David S. Miller  <davem@davemloft.net>
 293
 294         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 295         F3F4 macro.
 296
 297 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 298
 299         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 300         vabsduh, vabsduw, mviwsplt.
 301
 302 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 303
 304         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 305         CPU_BTVER2_FLAGS.
 306
 307         * i386-opc.h: Update CpuPRFCHW comment.
 308
 309         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 310         * i386-init.h: Regenerated.
 311         * i386-tbl.h: Likewise.
 312
 313 2012-08-17  Nick Clifton  <nickc@redhat.com>
 314
 315         * po/uk.po: New Ukranian translation.
 316         * configure.in (ALL_LINGUAS): Add uk.
 317         * configure: Regenerate.
 318
 319 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 320
 321         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 322         RBX for the third operand.
 323         <"lswi">: Use RAX for second and NBI for the third operand.
 324
 325 2012-08-15  DJ Delorie  <dj@redhat.com>
 326
 327         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 328         operands, so that data addresses can be corrected when not
 329         ES-overridden.
 330         * rl78-decode.c: Regenerate.
 331         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 332         irrelevent.  When the 'e' specifier is used on an operand and no
 333         ES prefix is provided, adjust address to make it absolute.
 334
 335 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 336
 337         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 338
 339 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 340
 341         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 342
 343 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 344
 345         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 346         macros, use local variables for info struct member accesses,
 347         update the type of the variable used to hold the instruction
 348         word.
 349         (print_insn_mips, print_mips16_insn_arg): Likewise.
 350         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 351         local variables for info struct member accesses.
 352         (print_insn_micromips): Add GET_OP_S local macro.
 353         (_print_insn_mips): Update the type of the variable used to hold
 354         the instruction word.
 355
 356 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 357             Laurent Desnogues  <laurent.desnogues@arm.com>
 358             Jim MacArthur  <jim.macarthur@arm.com>
 359             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 360             Nigel Stephens  <nigel.stephens@arm.com>
 361             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 362             Richard Earnshaw  <rearnsha@arm.com>
 363             Sofiane Naci  <sofiane.naci@arm.com>
 364             Tejas Belagod  <tejas.belagod@arm.com>
 365             Yufeng Zhang  <yufeng.zhang@arm.com>
 366
 367         * Makefile.am: Add AArch64.
 368         * Makefile.in: Regenerate.
 369         * aarch64-asm.c: New file.
 370         * aarch64-asm.h: New file.
 371         * aarch64-dis.c: New file.
 372         * aarch64-dis.h: New file.
 373         * aarch64-gen.c: New file.
 374         * aarch64-opc.c: New file.
 375         * aarch64-opc.h: New file.
 376         * aarch64-tbl.h: New file.
 377         * configure.in: Add AArch64.
 378         * configure: Regenerate.
 379         * disassemble.c: Add AArch64.
 380         * aarch64-asm-2.c: New file (automatically generated).
 381         * aarch64-dis-2.c: New file (automatically generated).
 382         * aarch64-opc-2.c: New file (automatically generated).
 383         * po/POTFILES.in: Regenerate.
 384
 385 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 386
 387         * micromips-opc.c (micromips_opcodes): Update comment.
 388         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 389         instructions for IOCT as appropriate.
 390         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 391         opcode_is_member.
 392         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 393         the result of a check for the -Wno-missing-field-initializers
 394         GCC option.
 395         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 396         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 397         compilation.
 398         (mips16-opc.lo): Likewise.
 399         (micromips-opc.lo): Likewise.
 400         * aclocal.m4: Regenerate.
 401         * configure: Regenerate.
 402         * Makefile.in: Regenerate.
 403
 404 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 405
 406         PR gas/14423
 407         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 408         * i386-init.h: Regenerated.
 409
 410 2012-08-09  Nick Clifton  <nickc@redhat.com>
 411
 412         * po/vi.po: Updated Vietnamese translation.
 413
 414 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 415
 416         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 417         AMD-reserved cases as "prefetch".
 418         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 419         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 420         (reg_table): Use those under REG_0F18.
 421         (mod_table): Add those cases as "nop/reserved".
 422
 423 2012-08-07  Jan Beulich <jbeulich@suse.com>
 424
 425         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 426
 427 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 428
 429         * i386-dis.c (print_insn): Print spaces between multiple excess
 430         prefixes.  Return actual number of excess prefixes consumed,
 431         not always one.
 432
 433         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 434
 435 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 436             Victor Khimenko  <khim@google.com>
 437             H.J. Lu  <hongjiu.lu@intel.com>
 438
 439         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 440         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 441         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 442         (OP_E_register): Likewise.
 443         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 444
 445 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 446
 447         * configure.in: Formatting.
 448         * configure: Regenerate.
 449
 450 2012-08-01  Alan Modra  <amodra@gmail.com>
 451
 452         * h8300-dis.c: Fix printf arg warnings.
 453         * i960-dis.c: Likewise.
 454         * mips-dis.c: Likewise.
 455         * pdp11-dis.c: Likewise.
 456         * sh-dis.c: Likewise.
 457         * v850-dis.c: Likewise.
 458         * configure.in: Formatting.
 459         * configure: Regenerate.
 460         * rl78-decode.c: Regenerate.
 461         * po/POTFILES.in: Regenerate.
 462
 463 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 464             Catherine Moore  <clm@codesourcery.com>
 465             Maciej W. Rozycki  <macro@codesourcery.com>
 466
 467         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 468         (DSP_VOLA): Likewise.
 469         (D32, D33): Likewise.
 470         (micromips_opcodes): Add DSP ASE instructions.
 471         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 472         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 473
 474 2012-07-31  Jan Beulich <jbeulich@suse.com>
 475
 476         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 477         instruction group. Mark as requiring AVX2.
 478         * i386-tbl.h: Re-generate.
 479
 480 2012-07-30  Nick Clifton  <nickc@redhat.com>
 481
 482         * po/opcodes.pot: Updated template.
 483         * po/es.po: Updated Spanish translation.
 484         * po/fi.po: Updated Finnish translation.
 485
 486 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 487
 488         * configure.in (BFD_VERSION): Run bfd/configure --version and
 489         parse the output of that.
 490         * configure: Regenerate.
 491
 492 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 493
 494         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 495
 496 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 497             Dr David Alan Gilbert  <dave@treblig.org>
 498
 499         PR binutils/13135
 500         * arm-dis.c: Add necessary casts for printing integer values.
 501         Use %s when printing string values.
 502         * hppa-dis.c: Likewise.
 503         * m68k-dis.c: Likewise.
 504         * microblaze-dis.c: Likewise.
 505         * mips-dis.c: Likewise.
 506         * sparc-dis.c: Likewise.
 507
 508 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 509
 510         PR binutils/14355
 511         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 512         (VEX_LEN_0FXOP_08_CD): Likewise.
 513         (VEX_LEN_0FXOP_08_CE): Likewise.
 514         (VEX_LEN_0FXOP_08_CF): Likewise.
 515         (VEX_LEN_0FXOP_08_EC): Likewise.
 516         (VEX_LEN_0FXOP_08_ED): Likewise.
 517         (VEX_LEN_0FXOP_08_EE): Likewise.
 518         (VEX_LEN_0FXOP_08_EF): Likewise.
 519         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 520         vpcomub, vpcomuw, vpcomud, vpcomuq.
 521         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 522         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 523         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 524         VEX_LEN_0FXOP_08_EF.
 525
 526 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 527
 528         * i386-dis.c (PREFIX_0F38F6): New.
 529         (prefix_table): Add adcx, adox instructions.
 530         (three_byte_table): Use PREFIX_0F38F6.
 531         (mod_table): Add rdseed instruction.
 532         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 533         (cpu_flags): Likewise.
 534         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 535         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 536         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 537         prefetchw.
 538         * i386-tbl.h: Regenerate.
 539         * i386-init.h: Likewise.
 540
 541 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 542
 543         * mips-dis.c: Remove gratuitous newline.
 544
 545 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 546
 547         * xgate-dis.c: Removed an IF statement that will
 548         always be false due to overlapping operand masks.
 549         * xgate-opc.c: Corrected 'com' opcode entry and
 550         fixed spacing.
 551
 552 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 553
 554         * i386-opc.tbl: Add RepPrefixOk to nop.
 555         * i386-tbl.h: Regenerate.
 556
 557 2012-06-28  Nick Clifton  <nickc@redhat.com>
 558
 559         * po/vi.po: Updated Vietnamese translation.
 560
 561 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 562
 563         * i386-opc.tbl: Add RepPrefixOk to ret.
 564         * i386-tbl.h: Regenerate.
 565
 566         * i386-opc.h (RepPrefixOk): New enum constant.
 567         (i386_opcode_modifier): New bitfield 'repprefixok'.
 568         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 569         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 570         instructions that have IsString.
 571         * i386-tbl.h: Regenerate.
 572
 573 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 574
 575         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 576         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 577         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 578         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 579         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 580         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 581         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 582         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 583         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 584
 585 2012-05-19  Alan Modra  <amodra@gmail.com>
 586
 587         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 588         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 589
 590 2012-05-18  Alan Modra  <amodra@gmail.com>
 591
 592         * ia64-opc.c: Remove #include "ansidecl.h".
 593         * z8kgen.c: Include sysdep.h first.
 594
 595         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 596         * bfin-dis.c: Likewise.
 597         * i860-dis.c: Likewise.
 598         * ia64-dis.c: Likewise.
 599         * ia64-gen.c: Likewise.
 600         * m68hc11-dis.c: Likewise.
 601         * mmix-dis.c: Likewise.
 602         * msp430-dis.c: Likewise.
 603         * or32-dis.c: Likewise.
 604         * rl78-dis.c: Likewise.
 605         * rx-dis.c: Likewise.
 606         * tic4x-dis.c: Likewise.
 607         * tilegx-opc.c: Likewise.
 608         * tilepro-opc.c: Likewise.
 609         * rx-decode.c: Regenerate.
 610
 611 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 612
 613         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 614
 615 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 616
 617         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 618
 619 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 620             Nick Clifton  <nickc@redhat.com>
 621
 622         PR 14072
 623         * configure.in: Add check that sysdep.h has been included before
 624         any system header files.
 625         * configure: Regenerate.
 626         * config.in: Regenerate.
 627         * sysdep.h: Generate an error if included before config.h.
 628         * alpha-opc.c: Include sysdep.h before any other header file.
 629         * alpha-dis.c: Likewise.
 630         * avr-dis.c: Likewise.
 631         * cgen-opc.c: Likewise.
 632         * cr16-dis.c: Likewise.
 633         * cris-dis.c: Likewise.
 634         * crx-dis.c: Likewise.
 635         * d10v-dis.c: Likewise.
 636         * d10v-opc.c: Likewise.
 637         * d30v-dis.c: Likewise.
 638         * d30v-opc.c: Likewise.
 639         * h8500-dis.c: Likewise.
 640         * i370-dis.c: Likewise.
 641         * i370-opc.c: Likewise.
 642         * m10200-dis.c: Likewise.
 643         * m10300-dis.c: Likewise.
 644         * micromips-opc.c: Likewise.
 645         * mips-opc.c: Likewise.
 646         * mips61-opc.c: Likewise.
 647         * moxie-dis.c: Likewise.
 648         * or32-opc.c: Likewise.
 649         * pj-dis.c: Likewise.
 650         * ppc-dis.c: Likewise.
 651         * ppc-opc.c: Likewise.
 652         * s390-dis.c: Likewise.
 653         * sh-dis.c: Likewise.
 654         * sh64-dis.c: Likewise.
 655         * sparc-dis.c: Likewise.
 656         * sparc-opc.c: Likewise.
 657         * spu-dis.c: Likewise.
 658         * tic30-dis.c: Likewise.
 659         * tic54x-dis.c: Likewise.
 660         * tic80-dis.c: Likewise.
 661         * tic80-opc.c: Likewise.
 662         * tilegx-dis.c: Likewise.
 663         * tilepro-dis.c: Likewise.
 664         * v850-dis.c: Likewise.
 665         * v850-opc.c: Likewise.
 666         * vax-dis.c: Likewise.
 667         * w65-dis.c: Likewise.
 668         * xgate-dis.c: Likewise.
 669         * xtensa-dis.c: Likewise.
 670         * rl78-decode.opc: Likewise.
 671         * rl78-decode.c: Regenerate.
 672         * rx-decode.opc: Likewise.
 673         * rx-decode.c: Regenerate.
 674
 675 2012-05-17  Alan Modra  <amodra@gmail.com>
 676
 677         * ppc_dis.c: Don't include elf/ppc.h.
 678
 679 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 680
 681         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 682         to PUSH/POP {reg}.
 683
 684 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 685             Stephane Carrez <stcarrez@nerim.fr>
 686
 687         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 688         target.
 689         * disassemble.c: Likewise.
 690         * configure: Regenerate.
 691         * m68hc11-dis.c: Make objdump output more consistent, use hex
 692         instead of decimal and use 0x prefix for hex.
 693         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 694
 695 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 696
 697         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 698         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 699         (vle_opcd_indices): New array.
 700         (lookup_vle): New function.
 701         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 702         (print_insn_powerpc): Likewise.
 703         * ppc-opc.c: Likewise.
 704
 705 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 706             Maciej W. Rozycki  <macro@codesourcery.com>
 707             Rhonda Wittels  <rhonda@codesourcery.com>
 708             Nathan Froyd <froydnj@codesourcery.com>
 709
 710         * ppc-opc.c (insert_arx, extract_arx): New functions.
 711         (insert_ary, extract_ary): New functions.
 712         (insert_li20, extract_li20): New functions.
 713         (insert_rx, extract_rx): New functions.
 714         (insert_ry, extract_ry): New functions.
 715         (insert_sci8, extract_sci8): New functions.
 716         (insert_sci8n, extract_sci8n): New functions.
 717         (insert_sd4h, extract_sd4h): New functions.
 718         (insert_sd4w, extract_sd4w): New functions.
 719         (insert_vlesi, extract_vlesi): New functions.
 720         (insert_vlensi, extract_vlensi): New functions.
 721         (insert_vleui, extract_vleui): New functions.
 722         (insert_vleil, extract_vleil): New functions.
 723         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 724         (BI16, BI32, BO32, B8): New.
 725         (B15, B24, CRD32, CRS): New.
 726         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 727         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 728         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 729         (SH6_MASK): Use PPC_OPSHIFT_INV.
 730         (SI8, UI5, OIMM5, UI7, BO16): New.
 731         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 732         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 733         (ALLOW8_SPRG): New.
 734         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 735         (OPVUP, OPVUP_MASK OPVUP): New
 736         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 737         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 738         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 739         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 740         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 741         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 742         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 743         (SE_IM5, SE_IM5_MASK): New.
 744         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 745         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 746         (BO32DNZ, BO32DZ): New.
 747         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 748         (PPCVLE): New.
 749         (powerpc_opcodes): Add new VLE instructions.  Update existing
 750         instruction to include PPCVLE if supported.
 751         * ppc-dis.c (ppc_opts): Add vle entry.
 752         (get_powerpc_dialect): New function.
 753         (powerpc_init_dialect): VLE support.
 754         (print_insn_big_powerpc): Call get_powerpc_dialect.
 755         (print_insn_little_powerpc): Likewise.
 756         (operand_value_powerpc): Handle negative shift counts.
 757         (print_insn_powerpc): Handle 2-byte instruction lengths.
 758
 759 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 760
 761         PR binutils/14028
 762         * configure.in: Invoke ACX_HEADER_STRING.
 763         * configure: Regenerate.
 764         * config.in: Regenerate.
 765         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 766         string.h and strings.h.
 767
 768 2012-05-11  Nick Clifton  <nickc@redhat.com>
 769
 770         PR binutils/14006
 771         * arm-dis.c (print_insn): Fix detection of instruction mode in
 772         files containing multiple executable sections.
 773
 774 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 775
 776         * Makefile.in, configure: regenerate
 777         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 778         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 779         New functions.
 780         * configure.in: Recognize xgate.
 781         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 782         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 783         and opcode generation for xgate.
 784
 785 2012-04-30  DJ Delorie  <dj@redhat.com>
 786
 787         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 788         already the maximum bit size.
 789         * rx-decode.c: Regenerate.
 790
 791 2012-04-27  David S. Miller  <davem@davemloft.net>
 792
 793         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 794         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 795
 796         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 797         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 798
 799         * sparc-opc.c (CBCOND): New define.
 800         (CBCOND_XCC): Likewise.
 801         (cbcond): New helper macro.
 802         (sparc_opcodes): Add compare-and-branch instructions.
 803
 804         * sparc-dis.c (print_insn_sparc): Handle ')'.
 805         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 806
 807         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 808         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 809
 810 2012-04-12  David S. Miller  <davem@davemloft.net>
 811
 812         * sparc-dis.c (X_DISP10): Define.
 813         (print_insn_sparc): Handle '='.
 814
 815 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 816
 817         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 818         sprintf call and the '*' field width.
 819
 820 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 821
 822         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 823
 824 2012-03-16  Alan Modra  <amodra@gmail.com>
 825
 826         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 827         (powerpc_opcd_indices): Bump array size.
 828         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 829         corresponding to unused opcodes to following entry.
 830         (lookup_powerpc): New function, extracted and optimised from..
 831         (print_insn_powerpc): ..here.
 832
 833 2012-03-15  Alan Modra  <amodra@gmail.com>
 834             James Lemke  <jwlemke@codesourcery.com>
 835
 836         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 837         * ppc-dis.c (private): New var.
 838         (powerpc_init_dialect): Don't return calloc failure, instead use
 839         private.
 840         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 841         (powerpc_opcd_indices): New array.
 842         (disassemble_init_powerpc): New function.
 843         (print_insn_big_powerpc): Don't init dialect here.
 844         (print_insn_little_powerpc): Likewise.
 845         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 846
 847 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 848
 849         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 850         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 851         (PPCVEC2, PPCTMR, E6500): New short names.
 852         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 853         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 854         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 855         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 856         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 857         optional operands on sync instruction for E6500 target.
 858
 859 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 860
 861         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 862
 863 2012-02-27  Alan Modra  <amodra@gmail.com>
 864
 865         * mt-dis.c: Regenerate.
 866
 867 2012-02-27  Alan Modra  <amodra@gmail.com>
 868
 869         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 870         is the inverse of corresponding insert function.
 871         (extract_d22, extract_u9, extract_r4): Likewise.
 872         (extract_d9): Correct sign extension.
 873         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 874         rely on implementation defined behaviour for shift right of
 875         signed types.
 876         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 877         (extract_d23): Likewise, and correct mask.
 878
 879 2012-02-27  Alan Modra  <amodra@gmail.com>
 880
 881         * crx-dis.c (print_arg): Mask constant to 32 bits.
 882         * crx-opc.c (cst4_map): Use int array.
 883
 884 2012-02-27  Alan Modra  <amodra@gmail.com>
 885
 886         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 887         (FIELDD): Sign extend with xor,sub.
 888
 889 2012-02-25  Walter Lee  <walt@tilera.com>
 890
 891         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 892         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 893         TILEPRO_OPC_LW_TLS_SN.
 894
 895 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 896
 897         * i386-opc.h (HLEPrefixNone): New.
 898         (HLEPrefixLock): Likewise.
 899         (HLEPrefixAny): Likewise.
 900         (HLEPrefixRelease): Likewise.
 901
 902 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 903
 904         * i386-dis.c (HLE_Fixup1): New.
 905         (HLE_Fixup2): Likewise.
 906         (HLE_Fixup3): Likewise.
 907         (Ebh1): Likewise.
 908         (Evh1): Likewise.
 909         (Ebh2): Likewise.
 910         (Evh2): Likewise.
 911         (Ebh3): Likewise.
 912         (Evh3): Likewise.
 913         (MOD_C6_REG_7): Likewise.
 914         (MOD_C7_REG_7): Likewise.
 915         (RM_C6_REG_7): Likewise.
 916         (RM_C7_REG_7): Likewise.
 917         (XACQUIRE_PREFIX): Likewise.
 918         (XRELEASE_PREFIX): Likewise.
 919         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 920         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 921         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 922         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 923         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 924         MOD_C6_REG_7 and MOD_C7_REG_7.
 925         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 926         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 927         xtest.
 928         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 929         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 930
 931         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 932         CPU_RTM_FLAGS.
 933         (cpu_flags): Add CpuHLE and CpuRTM.
 934         (opcode_modifiers): Add HLEPrefixOk.
 935
 936         * i386-opc.h (CpuHLE): New.
 937         (CpuRTM): Likewise.
 938         (HLEPrefixOk): Likewise.
 939         (i386_cpu_flags): Add cpuhle and cpurtm.
 940         (i386_opcode_modifier): Add hleprefixok.
 941
 942         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 943         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 944         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 945         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 946         xtest.
 947         * i386-init.h: Regenerated.
 948         * i386-tbl.h: Likewise.
 949
 950 2012-01-24  DJ Delorie  <dj@redhat.com>
 951
 952         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 953         * rl78-decode.c: Regenerate.
 954
 955 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 956
 957         PR binutils/10173
 958         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 959
 960 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 961
 962         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 963         register and move them after pmove with PSR/PCSR register.
 964
 965 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 966
 967         * i386-dis.c (mod_table): Add vmfunc.
 968
 969         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 970         (cpu_flags): CpuVMFUNC.
 971
 972         * i386-opc.h (CpuVMFUNC): New.
 973         (i386_cpu_flags): Add cpuvmfunc.
 974
 975         * i386-opc.tbl: Add vmfunc.
 976         * i386-init.h: Regenerated.
 977         * i386-tbl.h: Likewise.
 978
 979 For older changes see ChangeLog-2011
 980 \f
 981 Local Variables:
 982 mode: change-log
 983 left-margin: 8
 984 fill-column: 74
 985 version-control: never
 986 End: