opcodes/
[binutils-gdb.git] / opcodes / ChangeLog
1 2010-08-27 Nathan Froyd <froydnj@codesourcery.com>
2
3 * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
4 on E500 and E500MC.
5
6 2010-08-17 H.J. Lu <hongjiu.lu@intel.com>
7
8 * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
9 prefetchw.
10
11 2010-08-06 Quentin Neill <quentin.neill@amd.com>
12
13 * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
14 to processor flags for PENTIUMPRO processors and later.
15 * i386-opc.h (enum): Add CpuNop.
16 (i386_cpu_flags): Add cpunop bit.
17 * i386-opc.tbl: Change nop cpu_flags.
18 * i386-init.h: Regenerated.
19 * i386-tbl.h: Likewise.
20
21 2010-08-06 Quentin Neill <quentin.neill@amd.com>
22
23 * i386-opc.h (enum): Fix typos in comments.
24
25 2010-08-06 Alan Modra <amodra@gmail.com>
26
27 * disassemble.c: Formatting.
28 (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
29
30 2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
31
32 * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
33 * i386-tbl.h: Regenerated.
34
35 2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
36
37 * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
38
39 * i386-opc.tbl: Add ud1. Remove Cpu686 from ud2/ud2a/ud2b.
40 * i386-tbl.h: Regenerated.
41
42 2010-07-29 DJ Delorie <dj@redhat.com>
43
44 * rx-decode.opc (SRR): New.
45 (rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
46 r0,r0) and NOP3 (max r0,r0) special cases.
47 * rx-decode.c: Regenerate.
48
49 2010-07-28 H.J. Lu <hongjiu.lu@intel.com>
50
51 * i386-dis.c: Add 0F to VEX opcode enums.
52
53 2010-07-27 DJ Delorie <dj@redhat.com>
54
55 * rx-decode.opc (store_flags): Remove, replace with F_* macros.
56 (rx_decode_opcode): Likewise.
57 * rx-decode.c: Regenerate.
58
59 2010-07-23 Naveen.H.S <naveen.S@kpitcummins.com>
60 Ina Pandit <ina.pandit@kpitcummins.com>
61
62 * v850-dis.c (v850_sreg_names): Updated structure for system
63 registers.
64 (float_cc_names): new structure for condition codes.
65 (print_value): Update the function that prints value.
66 (get_operand_value): New function to get the operand value.
67 (disassemble): Updated to handle the disassembly of instructions.
68 (print_insn_v850): Updated function to print instruction for different
69 families.
70 * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
71 extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
72 extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
73 insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
74 extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
75 extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
76 extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
77 insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
78 (insert_d8_7, insert_d5_4, insert_i5div): Remove.
79 (v850_operands): Update with the relocation name. Also update
80 the instructions with specific set of processors.
81
82 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
83
84 * arm-dis.c (print_insn_arm): Add cases for printing more
85 symbolic operands.
86 (print_insn_thumb32): Likewise.
87
88 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com>
89
90 * mips-dis.c (print_insn_mips): Correct branch instruction type
91 determination.
92
93 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com>
94
95 * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
96 type and delay slot determination.
97 (print_insn_mips16): Extend branch instruction type and delay
98 slot determination to cover all instructions.
99 * mips16-opc.c (BR): Remove macro.
100 (UBR, CBR): New macros.
101 (mips16_opcodes): Update branch annotation for "b", "beqz",
102 "bnez", "bteqz" and "btnez". Add branch annotation for "jalrc"
103 and "jrc".
104
105 2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
106
107 AVX Programming Reference (June, 2010)
108 * i386-dis.c (mod_table): Replace rdrnd with rdrand.
109 * i386-opc.tbl: Likewise.
110 * i386-tbl.h: Regenerated.
111
112 2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
113
114 * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
115
116 2010-07-03 Andreas Schwab <schwab@linux-m68k.org>
117
118 * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
119 ppc_cpu_t before inverting.
120 (ppc_parse_cpu): Likewise.
121 (print_insn_powerpc): Likewise.
122
123 2010-07-03 Alan Modra <amodra@gmail.com>
124
125 * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
126 * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
127 (PPC64, MFDEC2): Update.
128 (NON32, NO371): Define.
129 (powerpc_opcode): Update to not use old opcode flags, and avoid
130 -m601 duplicates.
131
132 2010-07-03 DJ Delorie <dj@delorie.com>
133
134 * m32c-ibld.c: Regenerate.
135
136 2010-07-03 Alan Modra <amodra@gmail.com>
137
138 * ppc-opc.c (PWR2COM): Define.
139 (PPCPWR2): Add PPC_OPCODE_COMMON.
140 (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
141 "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
142 "rac" from -mcom.
143
144 2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
145
146 AVX Programming Reference (June, 2010)
147 * i386-dis.c (PREFIX_0FAE_REG_0): New.
148 (PREFIX_0FAE_REG_1): Likewise.
149 (PREFIX_0FAE_REG_2): Likewise.
150 (PREFIX_0FAE_REG_3): Likewise.
151 (PREFIX_VEX_3813): Likewise.
152 (PREFIX_VEX_3A1D): Likewise.
153 (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
154 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
155 PREFIX_VEX_3A1D.
156 (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
157 (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
158 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
159
160 * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
161 CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
162 (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
163
164 * i386-opc.h (CpuXsaveopt): New.
165 (CpuFSGSBase): Likewise.
166 (CpuRdRnd): Likewise.
167 (CpuF16C): Likewise.
168 (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
169 cpuf16c.
170
171 * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
172 wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
173 * i386-init.h: Regenerated.
174 * i386-tbl.h: Likewise.
175
176 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
177
178 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
179 and mtocrf on EFS.
180
181 2010-06-29 Alan Modra <amodra@gmail.com>
182
183 * maxq-dis.c: Delete file.
184 * Makefile.am: Remove references to maxq.
185 * configure.in: Likewise.
186 * disassemble.c: Likewise.
187 * Makefile.in: Regenerate.
188 * configure: Regenerate.
189 * po/POTFILES.in: Regenerate.
190
191 2010-06-29 Alan Modra <amodra@gmail.com>
192
193 * mep-dis.c: Regenerate.
194
195 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
196
197 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
198
199 2010-06-27 Alan Modra <amodra@gmail.com>
200
201 * arc-dis.c (arc_sprintf): Delete set but unused variables.
202 (decodeInstr): Likewise.
203 * dlx-dis.c (print_insn_dlx): Likewise.
204 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
205 * maxq-dis.c (check_move, print_insn): Likewise.
206 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
207 * msp430-dis.c (msp430_branchinstr): Likewise.
208 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
209 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
210 * sparc-dis.c (print_insn_sparc): Likewise.
211 * fr30-asm.c: Regenerate.
212 * frv-asm.c: Regenerate.
213 * ip2k-asm.c: Regenerate.
214 * iq2000-asm.c: Regenerate.
215 * lm32-asm.c: Regenerate.
216 * m32c-asm.c: Regenerate.
217 * m32r-asm.c: Regenerate.
218 * mep-asm.c: Regenerate.
219 * mt-asm.c: Regenerate.
220 * openrisc-asm.c: Regenerate.
221 * xc16x-asm.c: Regenerate.
222 * xstormy16-asm.c: Regenerate.
223
224 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
225
226 PR gas/11673
227 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
228
229 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
230
231 PR binutils/11676
232 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
233
234 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
235
236 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
237 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
238 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
239 touch floating point regs and are enabled by COM, PPC or PPCCOM.
240 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
241 Treat lwsync as msync on e500.
242
243 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
244
245 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
246
247 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
248
249 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
250 constants is the same on 32-bit and 64-bit hosts.
251
252 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
253
254 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
255 .short directives so that they can be reassembled.
256
257 2010-05-26 Catherine Moore <clm@codesourcery.com>
258 David Ung <davidu@mips.com>
259
260 * mips-opc.c: Change membership to I1 for instructions ssnop and
261 ehb.
262
263 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
264
265 * i386-dis.c (sib): New.
266 (get_sib): Likewise.
267 (print_insn): Call get_sib.
268 OP_E_memory): Use sib.
269
270 2010-05-26 Catherine Moore <clm@codesoourcery.com>
271
272 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
273 * mips-opc.c (I16): Remove.
274 (mips_builtin_op): Reclassify jalx.
275
276 2010-05-19 Alan Modra <amodra@gmail.com>
277
278 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
279 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
280
281 2010-05-13 Alan Modra <amodra@gmail.com>
282
283 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
284
285 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
286
287 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
288 format.
289 (print_insn_thumb16): Add support for new %W format.
290
291 2010-05-07 Tristan Gingold <gingold@adacore.com>
292
293 * Makefile.in: Regenerate with automake 1.11.1.
294 * aclocal.m4: Ditto.
295
296 2010-05-05 Nick Clifton <nickc@redhat.com>
297
298 * po/es.po: Updated Spanish translation.
299
300 2010-04-22 Nick Clifton <nickc@redhat.com>
301
302 * po/opcodes.pot: Updated by the Translation project.
303 * po/vi.po: Updated Vietnamese translation.
304
305 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
306
307 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
308 bits in opcode.
309
310 2010-04-09 Nick Clifton <nickc@redhat.com>
311
312 * i386-dis.c (print_insn): Remove unused variable op.
313 (OP_sI): Remove unused variable mask.
314
315 2010-04-07 Alan Modra <amodra@gmail.com>
316
317 * configure: Regenerate.
318
319 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
320
321 * ppc-opc.c (RBOPT): New define.
322 ("dccci"): Enable for PPCA2. Make operands optional.
323 ("iccci"): Likewise. Do not deprecate for PPC476.
324
325 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
326
327 * cr16-opc.c (cr16_instruction): Fix typo in comment.
328
329 2010-03-25 Joseph Myers <joseph@codesourcery.com>
330
331 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
332 * Makefile.in: Regenerate.
333 * configure.in (bfd_tic6x_arch): New.
334 * configure: Regenerate.
335 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
336 (disassembler): Handle TI C6X.
337 * tic6x-dis.c: New.
338
339 2010-03-24 Mike Frysinger <vapier@gentoo.org>
340
341 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
342
343 2010-03-23 Joseph Myers <joseph@codesourcery.com>
344
345 * dis-buf.c (buffer_read_memory): Give error for reading just
346 before the start of memory.
347
348 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
349 Quentin Neill <quentin.neill@amd.com>
350
351 * i386-dis.c (OP_LWP_I): Removed.
352 (reg_table): Do not use OP_LWP_I, use Iq.
353 (OP_LWPCB_E): Remove use of names16.
354 (OP_LWP_E): Same.
355 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
356 should not set the Vex.length bit.
357 * i386-tbl.h: Regenerated.
358
359 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
360
361 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
362
363 2010-02-24 Nick Clifton <nickc@redhat.com>
364
365 PR binutils/6773
366 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
367 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
368 (thumb32_opcodes): Likewise.
369
370 2010-02-15 Nick Clifton <nickc@redhat.com>
371
372 * po/vi.po: Updated Vietnamese translation.
373
374 2010-02-12 Doug Evans <dje@sebabeach.org>
375
376 * lm32-opinst.c: Regenerate.
377
378 2010-02-11 Doug Evans <dje@sebabeach.org>
379
380 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
381 (print_address): Delete CGEN_PRINT_ADDRESS.
382 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
383 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
384 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
385 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
386
387 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
388 * frv-desc.c, * frv-desc.h, * frv-opc.c,
389 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
390 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
391 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
392 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
393 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
394 * mep-desc.c, * mep-desc.h, * mep-opc.c,
395 * mt-desc.c, * mt-desc.h, * mt-opc.c,
396 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
397 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
398 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
399
400 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
401
402 * i386-dis.c: Update copyright.
403 * i386-gen.c: Likewise.
404 * i386-opc.h: Likewise.
405 * i386-opc.tbl: Likewise.
406
407 2010-02-10 Quentin Neill <quentin.neill@amd.com>
408 Sebastian Pop <sebastian.pop@amd.com>
409
410 * i386-dis.c (OP_EX_VexImmW): Reintroduced
411 function to handle 5th imm8 operand.
412 (PREFIX_VEX_3A48): Added.
413 (PREFIX_VEX_3A49): Added.
414 (VEX_W_3A48_P_2): Added.
415 (VEX_W_3A49_P_2): Added.
416 (prefix table): Added entries for PREFIX_VEX_3A48
417 and PREFIX_VEX_3A49.
418 (vex table): Added entries for VEX_W_3A48_P_2 and
419 and VEX_W_3A49_P_2.
420 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
421 for Vec_Imm4 operands.
422 * i386-opc.h (enum): Added Vec_Imm4.
423 (i386_operand_type): Added vec_imm4.
424 * i386-opc.tbl: Add entries for vpermilp[ds].
425 * i386-init.h: Regenerated.
426 * i386-tbl.h: Regenerated.
427
428 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
429
430 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
431 and "pwr7". Move "a2" into alphabetical order.
432
433 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
434
435 * ppc-dis.c (ppc_opts): Add titan entry.
436 * ppc-opc.c (TITAN, MULHW): Define.
437 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
438
439 2010-02-03 Quentin Neill <quentin.neill@amd.com>
440
441 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
442 to CPU_BDVER1_FLAGS
443 * i386-init.h: Regenerated.
444
445 2010-02-03 Anthony Green <green@moxielogic.com>
446
447 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
448 0x0f, and make 0x00 an illegal instruction.
449
450 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
451
452 * opcodes/arm-dis.c (struct arm_private_data): New.
453 (print_insn_coprocessor, print_insn_arm): Update to use struct
454 arm_private_data.
455 (is_mapping_symbol, get_map_sym_type): New functions.
456 (get_sym_code_type): Check the symbol's section. Do not check
457 mapping symbols.
458 (print_insn): Default to disassembling ARM mode code. Check
459 for mapping symbols separately from other symbols. Use
460 struct arm_private_data.
461
462 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
463
464 * i386-dis.c (EXVexWdqScalar): New.
465 (vex_scalar_w_dq_mode): Likewise.
466 (prefix_table): Update entries for PREFIX_VEX_3899,
467 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
468 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
469 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
470 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
471 (intel_operand_size): Handle vex_scalar_w_dq_mode.
472 (OP_EX): Likewise.
473
474 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
475
476 * i386-dis.c (XMScalar): New.
477 (EXdScalar): Likewise.
478 (EXqScalar): Likewise.
479 (EXqScalarS): Likewise.
480 (VexScalar): Likewise.
481 (EXdVexScalarS): Likewise.
482 (EXqVexScalarS): Likewise.
483 (XMVexScalar): Likewise.
484 (scalar_mode): Likewise.
485 (d_scalar_mode): Likewise.
486 (d_scalar_swap_mode): Likewise.
487 (q_scalar_mode): Likewise.
488 (q_scalar_swap_mode): Likewise.
489 (vex_scalar_mode): Likewise.
490 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
491 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
492 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
493 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
494 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
495 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
496 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
497 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
498 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
499 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
500 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
501 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
502 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
503 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
504 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
505 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
506 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
507 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
508 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
509 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
510 q_scalar_mode, q_scalar_swap_mode.
511 (OP_XMM): Handle scalar_mode.
512 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
513 and q_scalar_swap_mode.
514 (OP_VEX): Handle vex_scalar_mode.
515
516 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
517
518 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
519
520 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
521
522 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
523
524 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
525
526 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
527
528 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
529
530 * i386-dis.c (Bad_Opcode): New.
531 (bad_opcode): Likewise.
532 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
533 (dis386_twobyte): Likewise.
534 (reg_table): Likewise.
535 (prefix_table): Likewise.
536 (x86_64_table): Likewise.
537 (vex_len_table): Likewise.
538 (vex_w_table): Likewise.
539 (mod_table): Likewise.
540 (rm_table): Likewise.
541 (float_reg): Likewise.
542 (reg_table): Remove trailing "(bad)" entries.
543 (prefix_table): Likewise.
544 (x86_64_table): Likewise.
545 (vex_len_table): Likewise.
546 (vex_w_table): Likewise.
547 (mod_table): Likewise.
548 (rm_table): Likewise.
549 (get_valid_dis386): Handle bytemode 0.
550
551 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
552
553 * i386-opc.h (VEXScalar): New.
554
555 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
556 instructions.
557 * i386-tbl.h: Regenerated.
558
559 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
560
561 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
562
563 * i386-opc.tbl: Add xsave64 and xrstor64.
564 * i386-tbl.h: Regenerated.
565
566 2010-01-20 Nick Clifton <nickc@redhat.com>
567
568 PR 11170
569 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
570 based post-indexed addressing.
571
572 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
573
574 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
575 * i386-tbl.h: Regenerated.
576
577 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
578
579 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
580 comments.
581
582 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
583
584 * i386-dis.c (names_mm): New.
585 (intel_names_mm): Likewise.
586 (att_names_mm): Likewise.
587 (names_xmm): Likewise.
588 (intel_names_xmm): Likewise.
589 (att_names_xmm): Likewise.
590 (names_ymm): Likewise.
591 (intel_names_ymm): Likewise.
592 (att_names_ymm): Likewise.
593 (print_insn): Set names_mm, names_xmm and names_ymm.
594 (OP_MMX): Use names_mm, names_xmm and names_ymm.
595 (OP_XMM): Likewise.
596 (OP_EM): Likewise.
597 (OP_EMC): Likewise.
598 (OP_MXC): Likewise.
599 (OP_EX): Likewise.
600 (XMM_Fixup): Likewise.
601 (OP_VEX): Likewise.
602 (OP_EX_VexReg): Likewise.
603 (OP_Vex_2src): Likewise.
604 (OP_Vex_2src_1): Likewise.
605 (OP_Vex_2src_2): Likewise.
606 (OP_REG_VexI4): Likewise.
607
608 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
609
610 * i386-dis.c (print_insn): Update comments.
611
612 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
613
614 * i386-dis.c (rex_original): Removed.
615 (ckprefix): Remove rex_original.
616 (print_insn): Update comments.
617
618 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
619
620 * Makefile.in: Regenerate.
621 * configure: Regenerate.
622
623 2010-01-07 Doug Evans <dje@sebabeach.org>
624
625 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
626 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
627 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
628 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
629 * xstormy16-ibld.c: Regenerate.
630
631 2010-01-06 Quentin Neill <quentin.neill@amd.com>
632
633 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
634 * i386-init.h: Regenerated.
635
636 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
637
638 * arm-dis.c (print_insn): Fixed search for next symbol and data
639 dumping condition, and the initial mapping symbol state.
640
641 2010-01-05 Doug Evans <dje@sebabeach.org>
642
643 * cgen-ibld.in: #include "cgen/basic-modes.h".
644 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
645 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
646 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
647 * xstormy16-ibld.c: Regenerate.
648
649 2010-01-04 Nick Clifton <nickc@redhat.com>
650
651 PR 11123
652 * arm-dis.c (print_insn_coprocessor): Initialise value.
653
654 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
655
656 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
657
658 2010-01-02 Doug Evans <dje@sebabeach.org>
659
660 * cgen-asm.in: Update copyright year.
661 * cgen-dis.in: Update copyright year.
662 * cgen-ibld.in: Update copyright year.
663 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
664 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
665 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
666 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
667 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
668 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
669 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
670 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
671 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
672 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
673 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
674 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
675 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
676 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
677 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
678 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
679 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
680 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
681 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
682 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
683 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
684
685 For older changes see ChangeLog-2009
686 \f
687 Local Variables:
688 mode: change-log
689 left-margin: 8
690 fill-column: 74
691 version-control: never
692 End: