1 2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
3 * i386-dis.c (EXdS): New.
6 (d_swap_mode): Likewise.
8 (prefix_table): Use EXdS on movss and EXqS on movsd.
9 (vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd.
10 (intel_operand_size): Handle d_swap_mode.
13 * i386-opc.h (S): Update comments.
15 * i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd.
16 * i386-tbl.h: Regenerated.
18 2008-12-23 Nick Clifton <nickc@redhat.com>
20 * po/ga.po: Updated Irish translation.
22 2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
24 * i386-dis.c (EbS): New.
29 (b_swap_mode): Likewise.
30 (v_swap_mode): Likewise.
31 (q_swap_mode): Likewise.
32 (x_swap_mode): Likewise.
37 (swap_operand): Likewise.
38 (dis386): Use EbS on movB. Use EvS on moveS.
39 (dis386_twobyte): Use EXxS on movapX.
40 (prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
41 vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
42 (vex_table): Use EXxS on vmovapX.
43 (vex_len_table): Use EXqS on vmovq.
44 (intel_operand_size): Handle b_swap_mode, v_swap_mode,
45 q_swap_mode and x_swap_mode.
46 (OP_E_register): Handle b_swap_mode and v_swap_mode.
47 (OP_EM): Handle v_swap_mode.
48 (OP_EX): x_swap_mode and q_swap_mode.
50 * i386-gen.c (opcode_modifiers): Add S.
52 * i386-opc.h (S): New.
54 (i386_opcode_modifier): Add s.
56 * i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
57 movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
58 * i386-tbl.h: Regenerated.
60 2008-12-18 H.J. Lu <hongjiu.lu@intel.com>
62 * i386-dis.c (mnemonicendp): New.
64 (print_insn): Use mnemonicendp.
65 (OP_3DNowSuffix): Likewise.
66 (CMP_Fixup): Likewise.
67 (CMPXCHG8B_Fixup): Likewise.
68 (CRC32_Fixup): Likewise.
69 (OP_DREX_FCMP): Likewise.
70 (OP_DREX_ICMP): Likewise.
71 (VZERO_Fixup): Likewise.
72 (VCMP_Fixup): Likewise.
73 (PCLMUL_Fixup): Likewise.
74 (VPERMIL2_Fixup): Likewise.
75 (MOVBE_Fixup): Likewise.
76 (putop): Update mnemonicendp.
77 (oappend): Use stpcpy.
78 (simd_cmp_op): Changed to struct op.
79 (vex_cmp_op): Likewise.
80 (pclmul_op): Likewise.
81 (vpermil2_op): Likewise.
83 2008-12-18 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
85 * configure: Regenerate.
87 2008-12-15 Richard Earnshaw <rearnsha@arm.com>
89 * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
92 2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
94 * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
96 2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
98 * i386-dis.c (putop): Remove strayed comments.
100 2008-12-04 Ben Elliston <bje@au.ibm.com>
102 * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
104 (print_ppc_disassembler_options): Update usage.
105 * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
107 (PPCCHLK64): Likewise.
108 (powerpc_opcodes): Remove all BOOKE64 instructions.
110 2008-11-28 Joshua Kinard <kumba@gentoo.org>
112 * mips-dis.c (mips_arch_choices): Add r14000, r16000.
114 2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
116 * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
117 adjusted the mask for 32-bit branch instruction.
119 2008-11-27 Alan Modra <amodra@bigpond.net.au>
121 * ppc-opc.c (extract_sprg): Correct operand range check.
123 2008-11-26 Andreas Schwab <schwab@suse.de>
125 * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
126 (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
127 (save_printer, save_print_address): Remove.
128 (fetch_data): Don't use them.
129 (match_insn_m68k): Always restore printing functions.
130 (print_insn_m68k): Don't save/restore printing functions.
132 2008-11-25 Nick Clifton <nickc@redhat.com>
134 * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
136 2008-11-18 Catherine Moore <clm@codesourcery.com>
138 * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
140 (neon_opcodes): Likewise.
141 (print_insn_coprocessor): Print 't' or 'b' for vcvt
144 2008-11-14 Tristan Gingold <gingold@adacore.com>
146 * makefile.vms (OBJS): Update list of objects.
150 2008-11-06 Chao-ying Fu <fu@mips.com>
152 * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
154 (sync): New instruction with 5-bit sync type.
155 * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
157 2008-11-06 Nick Clifton <nickc@redhat.com>
159 * avr-dis.c: Replace uses of sprintf without a format string with
162 2008-11-03 H.J. Lu <hongjiu.lu@intel.com>
164 * i386-opc.tbl: Add cmovpe and cmovpo.
165 * i386-tbl.h: Regenerated.
167 2008-10-22 Nick Clifton <nickc@redhat.com>
170 * configure.in (SHARED_LIBADD): Revert previous change.
171 Add a comment explaining why.
172 (SHARED_DEPENDENCIES): Revert previous change.
173 * configure: Regenerate.
175 2008-10-10 Nick Clifton <nickc@redhat.com>
178 * configure.in (SHARED_LIBADD): Add libiberty.a.
179 (SHARED_DEPENDENCIES): Add libiberty.a.
181 2008-09-30 H.J. Lu <hongjiu.lu@intel.com>
183 * i386-gen.c: Include "hashtab.h".
184 (next_field): Take a new argument, last. Check last.
185 (process_i386_cpu_flag): Updated.
186 (process_i386_opcode_modifier): Likewise.
187 (process_i386_operand_type): Likewise.
188 (process_i386_registers): Likewise.
189 (output_i386_opcode): New.
190 (opcode_hash_entry): Likewise.
191 (opcode_hash_table): Likewise.
192 (opcode_hash_hash): Likewise.
193 (opcode_hash_eq): Likewise.
194 (process_i386_opcodes): Use opcode hash table and opcode array.
196 2008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
198 * s390-opc.txt (stdy, stey): Fix description
200 2008-09-30 Alan Modra <amodra@bigpond.net.au>
202 * Makefile.am: Run "make dep-am".
203 * Makefile.in: Regenerate.
205 2008-09-29 H.J. Lu <hongjiu.lu@intel.com>
207 * aclocal.m4: Regenerated.
208 * configure: Likewise.
209 * Makefile.in: Likewise.
211 2008-09-29 Nick Clifton <nickc@redhat.com>
213 * po/vi.po: Updated Vietnamese translation.
214 * po/fr.po: Updated French translation.
216 2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
218 * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
219 (cfxr, cfdr, cfer, clclu): Add esa flag.
220 (sqd): Instruction added.
221 (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
222 * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
224 2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
226 * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
227 (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
229 2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
231 * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
232 * i386-tbl.h: Regenerated.
234 2008-08-28 Jan Beulich <jbeulich@novell.com>
236 * i386-dis.c (dis386): Adjust far return mnemonics.
237 * i386-opc.tbl: Add retf.
238 * i386-tbl.h: Re-generate.
240 2008-08-28 Jan Beulich <jbeulich@novell.com>
242 * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
244 2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
246 * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
247 * ia64-gen.c (lookup_specifier): Likewise.
249 * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
250 * ia64-raw.tbl: Likewise.
251 * ia64-waw.tbl: Likewise.
252 * ia64-asmtab.c: Regenerated.
254 2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
256 * i386-opc.tbl: Correct fidivr operand size.
258 * i386-tbl.h: Regenerated.
260 2008-08-24 Alan Modra <amodra@bigpond.net.au>
262 * configure.in: Update a number of obsolete autoconf macros.
263 * aclocal.m4: Regenerate.
265 2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
267 AVX Programming Reference (August, 2008)
268 * i386-dis.c (PREFIX_VEX_38DB): New.
269 (PREFIX_VEX_38DC): Likewise.
270 (PREFIX_VEX_38DD): Likewise.
271 (PREFIX_VEX_38DE): Likewise.
272 (PREFIX_VEX_38DF): Likewise.
273 (PREFIX_VEX_3ADF): Likewise.
274 (VEX_LEN_38DB_P_2): Likewise.
275 (VEX_LEN_38DC_P_2): Likewise.
276 (VEX_LEN_38DD_P_2): Likewise.
277 (VEX_LEN_38DE_P_2): Likewise.
278 (VEX_LEN_38DF_P_2): Likewise.
279 (VEX_LEN_3ADF_P_2): Likewise.
280 (PREFIX_VEX_3A04): Updated.
281 (VEX_LEN_3A06_P_2): Likewise.
282 (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
283 PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
284 (x86_64_table): Likewise.
285 (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
286 VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
289 * i386-opc.tbl: Add AES + AVX instructions.
290 * i386-init.h: Regenerated.
291 * i386-tbl.h: Likewise.
293 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
295 * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
296 * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
298 2008-08-15 Alan Modra <amodra@bigpond.net.au>
301 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
302 * Makefile.in: Regenerate.
303 * aclocal.m4: Regenerate.
304 * config.in: Regenerate.
305 * configure: Regenerate.
307 2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
310 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
312 2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
314 * i386-opc.tbl: Add syscall and sysret for Cpu64.
316 * i386-tbl.h: Regenerated.
318 2008-08-04 Alan Modra <amodra@bigpond.net.au>
320 * Makefile.am (POTFILES.in): Set LC_ALL=C.
321 * Makefile.in: Regenerate.
322 * po/POTFILES.in: Regenerate.
324 2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
326 * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
327 (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
328 (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
329 * ppc-opc.c (insert_xt6): New static function.
330 (extract_xt6): Likewise.
331 (insert_xa6): Likewise.
332 (extract_xa6: Likewise.
333 (insert_xb6): Likewise.
334 (extract_xb6): Likewise.
335 (insert_xb6s): Likewise.
336 (extract_xb6s): Likewise.
337 (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
338 XX3DM_MASK, PPCVSX): New.
339 (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
340 "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
342 2008-08-01 Pedro Alves <pedro@codesourcery.com>
344 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
345 * Makefile.in: Regenerate.
347 2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
349 * i386-reg.tbl: Use Dw2Inval on AVX registers.
350 * i386-tbl.h: Regenerated.
352 2008-07-30 Michael J. Eager <eager@eagercon.com>
354 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
355 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
356 (insert_sprg, PPC405): Use PPC_OPCODE_405.
357 (powerpc_opcodes): Add Xilinx APU related opcodes.
359 2008-07-30 Alan Modra <amodra@bigpond.net.au>
361 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
363 2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
365 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
367 2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
369 * mips-opc.c (CP): New macro.
370 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
371 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
372 dmtc2 Octeon instructions.
374 2008-07-07 Stan Shebs <stan@codesourcery.com>
376 * dis-init.c (init_disassemble_info): Init endian_code field.
377 * arm-dis.c (print_insn): Disassemble code according to
378 setting of endian_code.
379 (print_insn_big_arm): Detect when BE8 extension flag has been set.
381 2008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
383 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
386 2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
388 * ppc-dis.c (powerpc_init_dialect): Handle -M464.
389 (print_ppc_disassembler_options): Likewise.
390 * ppc-opc.c (PPC464): Define.
391 (powerpc_opcodes): Add mfdcrux and mtdcrux.
393 2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
395 * configure: Regenerate.
397 2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
399 * ppc-dis.c (print_insn_powerpc): Update prototye to use new
401 (struct dis_private): New.
402 (POWERPC_DIALECT): New define.
403 (powerpc_dialect): Renamed to...
404 (powerpc_init_dialect): This. Update to use ppc_cpu_t and
406 (print_insn_big_powerpc): Update for using structure in
408 (print_insn_little_powerpc): Likewise.
409 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
410 (skip_optional_operands): Likewise.
411 (print_insn_powerpc): Likewise. Remove initialization of dialect.
412 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
413 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
414 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
415 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
416 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
417 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
418 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
419 param to be of type ppc_cpu_t. Update prototype.
421 2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
423 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
425 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
426 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
427 syncw, syncws, vm3mulu, vm0 and vmulu.
429 * mips-dis.c (print_insn_args): Handle field descriptor +Q.
430 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
433 2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
435 * i386-opc.tbl: Add vmovd with 64bit operand.
436 * i386-tbl.h: Regenerated.
438 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
440 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
442 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
444 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
445 * i386-tbl.h: Regenerated.
447 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
450 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
451 into 32bit and 64bit. Remove Reg64|Qword and add
452 IgnoreSize|No_qSuf on 32bit version.
453 * i386-tbl.h: Regenerated.
455 2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
457 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
458 * i386-tbl.h: Regenerated.
460 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
462 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
464 2008-05-14 Alan Modra <amodra@bigpond.net.au>
466 * Makefile.am: Run "make dep-am".
467 * Makefile.in: Regenerate.
469 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
471 * i386-dis.c (MOVBE_Fixup): New.
473 (PREFIX_0F3880): Likewise.
474 (PREFIX_0F3881): Likewise.
475 (PREFIX_0F38F0): Updated.
476 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
477 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
478 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
480 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
482 (cpu_flags): Add CpuMovbe and CpuEPT.
484 * i386-opc.h (CpuMovbe): New.
487 (i386_cpu_flags): Add cpumovbe and cpuept.
489 * i386-opc.tbl: Add entries for movbe and EPT instructions.
490 * i386-init.h: Regenerated.
491 * i386-tbl.h: Likewise.
493 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
495 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
496 the two drem and the two dremu macros.
498 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
500 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
501 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
502 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
503 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
505 2008-04-25 David S. Miller <davem@davemloft.net>
507 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
508 instead of %sys_tick_cmpr, as suggested in architecture manuals.
510 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
512 * aclocal.m4: Regenerate.
513 * configure: Regenerate.
515 2008-04-23 David S. Miller <davem@davemloft.net>
517 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
519 (prefetch_table): Add missing values.
521 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
523 * i386-gen.c (opcode_modifiers): Add NoAVX.
525 * i386-opc.h (NoAVX): New.
527 (i386_opcode_modifier): Add noavx.
529 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
530 instructions which don't have AVX equivalent.
531 * i386-tbl.h: Regenerated.
533 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
535 * i386-dis.c (OP_VEX_FMA): New.
536 (OP_EX_VexImmW): Likewise.
538 (Vex128FMA): Likewise.
539 (EXVexImmW): Likewise.
540 (get_vex_imm8): Likewise.
541 (OP_EX_VexReg): Likewise.
542 (vex_i4_done): Renamed to ...
544 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
545 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
547 (print_insn): Updated.
548 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
549 (OP_REG_VexI4): Check invalid high registers.
551 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
552 Michael Meissner <michael.meissner@amd.com>
554 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
555 * i386-tbl.h: Regenerate from i386-opc.tbl.
557 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
559 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
560 accept Power E500MC instructions.
561 (print_ppc_disassembler_options): Document -Me500mc.
562 * ppc-opc.c (DUIS, DUI, T): New.
563 (XRT, XRTRA): Likewise.
565 (powerpc_opcodes): Add new Power E500MC instructions.
567 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
569 * s390-dis.c (init_disasm): Evaluate disassembler_options.
570 (print_s390_disassembler_options): New function.
571 * disassemble.c (disassembler_usage): Invoke
572 print_s390_disassembler_options.
574 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
576 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
577 of local variables used for mnemonic parsing: prefix, suffix and
580 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
582 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
583 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
584 (s390_crb_extensions): New extensions table.
585 (insertExpandedMnemonic): Handle '$' tag.
586 * s390-opc.txt: Remove conditional jump variants which can now
587 be expanded automatically.
588 Replace '*' tag with '$' in the compare and branch instructions.
590 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
592 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
593 (PREFIX_VEX_3AXX): Likewis.
595 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
597 * i386-opc.tbl: Remove 4 extra blank lines.
599 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
601 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
602 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
603 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
604 * i386-opc.tbl: Likewise.
606 * i386-opc.h (CpuCLMUL): Renamed to ...
609 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
611 * i386-init.h: Regenerated.
613 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
615 * i386-dis.c (OP_E_register): New.
616 (OP_E_memory): Likewise.
618 (OP_EX_Vex): Likewise.
619 (OP_EX_VexW): Likewise.
620 (OP_XMM_Vex): Likewise.
621 (OP_XMM_VexW): Likewise.
622 (OP_REG_VexI4): Likewise.
623 (PCLMUL_Fixup): Likewise.
624 (VEXI4_Fixup): Likewise.
625 (VZERO_Fixup): Likewise.
626 (VCMP_Fixup): Likewise.
627 (VPERMIL2_Fixup): Likewise.
628 (rex_original): Likewise.
629 (rex_ignored): Likewise.
650 (VPERMIL2): Likewise.
651 (xmm_mode): Likewise.
652 (xmmq_mode): Likewise.
653 (ymmq_mode): Likewise.
654 (vex_mode): Likewise.
655 (vex128_mode): Likewise.
656 (vex256_mode): Likewise.
657 (USE_VEX_C4_TABLE): Likewise.
658 (USE_VEX_C5_TABLE): Likewise.
659 (USE_VEX_LEN_TABLE): Likewise.
660 (VEX_C4_TABLE): Likewise.
661 (VEX_C5_TABLE): Likewise.
662 (VEX_LEN_TABLE): Likewise.
663 (REG_VEX_XX): Likewise.
664 (MOD_VEX_XXX): Likewise.
665 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
666 (PREFIX_0F3A44): Likewise.
667 (PREFIX_0F3ADF): Likewise.
668 (PREFIX_VEX_XXX): Likewise.
670 (VEX_OF38): Likewise.
671 (VEX_OF3A): Likewise.
672 (VEX_LEN_XXX): Likewise.
674 (need_vex): Likewise.
675 (need_vex_reg): Likewise.
676 (vex_i4_done): Likewise.
677 (vex_table): Likewise.
678 (vex_len_table): Likewise.
679 (OP_REG_VexI4): Likewise.
680 (vex_cmp_op): Likewise.
681 (pclmul_op): Likewise.
682 (vpermil2_op): Likewise.
685 (PREFIX_0F38F0): Likewise.
686 (PREFIX_0F3A60): Likewise.
687 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
688 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
689 and PREFIX_VEX_XXX entries.
690 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
691 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
693 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
694 Add MOD_VEX_XXX entries.
695 (ckprefix): Initialize rex_original and rex_ignored. Store the
696 REX byte in rex_original.
697 (get_valid_dis386): Handle the implicit prefix in VEX prefix
698 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
699 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
700 calling get_valid_dis386. Use rex_original and rex_ignored when
702 (putop): Handle "XY".
703 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
705 (OP_E_extended): Updated to use OP_E_register and
707 (OP_XMM): Handle VEX.
709 (XMM_Fixup): Likewise.
710 (CMP_Fixup): Use ARRAY_SIZE.
712 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
713 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
714 (operand_type_init): Add OPERAND_TYPE_REGYMM and
715 OPERAND_TYPE_VEX_IMM4.
716 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
717 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
718 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
719 VexImmExt and SSE2AVX.
720 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
722 * i386-opc.h (CpuAVX): New.
724 (CpuCLMUL): Likewise.
735 (Vex3Sources): Likewise.
736 (VexImmExt): Likewise.
740 (Vex_Imm4): Likewise.
741 (Implicit1stXmm0): Likewise.
744 (ByteOkIntel): Likewise.
747 (Unspecified): Likewise.
749 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
750 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
751 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
752 vex3sources, veximmext and sse2avx.
753 (i386_operand_type): Add regymm, ymmword and vex_imm4.
755 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
757 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
759 * i386-init.h: Regenerated.
760 * i386-tbl.h: Likewise.
762 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
764 From Robin Getz <robin.getz@analog.com>
765 * bfin-dis.c (bu32): Typedef.
766 (enum const_forms_t): Add c_uimm32 and c_huimm32.
767 (constant_formats[]): Add uimm32 and huimm16.
772 (luimm16_val): Define.
773 (struct saved_state): Define.
774 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
775 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
776 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
778 (decode_LDIMMhalf_0): Print out the whole register value.
780 From Jie Zhang <jie.zhang@analog.com>
781 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
782 multiply and multiply-accumulate to data register instruction.
784 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
785 c_imm32, c_huimm32e): Define.
786 (constant_formats): Add flags for printing decimal, leading spaces, and
788 (comment, parallel): Add global flags in all disassembly.
789 (fmtconst): Take advantage of new flags, and print default in hex.
790 (fmtconst_val): Likewise.
791 (decode_macfunc): Be consistant with spaces, tabs, comments,
792 capitalization in disassembly, fix minor coding style issues.
793 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
794 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
795 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
796 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
797 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
798 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
799 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
800 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
801 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
802 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
803 _print_insn_bfin, print_insn_bfin): Likewise.
805 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
807 * aclocal.m4: Regenerate.
808 * configure: Likewise.
809 * Makefile.in: Likewise.
811 2008-03-13 Alan Modra <amodra@bigpond.net.au>
813 * Makefile.am: Run "make dep-am".
814 * Makefile.in: Regenerate.
815 * configure: Regenerate.
817 2008-03-07 Alan Modra <amodra@bigpond.net.au>
819 * ppc-opc.c (powerpc_opcodes): Order and format.
821 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
823 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
824 * i386-tbl.h: Regenerated.
826 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
828 * i386-opc.tbl: Disallow 16-bit near indirect branches for
830 * i386-tbl.h: Regenerated.
832 2008-02-21 Jan Beulich <jbeulich@novell.com>
834 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
835 and Fword for far indirect jmp. Allow Reg16 and Word for near
836 indirect jmp on x86-64. Disallow Fword for lcall.
837 * i386-tbl.h: Re-generate.
839 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
841 * cr16-opc.c (cr16_num_optab): Defined
843 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
845 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
846 * i386-init.h: Regenerated.
848 2008-02-14 Nick Clifton <nickc@redhat.com>
851 * configure.in (SHARED_LIBADD): Select the correct host specific
852 file extension for shared libraries.
853 * configure: Regenerate.
855 2008-02-13 Jan Beulich <jbeulich@novell.com>
857 * i386-opc.h (RegFlat): New.
858 * i386-reg.tbl (flat): Add.
859 * i386-tbl.h: Re-generate.
861 2008-02-13 Jan Beulich <jbeulich@novell.com>
863 * i386-dis.c (a_mode): New.
864 (cond_jump_mode): Adjust.
865 (Ma): Change to a_mode.
866 (intel_operand_size): Handle a_mode.
867 * i386-opc.tbl: Allow Dword and Qword for bound.
868 * i386-tbl.h: Re-generate.
870 2008-02-13 Jan Beulich <jbeulich@novell.com>
872 * i386-gen.c (process_i386_registers): Process new fields.
873 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
874 unsigned char. Add dw2_regnum and Dw2Inval.
875 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
877 * i386-tbl.h: Re-generate.
879 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
881 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
882 * i386-init.h: Updated.
884 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
886 * i386-gen.c (cpu_flags): Add CpuXsave.
888 * i386-opc.h (CpuXsave): New.
890 (i386_cpu_flags): Add cpuxsave.
892 * i386-dis.c (MOD_0FAE_REG_4): New.
893 (RM_0F01_REG_2): Likewise.
894 (MOD_0FAE_REG_5): Updated.
895 (RM_0F01_REG_3): Likewise.
896 (reg_table): Use MOD_0FAE_REG_4.
897 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
899 (rm_table): Add RM_0F01_REG_2.
901 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
902 * i386-init.h: Regenerated.
903 * i386-tbl.h: Likewise.
905 2008-02-11 Jan Beulich <jbeulich@novell.com>
907 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
908 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
909 * i386-tbl.h: Re-generate.
911 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
914 * configure: Regenerated.
916 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
918 * mips-dis.c: Update copyright.
919 (mips_arch_choices): Add Octeon.
920 * mips-opc.c: Update copyright.
922 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
924 2008-01-29 Alan Modra <amodra@bigpond.net.au>
926 * ppc-opc.c: Support optional L form mtmsr.
928 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
930 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
932 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
934 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
935 * i386-init.h: Regenerated.
937 2008-01-23 Tristan Gingold <gingold@adacore.com>
939 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
940 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
942 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
944 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
945 (cpu_flags): Likewise.
947 * i386-opc.h (CpuMMX2): Removed.
950 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
951 * i386-init.h: Regenerated.
952 * i386-tbl.h: Likewise.
954 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
956 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
958 * i386-init.h: Regenerated.
960 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
962 * i386-opc.tbl: Use Qword on movddup.
963 * i386-tbl.h: Regenerated.
965 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
967 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
968 * i386-tbl.h: Regenerated.
970 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
972 * i386-dis.c (Mx): New.
973 (PREFIX_0FC3): Likewise.
974 (PREFIX_0FC7_REG_6): Updated.
975 (dis386_twobyte): Use PREFIX_0FC3.
976 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
977 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
980 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
982 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
983 (operand_types): Add Mem.
985 * i386-opc.h (IntelSyntax): New.
986 * i386-opc.h (Mem): New.
988 (Opcode_Modifier_Max): Updated.
989 (i386_opcode_modifier): Add intelsyntax.
990 (i386_operand_type): Add mem.
992 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
995 * i386-reg.tbl: Add size for accumulator.
997 * i386-init.h: Regenerated.
998 * i386-tbl.h: Likewise.
1000 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
1002 * i386-opc.h (Byte): Fix a typo.
1004 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
1007 * i386-gen.c (operand_type_init): Add Dword to
1008 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
1009 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
1011 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
1012 Xmmword, Unspecified and Anysize.
1013 (set_bitfield): Make Mmword an alias of Qword. Make Oword
1014 an alias of Xmmword.
1016 * i386-opc.h (CheckSize): Removed.
1021 (Xmmword): Likewise.
1024 (i386_opcode_modifier): Remove checksize, byte, word, dword,
1028 (Unspecified): Likewise.
1029 (Anysize): Likewise.
1030 (i386_operand_type): Add byte, word, dword, fword, qword,
1031 tbyte xmmword, unspecified and anysize.
1033 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
1034 Tbyte, Xmmword, Unspecified and Anysize.
1036 * i386-reg.tbl: Add size for accumulator.
1038 * i386-init.h: Regenerated.
1039 * i386-tbl.h: Likewise.
1041 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
1043 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
1044 (REG_0F18): Updated.
1045 (reg_table): Updated.
1046 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
1047 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
1049 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
1051 * i386-gen.c (set_bitfield): Use fail () on error.
1053 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
1055 * i386-gen.c (lineno): New.
1056 (filename): Likewise.
1057 (set_bitfield): Report filename and line numer on error.
1058 (process_i386_opcodes): Set filename and update lineno.
1059 (process_i386_registers): Likewise.
1061 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
1063 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
1066 * i386-opc.h (IntelMnemonic): Renamed to ..
1068 (Opcode_Modifier_Max): Updated.
1069 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
1072 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
1073 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
1074 * i386-tbl.h: Regenerated.
1076 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
1078 * i386-gen.c: Update copyright to 2008.
1079 * i386-opc.h: Likewise.
1080 * i386-opc.tbl: Likewise.
1082 * i386-init.h: Regenerated.
1083 * i386-tbl.h: Likewise.
1085 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
1087 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
1088 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
1089 * i386-tbl.h: Regenerated.
1091 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
1093 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
1095 (cpu_flags): Likewise.
1097 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
1098 (CpuSSE4_2_Or_ABM): Likewise.
1100 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
1102 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
1103 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
1104 and CpuPadLock, respectively.
1105 * i386-init.h: Regenerated.
1106 * i386-tbl.h: Likewise.
1108 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
1110 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
1112 * i386-opc.h (No_xSuf): Removed.
1113 (CheckSize): Updated.
1115 * i386-tbl.h: Regenerated.
1117 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1119 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
1120 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1122 (cpu_flags): Add CpuSSE4_2_Or_ABM.
1124 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1126 (i386_cpu_flags): Add cpusse4_2_or_abm.
1128 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1129 CpuABM|CpuSSE4_2 on popcnt.
1130 * i386-init.h: Regenerated.
1131 * i386-tbl.h: Likewise.
1133 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1135 * i386-opc.h: Update comments.
1137 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1139 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1140 * i386-opc.h: Likewise.
1141 * i386-opc.tbl: Likewise.
1143 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
1146 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1147 Byte, Word, Dword, QWord and Xmmword.
1149 * i386-opc.h (No_xSuf): New.
1150 (CheckSize): Likewise.
1155 (Xmmword): Likewise.
1157 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1158 Dword, QWord and Xmmword.
1160 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1162 * i386-tbl.h: Regenerated.
1164 2008-01-02 Mark Kettenis <kettenis@gnu.org>
1166 * m88k-dis.c (instructions): Fix fcvt.* instructions.
1169 For older changes see ChangeLog-2007
1175 version-control: never