1 /* Disassemble AVR instructions.
2 Copyright (C) 1999-2022 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov <denisc@overta.ru>
6 This file is part of libopcodes.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
25 #include "disassemble.h"
27 #include "libiberty.h"
35 int insn_size
; /* In words. */
37 unsigned int bin_opcode
;
40 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
41 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
43 const struct avr_opcodes_s avr_opcodes
[] =
45 #include "opcode/avr.h"
46 {NULL
, NULL
, NULL
, 0, 0, 0}
49 static const char * comment_start
= "0x";
52 avr_operand (unsigned int insn
,
62 disassemble_info
* info
)
69 /* Any register operand. */
72 insn
= (insn
& 0xf) | ((insn
& 0x0200) >> 5); /* Source register. */
74 insn
= (insn
& 0x01f0) >> 4; /* Destination register. */
76 sprintf (buf
, "r%d", insn
);
81 sprintf (buf
, "r%d", 16 + (insn
& 0xf));
83 sprintf (buf
, "r%d", 16 + ((insn
& 0xf0) >> 4));
87 sprintf (buf
, "r%d", 24 + ((insn
& 0x30) >> 3));
92 sprintf (buf
, "r%d", 16 + (insn
& 7));
94 sprintf (buf
, "r%d", 16 + ((insn
>> 4) & 7));
99 sprintf (buf
, "r%d", (insn
& 0xf) * 2);
101 sprintf (buf
, "r%d", ((insn
& 0xf0) >> 3));
108 switch (insn
& 0x100f)
110 case 0x0000: xyz
= "Z"; break;
111 case 0x1001: xyz
= "Z+"; break;
112 case 0x1002: xyz
= "-Z"; break;
113 case 0x0008: xyz
= "Y"; break;
114 case 0x1009: xyz
= "Y+"; break;
115 case 0x100a: xyz
= "-Y"; break;
116 case 0x100c: xyz
= "X"; break;
117 case 0x100d: xyz
= "X+"; break;
118 case 0x100e: xyz
= "-X"; break;
119 default: xyz
= "??"; ok
= 0;
123 if (AVR_UNDEF_P (insn
))
124 sprintf (comment
, _("undefined"));
131 /* Check for post-increment. */
133 for (s
= opcode_str
; *s
; ++s
)
137 if (insn
& (1 << (15 - (s
- opcode_str
))))
144 if (AVR_UNDEF_P (insn
))
145 sprintf (comment
, _("undefined"));
153 x
|= (insn
>> 7) & (3 << 3);
154 x
|= (insn
>> 8) & (1 << 5);
160 sprintf (buf
, "+%d", x
);
161 sprintf (comment
, "0x%02x", x
);
167 *sym_addr
= ((((insn
& 1) | ((insn
& 0x1f0) >> 3)) << 16) | insn2
) * 2;
168 /* See PR binutils/2454. Ideally we would like to display the hex
169 value of the address only once, but this would mean recoding
170 objdump_print_address() which would affect many targets. */
171 sprintf (buf
, "%#lx", (unsigned long) *sym_addr
);
172 strcpy (comment
, comment_start
);
173 info
->insn_info_valid
= 1;
174 info
->insn_type
= dis_jsr
;
175 info
->target
= *sym_addr
;
180 int rel_addr
= (((insn
& 0xfff) ^ 0x800) - 0x800) * 2;
181 sprintf (buf
, ".%+-8d", rel_addr
);
183 *sym_addr
= pc
+ 2 + rel_addr
;
184 strcpy (comment
, comment_start
);
185 info
->insn_info_valid
= 1;
186 info
->insn_type
= dis_branch
;
187 info
->target
= *sym_addr
;
193 int rel_addr
= ((((insn
>> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
195 sprintf (buf
, ".%+-8d", rel_addr
);
197 *sym_addr
= pc
+ 2 + rel_addr
;
198 strcpy (comment
, comment_start
);
199 info
->insn_info_valid
= 1;
200 info
->insn_type
= dis_condbranch
;
201 info
->target
= *sym_addr
;
207 unsigned int val
= insn2
| 0x800000;
210 sprintf (buf
, "0x%04X", insn2
);
211 strcpy (comment
, comment_start
);
217 unsigned int val
= ((insn
& 0xf) | ((insn
& 0x600) >> 5)
218 | ((insn
& 0x100) >> 2));
219 if ((insn
& 0x100) == 0)
222 *sym_addr
= val
| 0x800000;
223 sprintf (buf
, "0x%02x", val
);
224 strcpy (comment
, comment_start
);
229 sprintf (buf
, "0x%02X", ((insn
& 0xf00) >> 4) | (insn
& 0xf));
230 sprintf (comment
, "%d", ((insn
& 0xf00) >> 4) | (insn
& 0xf));
235 /* xgettext:c-format */
236 opcodes_error_handler (_("internal disassembler error"));
244 x
= (insn
& 0xf) | ((insn
>> 2) & 0x30);
245 sprintf (buf
, "0x%02x", x
);
246 sprintf (comment
, "%d", x
);
251 sprintf (buf
, "%d", insn
& 7);
255 sprintf (buf
, "%d", (insn
>> 4) & 7);
263 x
|= (insn
>> 5) & 0x30;
264 sprintf (buf
, "0x%02x", x
);
265 sprintf (comment
, "%d", x
);
273 x
= (insn
>> 3) & 0x1f;
274 sprintf (buf
, "0x%02x", x
);
275 sprintf (comment
, "%d", x
);
280 sprintf (buf
, "%d", (insn
>> 4) & 15);
289 /* xgettext:c-format */
290 opcodes_error_handler (_("unknown constraint `%c'"), constraint
);
297 /* Read the opcode from ADDR. Return 0 in success and save opcode
298 in *INSN, otherwise, return -1. */
301 avrdis_opcode (bfd_vma addr
, disassemble_info
*info
, uint16_t *insn
)
306 status
= info
->read_memory_func (addr
, buffer
, 2, info
);
310 *insn
= bfd_getl16 (buffer
);
314 info
->memory_error_func (status
, addr
, info
);
320 print_insn_avr (bfd_vma addr
, disassemble_info
*info
)
322 uint16_t insn
, insn2
;
323 const struct avr_opcodes_s
*opcode
;
324 static unsigned int *maskptr
;
325 void *stream
= info
->stream
;
326 fprintf_ftype prin
= info
->fprintf_func
;
327 static unsigned int *avr_bin_masks
;
328 static int initialized
;
331 char op1
[20], op2
[20], comment1
[40], comment2
[40];
332 int sym_op1
= 0, sym_op2
= 0;
333 bfd_vma sym_addr1
, sym_addr2
;
335 /* Clear instruction information field. */
336 info
->insn_info_valid
= 0;
337 info
->branch_delay_insns
= 0;
339 info
->insn_type
= dis_noninsn
;
345 unsigned int nopcodes
;
347 /* PR 4045: Try to avoid duplicating the 0x prefix that
348 objdump_print_addr() will put on addresses when there
349 is no symbol table available. */
350 if (info
->symtab_size
== 0)
353 nopcodes
= sizeof (avr_opcodes
) / sizeof (struct avr_opcodes_s
);
355 avr_bin_masks
= xmalloc (nopcodes
* sizeof (unsigned int));
357 for (opcode
= avr_opcodes
, maskptr
= avr_bin_masks
;
362 unsigned int bin
= 0;
363 unsigned int mask
= 0;
365 for (s
= opcode
->opcode
; *s
; ++s
)
370 mask
|= (*s
== '1' || *s
== '0');
372 assert (s
- opcode
->opcode
== 16);
373 assert (opcode
->bin_opcode
== bin
);
380 if (avrdis_opcode (addr
, info
, &insn
) != 0)
383 for (opcode
= avr_opcodes
, maskptr
= avr_bin_masks
;
387 if ((opcode
->isa
== AVR_ISA_TINY
) && (info
->mach
!= bfd_mach_avrtiny
))
389 if ((insn
& *maskptr
) == opcode
->bin_opcode
)
393 /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
394 `std b+0,r' as `st b,r' (next entry in the table). */
396 if (AVR_DISP0_P (insn
))
406 char *constraints
= opcode
->constraints
;
407 char *opcode_str
= opcode
->opcode
;
412 if (opcode
->insn_size
> 1)
414 if (avrdis_opcode (addr
+ 2, info
, &insn2
) != 0)
419 if (*constraints
&& *constraints
!= '?')
421 int regs
= REGISTER_P (*constraints
);
423 ok
= avr_operand (insn
, insn2
, addr
, *constraints
, opcode_str
, op1
,
424 comment1
, 0, &sym_op1
, &sym_addr1
, info
);
426 if (ok
&& *(++constraints
) == ',')
427 ok
= avr_operand (insn
, insn2
, addr
, *(++constraints
), opcode_str
,
428 op2
, *comment1
? comment2
: comment1
, regs
,
429 &sym_op2
, &sym_addr2
, info
);
435 /* Unknown opcode, or invalid combination of operands. */
436 sprintf (op1
, "0x%04x", insn
);
438 sprintf (comment1
, "????");
442 (*prin
) (stream
, "%s", ok
? opcode
->name
: ".word");
445 (*prin
) (stream
, "\t%s", op1
);
448 (*prin
) (stream
, ", %s", op2
);
451 (*prin
) (stream
, "\t; %s", comment1
);
454 info
->print_address_func (sym_addr1
, info
);
457 (*prin
) (stream
, " %s", comment2
);
460 info
->print_address_func (sym_addr2
, info
);