1 /* Disassemble ADI Blackfin Instructions.
2 Copyright 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
4 This file is part of libopcodes.
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 It is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "opcode/bfin.h"
47 #define HOST_LONG_WORD_SIZE (sizeof (long) * 8)
48 #define XFIELD(w,p,s) (((w) & ((1 << (s)) - 1) << (p)) >> (p))
49 #define SIGNEXTEND(v, n) ((v << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n)))
50 #define MASKBITS(val, bits) (val & ((1 << bits) - 1))
54 typedef unsigned int bu32
;
58 c_0
, c_1
, c_4
, c_2
, c_uimm2
, c_uimm3
, c_imm3
, c_pcrel4
,
59 c_imm4
, c_uimm4s4
, c_uimm4s4d
, c_uimm4
, c_uimm4s2
, c_negimm5s4
, c_imm5
, c_imm5d
, c_uimm5
, c_imm6
,
60 c_imm7
, c_imm7d
, c_imm8
, c_uimm8
, c_pcrel8
, c_uimm8s4
, c_pcrel8s4
, c_lppcrel10
, c_pcrel10
,
61 c_pcrel12
, c_imm16s4
, c_luimm16
, c_imm16
, c_imm16d
, c_huimm16
, c_rimm16
, c_imm16s2
, c_uimm16s4
,
62 c_uimm16s4d
, c_uimm16
, c_pcrel24
, c_uimm32
, c_imm32
, c_huimm32
, c_huimm32e
,
79 } constant_formats
[] =
81 { "0", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
82 { "1", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
83 { "4", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
84 { "2", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
85 { "uimm2", 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
86 { "uimm3", 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
87 { "imm3", 3, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
88 { "pcrel4", 4, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0},
89 { "imm4", 4, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
90 { "uimm4s4", 4, 0, 0, 0, 2, 0, 0, 1, 0, 0, 0},
91 { "uimm4s4d", 4, 0, 0, 0, 2, 0, 0, 1, 1, 0, 0},
92 { "uimm4", 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
93 { "uimm4s2", 4, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0},
94 { "negimm5s4", 5, 0, 1, 0, 2, 0, 1, 0, 0, 0, 0},
95 { "imm5", 5, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
96 { "imm5d", 5, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0},
97 { "uimm5", 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
98 { "imm6", 6, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
99 { "imm7", 7, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
100 { "imm7d", 7, 0, 1, 0, 0, 0, 0, 0, 1, 3, 0},
101 { "imm8", 8, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
102 { "uimm8", 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
103 { "pcrel8", 8, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0},
104 { "uimm8s4", 8, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0},
105 { "pcrel8s4", 8, 1, 1, 1, 2, 0, 0, 0, 0, 0, 0},
106 { "lppcrel10", 10, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0},
107 { "pcrel10", 10, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0},
108 { "pcrel12", 12, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0},
109 { "imm16s4", 16, 0, 1, 0, 2, 0, 0, 0, 0, 0, 0},
110 { "luimm16", 16, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0},
111 { "imm16", 16, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
112 { "imm16d", 16, 0, 1, 0, 0, 0, 0, 0, 1, 3, 0},
113 { "huimm16", 16, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0},
114 { "rimm16", 16, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0},
115 { "imm16s2", 16, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0},
116 { "uimm16s4", 16, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0},
117 { "uimm16s4d", 16, 0, 0, 0, 2, 0, 0, 0, 1, 0, 0},
118 { "uimm16", 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
119 { "pcrel24", 24, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0},
120 { "uimm32", 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
121 { "imm32", 32, 0, 1, 0, 0, 0, 0, 0, 1, 3, 0},
122 { "huimm32", 32, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0},
123 { "huimm32e", 32, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1},
126 int _print_insn_bfin (bfd_vma pc
, disassemble_info
* outf
);
127 int print_insn_bfin (bfd_vma pc
, disassemble_info
* outf
);
129 static char comment
= 0;
130 static char parallel
= 0;
133 fmtconst (const_forms_t cf
, TIword x
, bfd_vma pc
, disassemble_info
* outf
)
137 if (constant_formats
[cf
].reloc
)
139 bfd_vma ea
= (((constant_formats
[cf
].pcrel
? SIGNEXTEND (x
, constant_formats
[cf
].nbits
)
140 : x
) + constant_formats
[cf
].offset
) << constant_formats
[cf
].scale
);
141 if (constant_formats
[cf
].pcrel
)
144 if (outf
->symbol_at_address_func (ea
, outf
) || !constant_formats
[cf
].exact
)
146 outf
->print_address_func (ea
, outf
);
151 sprintf (buf
, "%lx", (unsigned long) x
);
156 /* Negative constants have an implied sign bit. */
157 if (constant_formats
[cf
].negative
)
159 int nb
= constant_formats
[cf
].nbits
+ 1;
161 x
= x
| (1 << constant_formats
[cf
].nbits
);
162 x
= SIGNEXTEND (x
, nb
);
165 x
= constant_formats
[cf
].issigned
? SIGNEXTEND (x
, constant_formats
[cf
].nbits
) : x
;
167 if (constant_formats
[cf
].offset
)
168 x
+= constant_formats
[cf
].offset
;
170 if (constant_formats
[cf
].scale
)
171 x
<<= constant_formats
[cf
].scale
;
173 if (constant_formats
[cf
].decimal
)
175 if (constant_formats
[cf
].leading
)
178 sprintf (ps
, "%%%ii", constant_formats
[cf
].leading
);
179 sprintf (buf
, ps
, x
);
182 sprintf (buf
, "%li", x
);
186 if (constant_formats
[cf
].issigned
&& x
< 0)
187 sprintf (buf
, "-0x%x", abs (x
));
189 sprintf (buf
, "0x%lx", (unsigned long) x
);
196 fmtconst_val (const_forms_t cf
, unsigned int x
, unsigned int pc
)
198 if (0 && constant_formats
[cf
].reloc
)
200 bu32 ea
= (((constant_formats
[cf
].pcrel
201 ? SIGNEXTEND (x
, constant_formats
[cf
].nbits
)
202 : x
) + constant_formats
[cf
].offset
)
203 << constant_formats
[cf
].scale
);
204 if (constant_formats
[cf
].pcrel
)
210 /* Negative constants have an implied sign bit. */
211 if (constant_formats
[cf
].negative
)
213 int nb
= constant_formats
[cf
].nbits
+ 1;
214 x
= x
| (1 << constant_formats
[cf
].nbits
);
215 x
= SIGNEXTEND (x
, nb
);
217 else if (constant_formats
[cf
].issigned
)
218 x
= SIGNEXTEND (x
, constant_formats
[cf
].nbits
);
220 x
+= constant_formats
[cf
].offset
;
221 x
<<= constant_formats
[cf
].scale
;
226 enum machine_registers
228 REG_RL0
, REG_RL1
, REG_RL2
, REG_RL3
, REG_RL4
, REG_RL5
, REG_RL6
, REG_RL7
,
229 REG_RH0
, REG_RH1
, REG_RH2
, REG_RH3
, REG_RH4
, REG_RH5
, REG_RH6
, REG_RH7
,
230 REG_R0
, REG_R1
, REG_R2
, REG_R3
, REG_R4
, REG_R5
, REG_R6
, REG_R7
,
231 REG_R1_0
, REG_R3_2
, REG_R5_4
, REG_R7_6
, REG_P0
, REG_P1
, REG_P2
, REG_P3
,
232 REG_P4
, REG_P5
, REG_SP
, REG_FP
, REG_A0x
, REG_A1x
, REG_A0w
, REG_A1w
,
233 REG_A0
, REG_A1
, REG_I0
, REG_I1
, REG_I2
, REG_I3
, REG_M0
, REG_M1
,
234 REG_M2
, REG_M3
, REG_B0
, REG_B1
, REG_B2
, REG_B3
, REG_L0
, REG_L1
,
236 REG_AZ
, REG_AN
, REG_AC0
, REG_AC1
, REG_AV0
, REG_AV1
, REG_AV0S
, REG_AV1S
,
237 REG_AQ
, REG_V
, REG_VS
,
238 REG_sftreset
, REG_omode
, REG_excause
, REG_emucause
, REG_idle_req
, REG_hwerrcause
, REG_CC
, REG_LC0
,
239 REG_LC1
, REG_GP
, REG_ASTAT
, REG_RETS
, REG_LT0
, REG_LB0
, REG_LT1
, REG_LB1
,
240 REG_CYCLES
, REG_CYCLES2
, REG_USP
, REG_SEQSTAT
, REG_SYSCFG
, REG_RETI
, REG_RETX
, REG_RETN
,
241 REG_RETE
, REG_EMUDAT
, REG_BR0
, REG_BR1
, REG_BR2
, REG_BR3
, REG_BR4
, REG_BR5
, REG_BR6
,
242 REG_BR7
, REG_PL0
, REG_PL1
, REG_PL2
, REG_PL3
, REG_PL4
, REG_PL5
, REG_SLP
, REG_FLP
,
243 REG_PH0
, REG_PH1
, REG_PH2
, REG_PH3
, REG_PH4
, REG_PH5
, REG_SHP
, REG_FHP
,
244 REG_IL0
, REG_IL1
, REG_IL2
, REG_IL3
, REG_ML0
, REG_ML1
, REG_ML2
, REG_ML3
,
245 REG_BL0
, REG_BL1
, REG_BL2
, REG_BL3
, REG_LL0
, REG_LL1
, REG_LL2
, REG_LL3
,
246 REG_IH0
, REG_IH1
, REG_IH2
, REG_IH3
, REG_MH0
, REG_MH1
, REG_MH2
, REG_MH3
,
247 REG_BH0
, REG_BH1
, REG_BH2
, REG_BH3
, REG_LH0
, REG_LH1
, REG_LH2
, REG_LH3
,
253 rc_dregs_lo
, rc_dregs_hi
, rc_dregs
, rc_dregs_pair
, rc_pregs
, rc_spfp
, rc_dregs_hilo
, rc_accum_ext
,
254 rc_accum_word
, rc_accum
, rc_iregs
, rc_mregs
, rc_bregs
, rc_lregs
, rc_dpregs
, rc_gregs
,
255 rc_regs
, rc_statbits
, rc_ignore_bits
, rc_ccstat
, rc_counters
, rc_dregs2_sysregs1
, rc_open
, rc_sysregs2
,
256 rc_sysregs3
, rc_allregs
,
260 static char *reg_names
[] =
262 "R0.L", "R1.L", "R2.L", "R3.L", "R4.L", "R5.L", "R6.L", "R7.L",
263 "R0.H", "R1.H", "R2.H", "R3.H", "R4.H", "R5.H", "R6.H", "R7.H",
264 "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
265 "R1:0", "R3:2", "R5:4", "R7:6", "P0", "P1", "P2", "P3",
266 "P4", "P5", "SP", "FP", "A0.X", "A1.X", "A0.W", "A1.W",
267 "A0", "A1", "I0", "I1", "I2", "I3", "M0", "M1",
268 "M2", "M3", "B0", "B1", "B2", "B3", "L0", "L1",
270 "AZ", "AN", "AC0", "AC1", "AV0", "AV1", "AV0S", "AV1S",
272 "sftreset", "omode", "excause", "emucause", "idle_req", "hwerrcause", "CC", "LC0",
273 "LC1", "GP", "ASTAT", "RETS", "LT0", "LB0", "LT1", "LB1",
274 "CYCLES", "CYCLES2", "USP", "SEQSTAT", "SYSCFG", "RETI", "RETX", "RETN",
276 "R0.B", "R1.B", "R2.B", "R3.B", "R4.B", "R5.B", "R6.B", "R7.B",
277 "P0.L", "P1.L", "P2.L", "P3.L", "P4.L", "P5.L", "SP.L", "FP.L",
278 "P0.H", "P1.H", "P2.H", "P3.H", "P4.H", "P5.H", "SP.H", "FP.H",
279 "I0.L", "I1.L", "I2.L", "I3.L", "M0.L", "M1.L", "M2.L", "M3.L",
280 "B0.L", "B1.L", "B2.L", "B3.L", "L0.L", "L1.L", "L2.L", "L3.L",
281 "I0.H", "I1.H", "I2.H", "I3.H", "M0.H", "M1.H", "M2.H", "M3.H",
282 "B0.H", "B1.H", "B2.H", "B3.H", "L0.H", "L1.H", "L2.H", "L3.H",
287 #define REGNAME(x) ((x) < REG_LASTREG ? (reg_names[x]) : "...... Illegal register .......")
290 static enum machine_registers decode_dregs_lo
[] =
292 REG_RL0
, REG_RL1
, REG_RL2
, REG_RL3
, REG_RL4
, REG_RL5
, REG_RL6
, REG_RL7
,
295 #define dregs_lo(x) REGNAME (decode_dregs_lo[(x) & 7])
298 static enum machine_registers decode_dregs_hi
[] =
300 REG_RH0
, REG_RH1
, REG_RH2
, REG_RH3
, REG_RH4
, REG_RH5
, REG_RH6
, REG_RH7
,
303 #define dregs_hi(x) REGNAME (decode_dregs_hi[(x) & 7])
306 static enum machine_registers decode_dregs
[] =
308 REG_R0
, REG_R1
, REG_R2
, REG_R3
, REG_R4
, REG_R5
, REG_R6
, REG_R7
,
311 #define dregs(x) REGNAME (decode_dregs[(x) & 7])
314 static enum machine_registers decode_dregs_byte
[] =
316 REG_BR0
, REG_BR1
, REG_BR2
, REG_BR3
, REG_BR4
, REG_BR5
, REG_BR6
, REG_BR7
,
319 #define dregs_byte(x) REGNAME (decode_dregs_byte[(x) & 7])
320 #define dregs_pair(x) REGNAME (decode_dregs_pair[(x) & 7])
323 static enum machine_registers decode_pregs
[] =
325 REG_P0
, REG_P1
, REG_P2
, REG_P3
, REG_P4
, REG_P5
, REG_SP
, REG_FP
,
328 #define pregs(x) REGNAME (decode_pregs[(x) & 7])
329 #define spfp(x) REGNAME (decode_spfp[(x) & 1])
330 #define dregs_hilo(x,i) REGNAME (decode_dregs_hilo[((i) << 3)|x])
331 #define accum_ext(x) REGNAME (decode_accum_ext[(x) & 1])
332 #define accum_word(x) REGNAME (decode_accum_word[(x) & 1])
333 #define accum(x) REGNAME (decode_accum[(x) & 1])
336 static enum machine_registers decode_iregs
[] =
338 REG_I0
, REG_I1
, REG_I2
, REG_I3
,
341 #define iregs(x) REGNAME (decode_iregs[(x) & 3])
344 static enum machine_registers decode_mregs
[] =
346 REG_M0
, REG_M1
, REG_M2
, REG_M3
,
349 #define mregs(x) REGNAME (decode_mregs[(x) & 3])
350 #define bregs(x) REGNAME (decode_bregs[(x) & 3])
351 #define lregs(x) REGNAME (decode_lregs[(x) & 3])
354 static enum machine_registers decode_dpregs
[] =
356 REG_R0
, REG_R1
, REG_R2
, REG_R3
, REG_R4
, REG_R5
, REG_R6
, REG_R7
,
357 REG_P0
, REG_P1
, REG_P2
, REG_P3
, REG_P4
, REG_P5
, REG_SP
, REG_FP
,
360 #define dpregs(x) REGNAME (decode_dpregs[(x) & 15])
363 static enum machine_registers decode_gregs
[] =
365 REG_R0
, REG_R1
, REG_R2
, REG_R3
, REG_R4
, REG_R5
, REG_R6
, REG_R7
,
366 REG_P0
, REG_P1
, REG_P2
, REG_P3
, REG_P4
, REG_P5
, REG_SP
, REG_FP
,
369 #define gregs(x,i) REGNAME (decode_gregs[((i) << 3)|x])
371 /* [dregs pregs (iregs mregs) (bregs lregs)]. */
372 static enum machine_registers decode_regs
[] =
374 REG_R0
, REG_R1
, REG_R2
, REG_R3
, REG_R4
, REG_R5
, REG_R6
, REG_R7
,
375 REG_P0
, REG_P1
, REG_P2
, REG_P3
, REG_P4
, REG_P5
, REG_SP
, REG_FP
,
376 REG_I0
, REG_I1
, REG_I2
, REG_I3
, REG_M0
, REG_M1
, REG_M2
, REG_M3
,
377 REG_B0
, REG_B1
, REG_B2
, REG_B3
, REG_L0
, REG_L1
, REG_L2
, REG_L3
,
380 #define regs(x,i) REGNAME (decode_regs[((i) << 3)|x])
382 /* [dregs pregs (iregs mregs) (bregs lregs) Low Half]. */
383 static enum machine_registers decode_regs_lo
[] =
385 REG_RL0
, REG_RL1
, REG_RL2
, REG_RL3
, REG_RL4
, REG_RL5
, REG_RL6
, REG_RL7
,
386 REG_PL0
, REG_PL1
, REG_PL2
, REG_PL3
, REG_PL4
, REG_PL5
, REG_SLP
, REG_FLP
,
387 REG_IL0
, REG_IL1
, REG_IL2
, REG_IL3
, REG_ML0
, REG_ML1
, REG_ML2
, REG_ML3
,
388 REG_BL0
, REG_BL1
, REG_BL2
, REG_BL3
, REG_LL0
, REG_LL1
, REG_LL2
, REG_LL3
,
391 #define regs_lo(x,i) REGNAME (decode_regs_lo[((i) << 3)|x])
392 /* [dregs pregs (iregs mregs) (bregs lregs) High Half]. */
393 static enum machine_registers decode_regs_hi
[] =
395 REG_RH0
, REG_RH1
, REG_RH2
, REG_RH3
, REG_RH4
, REG_RH5
, REG_RH6
, REG_RH7
,
396 REG_PH0
, REG_PH1
, REG_PH2
, REG_PH3
, REG_PH4
, REG_PH5
, REG_SHP
, REG_FHP
,
397 REG_IH0
, REG_IH1
, REG_IH2
, REG_IH3
, REG_MH0
, REG_MH1
, REG_LH2
, REG_MH3
,
398 REG_BH0
, REG_BH1
, REG_BH2
, REG_BH3
, REG_LH0
, REG_LH1
, REG_LH2
, REG_LH3
,
401 #define regs_hi(x,i) REGNAME (decode_regs_hi[((i) << 3)|x])
403 static enum machine_registers decode_statbits
[] =
405 REG_AZ
, REG_AN
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_AQ
, REG_LASTREG
,
406 REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_AC0
, REG_AC1
, REG_LASTREG
, REG_LASTREG
,
407 REG_AV0
, REG_AV0S
, REG_AV1
, REG_AV1S
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
,
408 REG_V
, REG_VS
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
,
411 #define statbits(x) REGNAME (decode_statbits[(x) & 31])
412 #define ignore_bits(x) REGNAME (decode_ignore_bits[(x) & 7])
413 #define ccstat(x) REGNAME (decode_ccstat[(x) & 0])
416 static enum machine_registers decode_counters
[] =
421 #define counters(x) REGNAME (decode_counters[(x) & 1])
422 #define dregs2_sysregs1(x) REGNAME (decode_dregs2_sysregs1[(x) & 7])
424 /* [dregs pregs (iregs mregs) (bregs lregs)
425 dregs2_sysregs1 open sysregs2 sysregs3]. */
426 static enum machine_registers decode_allregs
[] =
428 REG_R0
, REG_R1
, REG_R2
, REG_R3
, REG_R4
, REG_R5
, REG_R6
, REG_R7
,
429 REG_P0
, REG_P1
, REG_P2
, REG_P3
, REG_P4
, REG_P5
, REG_SP
, REG_FP
,
430 REG_I0
, REG_I1
, REG_I2
, REG_I3
, REG_M0
, REG_M1
, REG_M2
, REG_M3
,
431 REG_B0
, REG_B1
, REG_B2
, REG_B3
, REG_L0
, REG_L1
, REG_L2
, REG_L3
,
432 REG_A0x
, REG_A0w
, REG_A1x
, REG_A1w
, REG_GP
, REG_LASTREG
, REG_ASTAT
, REG_RETS
,
433 REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
,
434 REG_LC0
, REG_LT0
, REG_LB0
, REG_LC1
, REG_LT1
, REG_LB1
, REG_CYCLES
, REG_CYCLES2
,
435 REG_USP
, REG_SEQSTAT
, REG_SYSCFG
, REG_RETI
, REG_RETX
, REG_RETN
, REG_RETE
, REG_EMUDAT
, REG_LASTREG
,
438 #define allregs(x,i) REGNAME (decode_allregs[((i) << 3) | x])
439 #define uimm16s4(x) fmtconst (c_uimm16s4, x, 0, outf)
440 #define uimm16s4d(x) fmtconst (c_uimm16s4d, x, 0, outf)
441 #define pcrel4(x) fmtconst (c_pcrel4, x, pc, outf)
442 #define pcrel8(x) fmtconst (c_pcrel8, x, pc, outf)
443 #define pcrel8s4(x) fmtconst (c_pcrel8s4, x, pc, outf)
444 #define pcrel10(x) fmtconst (c_pcrel10, x, pc, outf)
445 #define pcrel12(x) fmtconst (c_pcrel12, x, pc, outf)
446 #define negimm5s4(x) fmtconst (c_negimm5s4, x, 0, outf)
447 #define rimm16(x) fmtconst (c_rimm16, x, 0, outf)
448 #define huimm16(x) fmtconst (c_huimm16, x, 0, outf)
449 #define imm16(x) fmtconst (c_imm16, x, 0, outf)
450 #define imm16d(x) fmtconst (c_imm16d, x, 0, outf)
451 #define uimm2(x) fmtconst (c_uimm2, x, 0, outf)
452 #define uimm3(x) fmtconst (c_uimm3, x, 0, outf)
453 #define luimm16(x) fmtconst (c_luimm16, x, 0, outf)
454 #define uimm4(x) fmtconst (c_uimm4, x, 0, outf)
455 #define uimm5(x) fmtconst (c_uimm5, x, 0, outf)
456 #define imm16s2(x) fmtconst (c_imm16s2, x, 0, outf)
457 #define uimm8(x) fmtconst (c_uimm8, x, 0, outf)
458 #define imm16s4(x) fmtconst (c_imm16s4, x, 0, outf)
459 #define uimm4s2(x) fmtconst (c_uimm4s2, x, 0, outf)
460 #define uimm4s4(x) fmtconst (c_uimm4s4, x, 0, outf)
461 #define uimm4s4d(x) fmtconst (c_uimm4s4d, x, 0, outf)
462 #define lppcrel10(x) fmtconst (c_lppcrel10, x, pc, outf)
463 #define imm3(x) fmtconst (c_imm3, x, 0, outf)
464 #define imm4(x) fmtconst (c_imm4, x, 0, outf)
465 #define uimm8s4(x) fmtconst (c_uimm8s4, x, 0, outf)
466 #define imm5(x) fmtconst (c_imm5, x, 0, outf)
467 #define imm5d(x) fmtconst (c_imm5d, x, 0, outf)
468 #define imm6(x) fmtconst (c_imm6, x, 0, outf)
469 #define imm7(x) fmtconst (c_imm7, x, 0, outf)
470 #define imm7d(x) fmtconst (c_imm7d, x, 0, outf)
471 #define imm8(x) fmtconst (c_imm8, x, 0, outf)
472 #define pcrel24(x) fmtconst (c_pcrel24, x, pc, outf)
473 #define uimm16(x) fmtconst (c_uimm16, x, 0, outf)
474 #define uimm32(x) fmtconst (c_uimm32, x, 0, outf)
475 #define imm32(x) fmtconst (c_imm32, x, 0, outf)
476 #define huimm32(x) fmtconst (c_huimm32, x, 0, outf)
477 #define huimm32e(x) fmtconst (c_huimm32e, x, 0, outf)
478 #define imm7_val(x) fmtconst_val (c_imm7, x, 0)
479 #define imm16_val(x) fmtconst_val (c_uimm16, x, 0)
480 #define luimm16_val(x) fmtconst_val (c_luimm16, x, 0)
482 /* (arch.pm)arch_disassembler_functions. */
484 #define OUTS(p, txt) ((p) ? (((txt)[0]) ? (p->fprintf_func)(p->stream, "%s", txt) :0) :0)
488 amod0 (int s0
, int x0
, disassemble_info
*outf
)
490 if (s0
== 1 && x0
== 0)
492 else if (s0
== 0 && x0
== 1)
493 OUTS (outf
, " (CO)");
494 else if (s0
== 1 && x0
== 1)
495 OUTS (outf
, " (SCO)");
499 amod1 (int s0
, int x0
, disassemble_info
*outf
)
501 if (s0
== 0 && x0
== 0)
502 OUTS (outf
, " (NS)");
503 else if (s0
== 1 && x0
== 0)
508 amod0amod2 (int s0
, int x0
, int aop0
, disassemble_info
*outf
)
510 if (s0
== 1 && x0
== 0 && aop0
== 0)
512 else if (s0
== 0 && x0
== 1 && aop0
== 0)
513 OUTS (outf
, " (CO)");
514 else if (s0
== 1 && x0
== 1 && aop0
== 0)
515 OUTS (outf
, " (SCO)");
516 else if (s0
== 0 && x0
== 0 && aop0
== 2)
517 OUTS (outf
, " (ASR)");
518 else if (s0
== 1 && x0
== 0 && aop0
== 2)
519 OUTS (outf
, " (S, ASR)");
520 else if (s0
== 0 && x0
== 1 && aop0
== 2)
521 OUTS (outf
, " (CO, ASR)");
522 else if (s0
== 1 && x0
== 1 && aop0
== 2)
523 OUTS (outf
, " (SCO, ASR)");
524 else if (s0
== 0 && x0
== 0 && aop0
== 3)
525 OUTS (outf
, " (ASL)");
526 else if (s0
== 1 && x0
== 0 && aop0
== 3)
527 OUTS (outf
, " (S, ASL)");
528 else if (s0
== 0 && x0
== 1 && aop0
== 3)
529 OUTS (outf
, " (CO, ASL)");
530 else if (s0
== 1 && x0
== 1 && aop0
== 3)
531 OUTS (outf
, " (SCO, ASL)");
535 searchmod (int r0
, disassemble_info
*outf
)
548 aligndir (int r0
, disassemble_info
*outf
)
555 decode_multfunc (int h0
, int h1
, int src0
, int src1
, disassemble_info
* outf
)
560 s0
= dregs_hi (src0
);
562 s0
= dregs_lo (src0
);
565 s1
= dregs_hi (src1
);
567 s1
= dregs_lo (src1
);
576 decode_macfunc (int which
, int op
, int h0
, int h1
, int src0
, int src1
, disassemble_info
* outf
)
579 char *sop
= "<unknown op>";
594 case 0: sop
= " = "; break;
595 case 1: sop
= " += "; break;
596 case 2: sop
= " -= "; break;
602 decode_multfunc (h0
, h1
, src0
, src1
, outf
);
608 decode_optmode (int mod
, int MM
, disassemble_info
*outf
)
610 if (mod
== 0 && MM
== 0)
625 OUTS (outf
, "S2RND");
628 else if (mod
== M_W32
)
630 else if (mod
== M_FU
)
632 else if (mod
== M_TFU
)
634 else if (mod
== M_IS
)
636 else if (mod
== M_ISS2
)
638 else if (mod
== M_IH
)
640 else if (mod
== M_IU
)
650 bu32 dpregs
[16], iregs
[4], mregs
[4], bregs
[4], lregs
[4];
651 bu32 a0x
, a0w
, a1x
, a1w
;
652 bu32 lt
[2], lc
[2], lb
[2];
653 int ac0
, ac0_copy
, ac1
, an
, aq
;
654 int av0
, av0s
, av1
, av1s
, az
, cc
, v
, v_copy
, vs
;
664 int end_of_registers
;
667 unsigned char *memory
;
668 unsigned long bfd_mach
;
671 #define DREG(x) (saved_state.dpregs[x])
672 #define GREG(x,i) DPREG ((x) | (i << 3))
673 #define DPREG(x) (saved_state.dpregs[x])
674 #define DREG(x) (saved_state.dpregs[x])
675 #define PREG(x) (saved_state.dpregs[x + 8])
676 #define SPREG PREG (6)
677 #define FPREG PREG (7)
678 #define IREG(x) (saved_state.iregs[x])
679 #define MREG(x) (saved_state.mregs[x])
680 #define BREG(x) (saved_state.bregs[x])
681 #define LREG(x) (saved_state.lregs[x])
682 #define A0XREG (saved_state.a0x)
683 #define A0WREG (saved_state.a0w)
684 #define A1XREG (saved_state.a1x)
685 #define A1WREG (saved_state.a1w)
686 #define CCREG (saved_state.cc)
687 #define LC0REG (saved_state.lc[0])
688 #define LT0REG (saved_state.lt[0])
689 #define LB0REG (saved_state.lb[0])
690 #define LC1REG (saved_state.lc[1])
691 #define LT1REG (saved_state.lt[1])
692 #define LB1REG (saved_state.lb[1])
693 #define RETSREG (saved_state.rets)
694 #define PCREG (saved_state.pc)
697 get_allreg (int grp
, int reg
)
699 int fullreg
= (grp
<< 3) | reg
;
700 /* REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
701 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
702 REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3,
703 REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3,
704 REG_A0x, REG_A0w, REG_A1x, REG_A1w, , , REG_ASTAT, REG_RETS,
706 REG_LC0, REG_LT0, REG_LB0, REG_LC1, REG_LT1, REG_LB1, REG_CYCLES,
708 REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN, REG_RETE,
710 switch (fullreg
>> 2)
712 case 0: case 1: return &DREG (reg
); break;
713 case 2: case 3: return &PREG (reg
); break;
714 case 4: return &IREG (reg
& 3); break;
715 case 5: return &MREG (reg
& 3); break;
716 case 6: return &BREG (reg
& 3); break;
717 case 7: return &LREG (reg
& 3); break;
721 case 32: return &saved_state
.a0x
;
722 case 33: return &saved_state
.a0w
;
723 case 34: return &saved_state
.a1x
;
724 case 35: return &saved_state
.a1w
;
725 case 39: return &saved_state
.rets
;
726 case 48: return &LC0REG
;
727 case 49: return <0REG
;
728 case 50: return &LB0REG
;
729 case 51: return &LC1REG
;
730 case 52: return <1REG
;
731 case 53: return &LB1REG
;
738 decode_ProgCtrl_0 (TIword iw0
, disassemble_info
*outf
)
741 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
742 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........|
743 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
744 int poprnd
= ((iw0
>> ProgCtrl_poprnd_bits
) & ProgCtrl_poprnd_mask
);
745 int prgfunc
= ((iw0
>> ProgCtrl_prgfunc_bits
) & ProgCtrl_prgfunc_mask
);
747 if (prgfunc
== 0 && poprnd
== 0)
749 else if (prgfunc
== 1 && poprnd
== 0)
751 else if (prgfunc
== 1 && poprnd
== 1)
753 else if (prgfunc
== 1 && poprnd
== 2)
755 else if (prgfunc
== 1 && poprnd
== 3)
757 else if (prgfunc
== 1 && poprnd
== 4)
759 else if (prgfunc
== 2 && poprnd
== 0)
761 else if (prgfunc
== 2 && poprnd
== 3)
762 OUTS (outf
, "CSYNC");
763 else if (prgfunc
== 2 && poprnd
== 4)
764 OUTS (outf
, "SSYNC");
765 else if (prgfunc
== 2 && poprnd
== 5)
766 OUTS (outf
, "EMUEXCPT");
767 else if (prgfunc
== 3)
770 OUTS (outf
, dregs (poprnd
));
772 else if (prgfunc
== 4)
775 OUTS (outf
, dregs (poprnd
));
777 else if (prgfunc
== 5)
779 OUTS (outf
, "JUMP (");
780 OUTS (outf
, pregs (poprnd
));
783 else if (prgfunc
== 6)
785 OUTS (outf
, "CALL (");
786 OUTS (outf
, pregs (poprnd
));
789 else if (prgfunc
== 7)
791 OUTS (outf
, "CALL (PC + ");
792 OUTS (outf
, pregs (poprnd
));
795 else if (prgfunc
== 8)
797 OUTS (outf
, "JUMP (PC + ");
798 OUTS (outf
, pregs (poprnd
));
801 else if (prgfunc
== 9)
803 OUTS (outf
, "RAISE ");
804 OUTS (outf
, uimm4 (poprnd
));
806 else if (prgfunc
== 10)
808 OUTS (outf
, "EXCPT ");
809 OUTS (outf
, uimm4 (poprnd
));
811 else if (prgfunc
== 11)
813 OUTS (outf
, "TESTSET (");
814 OUTS (outf
, pregs (poprnd
));
823 decode_CaCTRL_0 (TIword iw0
, disassemble_info
*outf
)
826 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
827 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......|
828 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
829 int a
= ((iw0
>> CaCTRL_a_bits
) & CaCTRL_a_mask
);
830 int op
= ((iw0
>> CaCTRL_op_bits
) & CaCTRL_op_mask
);
831 int reg
= ((iw0
>> CaCTRL_reg_bits
) & CaCTRL_reg_mask
);
833 if (a
== 0 && op
== 0)
835 OUTS (outf
, "PREFETCH[");
836 OUTS (outf
, pregs (reg
));
839 else if (a
== 0 && op
== 1)
841 OUTS (outf
, "FLUSHINV[");
842 OUTS (outf
, pregs (reg
));
845 else if (a
== 0 && op
== 2)
847 OUTS (outf
, "FLUSH[");
848 OUTS (outf
, pregs (reg
));
851 else if (a
== 0 && op
== 3)
853 OUTS (outf
, "IFLUSH[");
854 OUTS (outf
, pregs (reg
));
857 else if (a
== 1 && op
== 0)
859 OUTS (outf
, "PREFETCH[");
860 OUTS (outf
, pregs (reg
));
863 else if (a
== 1 && op
== 1)
865 OUTS (outf
, "FLUSHINV[");
866 OUTS (outf
, pregs (reg
));
869 else if (a
== 1 && op
== 2)
871 OUTS (outf
, "FLUSH[");
872 OUTS (outf
, pregs (reg
));
875 else if (a
== 1 && op
== 3)
877 OUTS (outf
, "IFLUSH[");
878 OUTS (outf
, pregs (reg
));
887 decode_PushPopReg_0 (TIword iw0
, disassemble_info
*outf
)
890 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
891 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......|
892 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
893 int W
= ((iw0
>> PushPopReg_W_bits
) & PushPopReg_W_mask
);
894 int grp
= ((iw0
>> PushPopReg_grp_bits
) & PushPopReg_grp_mask
);
895 int reg
= ((iw0
>> PushPopReg_reg_bits
) & PushPopReg_reg_mask
);
899 OUTS (outf
, allregs (reg
, grp
));
900 OUTS (outf
, " = [SP++]");
904 OUTS (outf
, "[--SP] = ");
905 OUTS (outf
, allregs (reg
, grp
));
913 decode_PushPopMultiple_0 (TIword iw0
, disassemble_info
*outf
)
916 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
917 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........|
918 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
919 int p
= ((iw0
>> PushPopMultiple_p_bits
) & PushPopMultiple_p_mask
);
920 int d
= ((iw0
>> PushPopMultiple_d_bits
) & PushPopMultiple_d_mask
);
921 int W
= ((iw0
>> PushPopMultiple_W_bits
) & PushPopMultiple_W_mask
);
922 int dr
= ((iw0
>> PushPopMultiple_dr_bits
) & PushPopMultiple_dr_mask
);
923 int pr
= ((iw0
>> PushPopMultiple_pr_bits
) & PushPopMultiple_pr_mask
);
925 if (W
== 1 && d
== 1 && p
== 1)
927 OUTS (outf
, "[--SP] = (R7:");
928 OUTS (outf
, imm5d (dr
));
929 OUTS (outf
, ", P5:");
930 OUTS (outf
, imm5d (pr
));
933 else if (W
== 1 && d
== 1 && p
== 0)
935 OUTS (outf
, "[--SP] = (R7:");
936 OUTS (outf
, imm5d (dr
));
939 else if (W
== 1 && d
== 0 && p
== 1)
941 OUTS (outf
, "[--SP] = (P5:");
942 OUTS (outf
, imm5d (pr
));
945 else if (W
== 0 && d
== 1 && p
== 1)
948 OUTS (outf
, imm5d (dr
));
949 OUTS (outf
, ", P5:");
950 OUTS (outf
, imm5d (pr
));
951 OUTS (outf
, ") = [SP++]");
953 else if (W
== 0 && d
== 1 && p
== 0)
956 OUTS (outf
, imm5d (dr
));
957 OUTS (outf
, ") = [SP++]");
959 else if (W
== 0 && d
== 0 && p
== 1)
962 OUTS (outf
, imm5d (pr
));
963 OUTS (outf
, ") = [SP++]");
971 decode_ccMV_0 (TIword iw0
, disassemble_info
*outf
)
974 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
975 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......|
976 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
977 int s
= ((iw0
>> CCmv_s_bits
) & CCmv_s_mask
);
978 int d
= ((iw0
>> CCmv_d_bits
) & CCmv_d_mask
);
979 int T
= ((iw0
>> CCmv_T_bits
) & CCmv_T_mask
);
980 int src
= ((iw0
>> CCmv_src_bits
) & CCmv_src_mask
);
981 int dst
= ((iw0
>> CCmv_dst_bits
) & CCmv_dst_mask
);
985 OUTS (outf
, "IF CC ");
986 OUTS (outf
, gregs (dst
, d
));
988 OUTS (outf
, gregs (src
, s
));
992 OUTS (outf
, "IF !CC ");
993 OUTS (outf
, gregs (dst
, d
));
995 OUTS (outf
, gregs (src
, s
));
1003 decode_CCflag_0 (TIword iw0
, disassemble_info
*outf
)
1006 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1007 | 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........|
1008 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1009 int x
= ((iw0
>> CCflag_x_bits
) & CCflag_x_mask
);
1010 int y
= ((iw0
>> CCflag_y_bits
) & CCflag_y_mask
);
1011 int I
= ((iw0
>> CCflag_I_bits
) & CCflag_I_mask
);
1012 int G
= ((iw0
>> CCflag_G_bits
) & CCflag_G_mask
);
1013 int opc
= ((iw0
>> CCflag_opc_bits
) & CCflag_opc_mask
);
1015 if (opc
== 0 && I
== 0 && G
== 0)
1017 OUTS (outf
, "CC = ");
1018 OUTS (outf
, dregs (x
));
1019 OUTS (outf
, " == ");
1020 OUTS (outf
, dregs (y
));
1022 else if (opc
== 1 && I
== 0 && G
== 0)
1024 OUTS (outf
, "CC = ");
1025 OUTS (outf
, dregs (x
));
1027 OUTS (outf
, dregs (y
));
1029 else if (opc
== 2 && I
== 0 && G
== 0)
1031 OUTS (outf
, "CC = ");
1032 OUTS (outf
, dregs (x
));
1033 OUTS (outf
, " <= ");
1034 OUTS (outf
, dregs (y
));
1036 else if (opc
== 3 && I
== 0 && G
== 0)
1038 OUTS (outf
, "CC = ");
1039 OUTS (outf
, dregs (x
));
1041 OUTS (outf
, dregs (y
));
1042 OUTS (outf
, " (IU)");
1044 else if (opc
== 4 && I
== 0 && G
== 0)
1046 OUTS (outf
, "CC = ");
1047 OUTS (outf
, dregs (x
));
1048 OUTS (outf
, " <= ");
1049 OUTS (outf
, dregs (y
));
1050 OUTS (outf
, " (IU)");
1052 else if (opc
== 0 && I
== 1 && G
== 0)
1054 OUTS (outf
, "CC = ");
1055 OUTS (outf
, dregs (x
));
1056 OUTS (outf
, " == ");
1057 OUTS (outf
, imm3 (y
));
1059 else if (opc
== 1 && I
== 1 && G
== 0)
1061 OUTS (outf
, "CC = ");
1062 OUTS (outf
, dregs (x
));
1064 OUTS (outf
, imm3 (y
));
1066 else if (opc
== 2 && I
== 1 && G
== 0)
1068 OUTS (outf
, "CC = ");
1069 OUTS (outf
, dregs (x
));
1070 OUTS (outf
, " <= ");
1071 OUTS (outf
, imm3 (y
));
1073 else if (opc
== 3 && I
== 1 && G
== 0)
1075 OUTS (outf
, "CC = ");
1076 OUTS (outf
, dregs (x
));
1078 OUTS (outf
, uimm3 (y
));
1079 OUTS (outf
, " (IU)");
1081 else if (opc
== 4 && I
== 1 && G
== 0)
1083 OUTS (outf
, "CC = ");
1084 OUTS (outf
, dregs (x
));
1085 OUTS (outf
, " <= ");
1086 OUTS (outf
, uimm3 (y
));
1087 OUTS (outf
, " (IU)");
1089 else if (opc
== 0 && I
== 0 && G
== 1)
1091 OUTS (outf
, "CC = ");
1092 OUTS (outf
, pregs (x
));
1093 OUTS (outf
, " == ");
1094 OUTS (outf
, pregs (y
));
1096 else if (opc
== 1 && I
== 0 && G
== 1)
1098 OUTS (outf
, "CC = ");
1099 OUTS (outf
, pregs (x
));
1101 OUTS (outf
, pregs (y
));
1103 else if (opc
== 2 && I
== 0 && G
== 1)
1105 OUTS (outf
, "CC = ");
1106 OUTS (outf
, pregs (x
));
1107 OUTS (outf
, " <= ");
1108 OUTS (outf
, pregs (y
));
1110 else if (opc
== 3 && I
== 0 && G
== 1)
1112 OUTS (outf
, "CC = ");
1113 OUTS (outf
, pregs (x
));
1115 OUTS (outf
, pregs (y
));
1116 OUTS (outf
, " (IU)");
1118 else if (opc
== 4 && I
== 0 && G
== 1)
1120 OUTS (outf
, "CC = ");
1121 OUTS (outf
, pregs (x
));
1122 OUTS (outf
, " <= ");
1123 OUTS (outf
, pregs (y
));
1124 OUTS (outf
, " (IU)");
1126 else if (opc
== 0 && I
== 1 && G
== 1)
1128 OUTS (outf
, "CC = ");
1129 OUTS (outf
, pregs (x
));
1130 OUTS (outf
, " == ");
1131 OUTS (outf
, imm3 (y
));
1133 else if (opc
== 1 && I
== 1 && G
== 1)
1135 OUTS (outf
, "CC = ");
1136 OUTS (outf
, pregs (x
));
1138 OUTS (outf
, imm3 (y
));
1140 else if (opc
== 2 && I
== 1 && G
== 1)
1142 OUTS (outf
, "CC = ");
1143 OUTS (outf
, pregs (x
));
1144 OUTS (outf
, " <= ");
1145 OUTS (outf
, imm3 (y
));
1147 else if (opc
== 3 && I
== 1 && G
== 1)
1149 OUTS (outf
, "CC = ");
1150 OUTS (outf
, pregs (x
));
1152 OUTS (outf
, uimm3 (y
));
1153 OUTS (outf
, " (IU)");
1155 else if (opc
== 4 && I
== 1 && G
== 1)
1157 OUTS (outf
, "CC = ");
1158 OUTS (outf
, pregs (x
));
1159 OUTS (outf
, " <= ");
1160 OUTS (outf
, uimm3 (y
));
1161 OUTS (outf
, " (IU)");
1163 else if (opc
== 5 && I
== 0 && G
== 0)
1164 OUTS (outf
, "CC = A0 == A1");
1166 else if (opc
== 6 && I
== 0 && G
== 0)
1167 OUTS (outf
, "CC = A0 < A1");
1169 else if (opc
== 7 && I
== 0 && G
== 0)
1170 OUTS (outf
, "CC = A0 <= A1");
1178 decode_CC2dreg_0 (TIword iw0
, disassemble_info
*outf
)
1181 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1182 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......|
1183 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1184 int op
= ((iw0
>> CC2dreg_op_bits
) & CC2dreg_op_mask
);
1185 int reg
= ((iw0
>> CC2dreg_reg_bits
) & CC2dreg_reg_mask
);
1189 OUTS (outf
, dregs (reg
));
1190 OUTS (outf
, " = CC");
1194 OUTS (outf
, "CC = ");
1195 OUTS (outf
, dregs (reg
));
1198 OUTS (outf
, "CC = !CC");
1206 decode_CC2stat_0 (TIword iw0
, disassemble_info
*outf
)
1209 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1210 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............|
1211 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1212 int D
= ((iw0
>> CC2stat_D_bits
) & CC2stat_D_mask
);
1213 int op
= ((iw0
>> CC2stat_op_bits
) & CC2stat_op_mask
);
1214 int cbit
= ((iw0
>> CC2stat_cbit_bits
) & CC2stat_cbit_mask
);
1216 if (op
== 0 && D
== 0)
1218 OUTS (outf
, "CC = ");
1219 OUTS (outf
, statbits (cbit
));
1221 else if (op
== 1 && D
== 0)
1223 OUTS (outf
, "CC |= ");
1224 OUTS (outf
, statbits (cbit
));
1226 else if (op
== 2 && D
== 0)
1228 OUTS (outf
, "CC &= ");
1229 OUTS (outf
, statbits (cbit
));
1231 else if (op
== 3 && D
== 0)
1233 OUTS (outf
, "CC ^= ");
1234 OUTS (outf
, statbits (cbit
));
1236 else if (op
== 0 && D
== 1)
1238 OUTS (outf
, statbits (cbit
));
1239 OUTS (outf
, " = CC");
1241 else if (op
== 1 && D
== 1)
1243 OUTS (outf
, statbits (cbit
));
1244 OUTS (outf
, " |= CC");
1246 else if (op
== 2 && D
== 1)
1248 OUTS (outf
, statbits (cbit
));
1249 OUTS (outf
, " &= CC");
1251 else if (op
== 3 && D
== 1)
1253 OUTS (outf
, statbits (cbit
));
1254 OUTS (outf
, " ^= CC");
1263 decode_BRCC_0 (TIword iw0
, bfd_vma pc
, disassemble_info
*outf
)
1266 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1267 | 0 | 0 | 0 | 1 |.T.|.B.|.offset................................|
1268 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1269 int B
= ((iw0
>> BRCC_B_bits
) & BRCC_B_mask
);
1270 int T
= ((iw0
>> BRCC_T_bits
) & BRCC_T_mask
);
1271 int offset
= ((iw0
>> BRCC_offset_bits
) & BRCC_offset_mask
);
1273 if (T
== 1 && B
== 1)
1275 OUTS (outf
, "IF CC JUMP 0x");
1276 OUTS (outf
, pcrel10 (offset
));
1277 OUTS (outf
, " (BP)");
1279 else if (T
== 0 && B
== 1)
1281 OUTS (outf
, "IF !CC JUMP 0x");
1282 OUTS (outf
, pcrel10 (offset
));
1283 OUTS (outf
, " (BP)");
1287 OUTS (outf
, "IF CC JUMP 0x");
1288 OUTS (outf
, pcrel10 (offset
));
1292 OUTS (outf
, "IF !CC JUMP 0x");
1293 OUTS (outf
, pcrel10 (offset
));
1302 decode_UJUMP_0 (TIword iw0
, bfd_vma pc
, disassemble_info
*outf
)
1305 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1306 | 0 | 0 | 1 | 0 |.offset........................................|
1307 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1308 int offset
= ((iw0
>> UJump_offset_bits
) & UJump_offset_mask
);
1310 OUTS (outf
, "JUMP.S 0x");
1311 OUTS (outf
, pcrel12 (offset
));
1316 decode_REGMV_0 (TIword iw0
, disassemble_info
*outf
)
1319 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1320 | 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......|
1321 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1322 int gs
= ((iw0
>> RegMv_gs_bits
) & RegMv_gs_mask
);
1323 int gd
= ((iw0
>> RegMv_gd_bits
) & RegMv_gd_mask
);
1324 int src
= ((iw0
>> RegMv_src_bits
) & RegMv_src_mask
);
1325 int dst
= ((iw0
>> RegMv_dst_bits
) & RegMv_dst_mask
);
1327 OUTS (outf
, allregs (dst
, gd
));
1329 OUTS (outf
, allregs (src
, gs
));
1334 decode_ALU2op_0 (TIword iw0
, disassemble_info
*outf
)
1337 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1338 | 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......|
1339 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1340 int src
= ((iw0
>> ALU2op_src_bits
) & ALU2op_src_mask
);
1341 int opc
= ((iw0
>> ALU2op_opc_bits
) & ALU2op_opc_mask
);
1342 int dst
= ((iw0
>> ALU2op_dst_bits
) & ALU2op_dst_mask
);
1346 OUTS (outf
, dregs (dst
));
1347 OUTS (outf
, " >>>= ");
1348 OUTS (outf
, dregs (src
));
1352 OUTS (outf
, dregs (dst
));
1353 OUTS (outf
, " >>= ");
1354 OUTS (outf
, dregs (src
));
1358 OUTS (outf
, dregs (dst
));
1359 OUTS (outf
, " <<= ");
1360 OUTS (outf
, dregs (src
));
1364 OUTS (outf
, dregs (dst
));
1365 OUTS (outf
, " *= ");
1366 OUTS (outf
, dregs (src
));
1370 OUTS (outf
, dregs (dst
));
1371 OUTS (outf
, " = (");
1372 OUTS (outf
, dregs (dst
));
1374 OUTS (outf
, dregs (src
));
1375 OUTS (outf
, ") << 0x1");
1379 OUTS (outf
, dregs (dst
));
1380 OUTS (outf
, " = (");
1381 OUTS (outf
, dregs (dst
));
1383 OUTS (outf
, dregs (src
));
1384 OUTS (outf
, ") << 0x2");
1388 OUTS (outf
, "DIVQ (");
1389 OUTS (outf
, dregs (dst
));
1391 OUTS (outf
, dregs (src
));
1396 OUTS (outf
, "DIVS (");
1397 OUTS (outf
, dregs (dst
));
1399 OUTS (outf
, dregs (src
));
1404 OUTS (outf
, dregs (dst
));
1406 OUTS (outf
, dregs_lo (src
));
1407 OUTS (outf
, " (X)");
1411 OUTS (outf
, dregs (dst
));
1413 OUTS (outf
, dregs_lo (src
));
1414 OUTS (outf
, " (Z)");
1418 OUTS (outf
, dregs (dst
));
1420 OUTS (outf
, dregs_byte (src
));
1421 OUTS (outf
, " (X)");
1425 OUTS (outf
, dregs (dst
));
1427 OUTS (outf
, dregs_byte (src
));
1428 OUTS (outf
, " (Z)");
1432 OUTS (outf
, dregs (dst
));
1433 OUTS (outf
, " = -");
1434 OUTS (outf
, dregs (src
));
1438 OUTS (outf
, dregs (dst
));
1439 OUTS (outf
, " =~ ");
1440 OUTS (outf
, dregs (src
));
1449 decode_PTR2op_0 (TIword iw0
, disassemble_info
*outf
)
1452 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1453 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......|
1454 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1455 int src
= ((iw0
>> PTR2op_src_bits
) & PTR2op_dst_mask
);
1456 int opc
= ((iw0
>> PTR2op_opc_bits
) & PTR2op_opc_mask
);
1457 int dst
= ((iw0
>> PTR2op_dst_bits
) & PTR2op_dst_mask
);
1461 OUTS (outf
, pregs (dst
));
1462 OUTS (outf
, " -= ");
1463 OUTS (outf
, pregs (src
));
1467 OUTS (outf
, pregs (dst
));
1469 OUTS (outf
, pregs (src
));
1470 OUTS (outf
, " << 0x2");
1474 OUTS (outf
, pregs (dst
));
1476 OUTS (outf
, pregs (src
));
1477 OUTS (outf
, " >> 0x2");
1481 OUTS (outf
, pregs (dst
));
1483 OUTS (outf
, pregs (src
));
1484 OUTS (outf
, " >> 0x1");
1488 OUTS (outf
, pregs (dst
));
1489 OUTS (outf
, " += ");
1490 OUTS (outf
, pregs (src
));
1491 OUTS (outf
, " (BREV)");
1495 OUTS (outf
, pregs (dst
));
1496 OUTS (outf
, " = (");
1497 OUTS (outf
, pregs (dst
));
1499 OUTS (outf
, pregs (src
));
1500 OUTS (outf
, ") << 0x1");
1504 OUTS (outf
, pregs (dst
));
1505 OUTS (outf
, " = (");
1506 OUTS (outf
, pregs (dst
));
1508 OUTS (outf
, pregs (src
));
1509 OUTS (outf
, ") << 0x2");
1518 decode_LOGI2op_0 (TIword iw0
, disassemble_info
*outf
)
1521 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1522 | 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......|
1523 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1524 int src
= ((iw0
>> LOGI2op_src_bits
) & LOGI2op_src_mask
);
1525 int opc
= ((iw0
>> LOGI2op_opc_bits
) & LOGI2op_opc_mask
);
1526 int dst
= ((iw0
>> LOGI2op_dst_bits
) & LOGI2op_dst_mask
);
1530 OUTS (outf
, "CC = !BITTST (");
1531 OUTS (outf
, dregs (dst
));
1533 OUTS (outf
, uimm5 (src
));
1534 OUTS (outf
, ");\t\t/* bit");
1535 OUTS (outf
, imm7d (src
));
1541 OUTS (outf
, "CC = BITTST (");
1542 OUTS (outf
, dregs (dst
));
1544 OUTS (outf
, uimm5 (src
));
1545 OUTS (outf
, ");\t\t/* bit");
1546 OUTS (outf
, imm7d (src
));
1552 OUTS (outf
, "BITSET (");
1553 OUTS (outf
, dregs (dst
));
1555 OUTS (outf
, uimm5 (src
));
1556 OUTS (outf
, ");\t\t/* bit");
1557 OUTS (outf
, imm7d (src
));
1563 OUTS (outf
, "BITTGL (");
1564 OUTS (outf
, dregs (dst
));
1566 OUTS (outf
, uimm5 (src
));
1567 OUTS (outf
, ");\t\t/* bit");
1568 OUTS (outf
, imm7d (src
));
1574 OUTS (outf
, "BITCLR (");
1575 OUTS (outf
, dregs (dst
));
1577 OUTS (outf
, uimm5 (src
));
1578 OUTS (outf
, ");\t\t/* bit");
1579 OUTS (outf
, imm7d (src
));
1585 OUTS (outf
, dregs (dst
));
1586 OUTS (outf
, " >>>= ");
1587 OUTS (outf
, uimm5 (src
));
1591 OUTS (outf
, dregs (dst
));
1592 OUTS (outf
, " >>= ");
1593 OUTS (outf
, uimm5 (src
));
1597 OUTS (outf
, dregs (dst
));
1598 OUTS (outf
, " <<= ");
1599 OUTS (outf
, uimm5 (src
));
1608 decode_COMP3op_0 (TIword iw0
, disassemble_info
*outf
)
1611 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1612 | 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......|
1613 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1614 int opc
= ((iw0
>> COMP3op_opc_bits
) & COMP3op_opc_mask
);
1615 int dst
= ((iw0
>> COMP3op_dst_bits
) & COMP3op_dst_mask
);
1616 int src0
= ((iw0
>> COMP3op_src0_bits
) & COMP3op_src0_mask
);
1617 int src1
= ((iw0
>> COMP3op_src1_bits
) & COMP3op_src1_mask
);
1619 if (opc
== 5 && src1
== src0
)
1621 OUTS (outf
, pregs (dst
));
1623 OUTS (outf
, pregs (src0
));
1624 OUTS (outf
, " << 0x1");
1628 OUTS (outf
, dregs (dst
));
1630 OUTS (outf
, dregs (src0
));
1632 OUTS (outf
, dregs (src1
));
1636 OUTS (outf
, dregs (dst
));
1638 OUTS (outf
, dregs (src0
));
1640 OUTS (outf
, dregs (src1
));
1644 OUTS (outf
, dregs (dst
));
1646 OUTS (outf
, dregs (src0
));
1648 OUTS (outf
, dregs (src1
));
1652 OUTS (outf
, dregs (dst
));
1654 OUTS (outf
, dregs (src0
));
1656 OUTS (outf
, dregs (src1
));
1660 OUTS (outf
, pregs (dst
));
1662 OUTS (outf
, pregs (src0
));
1664 OUTS (outf
, pregs (src1
));
1668 OUTS (outf
, pregs (dst
));
1670 OUTS (outf
, pregs (src0
));
1671 OUTS (outf
, " + (");
1672 OUTS (outf
, pregs (src1
));
1673 OUTS (outf
, " << 0x1)");
1677 OUTS (outf
, pregs (dst
));
1679 OUTS (outf
, pregs (src0
));
1680 OUTS (outf
, " + (");
1681 OUTS (outf
, pregs (src1
));
1682 OUTS (outf
, " << 0x2)");
1686 OUTS (outf
, dregs (dst
));
1688 OUTS (outf
, dregs (src0
));
1690 OUTS (outf
, dregs (src1
));
1699 decode_COMPI2opD_0 (TIword iw0
, disassemble_info
*outf
)
1702 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1703 | 0 | 1 | 1 | 0 | 0 |.op|..src......................|.dst.......|
1704 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1705 int op
= ((iw0
>> COMPI2opD_op_bits
) & COMPI2opD_op_mask
);
1706 int dst
= ((iw0
>> COMPI2opD_dst_bits
) & COMPI2opD_dst_mask
);
1707 int src
= ((iw0
>> COMPI2opD_src_bits
) & COMPI2opD_src_mask
);
1709 bu32
*pval
= get_allreg (0, dst
);
1711 /* Since we don't have 32-bit immediate loads, we allow the disassembler
1712 to combine them, so it prints out the right values.
1713 Here we keep track of the registers. */
1716 *pval
= imm7_val (src
);
1718 *pval
|= 0xFFFFFF80;
1725 OUTS (outf
, dregs (dst
));
1727 OUTS (outf
, imm7 (src
));
1728 OUTS (outf
, " (X);\t\t/*\t\t");
1729 OUTS (outf
, dregs (dst
));
1731 OUTS (outf
, uimm32 (*pval
));
1733 OUTS (outf
, imm32 (*pval
));
1734 OUTS (outf
, ") */");
1739 OUTS (outf
, dregs (dst
));
1740 OUTS (outf
, " += ");
1741 OUTS (outf
, imm7 (src
));
1742 OUTS (outf
, ";\t\t/* (");
1743 OUTS (outf
, imm7d (src
));
1744 OUTS (outf
, ") */");
1754 decode_COMPI2opP_0 (TIword iw0
, disassemble_info
*outf
)
1757 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1758 | 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......|
1759 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1760 int op
= ((iw0
>> COMPI2opP_op_bits
) & COMPI2opP_op_mask
);
1761 int src
= ((iw0
>> COMPI2opP_src_bits
) & COMPI2opP_src_mask
);
1762 int dst
= ((iw0
>> COMPI2opP_dst_bits
) & COMPI2opP_dst_mask
);
1764 bu32
*pval
= get_allreg (1, dst
);
1768 *pval
= imm7_val (src
);
1770 *pval
|= 0xFFFFFF80;
1777 OUTS (outf
, pregs (dst
));
1779 OUTS (outf
, imm7 (src
));
1780 OUTS (outf
, " (X);\t\t/*\t\t");
1781 OUTS (outf
, pregs (dst
));
1783 OUTS (outf
, uimm32 (*pval
));
1785 OUTS (outf
, imm32 (*pval
));
1786 OUTS (outf
, ") */");
1791 OUTS (outf
, pregs (dst
));
1792 OUTS (outf
, " += ");
1793 OUTS (outf
, imm7 (src
));
1794 OUTS (outf
, ";\t\t/* (");
1795 OUTS (outf
, imm7d (src
));
1796 OUTS (outf
, ") */");
1806 decode_LDSTpmod_0 (TIword iw0
, disassemble_info
*outf
)
1809 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1810 | 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......|
1811 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1812 int W
= ((iw0
>> LDSTpmod_W_bits
) & LDSTpmod_W_mask
);
1813 int aop
= ((iw0
>> LDSTpmod_aop_bits
) & LDSTpmod_aop_mask
);
1814 int idx
= ((iw0
>> LDSTpmod_idx_bits
) & LDSTpmod_idx_mask
);
1815 int ptr
= ((iw0
>> LDSTpmod_ptr_bits
) & LDSTpmod_ptr_mask
);
1816 int reg
= ((iw0
>> LDSTpmod_reg_bits
) & LDSTpmod_reg_mask
);
1818 if (aop
== 1 && W
== 0 && idx
== ptr
)
1820 OUTS (outf
, dregs_lo (reg
));
1821 OUTS (outf
, " = W[");
1822 OUTS (outf
, pregs (ptr
));
1825 else if (aop
== 2 && W
== 0 && idx
== ptr
)
1827 OUTS (outf
, dregs_hi (reg
));
1828 OUTS (outf
, " = W[");
1829 OUTS (outf
, pregs (ptr
));
1832 else if (aop
== 1 && W
== 1 && idx
== ptr
)
1835 OUTS (outf
, pregs (ptr
));
1836 OUTS (outf
, "] = ");
1837 OUTS (outf
, dregs_lo (reg
));
1839 else if (aop
== 2 && W
== 1 && idx
== ptr
)
1842 OUTS (outf
, pregs (ptr
));
1843 OUTS (outf
, "] = ");
1844 OUTS (outf
, dregs_hi (reg
));
1846 else if (aop
== 0 && W
== 0)
1848 OUTS (outf
, dregs (reg
));
1849 OUTS (outf
, " = [");
1850 OUTS (outf
, pregs (ptr
));
1851 OUTS (outf
, " ++ ");
1852 OUTS (outf
, pregs (idx
));
1855 else if (aop
== 1 && W
== 0)
1857 OUTS (outf
, dregs_lo (reg
));
1858 OUTS (outf
, " = W[");
1859 OUTS (outf
, pregs (ptr
));
1860 OUTS (outf
, " ++ ");
1861 OUTS (outf
, pregs (idx
));
1864 else if (aop
== 2 && W
== 0)
1866 OUTS (outf
, dregs_hi (reg
));
1867 OUTS (outf
, " = W[");
1868 OUTS (outf
, pregs (ptr
));
1869 OUTS (outf
, " ++ ");
1870 OUTS (outf
, pregs (idx
));
1873 else if (aop
== 3 && W
== 0)
1875 OUTS (outf
, dregs (reg
));
1876 OUTS (outf
, " = W[");
1877 OUTS (outf
, pregs (ptr
));
1878 OUTS (outf
, " ++ ");
1879 OUTS (outf
, pregs (idx
));
1880 OUTS (outf
, "] (Z)");
1882 else if (aop
== 3 && W
== 1)
1884 OUTS (outf
, dregs (reg
));
1885 OUTS (outf
, " = W[");
1886 OUTS (outf
, pregs (ptr
));
1887 OUTS (outf
, " ++ ");
1888 OUTS (outf
, pregs (idx
));
1889 OUTS (outf
, "] (X)");
1891 else if (aop
== 0 && W
== 1)
1894 OUTS (outf
, pregs (ptr
));
1895 OUTS (outf
, " ++ ");
1896 OUTS (outf
, pregs (idx
));
1897 OUTS (outf
, "] = ");
1898 OUTS (outf
, dregs (reg
));
1900 else if (aop
== 1 && W
== 1)
1903 OUTS (outf
, pregs (ptr
));
1904 OUTS (outf
, " ++ ");
1905 OUTS (outf
, pregs (idx
));
1906 OUTS (outf
, "] = ");
1907 OUTS (outf
, dregs_lo (reg
));
1909 else if (aop
== 2 && W
== 1)
1912 OUTS (outf
, pregs (ptr
));
1913 OUTS (outf
, " ++ ");
1914 OUTS (outf
, pregs (idx
));
1915 OUTS (outf
, "] = ");
1916 OUTS (outf
, dregs_hi (reg
));
1925 decode_dagMODim_0 (TIword iw0
, disassemble_info
*outf
)
1928 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1929 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....|
1930 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1931 int i
= ((iw0
>> DagMODim_i_bits
) & DagMODim_i_mask
);
1932 int m
= ((iw0
>> DagMODim_m_bits
) & DagMODim_m_mask
);
1933 int br
= ((iw0
>> DagMODim_br_bits
) & DagMODim_br_mask
);
1934 int op
= ((iw0
>> DagMODim_op_bits
) & DagMODim_op_mask
);
1936 if (op
== 0 && br
== 1)
1938 OUTS (outf
, iregs (i
));
1939 OUTS (outf
, " += ");
1940 OUTS (outf
, mregs (m
));
1941 OUTS (outf
, " (BREV)");
1945 OUTS (outf
, iregs (i
));
1946 OUTS (outf
, " += ");
1947 OUTS (outf
, mregs (m
));
1951 OUTS (outf
, iregs (i
));
1952 OUTS (outf
, " -= ");
1953 OUTS (outf
, mregs (m
));
1962 decode_dagMODik_0 (TIword iw0
, disassemble_info
*outf
)
1965 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1966 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....|
1967 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1968 int i
= ((iw0
>> DagMODik_i_bits
) & DagMODik_i_mask
);
1969 int op
= ((iw0
>> DagMODik_op_bits
) & DagMODik_op_mask
);
1973 OUTS (outf
, iregs (i
));
1974 OUTS (outf
, " += 0x2");
1978 OUTS (outf
, iregs (i
));
1979 OUTS (outf
, " -= 0x2");
1983 OUTS (outf
, iregs (i
));
1984 OUTS (outf
, " += 0x4");
1988 OUTS (outf
, iregs (i
));
1989 OUTS (outf
, " -= 0x4");
1996 OUTS (outf
, ";\t\t/* ( ");
1997 if (op
== 0 || op
== 1)
1999 else if (op
== 2 || op
== 3)
2001 OUTS (outf
, ") */");
2009 decode_dspLDST_0 (TIword iw0
, disassemble_info
*outf
)
2012 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2013 | 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......|
2014 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2015 int i
= ((iw0
>> DspLDST_i_bits
) & DspLDST_i_mask
);
2016 int m
= ((iw0
>> DspLDST_m_bits
) & DspLDST_m_mask
);
2017 int W
= ((iw0
>> DspLDST_W_bits
) & DspLDST_W_mask
);
2018 int aop
= ((iw0
>> DspLDST_aop_bits
) & DspLDST_aop_mask
);
2019 int reg
= ((iw0
>> DspLDST_reg_bits
) & DspLDST_reg_mask
);
2021 if (aop
== 0 && W
== 0 && m
== 0)
2023 OUTS (outf
, dregs (reg
));
2024 OUTS (outf
, " = [");
2025 OUTS (outf
, iregs (i
));
2028 else if (aop
== 0 && W
== 0 && m
== 1)
2030 OUTS (outf
, dregs_lo (reg
));
2031 OUTS (outf
, " = W[");
2032 OUTS (outf
, iregs (i
));
2035 else if (aop
== 0 && W
== 0 && m
== 2)
2037 OUTS (outf
, dregs_hi (reg
));
2038 OUTS (outf
, " = W[");
2039 OUTS (outf
, iregs (i
));
2042 else if (aop
== 1 && W
== 0 && m
== 0)
2044 OUTS (outf
, dregs (reg
));
2045 OUTS (outf
, " = [");
2046 OUTS (outf
, iregs (i
));
2049 else if (aop
== 1 && W
== 0 && m
== 1)
2051 OUTS (outf
, dregs_lo (reg
));
2052 OUTS (outf
, " = W[");
2053 OUTS (outf
, iregs (i
));
2056 else if (aop
== 1 && W
== 0 && m
== 2)
2058 OUTS (outf
, dregs_hi (reg
));
2059 OUTS (outf
, " = W[");
2060 OUTS (outf
, iregs (i
));
2063 else if (aop
== 2 && W
== 0 && m
== 0)
2065 OUTS (outf
, dregs (reg
));
2066 OUTS (outf
, " = [");
2067 OUTS (outf
, iregs (i
));
2070 else if (aop
== 2 && W
== 0 && m
== 1)
2072 OUTS (outf
, dregs_lo (reg
));
2073 OUTS (outf
, " = W[");
2074 OUTS (outf
, iregs (i
));
2077 else if (aop
== 2 && W
== 0 && m
== 2)
2079 OUTS (outf
, dregs_hi (reg
));
2080 OUTS (outf
, " = W[");
2081 OUTS (outf
, iregs (i
));
2084 else if (aop
== 0 && W
== 1 && m
== 0)
2087 OUTS (outf
, iregs (i
));
2088 OUTS (outf
, "++] = ");
2089 OUTS (outf
, dregs (reg
));
2091 else if (aop
== 0 && W
== 1 && m
== 1)
2094 OUTS (outf
, iregs (i
));
2095 OUTS (outf
, "++] = ");
2096 OUTS (outf
, dregs_lo (reg
));
2098 else if (aop
== 0 && W
== 1 && m
== 2)
2101 OUTS (outf
, iregs (i
));
2102 OUTS (outf
, "++] = ");
2103 OUTS (outf
, dregs_hi (reg
));
2105 else if (aop
== 1 && W
== 1 && m
== 0)
2108 OUTS (outf
, iregs (i
));
2109 OUTS (outf
, "--] = ");
2110 OUTS (outf
, dregs (reg
));
2112 else if (aop
== 1 && W
== 1 && m
== 1)
2115 OUTS (outf
, iregs (i
));
2116 OUTS (outf
, "--] = ");
2117 OUTS (outf
, dregs_lo (reg
));
2119 else if (aop
== 1 && W
== 1 && m
== 2)
2122 OUTS (outf
, iregs (i
));
2123 OUTS (outf
, "--] = ");
2124 OUTS (outf
, dregs_hi (reg
));
2126 else if (aop
== 2 && W
== 1 && m
== 0)
2129 OUTS (outf
, iregs (i
));
2130 OUTS (outf
, "] = ");
2131 OUTS (outf
, dregs (reg
));
2133 else if (aop
== 2 && W
== 1 && m
== 1)
2136 OUTS (outf
, iregs (i
));
2137 OUTS (outf
, "] = ");
2138 OUTS (outf
, dregs_lo (reg
));
2140 else if (aop
== 2 && W
== 1 && m
== 2)
2143 OUTS (outf
, iregs (i
));
2144 OUTS (outf
, "] = ");
2145 OUTS (outf
, dregs_hi (reg
));
2147 else if (aop
== 3 && W
== 0)
2149 OUTS (outf
, dregs (reg
));
2150 OUTS (outf
, " = [");
2151 OUTS (outf
, iregs (i
));
2152 OUTS (outf
, " ++ ");
2153 OUTS (outf
, mregs (m
));
2156 else if (aop
== 3 && W
== 1)
2159 OUTS (outf
, iregs (i
));
2160 OUTS (outf
, " ++ ");
2161 OUTS (outf
, mregs (m
));
2162 OUTS (outf
, "] = ");
2163 OUTS (outf
, dregs (reg
));
2172 decode_LDST_0 (TIword iw0
, disassemble_info
*outf
)
2175 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2176 | 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......|
2177 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2178 int Z
= ((iw0
>> LDST_Z_bits
) & LDST_Z_mask
);
2179 int W
= ((iw0
>> LDST_W_bits
) & LDST_W_mask
);
2180 int sz
= ((iw0
>> LDST_sz_bits
) & LDST_sz_mask
);
2181 int aop
= ((iw0
>> LDST_aop_bits
) & LDST_aop_mask
);
2182 int reg
= ((iw0
>> LDST_reg_bits
) & LDST_reg_mask
);
2183 int ptr
= ((iw0
>> LDST_ptr_bits
) & LDST_ptr_mask
);
2185 if (aop
== 0 && sz
== 0 && Z
== 0 && W
== 0)
2187 OUTS (outf
, dregs (reg
));
2188 OUTS (outf
, " = [");
2189 OUTS (outf
, pregs (ptr
));
2192 else if (aop
== 0 && sz
== 0 && Z
== 1 && W
== 0)
2194 OUTS (outf
, pregs (reg
));
2195 OUTS (outf
, " = [");
2196 OUTS (outf
, pregs (ptr
));
2199 else if (aop
== 0 && sz
== 1 && Z
== 0 && W
== 0)
2201 OUTS (outf
, dregs (reg
));
2202 OUTS (outf
, " = W[");
2203 OUTS (outf
, pregs (ptr
));
2204 OUTS (outf
, "++] (Z)");
2206 else if (aop
== 0 && sz
== 1 && Z
== 1 && W
== 0)
2208 OUTS (outf
, dregs (reg
));
2209 OUTS (outf
, " = W[");
2210 OUTS (outf
, pregs (ptr
));
2211 OUTS (outf
, "++] (X)");
2213 else if (aop
== 0 && sz
== 2 && Z
== 0 && W
== 0)
2215 OUTS (outf
, dregs (reg
));
2216 OUTS (outf
, " = B[");
2217 OUTS (outf
, pregs (ptr
));
2218 OUTS (outf
, "++] (Z)");
2220 else if (aop
== 0 && sz
== 2 && Z
== 1 && W
== 0)
2222 OUTS (outf
, dregs (reg
));
2223 OUTS (outf
, " = B[");
2224 OUTS (outf
, pregs (ptr
));
2225 OUTS (outf
, "++] (X)");
2227 else if (aop
== 1 && sz
== 0 && Z
== 0 && W
== 0)
2229 OUTS (outf
, dregs (reg
));
2230 OUTS (outf
, " = [");
2231 OUTS (outf
, pregs (ptr
));
2234 else if (aop
== 1 && sz
== 0 && Z
== 1 && W
== 0)
2236 OUTS (outf
, pregs (reg
));
2237 OUTS (outf
, " = [");
2238 OUTS (outf
, pregs (ptr
));
2241 else if (aop
== 1 && sz
== 1 && Z
== 0 && W
== 0)
2243 OUTS (outf
, dregs (reg
));
2244 OUTS (outf
, " = W[");
2245 OUTS (outf
, pregs (ptr
));
2246 OUTS (outf
, "--] (Z)");
2248 else if (aop
== 1 && sz
== 1 && Z
== 1 && W
== 0)
2250 OUTS (outf
, dregs (reg
));
2251 OUTS (outf
, " = W[");
2252 OUTS (outf
, pregs (ptr
));
2253 OUTS (outf
, "--] (X)");
2255 else if (aop
== 1 && sz
== 2 && Z
== 0 && W
== 0)
2257 OUTS (outf
, dregs (reg
));
2258 OUTS (outf
, " = B[");
2259 OUTS (outf
, pregs (ptr
));
2260 OUTS (outf
, "--] (Z)");
2262 else if (aop
== 1 && sz
== 2 && Z
== 1 && W
== 0)
2264 OUTS (outf
, dregs (reg
));
2265 OUTS (outf
, " = B[");
2266 OUTS (outf
, pregs (ptr
));
2267 OUTS (outf
, "--] (X)");
2269 else if (aop
== 2 && sz
== 0 && Z
== 0 && W
== 0)
2271 OUTS (outf
, dregs (reg
));
2272 OUTS (outf
, " = [");
2273 OUTS (outf
, pregs (ptr
));
2276 else if (aop
== 2 && sz
== 0 && Z
== 1 && W
== 0)
2278 OUTS (outf
, pregs (reg
));
2279 OUTS (outf
, " = [");
2280 OUTS (outf
, pregs (ptr
));
2283 else if (aop
== 2 && sz
== 1 && Z
== 0 && W
== 0)
2285 OUTS (outf
, dregs (reg
));
2286 OUTS (outf
, " = W[");
2287 OUTS (outf
, pregs (ptr
));
2288 OUTS (outf
, "] (Z)");
2290 else if (aop
== 2 && sz
== 1 && Z
== 1 && W
== 0)
2292 OUTS (outf
, dregs (reg
));
2293 OUTS (outf
, " = W[");
2294 OUTS (outf
, pregs (ptr
));
2295 OUTS (outf
, "] (X)");
2297 else if (aop
== 2 && sz
== 2 && Z
== 0 && W
== 0)
2299 OUTS (outf
, dregs (reg
));
2300 OUTS (outf
, " = B[");
2301 OUTS (outf
, pregs (ptr
));
2302 OUTS (outf
, "] (Z)");
2304 else if (aop
== 2 && sz
== 2 && Z
== 1 && W
== 0)
2306 OUTS (outf
, dregs (reg
));
2307 OUTS (outf
, " = B[");
2308 OUTS (outf
, pregs (ptr
));
2309 OUTS (outf
, "] (X)");
2311 else if (aop
== 0 && sz
== 0 && Z
== 0 && W
== 1)
2314 OUTS (outf
, pregs (ptr
));
2315 OUTS (outf
, "++] = ");
2316 OUTS (outf
, dregs (reg
));
2318 else if (aop
== 0 && sz
== 0 && Z
== 1 && W
== 1)
2321 OUTS (outf
, pregs (ptr
));
2322 OUTS (outf
, "++] = ");
2323 OUTS (outf
, pregs (reg
));
2325 else if (aop
== 0 && sz
== 1 && Z
== 0 && W
== 1)
2328 OUTS (outf
, pregs (ptr
));
2329 OUTS (outf
, "++] = ");
2330 OUTS (outf
, dregs (reg
));
2332 else if (aop
== 0 && sz
== 2 && Z
== 0 && W
== 1)
2335 OUTS (outf
, pregs (ptr
));
2336 OUTS (outf
, "++] = ");
2337 OUTS (outf
, dregs (reg
));
2339 else if (aop
== 1 && sz
== 0 && Z
== 0 && W
== 1)
2342 OUTS (outf
, pregs (ptr
));
2343 OUTS (outf
, "--] = ");
2344 OUTS (outf
, dregs (reg
));
2346 else if (aop
== 1 && sz
== 0 && Z
== 1 && W
== 1)
2349 OUTS (outf
, pregs (ptr
));
2350 OUTS (outf
, "--] = ");
2351 OUTS (outf
, pregs (reg
));
2353 else if (aop
== 1 && sz
== 1 && Z
== 0 && W
== 1)
2356 OUTS (outf
, pregs (ptr
));
2357 OUTS (outf
, "--] = ");
2358 OUTS (outf
, dregs (reg
));
2360 else if (aop
== 1 && sz
== 2 && Z
== 0 && W
== 1)
2363 OUTS (outf
, pregs (ptr
));
2364 OUTS (outf
, "--] = ");
2365 OUTS (outf
, dregs (reg
));
2367 else if (aop
== 2 && sz
== 0 && Z
== 0 && W
== 1)
2370 OUTS (outf
, pregs (ptr
));
2371 OUTS (outf
, "] = ");
2372 OUTS (outf
, dregs (reg
));
2374 else if (aop
== 2 && sz
== 0 && Z
== 1 && W
== 1)
2377 OUTS (outf
, pregs (ptr
));
2378 OUTS (outf
, "] = ");
2379 OUTS (outf
, pregs (reg
));
2381 else if (aop
== 2 && sz
== 1 && Z
== 0 && W
== 1)
2384 OUTS (outf
, pregs (ptr
));
2385 OUTS (outf
, "] = ");
2386 OUTS (outf
, dregs (reg
));
2388 else if (aop
== 2 && sz
== 2 && Z
== 0 && W
== 1)
2391 OUTS (outf
, pregs (ptr
));
2392 OUTS (outf
, "] = ");
2393 OUTS (outf
, dregs (reg
));
2402 decode_LDSTiiFP_0 (TIword iw0
, disassemble_info
*outf
)
2405 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2406 | 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........|
2407 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2408 int reg
= ((iw0
>> LDSTiiFP_reg_bits
) & LDSTiiFP_reg_mask
);
2409 int offset
= ((iw0
>> LDSTiiFP_offset_bits
) & LDSTiiFP_offset_mask
);
2410 int W
= ((iw0
>> LDSTiiFP_W_bits
) & LDSTiiFP_W_mask
);
2414 OUTS (outf
, dpregs (reg
));
2415 OUTS (outf
, " = [FP ");
2416 OUTS (outf
, negimm5s4 (offset
));
2421 OUTS (outf
, "[FP ");
2422 OUTS (outf
, negimm5s4 (offset
));
2423 OUTS (outf
, "] = ");
2424 OUTS (outf
, dpregs (reg
));
2433 decode_LDSTii_0 (TIword iw0
, disassemble_info
*outf
)
2436 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2437 | 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......|
2438 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2439 int reg
= ((iw0
>> LDSTii_reg_bit
) & LDSTii_reg_mask
);
2440 int ptr
= ((iw0
>> LDSTii_ptr_bit
) & LDSTii_ptr_mask
);
2441 int offset
= ((iw0
>> LDSTii_offset_bit
) & LDSTii_offset_mask
);
2442 int op
= ((iw0
>> LDSTii_op_bit
) & LDSTii_op_mask
);
2443 int W
= ((iw0
>> LDSTii_W_bit
) & LDSTii_W_mask
);
2445 if (W
== 0 && op
== 0)
2447 OUTS (outf
, dregs (reg
));
2448 OUTS (outf
, " = [");
2449 OUTS (outf
, pregs (ptr
));
2451 OUTS (outf
, uimm4s4 (offset
));
2454 else if (W
== 0 && op
== 1)
2456 OUTS (outf
, dregs (reg
));
2457 OUTS (outf
, " = W[");
2458 OUTS (outf
, pregs (ptr
));
2460 OUTS (outf
, uimm4s2 (offset
));
2461 OUTS (outf
, "] (Z)");
2463 else if (W
== 0 && op
== 2)
2465 OUTS (outf
, dregs (reg
));
2466 OUTS (outf
, " = W[");
2467 OUTS (outf
, pregs (ptr
));
2469 OUTS (outf
, uimm4s2 (offset
));
2470 OUTS (outf
, "] (X)");
2472 else if (W
== 0 && op
== 3)
2474 OUTS (outf
, pregs (reg
));
2475 OUTS (outf
, " = [");
2476 OUTS (outf
, pregs (ptr
));
2478 OUTS (outf
, uimm4s4 (offset
));
2481 else if (W
== 1 && op
== 0)
2484 OUTS (outf
, pregs (ptr
));
2486 OUTS (outf
, uimm4s4 (offset
));
2487 OUTS (outf
, "] = ");
2488 OUTS (outf
, dregs (reg
));
2490 else if (W
== 1 && op
== 1)
2493 OUTS (outf
, pregs (ptr
));
2495 OUTS (outf
, uimm4s2 (offset
));
2496 OUTS (outf
, "] = ");
2497 OUTS (outf
, dregs (reg
));
2499 else if (W
== 1 && op
== 3)
2502 OUTS (outf
, pregs (ptr
));
2504 OUTS (outf
, uimm4s4 (offset
));
2505 OUTS (outf
, "] = ");
2506 OUTS (outf
, pregs (reg
));
2515 decode_LoopSetup_0 (TIword iw0
, TIword iw1
, bfd_vma pc
, disassemble_info
*outf
)
2518 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2519 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......|
2520 |.reg...........| - | - |.eoffset...............................|
2521 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2522 int c
= ((iw0
>> (LoopSetup_c_bits
- 16)) & LoopSetup_c_mask
);
2523 int reg
= ((iw1
>> LoopSetup_reg_bits
) & LoopSetup_reg_mask
);
2524 int rop
= ((iw0
>> (LoopSetup_rop_bits
- 16)) & LoopSetup_rop_mask
);
2525 int soffset
= ((iw0
>> (LoopSetup_soffset_bits
- 16)) & LoopSetup_soffset_mask
);
2526 int eoffset
= ((iw1
>> LoopSetup_eoffset_bits
) & LoopSetup_eoffset_mask
);
2530 OUTS (outf
, "LSETUP");
2532 OUTS (outf
, pcrel4 (soffset
));
2533 OUTS (outf
, ", 0x");
2534 OUTS (outf
, lppcrel10 (eoffset
));
2536 OUTS (outf
, counters (c
));
2540 OUTS (outf
, "LSETUP");
2542 OUTS (outf
, pcrel4 (soffset
));
2543 OUTS (outf
, ", 0x");
2544 OUTS (outf
, lppcrel10 (eoffset
));
2546 OUTS (outf
, counters (c
));
2548 OUTS (outf
, pregs (reg
));
2552 OUTS (outf
, "LSETUP");
2554 OUTS (outf
, pcrel4 (soffset
));
2555 OUTS (outf
, ", 0x");
2556 OUTS (outf
, lppcrel10 (eoffset
));
2558 OUTS (outf
, counters (c
));
2560 OUTS (outf
, pregs (reg
));
2561 OUTS (outf
, " >> 0x1");
2570 decode_LDIMMhalf_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
2573 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2574 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......|
2575 |.hword.........................................................|
2576 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2577 int H
= ((iw0
>> (LDIMMhalf_H_bits
- 16)) & LDIMMhalf_H_mask
);
2578 int Z
= ((iw0
>> (LDIMMhalf_Z_bits
- 16)) & LDIMMhalf_Z_mask
);
2579 int S
= ((iw0
>> (LDIMMhalf_S_bits
- 16)) & LDIMMhalf_S_mask
);
2580 int reg
= ((iw0
>> (LDIMMhalf_reg_bits
- 16)) & LDIMMhalf_reg_mask
);
2581 int grp
= ((iw0
>> (LDIMMhalf_grp_bits
- 16)) & LDIMMhalf_grp_mask
);
2582 int hword
= ((iw1
>> LDIMMhalf_hword_bits
) & LDIMMhalf_hword_mask
);
2584 bu32
*pval
= get_allreg (grp
, reg
);
2586 /* Since we don't have 32-bit immediate loads, we allow the disassembler
2587 to combine them, so it prints out the right values.
2588 Here we keep track of the registers. */
2589 if (H
== 0 && S
== 1 && Z
== 0)
2591 /* regs = imm16 (x) */
2592 *pval
= imm16_val (hword
);
2594 *pval
|= 0xFFFF0000;
2598 else if (H
== 0 && S
== 0 && Z
== 1)
2600 /* regs = luimm16 (Z) */
2601 *pval
= luimm16_val (hword
);
2604 else if (H
== 0 && S
== 0 && Z
== 0)
2606 /* regs_lo = luimm16 */
2607 *pval
&= 0xFFFF0000;
2608 *pval
|= luimm16_val (hword
);
2610 else if (H
== 1 && S
== 0 && Z
== 0)
2612 /* regs_hi = huimm16 */
2614 *pval
|= luimm16_val (hword
) << 16;
2617 /* Here we do the disassembly */
2618 if (grp
== 0 && H
== 0 && S
== 0 && Z
== 0)
2620 OUTS (outf
, dregs_lo (reg
));
2622 OUTS (outf
, uimm16 (hword
));
2624 else if (grp
== 0 && H
== 1 && S
== 0 && Z
== 0)
2626 OUTS (outf
, dregs_hi (reg
));
2628 OUTS (outf
, uimm16 (hword
));
2630 else if (grp
== 0 && H
== 0 && S
== 1 && Z
== 0)
2632 OUTS (outf
, dregs (reg
));
2634 OUTS (outf
, imm16 (hword
));
2635 OUTS (outf
, " (X)");
2637 else if (H
== 0 && S
== 1 && Z
== 0)
2639 OUTS (outf
, regs (reg
, grp
));
2641 OUTS (outf
, imm16 (hword
));
2642 OUTS (outf
, " (X)");
2644 else if (H
== 0 && S
== 0 && Z
== 1)
2646 OUTS (outf
, regs (reg
, grp
));
2648 OUTS (outf
, uimm16 (hword
));
2649 OUTS (outf
, " (Z)");
2651 else if (H
== 0 && S
== 0 && Z
== 0)
2653 OUTS (outf
, regs_lo (reg
, grp
));
2655 OUTS (outf
, uimm16 (hword
));
2657 else if (H
== 1 && S
== 0 && Z
== 0)
2659 OUTS (outf
, regs_hi (reg
, grp
));
2661 OUTS (outf
, uimm16 (hword
));
2666 /* And we print out the 32-bit value if it is a pointer. */
2667 if (S
== 0 && Z
== 0)
2669 OUTS (outf
, ";\t\t/* (");
2670 OUTS (outf
, imm16d (hword
));
2673 /* If it is an MMR, don't print the symbol. */
2674 if (*pval
< 0xFFC00000 && grp
== 1)
2676 OUTS (outf
, regs (reg
, grp
));
2678 OUTS (outf
, huimm32e (*pval
));
2682 OUTS (outf
, regs (reg
, grp
));
2684 OUTS (outf
, huimm32e (*pval
));
2686 OUTS (outf
, imm32 (*pval
));
2693 if (S
== 1 || Z
== 1)
2695 OUTS (outf
, ";\t\t/*\t\t");
2696 OUTS (outf
, regs (reg
, grp
));
2698 OUTS (outf
, huimm32e (*pval
));
2700 OUTS (outf
, imm32 (*pval
));
2701 OUTS (outf
, ") */");
2708 decode_CALLa_0 (TIword iw0
, TIword iw1
, bfd_vma pc
, disassemble_info
*outf
)
2711 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2712 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................|
2713 |.lsw...........................................................|
2714 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2715 int S
= ((iw0
>> (CALLa_S_bits
- 16)) & CALLa_S_mask
);
2716 int lsw
= ((iw1
>> 0) & 0xffff);
2717 int msw
= ((iw0
>> 0) & 0xff);
2720 OUTS (outf
, "CALL 0x");
2722 OUTS (outf
, "JUMP.L 0x");
2726 OUTS (outf
, pcrel24 (((msw
) << 16) | (lsw
)));
2731 decode_LDSTidxI_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
2734 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2735 | 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......|
2736 |.offset........................................................|
2737 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2738 int Z
= ((iw0
>> (LDSTidxI_Z_bits
- 16)) & LDSTidxI_Z_mask
);
2739 int W
= ((iw0
>> (LDSTidxI_W_bits
- 16)) & LDSTidxI_W_mask
);
2740 int sz
= ((iw0
>> (LDSTidxI_sz_bits
- 16)) & LDSTidxI_sz_mask
);
2741 int reg
= ((iw0
>> (LDSTidxI_reg_bits
- 16)) & LDSTidxI_reg_mask
);
2742 int ptr
= ((iw0
>> (LDSTidxI_ptr_bits
- 16)) & LDSTidxI_ptr_mask
);
2743 int offset
= ((iw1
>> LDSTidxI_offset_bits
) & LDSTidxI_offset_mask
);
2745 if (W
== 0 && sz
== 0 && Z
== 0)
2747 OUTS (outf
, dregs (reg
));
2748 OUTS (outf
, " = [");
2749 OUTS (outf
, pregs (ptr
));
2751 OUTS (outf
, imm16s4 (offset
));
2754 else if (W
== 0 && sz
== 0 && Z
== 1)
2756 OUTS (outf
, pregs (reg
));
2757 OUTS (outf
, " = [");
2758 OUTS (outf
, pregs (ptr
));
2760 OUTS (outf
, imm16s4 (offset
));
2763 else if (W
== 0 && sz
== 1 && Z
== 0)
2765 OUTS (outf
, dregs (reg
));
2766 OUTS (outf
, " = W[");
2767 OUTS (outf
, pregs (ptr
));
2769 OUTS (outf
, imm16s2 (offset
));
2770 OUTS (outf
, "] (Z)");
2772 else if (W
== 0 && sz
== 1 && Z
== 1)
2774 OUTS (outf
, dregs (reg
));
2775 OUTS (outf
, " = W[");
2776 OUTS (outf
, pregs (ptr
));
2778 OUTS (outf
, imm16s2 (offset
));
2779 OUTS (outf
, "] (X)");
2781 else if (W
== 0 && sz
== 2 && Z
== 0)
2783 OUTS (outf
, dregs (reg
));
2784 OUTS (outf
, " = B[");
2785 OUTS (outf
, pregs (ptr
));
2787 OUTS (outf
, imm16 (offset
));
2788 OUTS (outf
, "] (Z)");
2790 else if (W
== 0 && sz
== 2 && Z
== 1)
2792 OUTS (outf
, dregs (reg
));
2793 OUTS (outf
, " = B[");
2794 OUTS (outf
, pregs (ptr
));
2796 OUTS (outf
, imm16 (offset
));
2797 OUTS (outf
, "] (X)");
2799 else if (W
== 1 && sz
== 0 && Z
== 0)
2802 OUTS (outf
, pregs (ptr
));
2804 OUTS (outf
, imm16s4 (offset
));
2805 OUTS (outf
, "] = ");
2806 OUTS (outf
, dregs (reg
));
2808 else if (W
== 1 && sz
== 0 && Z
== 1)
2811 OUTS (outf
, pregs (ptr
));
2813 OUTS (outf
, imm16s4 (offset
));
2814 OUTS (outf
, "] = ");
2815 OUTS (outf
, pregs (reg
));
2817 else if (W
== 1 && sz
== 1 && Z
== 0)
2820 OUTS (outf
, pregs (ptr
));
2822 OUTS (outf
, imm16s2 (offset
));
2823 OUTS (outf
, "] = ");
2824 OUTS (outf
, dregs (reg
));
2826 else if (W
== 1 && sz
== 2 && Z
== 0)
2829 OUTS (outf
, pregs (ptr
));
2831 OUTS (outf
, imm16 (offset
));
2832 OUTS (outf
, "] = ");
2833 OUTS (outf
, dregs (reg
));
2842 decode_linkage_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
2845 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2846 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.|
2847 |.framesize.....................................................|
2848 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2849 int R
= ((iw0
>> (Linkage_R_bits
- 16)) & Linkage_R_mask
);
2850 int framesize
= ((iw1
>> Linkage_framesize_bits
) & Linkage_framesize_mask
);
2854 OUTS (outf
, "LINK ");
2855 OUTS (outf
, uimm16s4 (framesize
));
2856 OUTS (outf
, ";\t\t/* (");
2857 OUTS (outf
, uimm16s4d (framesize
));
2858 OUTS (outf
, ") */");
2862 OUTS (outf
, "UNLINK");
2870 decode_dsp32mac_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
2873 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2874 | 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...|
2875 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..|
2876 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2877 int op1
= ((iw0
>> (DSP32Mac_op1_bits
- 16)) & DSP32Mac_op1_mask
);
2878 int w1
= ((iw0
>> (DSP32Mac_w1_bits
- 16)) & DSP32Mac_w1_mask
);
2879 int P
= ((iw0
>> (DSP32Mac_p_bits
- 16)) & DSP32Mac_p_mask
);
2880 int MM
= ((iw0
>> (DSP32Mac_MM_bits
- 16)) & DSP32Mac_MM_mask
);
2881 int mmod
= ((iw0
>> (DSP32Mac_mmod_bits
- 16)) & DSP32Mac_mmod_mask
);
2882 int w0
= ((iw1
>> DSP32Mac_w0_bits
) & DSP32Mac_w0_mask
);
2883 int src0
= ((iw1
>> DSP32Mac_src0_bits
) & DSP32Mac_src0_mask
);
2884 int src1
= ((iw1
>> DSP32Mac_src1_bits
) & DSP32Mac_src1_mask
);
2885 int dst
= ((iw1
>> DSP32Mac_dst_bits
) & DSP32Mac_dst_mask
);
2886 int h10
= ((iw1
>> DSP32Mac_h10_bits
) & DSP32Mac_h10_mask
);
2887 int h00
= ((iw1
>> DSP32Mac_h00_bits
) & DSP32Mac_h00_mask
);
2888 int op0
= ((iw1
>> DSP32Mac_op0_bits
) & DSP32Mac_op0_mask
);
2889 int h11
= ((iw1
>> DSP32Mac_h11_bits
) & DSP32Mac_h11_mask
);
2890 int h01
= ((iw1
>> DSP32Mac_h01_bits
) & DSP32Mac_h01_mask
);
2892 if (w0
== 0 && w1
== 0 && op1
== 3 && op0
== 3)
2898 if ((w1
|| w0
) && mmod
== M_W32
)
2901 if (((1 << mmod
) & (P
? 0x131b : 0x1b5f)) == 0)
2904 if (w1
== 1 || op1
!= 3)
2907 OUTS (outf
, P
? dregs (dst
+ 1) : dregs_hi (dst
));
2910 OUTS (outf
, " = A1");
2914 OUTS (outf
, " = (");
2915 decode_macfunc (1, op1
, h01
, h11
, src0
, src1
, outf
);
2920 if (w0
== 1 || op0
!= 3)
2923 OUTS (outf
, " (M)");
2929 if (w0
== 1 || op0
!= 3)
2932 OUTS (outf
, P
? dregs (dst
) : dregs_lo (dst
));
2935 OUTS (outf
, " = A0");
2939 OUTS (outf
, " = (");
2940 decode_macfunc (0, op0
, h00
, h10
, src0
, src1
, outf
);
2946 decode_optmode (mmod
, MM
, outf
);
2952 decode_dsp32mult_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
2955 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2956 | 1 | 1 | 0 | 0 |.M.| 0 | 1 |.mmod..........|.MM|.P.|.w1|.op1...|
2957 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..|
2958 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2959 int w1
= ((iw0
>> (DSP32Mac_w1_bits
- 16)) & DSP32Mac_w1_mask
);
2960 int P
= ((iw0
>> (DSP32Mac_p_bits
- 16)) & DSP32Mac_p_mask
);
2961 int MM
= ((iw0
>> (DSP32Mac_MM_bits
- 16)) & DSP32Mac_MM_mask
);
2962 int mmod
= ((iw0
>> (DSP32Mac_mmod_bits
- 16)) & DSP32Mac_mmod_mask
);
2963 int w0
= ((iw1
>> DSP32Mac_w0_bits
) & DSP32Mac_w0_mask
);
2964 int src0
= ((iw1
>> DSP32Mac_src0_bits
) & DSP32Mac_src0_mask
);
2965 int src1
= ((iw1
>> DSP32Mac_src1_bits
) & DSP32Mac_src1_mask
);
2966 int dst
= ((iw1
>> DSP32Mac_dst_bits
) & DSP32Mac_dst_mask
);
2967 int h10
= ((iw1
>> DSP32Mac_h10_bits
) & DSP32Mac_h10_mask
);
2968 int h00
= ((iw1
>> DSP32Mac_h00_bits
) & DSP32Mac_h00_mask
);
2969 int h11
= ((iw1
>> DSP32Mac_h11_bits
) & DSP32Mac_h11_mask
);
2970 int h01
= ((iw1
>> DSP32Mac_h01_bits
) & DSP32Mac_h01_mask
);
2972 if (w1
== 0 && w0
== 0)
2975 if (((1 << mmod
) & (P
? 0x313 : 0x1b57)) == 0)
2980 OUTS (outf
, P
? dregs (dst
| 1) : dregs_hi (dst
));
2982 decode_multfunc (h01
, h11
, src0
, src1
, outf
);
2987 OUTS (outf
, " (M)");
2995 OUTS (outf
, dregs (dst
));
2997 decode_multfunc (h00
, h10
, src0
, src1
, outf
);
3000 decode_optmode (mmod
, MM
, outf
);
3005 decode_dsp32alu_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
3008 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3009 | 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............|
3010 |.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......|
3011 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
3012 int s
= ((iw1
>> DSP32Alu_s_bits
) & DSP32Alu_s_mask
);
3013 int x
= ((iw1
>> DSP32Alu_x_bits
) & DSP32Alu_x_mask
);
3014 int aop
= ((iw1
>> DSP32Alu_aop_bits
) & DSP32Alu_aop_mask
);
3015 int src0
= ((iw1
>> DSP32Alu_src0_bits
) & DSP32Alu_src0_mask
);
3016 int src1
= ((iw1
>> DSP32Alu_src1_bits
) & DSP32Alu_src1_mask
);
3017 int dst0
= ((iw1
>> DSP32Alu_dst0_bits
) & DSP32Alu_dst0_mask
);
3018 int dst1
= ((iw1
>> DSP32Alu_dst1_bits
) & DSP32Alu_dst1_mask
);
3019 int HL
= ((iw0
>> (DSP32Alu_HL_bits
- 16)) & DSP32Alu_HL_mask
);
3020 int aopcde
= ((iw0
>> (DSP32Alu_aopcde_bits
- 16)) & DSP32Alu_aopcde_mask
);
3022 if (aop
== 0 && aopcde
== 9 && HL
== 0 && s
== 0)
3024 OUTS (outf
, "A0.L = ");
3025 OUTS (outf
, dregs_lo (src0
));
3027 else if (aop
== 2 && aopcde
== 9 && HL
== 1 && s
== 0)
3029 OUTS (outf
, "A1.H = ");
3030 OUTS (outf
, dregs_hi (src0
));
3032 else if (aop
== 2 && aopcde
== 9 && HL
== 0 && s
== 0)
3034 OUTS (outf
, "A1.L = ");
3035 OUTS (outf
, dregs_lo (src0
));
3037 else if (aop
== 0 && aopcde
== 9 && HL
== 1 && s
== 0)
3039 OUTS (outf
, "A0.H = ");
3040 OUTS (outf
, dregs_hi (src0
));
3042 else if (x
== 1 && HL
== 1 && aop
== 3 && aopcde
== 5)
3044 OUTS (outf
, dregs_hi (dst0
));
3046 OUTS (outf
, dregs (src0
));
3048 OUTS (outf
, dregs (src1
));
3049 OUTS (outf
, " (RND20)");
3051 else if (x
== 1 && HL
== 1 && aop
== 2 && aopcde
== 5)
3053 OUTS (outf
, dregs_hi (dst0
));
3055 OUTS (outf
, dregs (src0
));
3057 OUTS (outf
, dregs (src1
));
3058 OUTS (outf
, " (RND20)");
3060 else if (x
== 0 && HL
== 0 && aop
== 1 && aopcde
== 5)
3062 OUTS (outf
, dregs_lo (dst0
));
3064 OUTS (outf
, dregs (src0
));
3066 OUTS (outf
, dregs (src1
));
3067 OUTS (outf
, " (RND12)");
3069 else if (x
== 0 && HL
== 0 && aop
== 0 && aopcde
== 5)
3071 OUTS (outf
, dregs_lo (dst0
));
3073 OUTS (outf
, dregs (src0
));
3075 OUTS (outf
, dregs (src1
));
3076 OUTS (outf
, " (RND12)");
3078 else if (x
== 1 && HL
== 0 && aop
== 3 && aopcde
== 5)
3080 OUTS (outf
, dregs_lo (dst0
));
3082 OUTS (outf
, dregs (src0
));
3084 OUTS (outf
, dregs (src1
));
3085 OUTS (outf
, " (RND20)");
3087 else if (x
== 0 && HL
== 1 && aop
== 0 && aopcde
== 5)
3089 OUTS (outf
, dregs_hi (dst0
));
3091 OUTS (outf
, dregs (src0
));
3093 OUTS (outf
, dregs (src1
));
3094 OUTS (outf
, " (RND12)");
3096 else if (x
== 1 && HL
== 0 && aop
== 2 && aopcde
== 5)
3098 OUTS (outf
, dregs_lo (dst0
));
3100 OUTS (outf
, dregs (src0
));
3102 OUTS (outf
, dregs (src1
));
3103 OUTS (outf
, " (RND20)");
3105 else if (x
== 0 && HL
== 1 && aop
== 1 && aopcde
== 5)
3107 OUTS (outf
, dregs_hi (dst0
));
3109 OUTS (outf
, dregs (src0
));
3111 OUTS (outf
, dregs (src1
));
3112 OUTS (outf
, " (RND12)");
3114 else if (HL
== 1 && aop
== 0 && aopcde
== 2)
3116 OUTS (outf
, dregs_hi (dst0
));
3118 OUTS (outf
, dregs_lo (src0
));
3120 OUTS (outf
, dregs_lo (src1
));
3123 else if (HL
== 1 && aop
== 1 && aopcde
== 2)
3125 OUTS (outf
, dregs_hi (dst0
));
3127 OUTS (outf
, dregs_lo (src0
));
3129 OUTS (outf
, dregs_hi (src1
));
3132 else if (HL
== 1 && aop
== 2 && aopcde
== 2)
3134 OUTS (outf
, dregs_hi (dst0
));
3136 OUTS (outf
, dregs_hi (src0
));
3138 OUTS (outf
, dregs_lo (src1
));
3141 else if (HL
== 1 && aop
== 3 && aopcde
== 2)
3143 OUTS (outf
, dregs_hi (dst0
));
3145 OUTS (outf
, dregs_hi (src0
));
3147 OUTS (outf
, dregs_hi (src1
));
3150 else if (HL
== 0 && aop
== 0 && aopcde
== 3)
3152 OUTS (outf
, dregs_lo (dst0
));
3154 OUTS (outf
, dregs_lo (src0
));
3156 OUTS (outf
, dregs_lo (src1
));
3159 else if (HL
== 0 && aop
== 1 && aopcde
== 3)
3161 OUTS (outf
, dregs_lo (dst0
));
3163 OUTS (outf
, dregs_lo (src0
));
3165 OUTS (outf
, dregs_hi (src1
));
3168 else if (HL
== 0 && aop
== 3 && aopcde
== 2)
3170 OUTS (outf
, dregs_lo (dst0
));
3172 OUTS (outf
, dregs_hi (src0
));
3174 OUTS (outf
, dregs_hi (src1
));
3177 else if (HL
== 1 && aop
== 0 && aopcde
== 3)
3179 OUTS (outf
, dregs_hi (dst0
));
3181 OUTS (outf
, dregs_lo (src0
));
3183 OUTS (outf
, dregs_lo (src1
));
3186 else if (HL
== 1 && aop
== 1 && aopcde
== 3)
3188 OUTS (outf
, dregs_hi (dst0
));
3190 OUTS (outf
, dregs_lo (src0
));
3192 OUTS (outf
, dregs_hi (src1
));
3195 else if (HL
== 1 && aop
== 2 && aopcde
== 3)
3197 OUTS (outf
, dregs_hi (dst0
));
3199 OUTS (outf
, dregs_hi (src0
));
3201 OUTS (outf
, dregs_lo (src1
));
3204 else if (HL
== 1 && aop
== 3 && aopcde
== 3)
3206 OUTS (outf
, dregs_hi (dst0
));
3208 OUTS (outf
, dregs_hi (src0
));
3210 OUTS (outf
, dregs_hi (src1
));
3213 else if (HL
== 0 && aop
== 2 && aopcde
== 2)
3215 OUTS (outf
, dregs_lo (dst0
));
3217 OUTS (outf
, dregs_hi (src0
));
3219 OUTS (outf
, dregs_lo (src1
));
3222 else if (HL
== 0 && aop
== 1 && aopcde
== 2)
3224 OUTS (outf
, dregs_lo (dst0
));
3226 OUTS (outf
, dregs_lo (src0
));
3228 OUTS (outf
, dregs_hi (src1
));
3231 else if (HL
== 0 && aop
== 2 && aopcde
== 3)
3233 OUTS (outf
, dregs_lo (dst0
));
3235 OUTS (outf
, dregs_hi (src0
));
3237 OUTS (outf
, dregs_lo (src1
));
3240 else if (HL
== 0 && aop
== 3 && aopcde
== 3)
3242 OUTS (outf
, dregs_lo (dst0
));
3244 OUTS (outf
, dregs_hi (src0
));
3246 OUTS (outf
, dregs_hi (src1
));
3249 else if (HL
== 0 && aop
== 0 && aopcde
== 2)
3251 OUTS (outf
, dregs_lo (dst0
));
3253 OUTS (outf
, dregs_lo (src0
));
3255 OUTS (outf
, dregs_lo (src1
));
3258 else if (aop
== 0 && aopcde
== 9 && s
== 1)
3260 OUTS (outf
, "A0 = ");
3261 OUTS (outf
, dregs (src0
));
3263 else if (aop
== 3 && aopcde
== 11 && s
== 0)
3264 OUTS (outf
, "A0 -= A1");
3266 else if (aop
== 3 && aopcde
== 11 && s
== 1)
3267 OUTS (outf
, "A0 -= A1 (W32)");
3269 else if (aop
== 3 && aopcde
== 22 && HL
== 1)
3271 OUTS (outf
, dregs (dst0
));
3272 OUTS (outf
, " = BYTEOP2M (");
3273 OUTS (outf
, dregs (src0
+ 1));
3275 OUTS (outf
, imm5 (src0
));
3277 OUTS (outf
, dregs (src1
+ 1));
3279 OUTS (outf
, imm5 (src1
));
3280 OUTS (outf
, ") (TH");
3282 OUTS (outf
, ", R)");
3286 else if (aop
== 3 && aopcde
== 22 && HL
== 0)
3288 OUTS (outf
, dregs (dst0
));
3289 OUTS (outf
, " = BYTEOP2M (");
3290 OUTS (outf
, dregs (src0
+ 1));
3292 OUTS (outf
, imm5 (src0
));
3294 OUTS (outf
, dregs (src1
+ 1));
3296 OUTS (outf
, imm5 (src1
));
3297 OUTS (outf
, ") (TL");
3299 OUTS (outf
, ", R)");
3303 else if (aop
== 2 && aopcde
== 22 && HL
== 1)
3305 OUTS (outf
, dregs (dst0
));
3306 OUTS (outf
, " = BYTEOP2M (");
3307 OUTS (outf
, dregs (src0
+ 1));
3309 OUTS (outf
, imm5 (src0
));
3311 OUTS (outf
, dregs (src1
+ 1));
3313 OUTS (outf
, imm5 (src1
));
3314 OUTS (outf
, ") (RNDH");
3316 OUTS (outf
, ", R)");
3320 else if (aop
== 2 && aopcde
== 22 && HL
== 0)
3322 OUTS (outf
, dregs (dst0
));
3323 OUTS (outf
, " = BYTEOP2M (");
3324 OUTS (outf
, dregs (src0
+ 1));
3326 OUTS (outf
, imm5 (src0
));
3328 OUTS (outf
, dregs (src1
+ 1));
3330 OUTS (outf
, imm5 (src1
));
3331 OUTS (outf
, ") (RNDL");
3333 OUTS (outf
, ", R)");
3337 else if (aop
== 1 && aopcde
== 22 && HL
== 1)
3339 OUTS (outf
, dregs (dst0
));
3340 OUTS (outf
, " = BYTEOP2P (");
3341 OUTS (outf
, dregs (src0
+ 1));
3343 OUTS (outf
, imm5d (src0
));
3345 OUTS (outf
, dregs (src1
+ 1));
3347 OUTS (outf
, imm5d (src1
));
3348 OUTS (outf
, ") (TH");
3350 OUTS (outf
, ", R)");
3354 else if (aop
== 1 && aopcde
== 22 && HL
== 0)
3356 OUTS (outf
, dregs (dst0
));
3357 OUTS (outf
, " = BYTEOP2P (");
3358 OUTS (outf
, dregs (src0
+ 1));
3360 OUTS (outf
, imm5d (src0
));
3362 OUTS (outf
, dregs (src1
+ 1));
3364 OUTS (outf
, imm5d (src1
));
3365 OUTS (outf
, ") (TL");
3367 OUTS (outf
, ", R)");
3371 else if (aop
== 0 && aopcde
== 22 && HL
== 1)
3373 OUTS (outf
, dregs (dst0
));
3374 OUTS (outf
, " = BYTEOP2P (");
3375 OUTS (outf
, dregs (src0
+ 1));
3377 OUTS (outf
, imm5d (src0
));
3379 OUTS (outf
, dregs (src1
+ 1));
3381 OUTS (outf
, imm5d (src1
));
3382 OUTS (outf
, ") (RNDH");
3384 OUTS (outf
, ", R)");
3388 else if (aop
== 0 && aopcde
== 22 && HL
== 0)
3390 OUTS (outf
, dregs (dst0
));
3391 OUTS (outf
, " = BYTEOP2P (");
3392 OUTS (outf
, dregs (src0
+ 1));
3394 OUTS (outf
, imm5d (src0
));
3396 OUTS (outf
, dregs (src1
+ 1));
3398 OUTS (outf
, imm5d (src1
));
3399 OUTS (outf
, ") (RNDL");
3401 OUTS (outf
, ", R)");
3405 else if (aop
== 0 && s
== 0 && aopcde
== 8)
3406 OUTS (outf
, "A0 = 0");
3408 else if (aop
== 0 && s
== 1 && aopcde
== 8)
3409 OUTS (outf
, "A0 = A0 (S)");
3411 else if (aop
== 1 && s
== 0 && aopcde
== 8)
3412 OUTS (outf
, "A1 = 0");
3414 else if (aop
== 1 && s
== 1 && aopcde
== 8)
3415 OUTS (outf
, "A1 = A1 (S)");
3417 else if (aop
== 2 && s
== 0 && aopcde
== 8)
3418 OUTS (outf
, "A1 = A0 = 0");
3420 else if (aop
== 2 && s
== 1 && aopcde
== 8)
3421 OUTS (outf
, "A1 = A1 (S), A0 = A0 (S)");
3423 else if (aop
== 3 && s
== 0 && aopcde
== 8)
3424 OUTS (outf
, "A0 = A1");
3426 else if (aop
== 3 && s
== 1 && aopcde
== 8)
3427 OUTS (outf
, "A1 = A0");
3429 else if (aop
== 1 && aopcde
== 9 && s
== 0)
3431 OUTS (outf
, "A0.X = ");
3432 OUTS (outf
, dregs_lo (src0
));
3434 else if (aop
== 1 && HL
== 0 && aopcde
== 11)
3436 OUTS (outf
, dregs_lo (dst0
));
3437 OUTS (outf
, " = (A0 += A1)");
3439 else if (aop
== 3 && HL
== 0 && aopcde
== 16)
3440 OUTS (outf
, "A1 = ABS A0, A0 = ABS A0");
3442 else if (aop
== 0 && aopcde
== 23 && HL
== 1)
3444 OUTS (outf
, dregs (dst0
));
3445 OUTS (outf
, " = BYTEOP3P (");
3446 OUTS (outf
, dregs (src0
+ 1));
3448 OUTS (outf
, imm5d (src0
));
3450 OUTS (outf
, dregs (src1
+ 1));
3452 OUTS (outf
, imm5d (src1
));
3453 OUTS (outf
, ") (HI");
3455 OUTS (outf
, ", R)");
3459 else if (aop
== 3 && aopcde
== 9 && s
== 0)
3461 OUTS (outf
, "A1.X = ");
3462 OUTS (outf
, dregs_lo (src0
));
3464 else if (aop
== 1 && HL
== 1 && aopcde
== 16)
3465 OUTS (outf
, "A1 = ABS A1");
3467 else if (aop
== 0 && HL
== 1 && aopcde
== 16)
3468 OUTS (outf
, "A1 = ABS A0");
3470 else if (aop
== 2 && aopcde
== 9 && s
== 1)
3472 OUTS (outf
, "A1 = ");
3473 OUTS (outf
, dregs (src0
));
3475 else if (HL
== 0 && aop
== 3 && aopcde
== 12)
3477 OUTS (outf
, dregs_lo (dst0
));
3479 OUTS (outf
, dregs (src0
));
3480 OUTS (outf
, " (RND)");
3482 else if (aop
== 1 && HL
== 0 && aopcde
== 16)
3483 OUTS (outf
, "A0 = ABS A1");
3485 else if (aop
== 0 && HL
== 0 && aopcde
== 16)
3486 OUTS (outf
, "A0 = ABS A0");
3488 else if (aop
== 3 && HL
== 0 && aopcde
== 15)
3490 OUTS (outf
, dregs (dst0
));
3491 OUTS (outf
, " = -");
3492 OUTS (outf
, dregs (src0
));
3493 OUTS (outf
, " (V)");
3495 else if (aop
== 3 && s
== 1 && HL
== 0 && aopcde
== 7)
3497 OUTS (outf
, dregs (dst0
));
3498 OUTS (outf
, " = -");
3499 OUTS (outf
, dregs (src0
));
3500 OUTS (outf
, " (S)");
3502 else if (aop
== 3 && s
== 0 && HL
== 0 && aopcde
== 7)
3504 OUTS (outf
, dregs (dst0
));
3505 OUTS (outf
, " = -");
3506 OUTS (outf
, dregs (src0
));
3507 OUTS (outf
, " (NS)");
3509 else if (aop
== 1 && HL
== 1 && aopcde
== 11)
3511 OUTS (outf
, dregs_hi (dst0
));
3512 OUTS (outf
, " = (A0 += A1)");
3514 else if (aop
== 2 && aopcde
== 11 && s
== 0)
3515 OUTS (outf
, "A0 += A1");
3517 else if (aop
== 2 && aopcde
== 11 && s
== 1)
3518 OUTS (outf
, "A0 += A1 (W32)");
3520 else if (aop
== 3 && HL
== 0 && aopcde
== 14)
3521 OUTS (outf
, "A1 = -A1, A0 = -A0");
3523 else if (HL
== 1 && aop
== 3 && aopcde
== 12)
3525 OUTS (outf
, dregs_hi (dst0
));
3527 OUTS (outf
, dregs (src0
));
3528 OUTS (outf
, " (RND)");
3530 else if (aop
== 0 && aopcde
== 23 && HL
== 0)
3532 OUTS (outf
, dregs (dst0
));
3533 OUTS (outf
, " = BYTEOP3P (");
3534 OUTS (outf
, dregs (src0
+ 1));
3536 OUTS (outf
, imm5d (src0
));
3538 OUTS (outf
, dregs (src1
+ 1));
3540 OUTS (outf
, imm5d (src1
));
3541 OUTS (outf
, ") (LO");
3543 OUTS (outf
, ", R)");
3547 else if (aop
== 0 && HL
== 0 && aopcde
== 14)
3548 OUTS (outf
, "A0 = -A0");
3550 else if (aop
== 1 && HL
== 0 && aopcde
== 14)
3551 OUTS (outf
, "A0 = -A1");
3553 else if (aop
== 0 && HL
== 1 && aopcde
== 14)
3554 OUTS (outf
, "A1 = -A0");
3556 else if (aop
== 1 && HL
== 1 && aopcde
== 14)
3557 OUTS (outf
, "A1 = -A1");
3559 else if (aop
== 0 && aopcde
== 12)
3561 OUTS (outf
, dregs_hi (dst0
));
3563 OUTS (outf
, dregs_lo (dst0
));
3564 OUTS (outf
, " = SIGN (");
3565 OUTS (outf
, dregs_hi (src0
));
3566 OUTS (outf
, ") * ");
3567 OUTS (outf
, dregs_hi (src1
));
3568 OUTS (outf
, " + SIGN (");
3569 OUTS (outf
, dregs_lo (src0
));
3570 OUTS (outf
, ") * ");
3571 OUTS (outf
, dregs_lo (src1
));
3573 else if (aop
== 2 && aopcde
== 0)
3575 OUTS (outf
, dregs (dst0
));
3577 OUTS (outf
, dregs (src0
));
3578 OUTS (outf
, " -|+ ");
3579 OUTS (outf
, dregs (src1
));
3582 else if (aop
== 1 && aopcde
== 12)
3584 OUTS (outf
, dregs (dst1
));
3585 OUTS (outf
, " = A1.L + A1.H, ");
3586 OUTS (outf
, dregs (dst0
));
3587 OUTS (outf
, " = A0.L + A0.H");
3589 else if (aop
== 2 && aopcde
== 4)
3591 OUTS (outf
, dregs (dst1
));
3593 OUTS (outf
, dregs (src0
));
3595 OUTS (outf
, dregs (src1
));
3597 OUTS (outf
, dregs (dst0
));
3599 OUTS (outf
, dregs (src0
));
3601 OUTS (outf
, dregs (src1
));
3604 else if (HL
== 0 && aopcde
== 1)
3606 OUTS (outf
, dregs (dst1
));
3608 OUTS (outf
, dregs (src0
));
3609 OUTS (outf
, " +|+ ");
3610 OUTS (outf
, dregs (src1
));
3612 OUTS (outf
, dregs (dst0
));
3614 OUTS (outf
, dregs (src0
));
3615 OUTS (outf
, " -|- ");
3616 OUTS (outf
, dregs (src1
));
3617 amod0amod2 (s
, x
, aop
, outf
);
3619 else if (aop
== 0 && aopcde
== 11)
3621 OUTS (outf
, dregs (dst0
));
3622 OUTS (outf
, " = (A0 += A1)");
3624 else if (aop
== 0 && aopcde
== 10)
3626 OUTS (outf
, dregs_lo (dst0
));
3627 OUTS (outf
, " = A0.X");
3629 else if (aop
== 1 && aopcde
== 10)
3631 OUTS (outf
, dregs_lo (dst0
));
3632 OUTS (outf
, " = A1.X");
3634 else if (aop
== 1 && aopcde
== 0)
3636 OUTS (outf
, dregs (dst0
));
3638 OUTS (outf
, dregs (src0
));
3639 OUTS (outf
, " +|- ");
3640 OUTS (outf
, dregs (src1
));
3643 else if (aop
== 3 && aopcde
== 0)
3645 OUTS (outf
, dregs (dst0
));
3647 OUTS (outf
, dregs (src0
));
3648 OUTS (outf
, " -|- ");
3649 OUTS (outf
, dregs (src1
));
3652 else if (aop
== 1 && aopcde
== 4)
3654 OUTS (outf
, dregs (dst0
));
3656 OUTS (outf
, dregs (src0
));
3658 OUTS (outf
, dregs (src1
));
3661 else if (aop
== 0 && aopcde
== 17)
3663 OUTS (outf
, dregs (dst1
));
3664 OUTS (outf
, " = A1 + A0, ");
3665 OUTS (outf
, dregs (dst0
));
3666 OUTS (outf
, " = A1 - A0");
3669 else if (aop
== 1 && aopcde
== 17)
3671 OUTS (outf
, dregs (dst1
));
3672 OUTS (outf
, " = A0 + A1, ");
3673 OUTS (outf
, dregs (dst0
));
3674 OUTS (outf
, " = A0 - A1");
3677 else if (aop
== 0 && aopcde
== 18)
3679 OUTS (outf
, "SAA (");
3680 OUTS (outf
, dregs (src0
+ 1));
3682 OUTS (outf
, imm5d (src0
));
3684 OUTS (outf
, dregs (src1
+ 1));
3686 OUTS (outf
, imm5d (src1
));
3690 else if (aop
== 3 && aopcde
== 18)
3691 OUTS (outf
, "DISALGNEXCPT");
3693 else if (aop
== 0 && aopcde
== 20)
3695 OUTS (outf
, dregs (dst0
));
3696 OUTS (outf
, " = BYTEOP1P (");
3697 OUTS (outf
, dregs (src0
+ 1));
3699 OUTS (outf
, imm5d (src0
));
3701 OUTS (outf
, dregs (src1
+ 1));
3703 OUTS (outf
, imm5d (src1
));
3707 else if (aop
== 1 && aopcde
== 20)
3709 OUTS (outf
, dregs (dst0
));
3710 OUTS (outf
, " = BYTEOP1P (");
3711 OUTS (outf
, dregs (src0
+ 1));
3713 OUTS (outf
, imm5d (src0
));
3715 OUTS (outf
, dregs (src1
+ 1));
3717 OUTS (outf
, imm5d (src1
));
3718 OUTS (outf
, ") (T");
3720 OUTS (outf
, ", R)");
3724 else if (aop
== 0 && aopcde
== 21)
3727 OUTS (outf
, dregs (dst1
));
3729 OUTS (outf
, dregs (dst0
));
3730 OUTS (outf
, ") = BYTEOP16P (");
3731 OUTS (outf
, dregs (src0
+ 1));
3733 OUTS (outf
, imm5d (src0
));
3735 OUTS (outf
, dregs (src1
+ 1));
3737 OUTS (outf
, imm5d (src1
));
3741 else if (aop
== 1 && aopcde
== 21)
3744 OUTS (outf
, dregs (dst1
));
3746 OUTS (outf
, dregs (dst0
));
3747 OUTS (outf
, ") = BYTEOP16M (");
3748 OUTS (outf
, dregs (src0
+ 1));
3750 OUTS (outf
, imm5d (src0
));
3752 OUTS (outf
, dregs (src1
+ 1));
3754 OUTS (outf
, imm5d (src1
));
3758 else if (aop
== 2 && aopcde
== 7)
3760 OUTS (outf
, dregs (dst0
));
3761 OUTS (outf
, " = ABS ");
3762 OUTS (outf
, dregs (src0
));
3764 else if (aop
== 1 && aopcde
== 7)
3766 OUTS (outf
, dregs (dst0
));
3767 OUTS (outf
, " = MIN (");
3768 OUTS (outf
, dregs (src0
));
3770 OUTS (outf
, dregs (src1
));
3773 else if (aop
== 0 && aopcde
== 7)
3775 OUTS (outf
, dregs (dst0
));
3776 OUTS (outf
, " = MAX (");
3777 OUTS (outf
, dregs (src0
));
3779 OUTS (outf
, dregs (src1
));
3782 else if (aop
== 2 && aopcde
== 6)
3784 OUTS (outf
, dregs (dst0
));
3785 OUTS (outf
, " = ABS ");
3786 OUTS (outf
, dregs (src0
));
3787 OUTS (outf
, " (V)");
3789 else if (aop
== 1 && aopcde
== 6)
3791 OUTS (outf
, dregs (dst0
));
3792 OUTS (outf
, " = MIN (");
3793 OUTS (outf
, dregs (src0
));
3795 OUTS (outf
, dregs (src1
));
3796 OUTS (outf
, ") (V)");
3798 else if (aop
== 0 && aopcde
== 6)
3800 OUTS (outf
, dregs (dst0
));
3801 OUTS (outf
, " = MAX (");
3802 OUTS (outf
, dregs (src0
));
3804 OUTS (outf
, dregs (src1
));
3805 OUTS (outf
, ") (V)");
3807 else if (HL
== 1 && aopcde
== 1)
3809 OUTS (outf
, dregs (dst1
));
3811 OUTS (outf
, dregs (src0
));
3812 OUTS (outf
, " +|- ");
3813 OUTS (outf
, dregs (src1
));
3815 OUTS (outf
, dregs (dst0
));
3817 OUTS (outf
, dregs (src0
));
3818 OUTS (outf
, " -|+ ");
3819 OUTS (outf
, dregs (src1
));
3820 amod0amod2 (s
, x
, aop
, outf
);
3822 else if (aop
== 0 && aopcde
== 4)
3824 OUTS (outf
, dregs (dst0
));
3826 OUTS (outf
, dregs (src0
));
3828 OUTS (outf
, dregs (src1
));
3831 else if (aop
== 0 && aopcde
== 0)
3833 OUTS (outf
, dregs (dst0
));
3835 OUTS (outf
, dregs (src0
));
3836 OUTS (outf
, " +|+ ");
3837 OUTS (outf
, dregs (src1
));
3840 else if (aop
== 0 && aopcde
== 24)
3842 OUTS (outf
, dregs (dst0
));
3843 OUTS (outf
, " = BYTEPACK (");
3844 OUTS (outf
, dregs (src0
));
3846 OUTS (outf
, dregs (src1
));
3849 else if (aop
== 1 && aopcde
== 24)
3852 OUTS (outf
, dregs (dst1
));
3854 OUTS (outf
, dregs (dst0
));
3855 OUTS (outf
, ") = BYTEUNPACK ");
3856 OUTS (outf
, dregs (src0
+ 1));
3858 OUTS (outf
, imm5d (src0
));
3861 else if (aopcde
== 13)
3864 OUTS (outf
, dregs (dst1
));
3866 OUTS (outf
, dregs (dst0
));
3867 OUTS (outf
, ") = SEARCH ");
3868 OUTS (outf
, dregs (src0
));
3870 searchmod (aop
, outf
);
3880 decode_dsp32shift_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
3883 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3884 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............|
3885 |.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......|
3886 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
3887 int HLs
= ((iw1
>> DSP32Shift_HLs_bits
) & DSP32Shift_HLs_mask
);
3888 int sop
= ((iw1
>> DSP32Shift_sop_bits
) & DSP32Shift_sop_mask
);
3889 int src0
= ((iw1
>> DSP32Shift_src0_bits
) & DSP32Shift_src0_mask
);
3890 int src1
= ((iw1
>> DSP32Shift_src1_bits
) & DSP32Shift_src1_mask
);
3891 int dst0
= ((iw1
>> DSP32Shift_dst0_bits
) & DSP32Shift_dst0_mask
);
3892 int sopcde
= ((iw0
>> (DSP32Shift_sopcde_bits
- 16)) & DSP32Shift_sopcde_mask
);
3893 const char *acc01
= (HLs
& 1) == 0 ? "A0" : "A1";
3895 if (HLs
== 0 && sop
== 0 && sopcde
== 0)
3897 OUTS (outf
, dregs_lo (dst0
));
3898 OUTS (outf
, " = ASHIFT ");
3899 OUTS (outf
, dregs_lo (src1
));
3900 OUTS (outf
, " BY ");
3901 OUTS (outf
, dregs_lo (src0
));
3903 else if (HLs
== 1 && sop
== 0 && sopcde
== 0)
3905 OUTS (outf
, dregs_lo (dst0
));
3906 OUTS (outf
, " = ASHIFT ");
3907 OUTS (outf
, dregs_hi (src1
));
3908 OUTS (outf
, " BY ");
3909 OUTS (outf
, dregs_lo (src0
));
3911 else if (HLs
== 2 && sop
== 0 && sopcde
== 0)
3913 OUTS (outf
, dregs_hi (dst0
));
3914 OUTS (outf
, " = ASHIFT ");
3915 OUTS (outf
, dregs_lo (src1
));
3916 OUTS (outf
, " BY ");
3917 OUTS (outf
, dregs_lo (src0
));
3919 else if (HLs
== 3 && sop
== 0 && sopcde
== 0)
3921 OUTS (outf
, dregs_hi (dst0
));
3922 OUTS (outf
, " = ASHIFT ");
3923 OUTS (outf
, dregs_hi (src1
));
3924 OUTS (outf
, " BY ");
3925 OUTS (outf
, dregs_lo (src0
));
3927 else if (HLs
== 0 && sop
== 1 && sopcde
== 0)
3929 OUTS (outf
, dregs_lo (dst0
));
3930 OUTS (outf
, " = ASHIFT ");
3931 OUTS (outf
, dregs_lo (src1
));
3932 OUTS (outf
, " BY ");
3933 OUTS (outf
, dregs_lo (src0
));
3934 OUTS (outf
, " (S)");
3936 else if (HLs
== 1 && sop
== 1 && sopcde
== 0)
3938 OUTS (outf
, dregs_lo (dst0
));
3939 OUTS (outf
, " = ASHIFT ");
3940 OUTS (outf
, dregs_hi (src1
));
3941 OUTS (outf
, " BY ");
3942 OUTS (outf
, dregs_lo (src0
));
3943 OUTS (outf
, " (S)");
3945 else if (HLs
== 2 && sop
== 1 && sopcde
== 0)
3947 OUTS (outf
, dregs_hi (dst0
));
3948 OUTS (outf
, " = ASHIFT ");
3949 OUTS (outf
, dregs_lo (src1
));
3950 OUTS (outf
, " BY ");
3951 OUTS (outf
, dregs_lo (src0
));
3952 OUTS (outf
, " (S)");
3954 else if (HLs
== 3 && sop
== 1 && sopcde
== 0)
3956 OUTS (outf
, dregs_hi (dst0
));
3957 OUTS (outf
, " = ASHIFT ");
3958 OUTS (outf
, dregs_hi (src1
));
3959 OUTS (outf
, " BY ");
3960 OUTS (outf
, dregs_lo (src0
));
3961 OUTS (outf
, " (S)");
3963 else if (sop
== 2 && sopcde
== 0)
3965 OUTS (outf
, (HLs
& 2) == 0 ? dregs_lo (dst0
) : dregs_hi (dst0
));
3966 OUTS (outf
, " = LSHIFT ");
3967 OUTS (outf
, (HLs
& 1) == 0 ? dregs_lo (src1
) : dregs_hi (src1
));
3968 OUTS (outf
, " BY ");
3969 OUTS (outf
, dregs_lo (src0
));
3971 else if (sop
== 0 && sopcde
== 3)
3974 OUTS (outf
, " = ASHIFT ");
3976 OUTS (outf
, " BY ");
3977 OUTS (outf
, dregs_lo (src0
));
3979 else if (sop
== 1 && sopcde
== 3)
3982 OUTS (outf
, " = LSHIFT ");
3984 OUTS (outf
, " BY ");
3985 OUTS (outf
, dregs_lo (src0
));
3987 else if (sop
== 2 && sopcde
== 3)
3990 OUTS (outf
, " = ROT ");
3992 OUTS (outf
, " BY ");
3993 OUTS (outf
, dregs_lo (src0
));
3995 else if (sop
== 3 && sopcde
== 3)
3997 OUTS (outf
, dregs (dst0
));
3998 OUTS (outf
, " = ROT ");
3999 OUTS (outf
, dregs (src1
));
4000 OUTS (outf
, " BY ");
4001 OUTS (outf
, dregs_lo (src0
));
4003 else if (sop
== 1 && sopcde
== 1)
4005 OUTS (outf
, dregs (dst0
));
4006 OUTS (outf
, " = ASHIFT ");
4007 OUTS (outf
, dregs (src1
));
4008 OUTS (outf
, " BY ");
4009 OUTS (outf
, dregs_lo (src0
));
4010 OUTS (outf
, " (V, S)");
4012 else if (sop
== 0 && sopcde
== 1)
4014 OUTS (outf
, dregs (dst0
));
4015 OUTS (outf
, " = ASHIFT ");
4016 OUTS (outf
, dregs (src1
));
4017 OUTS (outf
, " BY ");
4018 OUTS (outf
, dregs_lo (src0
));
4019 OUTS (outf
, " (V)");
4021 else if (sop
== 0 && sopcde
== 2)
4023 OUTS (outf
, dregs (dst0
));
4024 OUTS (outf
, " = ASHIFT ");
4025 OUTS (outf
, dregs (src1
));
4026 OUTS (outf
, " BY ");
4027 OUTS (outf
, dregs_lo (src0
));
4029 else if (sop
== 1 && sopcde
== 2)
4031 OUTS (outf
, dregs (dst0
));
4032 OUTS (outf
, " = ASHIFT ");
4033 OUTS (outf
, dregs (src1
));
4034 OUTS (outf
, " BY ");
4035 OUTS (outf
, dregs_lo (src0
));
4036 OUTS (outf
, " (S)");
4038 else if (sop
== 2 && sopcde
== 2)
4040 OUTS (outf
, dregs (dst0
));
4041 OUTS (outf
, " = SHIFT ");
4042 OUTS (outf
, dregs (src1
));
4043 OUTS (outf
, " BY ");
4044 OUTS (outf
, dregs_lo (src0
));
4046 else if (sop
== 3 && sopcde
== 2)
4048 OUTS (outf
, dregs (dst0
));
4049 OUTS (outf
, " = ROT ");
4050 OUTS (outf
, dregs (src1
));
4051 OUTS (outf
, " BY ");
4052 OUTS (outf
, dregs_lo (src0
));
4054 else if (sop
== 2 && sopcde
== 1)
4056 OUTS (outf
, dregs (dst0
));
4057 OUTS (outf
, " = SHIFT ");
4058 OUTS (outf
, dregs (src1
));
4059 OUTS (outf
, " BY ");
4060 OUTS (outf
, dregs_lo (src0
));
4061 OUTS (outf
, " (V)");
4063 else if (sop
== 0 && sopcde
== 4)
4065 OUTS (outf
, dregs (dst0
));
4066 OUTS (outf
, " = PACK (");
4067 OUTS (outf
, dregs_lo (src1
));
4069 OUTS (outf
, dregs_lo (src0
));
4072 else if (sop
== 1 && sopcde
== 4)
4074 OUTS (outf
, dregs (dst0
));
4075 OUTS (outf
, " = PACK (");
4076 OUTS (outf
, dregs_lo (src1
));
4078 OUTS (outf
, dregs_hi (src0
));
4081 else if (sop
== 2 && sopcde
== 4)
4083 OUTS (outf
, dregs (dst0
));
4084 OUTS (outf
, " = PACK (");
4085 OUTS (outf
, dregs_hi (src1
));
4087 OUTS (outf
, dregs_lo (src0
));
4090 else if (sop
== 3 && sopcde
== 4)
4092 OUTS (outf
, dregs (dst0
));
4093 OUTS (outf
, " = PACK (");
4094 OUTS (outf
, dregs_hi (src1
));
4096 OUTS (outf
, dregs_hi (src0
));
4099 else if (sop
== 0 && sopcde
== 5)
4101 OUTS (outf
, dregs_lo (dst0
));
4102 OUTS (outf
, " = SIGNBITS ");
4103 OUTS (outf
, dregs (src1
));
4105 else if (sop
== 1 && sopcde
== 5)
4107 OUTS (outf
, dregs_lo (dst0
));
4108 OUTS (outf
, " = SIGNBITS ");
4109 OUTS (outf
, dregs_lo (src1
));
4111 else if (sop
== 2 && sopcde
== 5)
4113 OUTS (outf
, dregs_lo (dst0
));
4114 OUTS (outf
, " = SIGNBITS ");
4115 OUTS (outf
, dregs_hi (src1
));
4117 else if (sop
== 0 && sopcde
== 6)
4119 OUTS (outf
, dregs_lo (dst0
));
4120 OUTS (outf
, " = SIGNBITS A0");
4122 else if (sop
== 1 && sopcde
== 6)
4124 OUTS (outf
, dregs_lo (dst0
));
4125 OUTS (outf
, " = SIGNBITS A1");
4127 else if (sop
== 3 && sopcde
== 6)
4129 OUTS (outf
, dregs_lo (dst0
));
4130 OUTS (outf
, " = ONES ");
4131 OUTS (outf
, dregs (src1
));
4133 else if (sop
== 0 && sopcde
== 7)
4135 OUTS (outf
, dregs_lo (dst0
));
4136 OUTS (outf
, " = EXPADJ (");
4137 OUTS (outf
, dregs (src1
));
4139 OUTS (outf
, dregs_lo (src0
));
4142 else if (sop
== 1 && sopcde
== 7)
4144 OUTS (outf
, dregs_lo (dst0
));
4145 OUTS (outf
, " = EXPADJ (");
4146 OUTS (outf
, dregs (src1
));
4148 OUTS (outf
, dregs_lo (src0
));
4149 OUTS (outf
, ") (V)");
4151 else if (sop
== 2 && sopcde
== 7)
4153 OUTS (outf
, dregs_lo (dst0
));
4154 OUTS (outf
, " = EXPADJ (");
4155 OUTS (outf
, dregs_lo (src1
));
4157 OUTS (outf
, dregs_lo (src0
));
4160 else if (sop
== 3 && sopcde
== 7)
4162 OUTS (outf
, dregs_lo (dst0
));
4163 OUTS (outf
, " = EXPADJ (");
4164 OUTS (outf
, dregs_hi (src1
));
4166 OUTS (outf
, dregs_lo (src0
));
4169 else if (sop
== 0 && sopcde
== 8)
4171 OUTS (outf
, "BITMUX (");
4172 OUTS (outf
, dregs (src0
));
4174 OUTS (outf
, dregs (src1
));
4175 OUTS (outf
, ", A0) (ASR)");
4177 else if (sop
== 1 && sopcde
== 8)
4179 OUTS (outf
, "BITMUX (");
4180 OUTS (outf
, dregs (src0
));
4182 OUTS (outf
, dregs (src1
));
4183 OUTS (outf
, ", A0) (ASL)");
4185 else if (sop
== 0 && sopcde
== 9)
4187 OUTS (outf
, dregs_lo (dst0
));
4188 OUTS (outf
, " = VIT_MAX (");
4189 OUTS (outf
, dregs (src1
));
4190 OUTS (outf
, ") (ASL)");
4192 else if (sop
== 1 && sopcde
== 9)
4194 OUTS (outf
, dregs_lo (dst0
));
4195 OUTS (outf
, " = VIT_MAX (");
4196 OUTS (outf
, dregs (src1
));
4197 OUTS (outf
, ") (ASR)");
4199 else if (sop
== 2 && sopcde
== 9)
4201 OUTS (outf
, dregs (dst0
));
4202 OUTS (outf
, " = VIT_MAX (");
4203 OUTS (outf
, dregs (src1
));
4205 OUTS (outf
, dregs (src0
));
4206 OUTS (outf
, ") (ASL)");
4208 else if (sop
== 3 && sopcde
== 9)
4210 OUTS (outf
, dregs (dst0
));
4211 OUTS (outf
, " = VIT_MAX (");
4212 OUTS (outf
, dregs (src1
));
4214 OUTS (outf
, dregs (src0
));
4215 OUTS (outf
, ") (ASR)");
4217 else if (sop
== 0 && sopcde
== 10)
4219 OUTS (outf
, dregs (dst0
));
4220 OUTS (outf
, " = EXTRACT (");
4221 OUTS (outf
, dregs (src1
));
4223 OUTS (outf
, dregs_lo (src0
));
4224 OUTS (outf
, ") (Z)");
4226 else if (sop
== 1 && sopcde
== 10)
4228 OUTS (outf
, dregs (dst0
));
4229 OUTS (outf
, " = EXTRACT (");
4230 OUTS (outf
, dregs (src1
));
4232 OUTS (outf
, dregs_lo (src0
));
4233 OUTS (outf
, ") (X)");
4235 else if (sop
== 2 && sopcde
== 10)
4237 OUTS (outf
, dregs (dst0
));
4238 OUTS (outf
, " = DEPOSIT (");
4239 OUTS (outf
, dregs (src1
));
4241 OUTS (outf
, dregs (src0
));
4244 else if (sop
== 3 && sopcde
== 10)
4246 OUTS (outf
, dregs (dst0
));
4247 OUTS (outf
, " = DEPOSIT (");
4248 OUTS (outf
, dregs (src1
));
4250 OUTS (outf
, dregs (src0
));
4251 OUTS (outf
, ") (X)");
4253 else if (sop
== 0 && sopcde
== 11)
4255 OUTS (outf
, dregs_lo (dst0
));
4256 OUTS (outf
, " = CC = BXORSHIFT (A0, ");
4257 OUTS (outf
, dregs (src0
));
4260 else if (sop
== 1 && sopcde
== 11)
4262 OUTS (outf
, dregs_lo (dst0
));
4263 OUTS (outf
, " = CC = BXOR (A0, ");
4264 OUTS (outf
, dregs (src0
));
4267 else if (sop
== 0 && sopcde
== 12)
4268 OUTS (outf
, "A0 = BXORSHIFT (A0, A1, CC)");
4270 else if (sop
== 1 && sopcde
== 12)
4272 OUTS (outf
, dregs_lo (dst0
));
4273 OUTS (outf
, " = CC = BXOR (A0, A1, CC)");
4275 else if (sop
== 0 && sopcde
== 13)
4277 OUTS (outf
, dregs (dst0
));
4278 OUTS (outf
, " = ALIGN8 (");
4279 OUTS (outf
, dregs (src1
));
4281 OUTS (outf
, dregs (src0
));
4284 else if (sop
== 1 && sopcde
== 13)
4286 OUTS (outf
, dregs (dst0
));
4287 OUTS (outf
, " = ALIGN16 (");
4288 OUTS (outf
, dregs (src1
));
4290 OUTS (outf
, dregs (src0
));
4293 else if (sop
== 2 && sopcde
== 13)
4295 OUTS (outf
, dregs (dst0
));
4296 OUTS (outf
, " = ALIGN24 (");
4297 OUTS (outf
, dregs (src1
));
4299 OUTS (outf
, dregs (src0
));
4309 decode_dsp32shiftimm_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
4312 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
4313 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............|
4314 |.sop...|.HLs...|.dst0......|.immag.................|.src1......|
4315 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4316 int src1
= ((iw1
>> DSP32ShiftImm_src1_bits
) & DSP32ShiftImm_src1_mask
);
4317 int sop
= ((iw1
>> DSP32ShiftImm_sop_bits
) & DSP32ShiftImm_sop_mask
);
4318 int bit8
= ((iw1
>> 8) & 0x1);
4319 int immag
= ((iw1
>> DSP32ShiftImm_immag_bits
) & DSP32ShiftImm_immag_mask
);
4320 int newimmag
= (-(iw1
>> DSP32ShiftImm_immag_bits
) & DSP32ShiftImm_immag_mask
);
4321 int dst0
= ((iw1
>> DSP32ShiftImm_dst0_bits
) & DSP32ShiftImm_dst0_mask
);
4322 int sopcde
= ((iw0
>> (DSP32ShiftImm_sopcde_bits
- 16)) & DSP32ShiftImm_sopcde_mask
);
4323 int HLs
= ((iw1
>> DSP32ShiftImm_HLs_bits
) & DSP32ShiftImm_HLs_mask
);
4326 if (sop
== 0 && sopcde
== 0)
4328 OUTS (outf
, (HLs
& 2) ? dregs_hi (dst0
) : dregs_lo (dst0
));
4330 OUTS (outf
, (HLs
& 1) ? dregs_hi (src1
) : dregs_lo (src1
));
4331 OUTS (outf
, " >>> ");
4332 OUTS (outf
, uimm4 (newimmag
));
4334 else if (sop
== 1 && sopcde
== 0 && bit8
== 0)
4336 OUTS (outf
, (HLs
& 2) ? dregs_hi (dst0
) : dregs_lo (dst0
));
4338 OUTS (outf
, (HLs
& 1) ? dregs_hi (src1
) : dregs_lo (src1
));
4339 OUTS (outf
, " << ");
4340 OUTS (outf
, uimm4 (immag
));
4341 OUTS (outf
, " (S)");
4343 else if (sop
== 1 && sopcde
== 0 && bit8
== 1)
4345 OUTS (outf
, (HLs
& 2) ? dregs_hi (dst0
) : dregs_lo (dst0
));
4347 OUTS (outf
, (HLs
& 1) ? dregs_hi (src1
) : dregs_lo (src1
));
4348 OUTS (outf
, " >>> ");
4349 OUTS (outf
, uimm4 (newimmag
));
4350 OUTS (outf
, " (S)");
4352 else if (sop
== 2 && sopcde
== 0 && bit8
== 0)
4354 OUTS (outf
, (HLs
& 2) ? dregs_hi (dst0
) : dregs_lo (dst0
));
4356 OUTS (outf
, (HLs
& 1) ? dregs_hi (src1
) : dregs_lo (src1
));
4357 OUTS (outf
, " << ");
4358 OUTS (outf
, uimm4 (immag
));
4360 else if (sop
== 2 && sopcde
== 0 && bit8
== 1)
4362 OUTS (outf
, (HLs
& 2) ? dregs_hi (dst0
) : dregs_lo (dst0
));
4364 OUTS (outf
, (HLs
& 1) ? dregs_hi (src1
) : dregs_lo (src1
));
4365 OUTS (outf
, " >> ");
4366 OUTS (outf
, uimm4 (newimmag
));
4368 else if (sop
== 2 && sopcde
== 3 && HLs
== 1)
4370 OUTS (outf
, "A1 = ROT A1 BY ");
4371 OUTS (outf
, imm6 (immag
));
4373 else if (sop
== 0 && sopcde
== 3 && HLs
== 0 && bit8
== 0)
4375 OUTS (outf
, "A0 = A0 << ");
4376 OUTS (outf
, uimm5 (immag
));
4378 else if (sop
== 0 && sopcde
== 3 && HLs
== 0 && bit8
== 1)
4380 OUTS (outf
, "A0 = A0 >>> ");
4381 OUTS (outf
, uimm5 (newimmag
));
4383 else if (sop
== 0 && sopcde
== 3 && HLs
== 1 && bit8
== 0)
4385 OUTS (outf
, "A1 = A1 << ");
4386 OUTS (outf
, uimm5 (immag
));
4388 else if (sop
== 0 && sopcde
== 3 && HLs
== 1 && bit8
== 1)
4390 OUTS (outf
, "A1 = A1 >>> ");
4391 OUTS (outf
, uimm5 (newimmag
));
4393 else if (sop
== 1 && sopcde
== 3 && HLs
== 0)
4395 OUTS (outf
, "A0 = A0 >> ");
4396 OUTS (outf
, uimm5 (newimmag
));
4398 else if (sop
== 1 && sopcde
== 3 && HLs
== 1)
4400 OUTS (outf
, "A1 = A1 >> ");
4401 OUTS (outf
, uimm5 (newimmag
));
4403 else if (sop
== 2 && sopcde
== 3 && HLs
== 0)
4405 OUTS (outf
, "A0 = ROT A0 BY ");
4406 OUTS (outf
, imm6 (immag
));
4408 else if (sop
== 1 && sopcde
== 1 && bit8
== 0)
4410 OUTS (outf
, dregs (dst0
));
4412 OUTS (outf
, dregs (src1
));
4413 OUTS (outf
, " << ");
4414 OUTS (outf
, uimm5 (immag
));
4415 OUTS (outf
, " (V, S)");
4417 else if (sop
== 1 && sopcde
== 1 && bit8
== 1)
4419 OUTS (outf
, dregs (dst0
));
4421 OUTS (outf
, dregs (src1
));
4422 OUTS (outf
, " >>> ");
4423 OUTS (outf
, imm5 (-immag
));
4424 OUTS (outf
, " (V)");
4426 else if (sop
== 2 && sopcde
== 1 && bit8
== 1)
4428 OUTS (outf
, dregs (dst0
));
4430 OUTS (outf
, dregs (src1
));
4431 OUTS (outf
, " >> ");
4432 OUTS (outf
, uimm5 (newimmag
));
4433 OUTS (outf
, " (V)");
4435 else if (sop
== 2 && sopcde
== 1 && bit8
== 0)
4437 OUTS (outf
, dregs (dst0
));
4439 OUTS (outf
, dregs (src1
));
4440 OUTS (outf
, " << ");
4441 OUTS (outf
, imm5 (immag
));
4442 OUTS (outf
, " (V)");
4444 else if (sop
== 0 && sopcde
== 1)
4446 OUTS (outf
, dregs (dst0
));
4448 OUTS (outf
, dregs (src1
));
4449 OUTS (outf
, " >>> ");
4450 OUTS (outf
, uimm5 (newimmag
));
4451 OUTS (outf
, " (V)");
4453 else if (sop
== 1 && sopcde
== 2)
4455 OUTS (outf
, dregs (dst0
));
4457 OUTS (outf
, dregs (src1
));
4458 OUTS (outf
, " << ");
4459 OUTS (outf
, uimm5 (immag
));
4460 OUTS (outf
, " (S)");
4462 else if (sop
== 2 && sopcde
== 2 && bit8
== 1)
4464 OUTS (outf
, dregs (dst0
));
4466 OUTS (outf
, dregs (src1
));
4467 OUTS (outf
, " >> ");
4468 OUTS (outf
, uimm5 (newimmag
));
4470 else if (sop
== 2 && sopcde
== 2 && bit8
== 0)
4472 OUTS (outf
, dregs (dst0
));
4474 OUTS (outf
, dregs (src1
));
4475 OUTS (outf
, " << ");
4476 OUTS (outf
, uimm5 (immag
));
4478 else if (sop
== 3 && sopcde
== 2)
4480 OUTS (outf
, dregs (dst0
));
4481 OUTS (outf
, " = ROT ");
4482 OUTS (outf
, dregs (src1
));
4483 OUTS (outf
, " BY ");
4484 OUTS (outf
, imm6 (immag
));
4486 else if (sop
== 0 && sopcde
== 2)
4488 OUTS (outf
, dregs (dst0
));
4490 OUTS (outf
, dregs (src1
));
4491 OUTS (outf
, " >>> ");
4492 OUTS (outf
, uimm5 (newimmag
));
4501 decode_pseudoDEBUG_0 (TIword iw0
, disassemble_info
*outf
)
4504 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
4505 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......|
4506 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4507 int fn
= ((iw0
>> PseudoDbg_fn_bits
) & PseudoDbg_fn_mask
);
4508 int grp
= ((iw0
>> PseudoDbg_grp_bits
) & PseudoDbg_grp_mask
);
4509 int reg
= ((iw0
>> PseudoDbg_reg_bits
) & PseudoDbg_reg_mask
);
4511 if (reg
== 0 && fn
== 3)
4512 OUTS (outf
, "DBG A0");
4514 else if (reg
== 1 && fn
== 3)
4515 OUTS (outf
, "DBG A1");
4517 else if (reg
== 3 && fn
== 3)
4518 OUTS (outf
, "ABORT");
4520 else if (reg
== 4 && fn
== 3)
4523 else if (reg
== 5 && fn
== 3)
4524 OUTS (outf
, "DBGHALT");
4526 else if (reg
== 6 && fn
== 3)
4528 OUTS (outf
, "DBGCMPLX (");
4529 OUTS (outf
, dregs (grp
));
4532 else if (reg
== 7 && fn
== 3)
4535 else if (grp
== 0 && fn
== 2)
4537 OUTS (outf
, "OUTC");
4538 OUTS (outf
, dregs (reg
));
4543 OUTS (outf
, allregs (reg
, grp
));
4547 OUTS (outf
, "PRNT");
4548 OUTS (outf
, allregs (reg
, grp
));
4557 decode_pseudodbg_assert_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
4560 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
4561 | 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...|
4562 |.expected......................................................|
4563 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4564 int expected
= ((iw1
>> PseudoDbg_Assert_expected_bits
) & PseudoDbg_Assert_expected_mask
);
4565 int dbgop
= ((iw0
>> (PseudoDbg_Assert_dbgop_bits
- 16)) & PseudoDbg_Assert_dbgop_mask
);
4566 int regtest
= ((iw0
>> (PseudoDbg_Assert_regtest_bits
- 16)) & PseudoDbg_Assert_regtest_mask
);
4570 OUTS (outf
, "DBGA (");
4571 OUTS (outf
, dregs_lo (regtest
));
4573 OUTS (outf
, uimm16 (expected
));
4576 else if (dbgop
== 1)
4578 OUTS (outf
, "DBGA (");
4579 OUTS (outf
, dregs_hi (regtest
));
4581 OUTS (outf
, uimm16 (expected
));
4584 else if (dbgop
== 2)
4586 OUTS (outf
, "DBGAL (");
4587 OUTS (outf
, dregs (regtest
));
4589 OUTS (outf
, uimm16 (expected
));
4592 else if (dbgop
== 3)
4594 OUTS (outf
, "DBGAH (");
4595 OUTS (outf
, dregs (regtest
));
4597 OUTS (outf
, uimm16 (expected
));
4606 _print_insn_bfin (bfd_vma pc
, disassemble_info
*outf
)
4614 status
= (*outf
->read_memory_func
) (pc
& ~0x1, buf
, 2, outf
);
4615 status
= (*outf
->read_memory_func
) ((pc
+ 2) & ~0x1, buf
+ 2, 2, outf
);
4617 iw0
= bfd_getl16 (buf
);
4618 iw1
= bfd_getl16 (buf
+ 2);
4620 if ((iw0
& 0xf7ff) == 0xc003 && iw1
== 0x1800)
4622 OUTS (outf
, "MNOP");
4625 else if ((iw0
& 0xff00) == 0x0000)
4626 rv
= decode_ProgCtrl_0 (iw0
, outf
);
4627 else if ((iw0
& 0xffc0) == 0x0240)
4628 rv
= decode_CaCTRL_0 (iw0
, outf
);
4629 else if ((iw0
& 0xff80) == 0x0100)
4630 rv
= decode_PushPopReg_0 (iw0
, outf
);
4631 else if ((iw0
& 0xfe00) == 0x0400)
4632 rv
= decode_PushPopMultiple_0 (iw0
, outf
);
4633 else if ((iw0
& 0xfe00) == 0x0600)
4634 rv
= decode_ccMV_0 (iw0
, outf
);
4635 else if ((iw0
& 0xf800) == 0x0800)
4636 rv
= decode_CCflag_0 (iw0
, outf
);
4637 else if ((iw0
& 0xffe0) == 0x0200)
4638 rv
= decode_CC2dreg_0 (iw0
, outf
);
4639 else if ((iw0
& 0xff00) == 0x0300)
4640 rv
= decode_CC2stat_0 (iw0
, outf
);
4641 else if ((iw0
& 0xf000) == 0x1000)
4642 rv
= decode_BRCC_0 (iw0
, pc
, outf
);
4643 else if ((iw0
& 0xf000) == 0x2000)
4644 rv
= decode_UJUMP_0 (iw0
, pc
, outf
);
4645 else if ((iw0
& 0xf000) == 0x3000)
4646 rv
= decode_REGMV_0 (iw0
, outf
);
4647 else if ((iw0
& 0xfc00) == 0x4000)
4648 rv
= decode_ALU2op_0 (iw0
, outf
);
4649 else if ((iw0
& 0xfe00) == 0x4400)
4650 rv
= decode_PTR2op_0 (iw0
, outf
);
4651 else if ((iw0
& 0xf800) == 0x4800)
4652 rv
= decode_LOGI2op_0 (iw0
, outf
);
4653 else if ((iw0
& 0xf000) == 0x5000)
4654 rv
= decode_COMP3op_0 (iw0
, outf
);
4655 else if ((iw0
& 0xf800) == 0x6000)
4656 rv
= decode_COMPI2opD_0 (iw0
, outf
);
4657 else if ((iw0
& 0xf800) == 0x6800)
4658 rv
= decode_COMPI2opP_0 (iw0
, outf
);
4659 else if ((iw0
& 0xf000) == 0x8000)
4660 rv
= decode_LDSTpmod_0 (iw0
, outf
);
4661 else if ((iw0
& 0xff60) == 0x9e60)
4662 rv
= decode_dagMODim_0 (iw0
, outf
);
4663 else if ((iw0
& 0xfff0) == 0x9f60)
4664 rv
= decode_dagMODik_0 (iw0
, outf
);
4665 else if ((iw0
& 0xfc00) == 0x9c00)
4666 rv
= decode_dspLDST_0 (iw0
, outf
);
4667 else if ((iw0
& 0xf000) == 0x9000)
4668 rv
= decode_LDST_0 (iw0
, outf
);
4669 else if ((iw0
& 0xfc00) == 0xb800)
4670 rv
= decode_LDSTiiFP_0 (iw0
, outf
);
4671 else if ((iw0
& 0xe000) == 0xA000)
4672 rv
= decode_LDSTii_0 (iw0
, outf
);
4673 else if ((iw0
& 0xff80) == 0xe080 && (iw1
& 0x0C00) == 0x0000)
4674 rv
= decode_LoopSetup_0 (iw0
, iw1
, pc
, outf
);
4675 else if ((iw0
& 0xff00) == 0xe100 && (iw1
& 0x0000) == 0x0000)
4676 rv
= decode_LDIMMhalf_0 (iw0
, iw1
, outf
);
4677 else if ((iw0
& 0xfe00) == 0xe200 && (iw1
& 0x0000) == 0x0000)
4678 rv
= decode_CALLa_0 (iw0
, iw1
, pc
, outf
);
4679 else if ((iw0
& 0xfc00) == 0xe400 && (iw1
& 0x0000) == 0x0000)
4680 rv
= decode_LDSTidxI_0 (iw0
, iw1
, outf
);
4681 else if ((iw0
& 0xfffe) == 0xe800 && (iw1
& 0x0000) == 0x0000)
4682 rv
= decode_linkage_0 (iw0
, iw1
, outf
);
4683 else if ((iw0
& 0xf600) == 0xc000 && (iw1
& 0x0000) == 0x0000)
4684 rv
= decode_dsp32mac_0 (iw0
, iw1
, outf
);
4685 else if ((iw0
& 0xf600) == 0xc200 && (iw1
& 0x0000) == 0x0000)
4686 rv
= decode_dsp32mult_0 (iw0
, iw1
, outf
);
4687 else if ((iw0
& 0xf7c0) == 0xc400 && (iw1
& 0x0000) == 0x0000)
4688 rv
= decode_dsp32alu_0 (iw0
, iw1
, outf
);
4689 else if ((iw0
& 0xf780) == 0xc600 && (iw1
& 0x01c0) == 0x0000)
4690 rv
= decode_dsp32shift_0 (iw0
, iw1
, outf
);
4691 else if ((iw0
& 0xf780) == 0xc680 && (iw1
& 0x0000) == 0x0000)
4692 rv
= decode_dsp32shiftimm_0 (iw0
, iw1
, outf
);
4693 else if ((iw0
& 0xff00) == 0xf800)
4694 rv
= decode_pseudoDEBUG_0 (iw0
, outf
);
4696 else if ((iw0
& 0xFF00) == 0xF900)
4697 rv
= decode_pseudoOChar_0 (iw0
, iw1
, pc
, outf
);
4699 else if ((iw0
& 0xFFC0) == 0xf000 && (iw1
& 0x0000) == 0x0000)
4700 rv
= decode_pseudodbg_assert_0 (iw0
, iw1
, outf
);
4707 print_insn_bfin (bfd_vma pc
, disassemble_info
*outf
)
4714 status
= (*outf
->read_memory_func
) (pc
& ~0x01, buf
, 2, outf
);
4715 iw0
= bfd_getl16 (buf
);
4717 count
+= _print_insn_bfin (pc
, outf
);
4719 /* Proper display of multiple issue instructions. */
4721 if ((iw0
& 0xc000) == 0xc000 && (iw0
& BIT_MULTI_INS
)
4722 && ((iw0
& 0xe800) != 0xe800 /* Not Linkage. */ ))
4725 outf
->fprintf_func (outf
->stream
, " || ");
4726 count
+= _print_insn_bfin (pc
+ 4, outf
);
4727 outf
->fprintf_func (outf
->stream
, " || ");
4728 count
+= _print_insn_bfin (pc
+ 6, outf
);
4733 outf
->fprintf_func (outf
->stream
, "ILLEGAL");
4737 outf
->fprintf_func (outf
->stream
, ";");