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* config/tc-mips.c (mips_cpu_info_table): Add cpu names m4k, 24k,
[binutils-gdb.git] / opcodes / i386-dis.c
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
33
34 #include "dis-asm.h"
35 #include "sysdep.h"
36 #include "opintl.h"
37
38 #define MAXLEN 20
39
40 #include <setjmp.h>
41
42 #ifndef UNIXWARE_COMPAT
43 /* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45 #define UNIXWARE_COMPAT 1
46 #endif
47
48 static int fetch_data (struct disassemble_info *, bfd_byte *);
49 static void ckprefix (void);
50 static const char *prefix_name (int, int);
51 static int print_insn (bfd_vma, disassemble_info *);
52 static void dofloat (int);
53 static void OP_ST (int, int);
54 static void OP_STi (int, int);
55 static int putop (const char *, int);
56 static void oappend (const char *);
57 static void append_seg (void);
58 static void OP_indirE (int, int);
59 static void print_operand_value (char *, int, bfd_vma);
60 static void OP_E (int, int);
61 static void OP_G (int, int);
62 static bfd_vma get64 (void);
63 static bfd_signed_vma get32 (void);
64 static bfd_signed_vma get32s (void);
65 static int get16 (void);
66 static void set_op (bfd_vma, int);
67 static void OP_REG (int, int);
68 static void OP_IMREG (int, int);
69 static void OP_I (int, int);
70 static void OP_I64 (int, int);
71 static void OP_sI (int, int);
72 static void OP_J (int, int);
73 static void OP_SEG (int, int);
74 static void OP_DIR (int, int);
75 static void OP_OFF (int, int);
76 static void OP_OFF64 (int, int);
77 static void ptr_reg (int, int);
78 static void OP_ESreg (int, int);
79 static void OP_DSreg (int, int);
80 static void OP_C (int, int);
81 static void OP_D (int, int);
82 static void OP_T (int, int);
83 static void OP_Rd (int, int);
84 static void OP_MMX (int, int);
85 static void OP_XMM (int, int);
86 static void OP_EM (int, int);
87 static void OP_EX (int, int);
88 static void OP_MS (int, int);
89 static void OP_XS (int, int);
90 static void OP_M (int, int);
91 static void OP_0fae (int, int);
92 static void OP_0f07 (int, int);
93 static void NOP_Fixup (int, int);
94 static void OP_3DNowSuffix (int, int);
95 static void OP_SIMD_Suffix (int, int);
96 static void SIMD_Fixup (int, int);
97 static void PNI_Fixup (int, int);
98 static void INVLPG_Fixup (int, int);
99 static void BadOp (void);
100 static void SEG_Fixup (int, int);
101
102 struct dis_private {
103 /* Points to first byte not fetched. */
104 bfd_byte *max_fetched;
105 bfd_byte the_buffer[MAXLEN];
106 bfd_vma insn_start;
107 int orig_sizeflag;
108 jmp_buf bailout;
109 };
110
111 /* The opcode for the fwait instruction, which we treat as a prefix
112 when we can. */
113 #define FWAIT_OPCODE (0x9b)
114
115 /* Set to 1 for 64bit mode disassembly. */
116 static int mode_64bit;
117
118 /* Flags for the prefixes for the current instruction. See below. */
119 static int prefixes;
120
121 /* REX prefix the current instruction. See below. */
122 static int rex;
123 /* Bits of REX we've already used. */
124 static int rex_used;
125 #define REX_MODE64 8
126 #define REX_EXTX 4
127 #define REX_EXTY 2
128 #define REX_EXTZ 1
129 /* Mark parts used in the REX prefix. When we are testing for
130 empty prefix (for 8bit register REX extension), just mask it
131 out. Otherwise test for REX bit is excuse for existence of REX
132 only in case value is nonzero. */
133 #define USED_REX(value) \
134 { \
135 if (value) \
136 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
137 else \
138 rex_used |= 0x40; \
139 }
140
141 /* Flags for prefixes which we somehow handled when printing the
142 current instruction. */
143 static int used_prefixes;
144
145 /* Flags stored in PREFIXES. */
146 #define PREFIX_REPZ 1
147 #define PREFIX_REPNZ 2
148 #define PREFIX_LOCK 4
149 #define PREFIX_CS 8
150 #define PREFIX_SS 0x10
151 #define PREFIX_DS 0x20
152 #define PREFIX_ES 0x40
153 #define PREFIX_FS 0x80
154 #define PREFIX_GS 0x100
155 #define PREFIX_DATA 0x200
156 #define PREFIX_ADDR 0x400
157 #define PREFIX_FWAIT 0x800
158
159 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
160 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
161 on error. */
162 #define FETCH_DATA(info, addr) \
163 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
164 ? 1 : fetch_data ((info), (addr)))
165
166 static int
167 fetch_data (struct disassemble_info *info, bfd_byte *addr)
168 {
169 int status;
170 struct dis_private *priv = (struct dis_private *) info->private_data;
171 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
172
173 status = (*info->read_memory_func) (start,
174 priv->max_fetched,
175 addr - priv->max_fetched,
176 info);
177 if (status != 0)
178 {
179 /* If we did manage to read at least one byte, then
180 print_insn_i386 will do something sensible. Otherwise, print
181 an error. We do that here because this is where we know
182 STATUS. */
183 if (priv->max_fetched == priv->the_buffer)
184 (*info->memory_error_func) (status, start, info);
185 longjmp (priv->bailout, 1);
186 }
187 else
188 priv->max_fetched = addr;
189 return 1;
190 }
191
192 #define XX NULL, 0
193
194 #define Eb OP_E, b_mode
195 #define Ev OP_E, v_mode
196 #define Ed OP_E, d_mode
197 #define Eq OP_E, q_mode
198 #define Edq OP_E, dq_mode
199 #define Edqw OP_E, dqw_mode
200 #define indirEv OP_indirE, branch_v_mode
201 #define indirEp OP_indirE, f_mode
202 #define Ew OP_E, w_mode
203 #define Ma OP_E, v_mode
204 #define M OP_M, 0 /* lea, lgdt, etc. */
205 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
206 #define Gb OP_G, b_mode
207 #define Gv OP_G, v_mode
208 #define Gd OP_G, d_mode
209 #define Gdq OP_G, dq_mode
210 #define Gw OP_G, w_mode
211 #define Rd OP_Rd, d_mode
212 #define Rm OP_Rd, m_mode
213 #define Ib OP_I, b_mode
214 #define sIb OP_sI, b_mode /* sign extened byte */
215 #define Iv OP_I, v_mode
216 #define Iq OP_I, q_mode
217 #define Iv64 OP_I64, v_mode
218 #define Iw OP_I, w_mode
219 #define I1 OP_I, const_1_mode
220 #define Jb OP_J, b_mode
221 #define Jv OP_J, v_mode
222 #define Cm OP_C, m_mode
223 #define Dm OP_D, m_mode
224 #define Td OP_T, d_mode
225 #define Sv SEG_Fixup, v_mode
226
227 #define RMeAX OP_REG, eAX_reg
228 #define RMeBX OP_REG, eBX_reg
229 #define RMeCX OP_REG, eCX_reg
230 #define RMeDX OP_REG, eDX_reg
231 #define RMeSP OP_REG, eSP_reg
232 #define RMeBP OP_REG, eBP_reg
233 #define RMeSI OP_REG, eSI_reg
234 #define RMeDI OP_REG, eDI_reg
235 #define RMrAX OP_REG, rAX_reg
236 #define RMrBX OP_REG, rBX_reg
237 #define RMrCX OP_REG, rCX_reg
238 #define RMrDX OP_REG, rDX_reg
239 #define RMrSP OP_REG, rSP_reg
240 #define RMrBP OP_REG, rBP_reg
241 #define RMrSI OP_REG, rSI_reg
242 #define RMrDI OP_REG, rDI_reg
243 #define RMAL OP_REG, al_reg
244 #define RMAL OP_REG, al_reg
245 #define RMCL OP_REG, cl_reg
246 #define RMDL OP_REG, dl_reg
247 #define RMBL OP_REG, bl_reg
248 #define RMAH OP_REG, ah_reg
249 #define RMCH OP_REG, ch_reg
250 #define RMDH OP_REG, dh_reg
251 #define RMBH OP_REG, bh_reg
252 #define RMAX OP_REG, ax_reg
253 #define RMDX OP_REG, dx_reg
254
255 #define eAX OP_IMREG, eAX_reg
256 #define eBX OP_IMREG, eBX_reg
257 #define eCX OP_IMREG, eCX_reg
258 #define eDX OP_IMREG, eDX_reg
259 #define eSP OP_IMREG, eSP_reg
260 #define eBP OP_IMREG, eBP_reg
261 #define eSI OP_IMREG, eSI_reg
262 #define eDI OP_IMREG, eDI_reg
263 #define AL OP_IMREG, al_reg
264 #define AL OP_IMREG, al_reg
265 #define CL OP_IMREG, cl_reg
266 #define DL OP_IMREG, dl_reg
267 #define BL OP_IMREG, bl_reg
268 #define AH OP_IMREG, ah_reg
269 #define CH OP_IMREG, ch_reg
270 #define DH OP_IMREG, dh_reg
271 #define BH OP_IMREG, bh_reg
272 #define AX OP_IMREG, ax_reg
273 #define DX OP_IMREG, dx_reg
274 #define indirDX OP_IMREG, indir_dx_reg
275
276 #define Sw OP_SEG, w_mode
277 #define Ap OP_DIR, 0
278 #define Ob OP_OFF, b_mode
279 #define Ob64 OP_OFF64, b_mode
280 #define Ov OP_OFF, v_mode
281 #define Ov64 OP_OFF64, v_mode
282 #define Xb OP_DSreg, eSI_reg
283 #define Xv OP_DSreg, eSI_reg
284 #define Yb OP_ESreg, eDI_reg
285 #define Yv OP_ESreg, eDI_reg
286 #define DSBX OP_DSreg, eBX_reg
287
288 #define es OP_REG, es_reg
289 #define ss OP_REG, ss_reg
290 #define cs OP_REG, cs_reg
291 #define ds OP_REG, ds_reg
292 #define fs OP_REG, fs_reg
293 #define gs OP_REG, gs_reg
294
295 #define MX OP_MMX, 0
296 #define XM OP_XMM, 0
297 #define EM OP_EM, v_mode
298 #define EX OP_EX, v_mode
299 #define MS OP_MS, v_mode
300 #define XS OP_XS, v_mode
301 #define OPSUF OP_3DNowSuffix, 0
302 #define OPSIMD OP_SIMD_Suffix, 0
303
304 #define cond_jump_flag NULL, cond_jump_mode
305 #define loop_jcxz_flag NULL, loop_jcxz_mode
306
307 /* bits in sizeflag */
308 #define SUFFIX_ALWAYS 4
309 #define AFLAG 2
310 #define DFLAG 1
311
312 #define b_mode 1 /* byte operand */
313 #define v_mode 2 /* operand size depends on prefixes */
314 #define w_mode 3 /* word operand */
315 #define d_mode 4 /* double word operand */
316 #define q_mode 5 /* quad word operand */
317 #define t_mode 6 /* ten-byte operand */
318 #define x_mode 7 /* 16-byte XMM operand */
319 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
320 #define cond_jump_mode 9
321 #define loop_jcxz_mode 10
322 #define dq_mode 11 /* operand size depends on REX prefixes. */
323 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
324 #define f_mode 13 /* 4- or 6-byte pointer operand */
325 #define const_1_mode 14
326 #define branch_v_mode 15 /* v_mode for branch. */
327
328 #define es_reg 100
329 #define cs_reg 101
330 #define ss_reg 102
331 #define ds_reg 103
332 #define fs_reg 104
333 #define gs_reg 105
334
335 #define eAX_reg 108
336 #define eCX_reg 109
337 #define eDX_reg 110
338 #define eBX_reg 111
339 #define eSP_reg 112
340 #define eBP_reg 113
341 #define eSI_reg 114
342 #define eDI_reg 115
343
344 #define al_reg 116
345 #define cl_reg 117
346 #define dl_reg 118
347 #define bl_reg 119
348 #define ah_reg 120
349 #define ch_reg 121
350 #define dh_reg 122
351 #define bh_reg 123
352
353 #define ax_reg 124
354 #define cx_reg 125
355 #define dx_reg 126
356 #define bx_reg 127
357 #define sp_reg 128
358 #define bp_reg 129
359 #define si_reg 130
360 #define di_reg 131
361
362 #define rAX_reg 132
363 #define rCX_reg 133
364 #define rDX_reg 134
365 #define rBX_reg 135
366 #define rSP_reg 136
367 #define rBP_reg 137
368 #define rSI_reg 138
369 #define rDI_reg 139
370
371 #define indir_dx_reg 150
372
373 #define FLOATCODE 1
374 #define USE_GROUPS 2
375 #define USE_PREFIX_USER_TABLE 3
376 #define X86_64_SPECIAL 4
377
378 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
379
380 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
381 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
382 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
383 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
384 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
385 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
386 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
387 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
388 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
389 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
390 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
391 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
392 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
393 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
394 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
395 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
396 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
397 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
398 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
399 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
400 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
401 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
402 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
403 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
404 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
405
406 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
407 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
408 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
409 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
410 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
411 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
412 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
413 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
414 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
415 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
416 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
417 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
418 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
419 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
420 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
421 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
422 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
423 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
424 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
425 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
426 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
427 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
428 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
429 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
430 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
431 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
432 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
433 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
434 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
435 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
436 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
437 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
438 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
439
440 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
441
442 typedef void (*op_rtn) (int bytemode, int sizeflag);
443
444 struct dis386 {
445 const char *name;
446 op_rtn op1;
447 int bytemode1;
448 op_rtn op2;
449 int bytemode2;
450 op_rtn op3;
451 int bytemode3;
452 };
453
454 /* Upper case letters in the instruction names here are macros.
455 'A' => print 'b' if no register operands or suffix_always is true
456 'B' => print 'b' if suffix_always is true
457 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
458 . size prefix
459 'E' => print 'e' if 32-bit form of jcxz
460 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
461 'H' => print ",pt" or ",pn" branch hint
462 'I' => honor following macro letter even in Intel mode (implemented only
463 . for some of the macro letters)
464 'J' => print 'l'
465 'L' => print 'l' if suffix_always is true
466 'N' => print 'n' if instruction has no wait "prefix"
467 'O' => print 'd', or 'o'
468 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
469 . or suffix_always is true. print 'q' if rex prefix is present.
470 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
471 . is true
472 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
473 'S' => print 'w', 'l' or 'q' if suffix_always is true
474 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
475 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
476 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
477 'X' => print 's', 'd' depending on data16 prefix (for XMM)
478 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
479
480 Many of the above letters print nothing in Intel mode. See "putop"
481 for the details.
482
483 Braces '{' and '}', and vertical bars '|', indicate alternative
484 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
485 modes. In cases where there are only two alternatives, the X86_64
486 instruction is reserved, and "(bad)" is printed.
487 */
488
489 static const struct dis386 dis386[] = {
490 /* 00 */
491 { "addB", Eb, Gb, XX },
492 { "addS", Ev, Gv, XX },
493 { "addB", Gb, Eb, XX },
494 { "addS", Gv, Ev, XX },
495 { "addB", AL, Ib, XX },
496 { "addS", eAX, Iv, XX },
497 { "push{T|}", es, XX, XX },
498 { "pop{T|}", es, XX, XX },
499 /* 08 */
500 { "orB", Eb, Gb, XX },
501 { "orS", Ev, Gv, XX },
502 { "orB", Gb, Eb, XX },
503 { "orS", Gv, Ev, XX },
504 { "orB", AL, Ib, XX },
505 { "orS", eAX, Iv, XX },
506 { "push{T|}", cs, XX, XX },
507 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
508 /* 10 */
509 { "adcB", Eb, Gb, XX },
510 { "adcS", Ev, Gv, XX },
511 { "adcB", Gb, Eb, XX },
512 { "adcS", Gv, Ev, XX },
513 { "adcB", AL, Ib, XX },
514 { "adcS", eAX, Iv, XX },
515 { "push{T|}", ss, XX, XX },
516 { "popT|}", ss, XX, XX },
517 /* 18 */
518 { "sbbB", Eb, Gb, XX },
519 { "sbbS", Ev, Gv, XX },
520 { "sbbB", Gb, Eb, XX },
521 { "sbbS", Gv, Ev, XX },
522 { "sbbB", AL, Ib, XX },
523 { "sbbS", eAX, Iv, XX },
524 { "push{T|}", ds, XX, XX },
525 { "pop{T|}", ds, XX, XX },
526 /* 20 */
527 { "andB", Eb, Gb, XX },
528 { "andS", Ev, Gv, XX },
529 { "andB", Gb, Eb, XX },
530 { "andS", Gv, Ev, XX },
531 { "andB", AL, Ib, XX },
532 { "andS", eAX, Iv, XX },
533 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
534 { "daa{|}", XX, XX, XX },
535 /* 28 */
536 { "subB", Eb, Gb, XX },
537 { "subS", Ev, Gv, XX },
538 { "subB", Gb, Eb, XX },
539 { "subS", Gv, Ev, XX },
540 { "subB", AL, Ib, XX },
541 { "subS", eAX, Iv, XX },
542 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
543 { "das{|}", XX, XX, XX },
544 /* 30 */
545 { "xorB", Eb, Gb, XX },
546 { "xorS", Ev, Gv, XX },
547 { "xorB", Gb, Eb, XX },
548 { "xorS", Gv, Ev, XX },
549 { "xorB", AL, Ib, XX },
550 { "xorS", eAX, Iv, XX },
551 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
552 { "aaa{|}", XX, XX, XX },
553 /* 38 */
554 { "cmpB", Eb, Gb, XX },
555 { "cmpS", Ev, Gv, XX },
556 { "cmpB", Gb, Eb, XX },
557 { "cmpS", Gv, Ev, XX },
558 { "cmpB", AL, Ib, XX },
559 { "cmpS", eAX, Iv, XX },
560 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
561 { "aas{|}", XX, XX, XX },
562 /* 40 */
563 { "inc{S|}", RMeAX, XX, XX },
564 { "inc{S|}", RMeCX, XX, XX },
565 { "inc{S|}", RMeDX, XX, XX },
566 { "inc{S|}", RMeBX, XX, XX },
567 { "inc{S|}", RMeSP, XX, XX },
568 { "inc{S|}", RMeBP, XX, XX },
569 { "inc{S|}", RMeSI, XX, XX },
570 { "inc{S|}", RMeDI, XX, XX },
571 /* 48 */
572 { "dec{S|}", RMeAX, XX, XX },
573 { "dec{S|}", RMeCX, XX, XX },
574 { "dec{S|}", RMeDX, XX, XX },
575 { "dec{S|}", RMeBX, XX, XX },
576 { "dec{S|}", RMeSP, XX, XX },
577 { "dec{S|}", RMeBP, XX, XX },
578 { "dec{S|}", RMeSI, XX, XX },
579 { "dec{S|}", RMeDI, XX, XX },
580 /* 50 */
581 { "pushS", RMrAX, XX, XX },
582 { "pushS", RMrCX, XX, XX },
583 { "pushS", RMrDX, XX, XX },
584 { "pushS", RMrBX, XX, XX },
585 { "pushS", RMrSP, XX, XX },
586 { "pushS", RMrBP, XX, XX },
587 { "pushS", RMrSI, XX, XX },
588 { "pushS", RMrDI, XX, XX },
589 /* 58 */
590 { "popS", RMrAX, XX, XX },
591 { "popS", RMrCX, XX, XX },
592 { "popS", RMrDX, XX, XX },
593 { "popS", RMrBX, XX, XX },
594 { "popS", RMrSP, XX, XX },
595 { "popS", RMrBP, XX, XX },
596 { "popS", RMrSI, XX, XX },
597 { "popS", RMrDI, XX, XX },
598 /* 60 */
599 { "pusha{P|}", XX, XX, XX },
600 { "popa{P|}", XX, XX, XX },
601 { "bound{S|}", Gv, Ma, XX },
602 { X86_64_0 },
603 { "(bad)", XX, XX, XX }, /* seg fs */
604 { "(bad)", XX, XX, XX }, /* seg gs */
605 { "(bad)", XX, XX, XX }, /* op size prefix */
606 { "(bad)", XX, XX, XX }, /* adr size prefix */
607 /* 68 */
608 { "pushT", Iq, XX, XX },
609 { "imulS", Gv, Ev, Iv },
610 { "pushT", sIb, XX, XX },
611 { "imulS", Gv, Ev, sIb },
612 { "ins{b||b|}", Yb, indirDX, XX },
613 { "ins{R||R|}", Yv, indirDX, XX },
614 { "outs{b||b|}", indirDX, Xb, XX },
615 { "outs{R||R|}", indirDX, Xv, XX },
616 /* 70 */
617 { "joH", Jb, XX, cond_jump_flag },
618 { "jnoH", Jb, XX, cond_jump_flag },
619 { "jbH", Jb, XX, cond_jump_flag },
620 { "jaeH", Jb, XX, cond_jump_flag },
621 { "jeH", Jb, XX, cond_jump_flag },
622 { "jneH", Jb, XX, cond_jump_flag },
623 { "jbeH", Jb, XX, cond_jump_flag },
624 { "jaH", Jb, XX, cond_jump_flag },
625 /* 78 */
626 { "jsH", Jb, XX, cond_jump_flag },
627 { "jnsH", Jb, XX, cond_jump_flag },
628 { "jpH", Jb, XX, cond_jump_flag },
629 { "jnpH", Jb, XX, cond_jump_flag },
630 { "jlH", Jb, XX, cond_jump_flag },
631 { "jgeH", Jb, XX, cond_jump_flag },
632 { "jleH", Jb, XX, cond_jump_flag },
633 { "jgH", Jb, XX, cond_jump_flag },
634 /* 80 */
635 { GRP1b },
636 { GRP1S },
637 { "(bad)", XX, XX, XX },
638 { GRP1Ss },
639 { "testB", Eb, Gb, XX },
640 { "testS", Ev, Gv, XX },
641 { "xchgB", Eb, Gb, XX },
642 { "xchgS", Ev, Gv, XX },
643 /* 88 */
644 { "movB", Eb, Gb, XX },
645 { "movS", Ev, Gv, XX },
646 { "movB", Gb, Eb, XX },
647 { "movS", Gv, Ev, XX },
648 { "movQ", Sv, Sw, XX },
649 { "leaS", Gv, M, XX },
650 { "movQ", Sw, Sv, XX },
651 { "popU", Ev, XX, XX },
652 /* 90 */
653 { "nop", NOP_Fixup, 0, XX, XX },
654 { "xchgS", RMeCX, eAX, XX },
655 { "xchgS", RMeDX, eAX, XX },
656 { "xchgS", RMeBX, eAX, XX },
657 { "xchgS", RMeSP, eAX, XX },
658 { "xchgS", RMeBP, eAX, XX },
659 { "xchgS", RMeSI, eAX, XX },
660 { "xchgS", RMeDI, eAX, XX },
661 /* 98 */
662 { "cW{tR||tR|}", XX, XX, XX },
663 { "cR{tO||tO|}", XX, XX, XX },
664 { "Jcall{T|}", Ap, XX, XX },
665 { "(bad)", XX, XX, XX }, /* fwait */
666 { "pushfT", XX, XX, XX },
667 { "popfT", XX, XX, XX },
668 { "sahf{|}", XX, XX, XX },
669 { "lahf{|}", XX, XX, XX },
670 /* a0 */
671 { "movB", AL, Ob64, XX },
672 { "movS", eAX, Ov64, XX },
673 { "movB", Ob64, AL, XX },
674 { "movS", Ov64, eAX, XX },
675 { "movs{b||b|}", Yb, Xb, XX },
676 { "movs{R||R|}", Yv, Xv, XX },
677 { "cmps{b||b|}", Xb, Yb, XX },
678 { "cmps{R||R|}", Xv, Yv, XX },
679 /* a8 */
680 { "testB", AL, Ib, XX },
681 { "testS", eAX, Iv, XX },
682 { "stosB", Yb, AL, XX },
683 { "stosS", Yv, eAX, XX },
684 { "lodsB", AL, Xb, XX },
685 { "lodsS", eAX, Xv, XX },
686 { "scasB", AL, Yb, XX },
687 { "scasS", eAX, Yv, XX },
688 /* b0 */
689 { "movB", RMAL, Ib, XX },
690 { "movB", RMCL, Ib, XX },
691 { "movB", RMDL, Ib, XX },
692 { "movB", RMBL, Ib, XX },
693 { "movB", RMAH, Ib, XX },
694 { "movB", RMCH, Ib, XX },
695 { "movB", RMDH, Ib, XX },
696 { "movB", RMBH, Ib, XX },
697 /* b8 */
698 { "movS", RMeAX, Iv64, XX },
699 { "movS", RMeCX, Iv64, XX },
700 { "movS", RMeDX, Iv64, XX },
701 { "movS", RMeBX, Iv64, XX },
702 { "movS", RMeSP, Iv64, XX },
703 { "movS", RMeBP, Iv64, XX },
704 { "movS", RMeSI, Iv64, XX },
705 { "movS", RMeDI, Iv64, XX },
706 /* c0 */
707 { GRP2b },
708 { GRP2S },
709 { "retT", Iw, XX, XX },
710 { "retT", XX, XX, XX },
711 { "les{S|}", Gv, Mp, XX },
712 { "ldsS", Gv, Mp, XX },
713 { "movA", Eb, Ib, XX },
714 { "movQ", Ev, Iv, XX },
715 /* c8 */
716 { "enterT", Iw, Ib, XX },
717 { "leaveT", XX, XX, XX },
718 { "lretP", Iw, XX, XX },
719 { "lretP", XX, XX, XX },
720 { "int3", XX, XX, XX },
721 { "int", Ib, XX, XX },
722 { "into{|}", XX, XX, XX },
723 { "iretP", XX, XX, XX },
724 /* d0 */
725 { GRP2b_one },
726 { GRP2S_one },
727 { GRP2b_cl },
728 { GRP2S_cl },
729 { "aam{|}", sIb, XX, XX },
730 { "aad{|}", sIb, XX, XX },
731 { "(bad)", XX, XX, XX },
732 { "xlat", DSBX, XX, XX },
733 /* d8 */
734 { FLOAT },
735 { FLOAT },
736 { FLOAT },
737 { FLOAT },
738 { FLOAT },
739 { FLOAT },
740 { FLOAT },
741 { FLOAT },
742 /* e0 */
743 { "loopneFH", Jb, XX, loop_jcxz_flag },
744 { "loopeFH", Jb, XX, loop_jcxz_flag },
745 { "loopFH", Jb, XX, loop_jcxz_flag },
746 { "jEcxzH", Jb, XX, loop_jcxz_flag },
747 { "inB", AL, Ib, XX },
748 { "inS", eAX, Ib, XX },
749 { "outB", Ib, AL, XX },
750 { "outS", Ib, eAX, XX },
751 /* e8 */
752 { "callT", Jv, XX, XX },
753 { "jmpT", Jv, XX, XX },
754 { "Jjmp{T|}", Ap, XX, XX },
755 { "jmp", Jb, XX, XX },
756 { "inB", AL, indirDX, XX },
757 { "inS", eAX, indirDX, XX },
758 { "outB", indirDX, AL, XX },
759 { "outS", indirDX, eAX, XX },
760 /* f0 */
761 { "(bad)", XX, XX, XX }, /* lock prefix */
762 { "icebp", XX, XX, XX },
763 { "(bad)", XX, XX, XX }, /* repne */
764 { "(bad)", XX, XX, XX }, /* repz */
765 { "hlt", XX, XX, XX },
766 { "cmc", XX, XX, XX },
767 { GRP3b },
768 { GRP3S },
769 /* f8 */
770 { "clc", XX, XX, XX },
771 { "stc", XX, XX, XX },
772 { "cli", XX, XX, XX },
773 { "sti", XX, XX, XX },
774 { "cld", XX, XX, XX },
775 { "std", XX, XX, XX },
776 { GRP4 },
777 { GRP5 },
778 };
779
780 static const struct dis386 dis386_twobyte[] = {
781 /* 00 */
782 { GRP6 },
783 { GRP7 },
784 { "larS", Gv, Ew, XX },
785 { "lslS", Gv, Ew, XX },
786 { "(bad)", XX, XX, XX },
787 { "syscall", XX, XX, XX },
788 { "clts", XX, XX, XX },
789 { "sysretP", XX, XX, XX },
790 /* 08 */
791 { "invd", XX, XX, XX },
792 { "wbinvd", XX, XX, XX },
793 { "(bad)", XX, XX, XX },
794 { "ud2a", XX, XX, XX },
795 { "(bad)", XX, XX, XX },
796 { GRPAMD },
797 { "femms", XX, XX, XX },
798 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
799 /* 10 */
800 { PREGRP8 },
801 { PREGRP9 },
802 { PREGRP30 },
803 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
804 { "unpcklpX", XM, EX, XX },
805 { "unpckhpX", XM, EX, XX },
806 { PREGRP31 },
807 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
808 /* 18 */
809 { GRP14 },
810 { "(bad)", XX, XX, XX },
811 { "(bad)", XX, XX, XX },
812 { "(bad)", XX, XX, XX },
813 { "(bad)", XX, XX, XX },
814 { "(bad)", XX, XX, XX },
815 { "(bad)", XX, XX, XX },
816 { "(bad)", XX, XX, XX },
817 /* 20 */
818 { "movL", Rm, Cm, XX },
819 { "movL", Rm, Dm, XX },
820 { "movL", Cm, Rm, XX },
821 { "movL", Dm, Rm, XX },
822 { "movL", Rd, Td, XX },
823 { "(bad)", XX, XX, XX },
824 { "movL", Td, Rd, XX },
825 { "(bad)", XX, XX, XX },
826 /* 28 */
827 { "movapX", XM, EX, XX },
828 { "movapX", EX, XM, XX },
829 { PREGRP2 },
830 { "movntpX", Ev, XM, XX },
831 { PREGRP4 },
832 { PREGRP3 },
833 { "ucomisX", XM,EX, XX },
834 { "comisX", XM,EX, XX },
835 /* 30 */
836 { "wrmsr", XX, XX, XX },
837 { "rdtsc", XX, XX, XX },
838 { "rdmsr", XX, XX, XX },
839 { "rdpmc", XX, XX, XX },
840 { "sysenter", XX, XX, XX },
841 { "sysexit", XX, XX, XX },
842 { "(bad)", XX, XX, XX },
843 { "(bad)", XX, XX, XX },
844 /* 38 */
845 { "(bad)", XX, XX, XX },
846 { "(bad)", XX, XX, XX },
847 { "(bad)", XX, XX, XX },
848 { "(bad)", XX, XX, XX },
849 { "(bad)", XX, XX, XX },
850 { "(bad)", XX, XX, XX },
851 { "(bad)", XX, XX, XX },
852 { "(bad)", XX, XX, XX },
853 /* 40 */
854 { "cmovo", Gv, Ev, XX },
855 { "cmovno", Gv, Ev, XX },
856 { "cmovb", Gv, Ev, XX },
857 { "cmovae", Gv, Ev, XX },
858 { "cmove", Gv, Ev, XX },
859 { "cmovne", Gv, Ev, XX },
860 { "cmovbe", Gv, Ev, XX },
861 { "cmova", Gv, Ev, XX },
862 /* 48 */
863 { "cmovs", Gv, Ev, XX },
864 { "cmovns", Gv, Ev, XX },
865 { "cmovp", Gv, Ev, XX },
866 { "cmovnp", Gv, Ev, XX },
867 { "cmovl", Gv, Ev, XX },
868 { "cmovge", Gv, Ev, XX },
869 { "cmovle", Gv, Ev, XX },
870 { "cmovg", Gv, Ev, XX },
871 /* 50 */
872 { "movmskpX", Gdq, XS, XX },
873 { PREGRP13 },
874 { PREGRP12 },
875 { PREGRP11 },
876 { "andpX", XM, EX, XX },
877 { "andnpX", XM, EX, XX },
878 { "orpX", XM, EX, XX },
879 { "xorpX", XM, EX, XX },
880 /* 58 */
881 { PREGRP0 },
882 { PREGRP10 },
883 { PREGRP17 },
884 { PREGRP16 },
885 { PREGRP14 },
886 { PREGRP7 },
887 { PREGRP5 },
888 { PREGRP6 },
889 /* 60 */
890 { "punpcklbw", MX, EM, XX },
891 { "punpcklwd", MX, EM, XX },
892 { "punpckldq", MX, EM, XX },
893 { "packsswb", MX, EM, XX },
894 { "pcmpgtb", MX, EM, XX },
895 { "pcmpgtw", MX, EM, XX },
896 { "pcmpgtd", MX, EM, XX },
897 { "packuswb", MX, EM, XX },
898 /* 68 */
899 { "punpckhbw", MX, EM, XX },
900 { "punpckhwd", MX, EM, XX },
901 { "punpckhdq", MX, EM, XX },
902 { "packssdw", MX, EM, XX },
903 { PREGRP26 },
904 { PREGRP24 },
905 { "movd", MX, Edq, XX },
906 { PREGRP19 },
907 /* 70 */
908 { PREGRP22 },
909 { GRP10 },
910 { GRP11 },
911 { GRP12 },
912 { "pcmpeqb", MX, EM, XX },
913 { "pcmpeqw", MX, EM, XX },
914 { "pcmpeqd", MX, EM, XX },
915 { "emms", XX, XX, XX },
916 /* 78 */
917 { "(bad)", XX, XX, XX },
918 { "(bad)", XX, XX, XX },
919 { "(bad)", XX, XX, XX },
920 { "(bad)", XX, XX, XX },
921 { PREGRP28 },
922 { PREGRP29 },
923 { PREGRP23 },
924 { PREGRP20 },
925 /* 80 */
926 { "joH", Jv, XX, cond_jump_flag },
927 { "jnoH", Jv, XX, cond_jump_flag },
928 { "jbH", Jv, XX, cond_jump_flag },
929 { "jaeH", Jv, XX, cond_jump_flag },
930 { "jeH", Jv, XX, cond_jump_flag },
931 { "jneH", Jv, XX, cond_jump_flag },
932 { "jbeH", Jv, XX, cond_jump_flag },
933 { "jaH", Jv, XX, cond_jump_flag },
934 /* 88 */
935 { "jsH", Jv, XX, cond_jump_flag },
936 { "jnsH", Jv, XX, cond_jump_flag },
937 { "jpH", Jv, XX, cond_jump_flag },
938 { "jnpH", Jv, XX, cond_jump_flag },
939 { "jlH", Jv, XX, cond_jump_flag },
940 { "jgeH", Jv, XX, cond_jump_flag },
941 { "jleH", Jv, XX, cond_jump_flag },
942 { "jgH", Jv, XX, cond_jump_flag },
943 /* 90 */
944 { "seto", Eb, XX, XX },
945 { "setno", Eb, XX, XX },
946 { "setb", Eb, XX, XX },
947 { "setae", Eb, XX, XX },
948 { "sete", Eb, XX, XX },
949 { "setne", Eb, XX, XX },
950 { "setbe", Eb, XX, XX },
951 { "seta", Eb, XX, XX },
952 /* 98 */
953 { "sets", Eb, XX, XX },
954 { "setns", Eb, XX, XX },
955 { "setp", Eb, XX, XX },
956 { "setnp", Eb, XX, XX },
957 { "setl", Eb, XX, XX },
958 { "setge", Eb, XX, XX },
959 { "setle", Eb, XX, XX },
960 { "setg", Eb, XX, XX },
961 /* a0 */
962 { "pushT", fs, XX, XX },
963 { "popT", fs, XX, XX },
964 { "cpuid", XX, XX, XX },
965 { "btS", Ev, Gv, XX },
966 { "shldS", Ev, Gv, Ib },
967 { "shldS", Ev, Gv, CL },
968 { GRPPADLCK2 },
969 { GRPPADLCK1 },
970 /* a8 */
971 { "pushT", gs, XX, XX },
972 { "popT", gs, XX, XX },
973 { "rsm", XX, XX, XX },
974 { "btsS", Ev, Gv, XX },
975 { "shrdS", Ev, Gv, Ib },
976 { "shrdS", Ev, Gv, CL },
977 { GRP13 },
978 { "imulS", Gv, Ev, XX },
979 /* b0 */
980 { "cmpxchgB", Eb, Gb, XX },
981 { "cmpxchgS", Ev, Gv, XX },
982 { "lssS", Gv, Mp, XX },
983 { "btrS", Ev, Gv, XX },
984 { "lfsS", Gv, Mp, XX },
985 { "lgsS", Gv, Mp, XX },
986 { "movz{bR|x|bR|x}", Gv, Eb, XX },
987 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
988 /* b8 */
989 { "(bad)", XX, XX, XX },
990 { "ud2b", XX, XX, XX },
991 { GRP8 },
992 { "btcS", Ev, Gv, XX },
993 { "bsfS", Gv, Ev, XX },
994 { "bsrS", Gv, Ev, XX },
995 { "movs{bR|x|bR|x}", Gv, Eb, XX },
996 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
997 /* c0 */
998 { "xaddB", Eb, Gb, XX },
999 { "xaddS", Ev, Gv, XX },
1000 { PREGRP1 },
1001 { "movntiS", Ev, Gv, XX },
1002 { "pinsrw", MX, Edqw, Ib },
1003 { "pextrw", Gdq, MS, Ib },
1004 { "shufpX", XM, EX, Ib },
1005 { GRP9 },
1006 /* c8 */
1007 { "bswap", RMeAX, XX, XX },
1008 { "bswap", RMeCX, XX, XX },
1009 { "bswap", RMeDX, XX, XX },
1010 { "bswap", RMeBX, XX, XX },
1011 { "bswap", RMeSP, XX, XX },
1012 { "bswap", RMeBP, XX, XX },
1013 { "bswap", RMeSI, XX, XX },
1014 { "bswap", RMeDI, XX, XX },
1015 /* d0 */
1016 { PREGRP27 },
1017 { "psrlw", MX, EM, XX },
1018 { "psrld", MX, EM, XX },
1019 { "psrlq", MX, EM, XX },
1020 { "paddq", MX, EM, XX },
1021 { "pmullw", MX, EM, XX },
1022 { PREGRP21 },
1023 { "pmovmskb", Gdq, MS, XX },
1024 /* d8 */
1025 { "psubusb", MX, EM, XX },
1026 { "psubusw", MX, EM, XX },
1027 { "pminub", MX, EM, XX },
1028 { "pand", MX, EM, XX },
1029 { "paddusb", MX, EM, XX },
1030 { "paddusw", MX, EM, XX },
1031 { "pmaxub", MX, EM, XX },
1032 { "pandn", MX, EM, XX },
1033 /* e0 */
1034 { "pavgb", MX, EM, XX },
1035 { "psraw", MX, EM, XX },
1036 { "psrad", MX, EM, XX },
1037 { "pavgw", MX, EM, XX },
1038 { "pmulhuw", MX, EM, XX },
1039 { "pmulhw", MX, EM, XX },
1040 { PREGRP15 },
1041 { PREGRP25 },
1042 /* e8 */
1043 { "psubsb", MX, EM, XX },
1044 { "psubsw", MX, EM, XX },
1045 { "pminsw", MX, EM, XX },
1046 { "por", MX, EM, XX },
1047 { "paddsb", MX, EM, XX },
1048 { "paddsw", MX, EM, XX },
1049 { "pmaxsw", MX, EM, XX },
1050 { "pxor", MX, EM, XX },
1051 /* f0 */
1052 { PREGRP32 },
1053 { "psllw", MX, EM, XX },
1054 { "pslld", MX, EM, XX },
1055 { "psllq", MX, EM, XX },
1056 { "pmuludq", MX, EM, XX },
1057 { "pmaddwd", MX, EM, XX },
1058 { "psadbw", MX, EM, XX },
1059 { PREGRP18 },
1060 /* f8 */
1061 { "psubb", MX, EM, XX },
1062 { "psubw", MX, EM, XX },
1063 { "psubd", MX, EM, XX },
1064 { "psubq", MX, EM, XX },
1065 { "paddb", MX, EM, XX },
1066 { "paddw", MX, EM, XX },
1067 { "paddd", MX, EM, XX },
1068 { "(bad)", XX, XX, XX }
1069 };
1070
1071 static const unsigned char onebyte_has_modrm[256] = {
1072 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1073 /* ------------------------------- */
1074 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1075 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1076 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1077 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1078 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1079 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1080 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1081 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1082 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1083 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1084 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1085 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1086 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1087 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1088 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1089 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1090 /* ------------------------------- */
1091 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1092 };
1093
1094 static const unsigned char twobyte_has_modrm[256] = {
1095 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1096 /* ------------------------------- */
1097 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1098 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1099 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1100 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1101 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1102 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1103 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1104 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */
1105 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1106 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1107 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1108 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1109 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1110 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1111 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1112 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1113 /* ------------------------------- */
1114 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1115 };
1116
1117 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1118 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1119 /* ------------------------------- */
1120 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1121 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1122 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1123 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1124 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1125 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1126 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1127 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1128 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1129 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1130 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1131 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1132 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1133 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1134 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1135 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1136 /* ------------------------------- */
1137 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1138 };
1139
1140 static char obuf[100];
1141 static char *obufp;
1142 static char scratchbuf[100];
1143 static unsigned char *start_codep;
1144 static unsigned char *insn_codep;
1145 static unsigned char *codep;
1146 static disassemble_info *the_info;
1147 static int mod;
1148 static int rm;
1149 static int reg;
1150 static unsigned char need_modrm;
1151
1152 /* If we are accessing mod/rm/reg without need_modrm set, then the
1153 values are stale. Hitting this abort likely indicates that you
1154 need to update onebyte_has_modrm or twobyte_has_modrm. */
1155 #define MODRM_CHECK if (!need_modrm) abort ()
1156
1157 static const char **names64;
1158 static const char **names32;
1159 static const char **names16;
1160 static const char **names8;
1161 static const char **names8rex;
1162 static const char **names_seg;
1163 static const char **index16;
1164
1165 static const char *intel_names64[] = {
1166 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1167 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1168 };
1169 static const char *intel_names32[] = {
1170 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1171 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1172 };
1173 static const char *intel_names16[] = {
1174 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1175 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1176 };
1177 static const char *intel_names8[] = {
1178 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1179 };
1180 static const char *intel_names8rex[] = {
1181 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1182 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1183 };
1184 static const char *intel_names_seg[] = {
1185 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1186 };
1187 static const char *intel_index16[] = {
1188 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1189 };
1190
1191 static const char *att_names64[] = {
1192 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1193 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1194 };
1195 static const char *att_names32[] = {
1196 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1197 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1198 };
1199 static const char *att_names16[] = {
1200 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1201 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1202 };
1203 static const char *att_names8[] = {
1204 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1205 };
1206 static const char *att_names8rex[] = {
1207 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1208 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1209 };
1210 static const char *att_names_seg[] = {
1211 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1212 };
1213 static const char *att_index16[] = {
1214 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1215 };
1216
1217 static const struct dis386 grps[][8] = {
1218 /* GRP1b */
1219 {
1220 { "addA", Eb, Ib, XX },
1221 { "orA", Eb, Ib, XX },
1222 { "adcA", Eb, Ib, XX },
1223 { "sbbA", Eb, Ib, XX },
1224 { "andA", Eb, Ib, XX },
1225 { "subA", Eb, Ib, XX },
1226 { "xorA", Eb, Ib, XX },
1227 { "cmpA", Eb, Ib, XX }
1228 },
1229 /* GRP1S */
1230 {
1231 { "addQ", Ev, Iv, XX },
1232 { "orQ", Ev, Iv, XX },
1233 { "adcQ", Ev, Iv, XX },
1234 { "sbbQ", Ev, Iv, XX },
1235 { "andQ", Ev, Iv, XX },
1236 { "subQ", Ev, Iv, XX },
1237 { "xorQ", Ev, Iv, XX },
1238 { "cmpQ", Ev, Iv, XX }
1239 },
1240 /* GRP1Ss */
1241 {
1242 { "addQ", Ev, sIb, XX },
1243 { "orQ", Ev, sIb, XX },
1244 { "adcQ", Ev, sIb, XX },
1245 { "sbbQ", Ev, sIb, XX },
1246 { "andQ", Ev, sIb, XX },
1247 { "subQ", Ev, sIb, XX },
1248 { "xorQ", Ev, sIb, XX },
1249 { "cmpQ", Ev, sIb, XX }
1250 },
1251 /* GRP2b */
1252 {
1253 { "rolA", Eb, Ib, XX },
1254 { "rorA", Eb, Ib, XX },
1255 { "rclA", Eb, Ib, XX },
1256 { "rcrA", Eb, Ib, XX },
1257 { "shlA", Eb, Ib, XX },
1258 { "shrA", Eb, Ib, XX },
1259 { "(bad)", XX, XX, XX },
1260 { "sarA", Eb, Ib, XX },
1261 },
1262 /* GRP2S */
1263 {
1264 { "rolQ", Ev, Ib, XX },
1265 { "rorQ", Ev, Ib, XX },
1266 { "rclQ", Ev, Ib, XX },
1267 { "rcrQ", Ev, Ib, XX },
1268 { "shlQ", Ev, Ib, XX },
1269 { "shrQ", Ev, Ib, XX },
1270 { "(bad)", XX, XX, XX },
1271 { "sarQ", Ev, Ib, XX },
1272 },
1273 /* GRP2b_one */
1274 {
1275 { "rolA", Eb, I1, XX },
1276 { "rorA", Eb, I1, XX },
1277 { "rclA", Eb, I1, XX },
1278 { "rcrA", Eb, I1, XX },
1279 { "shlA", Eb, I1, XX },
1280 { "shrA", Eb, I1, XX },
1281 { "(bad)", XX, XX, XX },
1282 { "sarA", Eb, I1, XX },
1283 },
1284 /* GRP2S_one */
1285 {
1286 { "rolQ", Ev, I1, XX },
1287 { "rorQ", Ev, I1, XX },
1288 { "rclQ", Ev, I1, XX },
1289 { "rcrQ", Ev, I1, XX },
1290 { "shlQ", Ev, I1, XX },
1291 { "shrQ", Ev, I1, XX },
1292 { "(bad)", XX, XX, XX},
1293 { "sarQ", Ev, I1, XX },
1294 },
1295 /* GRP2b_cl */
1296 {
1297 { "rolA", Eb, CL, XX },
1298 { "rorA", Eb, CL, XX },
1299 { "rclA", Eb, CL, XX },
1300 { "rcrA", Eb, CL, XX },
1301 { "shlA", Eb, CL, XX },
1302 { "shrA", Eb, CL, XX },
1303 { "(bad)", XX, XX, XX },
1304 { "sarA", Eb, CL, XX },
1305 },
1306 /* GRP2S_cl */
1307 {
1308 { "rolQ", Ev, CL, XX },
1309 { "rorQ", Ev, CL, XX },
1310 { "rclQ", Ev, CL, XX },
1311 { "rcrQ", Ev, CL, XX },
1312 { "shlQ", Ev, CL, XX },
1313 { "shrQ", Ev, CL, XX },
1314 { "(bad)", XX, XX, XX },
1315 { "sarQ", Ev, CL, XX }
1316 },
1317 /* GRP3b */
1318 {
1319 { "testA", Eb, Ib, XX },
1320 { "(bad)", Eb, XX, XX },
1321 { "notA", Eb, XX, XX },
1322 { "negA", Eb, XX, XX },
1323 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1324 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1325 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1326 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1327 },
1328 /* GRP3S */
1329 {
1330 { "testQ", Ev, Iv, XX },
1331 { "(bad)", XX, XX, XX },
1332 { "notQ", Ev, XX, XX },
1333 { "negQ", Ev, XX, XX },
1334 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1335 { "imulQ", Ev, XX, XX },
1336 { "divQ", Ev, XX, XX },
1337 { "idivQ", Ev, XX, XX },
1338 },
1339 /* GRP4 */
1340 {
1341 { "incA", Eb, XX, XX },
1342 { "decA", Eb, XX, XX },
1343 { "(bad)", XX, XX, XX },
1344 { "(bad)", XX, XX, XX },
1345 { "(bad)", XX, XX, XX },
1346 { "(bad)", XX, XX, XX },
1347 { "(bad)", XX, XX, XX },
1348 { "(bad)", XX, XX, XX },
1349 },
1350 /* GRP5 */
1351 {
1352 { "incQ", Ev, XX, XX },
1353 { "decQ", Ev, XX, XX },
1354 { "callT", indirEv, XX, XX },
1355 { "JcallT", indirEp, XX, XX },
1356 { "jmpT", indirEv, XX, XX },
1357 { "JjmpT", indirEp, XX, XX },
1358 { "pushU", Ev, XX, XX },
1359 { "(bad)", XX, XX, XX },
1360 },
1361 /* GRP6 */
1362 {
1363 { "sldtQ", Ev, XX, XX },
1364 { "strQ", Ev, XX, XX },
1365 { "lldt", Ew, XX, XX },
1366 { "ltr", Ew, XX, XX },
1367 { "verr", Ew, XX, XX },
1368 { "verw", Ew, XX, XX },
1369 { "(bad)", XX, XX, XX },
1370 { "(bad)", XX, XX, XX }
1371 },
1372 /* GRP7 */
1373 {
1374 { "sgdtIQ", M, XX, XX },
1375 { "sidtIQ", PNI_Fixup, 0, XX, XX },
1376 { "lgdt{Q|Q||}", M, XX, XX },
1377 { "lidt{Q|Q||}", M, XX, XX },
1378 { "smswQ", Ev, XX, XX },
1379 { "(bad)", XX, XX, XX },
1380 { "lmsw", Ew, XX, XX },
1381 { "invlpg", INVLPG_Fixup, w_mode, XX, XX },
1382 },
1383 /* GRP8 */
1384 {
1385 { "(bad)", XX, XX, XX },
1386 { "(bad)", XX, XX, XX },
1387 { "(bad)", XX, XX, XX },
1388 { "(bad)", XX, XX, XX },
1389 { "btQ", Ev, Ib, XX },
1390 { "btsQ", Ev, Ib, XX },
1391 { "btrQ", Ev, Ib, XX },
1392 { "btcQ", Ev, Ib, XX },
1393 },
1394 /* GRP9 */
1395 {
1396 { "(bad)", XX, XX, XX },
1397 { "cmpxchg8b", Eq, XX, XX },
1398 { "(bad)", XX, XX, XX },
1399 { "(bad)", XX, XX, XX },
1400 { "(bad)", XX, XX, XX },
1401 { "(bad)", XX, XX, XX },
1402 { "(bad)", XX, XX, XX },
1403 { "(bad)", XX, XX, XX },
1404 },
1405 /* GRP10 */
1406 {
1407 { "(bad)", XX, XX, XX },
1408 { "(bad)", XX, XX, XX },
1409 { "psrlw", MS, Ib, XX },
1410 { "(bad)", XX, XX, XX },
1411 { "psraw", MS, Ib, XX },
1412 { "(bad)", XX, XX, XX },
1413 { "psllw", MS, Ib, XX },
1414 { "(bad)", XX, XX, XX },
1415 },
1416 /* GRP11 */
1417 {
1418 { "(bad)", XX, XX, XX },
1419 { "(bad)", XX, XX, XX },
1420 { "psrld", MS, Ib, XX },
1421 { "(bad)", XX, XX, XX },
1422 { "psrad", MS, Ib, XX },
1423 { "(bad)", XX, XX, XX },
1424 { "pslld", MS, Ib, XX },
1425 { "(bad)", XX, XX, XX },
1426 },
1427 /* GRP12 */
1428 {
1429 { "(bad)", XX, XX, XX },
1430 { "(bad)", XX, XX, XX },
1431 { "psrlq", MS, Ib, XX },
1432 { "psrldq", MS, Ib, XX },
1433 { "(bad)", XX, XX, XX },
1434 { "(bad)", XX, XX, XX },
1435 { "psllq", MS, Ib, XX },
1436 { "pslldq", MS, Ib, XX },
1437 },
1438 /* GRP13 */
1439 {
1440 { "fxsave", Ev, XX, XX },
1441 { "fxrstor", Ev, XX, XX },
1442 { "ldmxcsr", Ev, XX, XX },
1443 { "stmxcsr", Ev, XX, XX },
1444 { "(bad)", XX, XX, XX },
1445 { "lfence", OP_0fae, 0, XX, XX },
1446 { "mfence", OP_0fae, 0, XX, XX },
1447 { "clflush", OP_0fae, 0, XX, XX },
1448 },
1449 /* GRP14 */
1450 {
1451 { "prefetchnta", Ev, XX, XX },
1452 { "prefetcht0", Ev, XX, XX },
1453 { "prefetcht1", Ev, XX, XX },
1454 { "prefetcht2", Ev, XX, XX },
1455 { "(bad)", XX, XX, XX },
1456 { "(bad)", XX, XX, XX },
1457 { "(bad)", XX, XX, XX },
1458 { "(bad)", XX, XX, XX },
1459 },
1460 /* GRPAMD */
1461 {
1462 { "prefetch", Eb, XX, XX },
1463 { "prefetchw", Eb, XX, XX },
1464 { "(bad)", XX, XX, XX },
1465 { "(bad)", XX, XX, XX },
1466 { "(bad)", XX, XX, XX },
1467 { "(bad)", XX, XX, XX },
1468 { "(bad)", XX, XX, XX },
1469 { "(bad)", XX, XX, XX },
1470 },
1471 /* GRPPADLCK1 */
1472 {
1473 { "xstore-rng", OP_0f07, 0, XX, XX },
1474 { "xcrypt-ecb", OP_0f07, 0, XX, XX },
1475 { "xcrypt-cbc", OP_0f07, 0, XX, XX },
1476 { "xcrypt-ctr", OP_0f07, 0, XX, XX },
1477 { "xcrypt-cfb", OP_0f07, 0, XX, XX },
1478 { "xcrypt-ofb", OP_0f07, 0, XX, XX },
1479 { "(bad)", OP_0f07, 0, XX, XX },
1480 { "(bad)", OP_0f07, 0, XX, XX },
1481 },
1482 /* GRPPADLCK2 */
1483 {
1484 { "montmul", OP_0f07, 0, XX, XX },
1485 { "xsha1", OP_0f07, 0, XX, XX },
1486 { "xsha256", OP_0f07, 0, XX, XX },
1487 { "(bad)", OP_0f07, 0, XX, XX },
1488 { "(bad)", OP_0f07, 0, XX, XX },
1489 { "(bad)", OP_0f07, 0, XX, XX },
1490 { "(bad)", OP_0f07, 0, XX, XX },
1491 { "(bad)", OP_0f07, 0, XX, XX },
1492 }
1493 };
1494
1495 static const struct dis386 prefix_user_table[][4] = {
1496 /* PREGRP0 */
1497 {
1498 { "addps", XM, EX, XX },
1499 { "addss", XM, EX, XX },
1500 { "addpd", XM, EX, XX },
1501 { "addsd", XM, EX, XX },
1502 },
1503 /* PREGRP1 */
1504 {
1505 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1506 { "", XM, EX, OPSIMD },
1507 { "", XM, EX, OPSIMD },
1508 { "", XM, EX, OPSIMD },
1509 },
1510 /* PREGRP2 */
1511 {
1512 { "cvtpi2ps", XM, EM, XX },
1513 { "cvtsi2ssY", XM, Ev, XX },
1514 { "cvtpi2pd", XM, EM, XX },
1515 { "cvtsi2sdY", XM, Ev, XX },
1516 },
1517 /* PREGRP3 */
1518 {
1519 { "cvtps2pi", MX, EX, XX },
1520 { "cvtss2siY", Gv, EX, XX },
1521 { "cvtpd2pi", MX, EX, XX },
1522 { "cvtsd2siY", Gv, EX, XX },
1523 },
1524 /* PREGRP4 */
1525 {
1526 { "cvttps2pi", MX, EX, XX },
1527 { "cvttss2siY", Gv, EX, XX },
1528 { "cvttpd2pi", MX, EX, XX },
1529 { "cvttsd2siY", Gv, EX, XX },
1530 },
1531 /* PREGRP5 */
1532 {
1533 { "divps", XM, EX, XX },
1534 { "divss", XM, EX, XX },
1535 { "divpd", XM, EX, XX },
1536 { "divsd", XM, EX, XX },
1537 },
1538 /* PREGRP6 */
1539 {
1540 { "maxps", XM, EX, XX },
1541 { "maxss", XM, EX, XX },
1542 { "maxpd", XM, EX, XX },
1543 { "maxsd", XM, EX, XX },
1544 },
1545 /* PREGRP7 */
1546 {
1547 { "minps", XM, EX, XX },
1548 { "minss", XM, EX, XX },
1549 { "minpd", XM, EX, XX },
1550 { "minsd", XM, EX, XX },
1551 },
1552 /* PREGRP8 */
1553 {
1554 { "movups", XM, EX, XX },
1555 { "movss", XM, EX, XX },
1556 { "movupd", XM, EX, XX },
1557 { "movsd", XM, EX, XX },
1558 },
1559 /* PREGRP9 */
1560 {
1561 { "movups", EX, XM, XX },
1562 { "movss", EX, XM, XX },
1563 { "movupd", EX, XM, XX },
1564 { "movsd", EX, XM, XX },
1565 },
1566 /* PREGRP10 */
1567 {
1568 { "mulps", XM, EX, XX },
1569 { "mulss", XM, EX, XX },
1570 { "mulpd", XM, EX, XX },
1571 { "mulsd", XM, EX, XX },
1572 },
1573 /* PREGRP11 */
1574 {
1575 { "rcpps", XM, EX, XX },
1576 { "rcpss", XM, EX, XX },
1577 { "(bad)", XM, EX, XX },
1578 { "(bad)", XM, EX, XX },
1579 },
1580 /* PREGRP12 */
1581 {
1582 { "rsqrtps", XM, EX, XX },
1583 { "rsqrtss", XM, EX, XX },
1584 { "(bad)", XM, EX, XX },
1585 { "(bad)", XM, EX, XX },
1586 },
1587 /* PREGRP13 */
1588 {
1589 { "sqrtps", XM, EX, XX },
1590 { "sqrtss", XM, EX, XX },
1591 { "sqrtpd", XM, EX, XX },
1592 { "sqrtsd", XM, EX, XX },
1593 },
1594 /* PREGRP14 */
1595 {
1596 { "subps", XM, EX, XX },
1597 { "subss", XM, EX, XX },
1598 { "subpd", XM, EX, XX },
1599 { "subsd", XM, EX, XX },
1600 },
1601 /* PREGRP15 */
1602 {
1603 { "(bad)", XM, EX, XX },
1604 { "cvtdq2pd", XM, EX, XX },
1605 { "cvttpd2dq", XM, EX, XX },
1606 { "cvtpd2dq", XM, EX, XX },
1607 },
1608 /* PREGRP16 */
1609 {
1610 { "cvtdq2ps", XM, EX, XX },
1611 { "cvttps2dq",XM, EX, XX },
1612 { "cvtps2dq",XM, EX, XX },
1613 { "(bad)", XM, EX, XX },
1614 },
1615 /* PREGRP17 */
1616 {
1617 { "cvtps2pd", XM, EX, XX },
1618 { "cvtss2sd", XM, EX, XX },
1619 { "cvtpd2ps", XM, EX, XX },
1620 { "cvtsd2ss", XM, EX, XX },
1621 },
1622 /* PREGRP18 */
1623 {
1624 { "maskmovq", MX, MS, XX },
1625 { "(bad)", XM, EX, XX },
1626 { "maskmovdqu", XM, EX, XX },
1627 { "(bad)", XM, EX, XX },
1628 },
1629 /* PREGRP19 */
1630 {
1631 { "movq", MX, EM, XX },
1632 { "movdqu", XM, EX, XX },
1633 { "movdqa", XM, EX, XX },
1634 { "(bad)", XM, EX, XX },
1635 },
1636 /* PREGRP20 */
1637 {
1638 { "movq", EM, MX, XX },
1639 { "movdqu", EX, XM, XX },
1640 { "movdqa", EX, XM, XX },
1641 { "(bad)", EX, XM, XX },
1642 },
1643 /* PREGRP21 */
1644 {
1645 { "(bad)", EX, XM, XX },
1646 { "movq2dq", XM, MS, XX },
1647 { "movq", EX, XM, XX },
1648 { "movdq2q", MX, XS, XX },
1649 },
1650 /* PREGRP22 */
1651 {
1652 { "pshufw", MX, EM, Ib },
1653 { "pshufhw", XM, EX, Ib },
1654 { "pshufd", XM, EX, Ib },
1655 { "pshuflw", XM, EX, Ib },
1656 },
1657 /* PREGRP23 */
1658 {
1659 { "movd", Edq, MX, XX },
1660 { "movq", XM, EX, XX },
1661 { "movd", Edq, XM, XX },
1662 { "(bad)", Ed, XM, XX },
1663 },
1664 /* PREGRP24 */
1665 {
1666 { "(bad)", MX, EX, XX },
1667 { "(bad)", XM, EX, XX },
1668 { "punpckhqdq", XM, EX, XX },
1669 { "(bad)", XM, EX, XX },
1670 },
1671 /* PREGRP25 */
1672 {
1673 { "movntq", EM, MX, XX },
1674 { "(bad)", EM, XM, XX },
1675 { "movntdq", EM, XM, XX },
1676 { "(bad)", EM, XM, XX },
1677 },
1678 /* PREGRP26 */
1679 {
1680 { "(bad)", MX, EX, XX },
1681 { "(bad)", XM, EX, XX },
1682 { "punpcklqdq", XM, EX, XX },
1683 { "(bad)", XM, EX, XX },
1684 },
1685 /* PREGRP27 */
1686 {
1687 { "(bad)", MX, EX, XX },
1688 { "(bad)", XM, EX, XX },
1689 { "addsubpd", XM, EX, XX },
1690 { "addsubps", XM, EX, XX },
1691 },
1692 /* PREGRP28 */
1693 {
1694 { "(bad)", MX, EX, XX },
1695 { "(bad)", XM, EX, XX },
1696 { "haddpd", XM, EX, XX },
1697 { "haddps", XM, EX, XX },
1698 },
1699 /* PREGRP29 */
1700 {
1701 { "(bad)", MX, EX, XX },
1702 { "(bad)", XM, EX, XX },
1703 { "hsubpd", XM, EX, XX },
1704 { "hsubps", XM, EX, XX },
1705 },
1706 /* PREGRP30 */
1707 {
1708 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1709 { "movsldup", XM, EX, XX },
1710 { "movlpd", XM, EX, XX },
1711 { "movddup", XM, EX, XX },
1712 },
1713 /* PREGRP31 */
1714 {
1715 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1716 { "movshdup", XM, EX, XX },
1717 { "movhpd", XM, EX, XX },
1718 { "(bad)", XM, EX, XX },
1719 },
1720 /* PREGRP32 */
1721 {
1722 { "(bad)", XM, EX, XX },
1723 { "(bad)", XM, EX, XX },
1724 { "(bad)", XM, EX, XX },
1725 { "lddqu", XM, M, XX },
1726 },
1727 };
1728
1729 static const struct dis386 x86_64_table[][2] = {
1730 {
1731 { "arpl", Ew, Gw, XX },
1732 { "movs{||lq|xd}", Gv, Ed, XX },
1733 },
1734 };
1735
1736 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1737
1738 static void
1739 ckprefix (void)
1740 {
1741 int newrex;
1742 rex = 0;
1743 prefixes = 0;
1744 used_prefixes = 0;
1745 rex_used = 0;
1746 while (1)
1747 {
1748 FETCH_DATA (the_info, codep + 1);
1749 newrex = 0;
1750 switch (*codep)
1751 {
1752 /* REX prefixes family. */
1753 case 0x40:
1754 case 0x41:
1755 case 0x42:
1756 case 0x43:
1757 case 0x44:
1758 case 0x45:
1759 case 0x46:
1760 case 0x47:
1761 case 0x48:
1762 case 0x49:
1763 case 0x4a:
1764 case 0x4b:
1765 case 0x4c:
1766 case 0x4d:
1767 case 0x4e:
1768 case 0x4f:
1769 if (mode_64bit)
1770 newrex = *codep;
1771 else
1772 return;
1773 break;
1774 case 0xf3:
1775 prefixes |= PREFIX_REPZ;
1776 break;
1777 case 0xf2:
1778 prefixes |= PREFIX_REPNZ;
1779 break;
1780 case 0xf0:
1781 prefixes |= PREFIX_LOCK;
1782 break;
1783 case 0x2e:
1784 prefixes |= PREFIX_CS;
1785 break;
1786 case 0x36:
1787 prefixes |= PREFIX_SS;
1788 break;
1789 case 0x3e:
1790 prefixes |= PREFIX_DS;
1791 break;
1792 case 0x26:
1793 prefixes |= PREFIX_ES;
1794 break;
1795 case 0x64:
1796 prefixes |= PREFIX_FS;
1797 break;
1798 case 0x65:
1799 prefixes |= PREFIX_GS;
1800 break;
1801 case 0x66:
1802 prefixes |= PREFIX_DATA;
1803 break;
1804 case 0x67:
1805 prefixes |= PREFIX_ADDR;
1806 break;
1807 case FWAIT_OPCODE:
1808 /* fwait is really an instruction. If there are prefixes
1809 before the fwait, they belong to the fwait, *not* to the
1810 following instruction. */
1811 if (prefixes)
1812 {
1813 prefixes |= PREFIX_FWAIT;
1814 codep++;
1815 return;
1816 }
1817 prefixes = PREFIX_FWAIT;
1818 break;
1819 default:
1820 return;
1821 }
1822 /* Rex is ignored when followed by another prefix. */
1823 if (rex)
1824 {
1825 oappend (prefix_name (rex, 0));
1826 oappend (" ");
1827 }
1828 rex = newrex;
1829 codep++;
1830 }
1831 }
1832
1833 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1834 prefix byte. */
1835
1836 static const char *
1837 prefix_name (int pref, int sizeflag)
1838 {
1839 switch (pref)
1840 {
1841 /* REX prefixes family. */
1842 case 0x40:
1843 return "rex";
1844 case 0x41:
1845 return "rexZ";
1846 case 0x42:
1847 return "rexY";
1848 case 0x43:
1849 return "rexYZ";
1850 case 0x44:
1851 return "rexX";
1852 case 0x45:
1853 return "rexXZ";
1854 case 0x46:
1855 return "rexXY";
1856 case 0x47:
1857 return "rexXYZ";
1858 case 0x48:
1859 return "rex64";
1860 case 0x49:
1861 return "rex64Z";
1862 case 0x4a:
1863 return "rex64Y";
1864 case 0x4b:
1865 return "rex64YZ";
1866 case 0x4c:
1867 return "rex64X";
1868 case 0x4d:
1869 return "rex64XZ";
1870 case 0x4e:
1871 return "rex64XY";
1872 case 0x4f:
1873 return "rex64XYZ";
1874 case 0xf3:
1875 return "repz";
1876 case 0xf2:
1877 return "repnz";
1878 case 0xf0:
1879 return "lock";
1880 case 0x2e:
1881 return "cs";
1882 case 0x36:
1883 return "ss";
1884 case 0x3e:
1885 return "ds";
1886 case 0x26:
1887 return "es";
1888 case 0x64:
1889 return "fs";
1890 case 0x65:
1891 return "gs";
1892 case 0x66:
1893 return (sizeflag & DFLAG) ? "data16" : "data32";
1894 case 0x67:
1895 if (mode_64bit)
1896 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1897 else
1898 return (sizeflag & AFLAG) ? "addr16" : "addr32";
1899 case FWAIT_OPCODE:
1900 return "fwait";
1901 default:
1902 return NULL;
1903 }
1904 }
1905
1906 static char op1out[100], op2out[100], op3out[100];
1907 static int op_ad, op_index[3];
1908 static int two_source_ops;
1909 static bfd_vma op_address[3];
1910 static bfd_vma op_riprel[3];
1911 static bfd_vma start_pc;
1912 \f
1913 /*
1914 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1915 * (see topic "Redundant prefixes" in the "Differences from 8086"
1916 * section of the "Virtual 8086 Mode" chapter.)
1917 * 'pc' should be the address of this instruction, it will
1918 * be used to print the target address if this is a relative jump or call
1919 * The function returns the length of this instruction in bytes.
1920 */
1921
1922 static char intel_syntax;
1923 static char open_char;
1924 static char close_char;
1925 static char separator_char;
1926 static char scale_char;
1927
1928 /* Here for backwards compatibility. When gdb stops using
1929 print_insn_i386_att and print_insn_i386_intel these functions can
1930 disappear, and print_insn_i386 be merged into print_insn. */
1931 int
1932 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
1933 {
1934 intel_syntax = 0;
1935
1936 return print_insn (pc, info);
1937 }
1938
1939 int
1940 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
1941 {
1942 intel_syntax = 1;
1943
1944 return print_insn (pc, info);
1945 }
1946
1947 int
1948 print_insn_i386 (bfd_vma pc, disassemble_info *info)
1949 {
1950 intel_syntax = -1;
1951
1952 return print_insn (pc, info);
1953 }
1954
1955 static int
1956 print_insn (bfd_vma pc, disassemble_info *info)
1957 {
1958 const struct dis386 *dp;
1959 int i;
1960 char *first, *second, *third;
1961 int needcomma;
1962 unsigned char uses_SSE_prefix, uses_LOCK_prefix;
1963 int sizeflag;
1964 const char *p;
1965 struct dis_private priv;
1966
1967 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1968 || info->mach == bfd_mach_x86_64);
1969
1970 if (intel_syntax == (char) -1)
1971 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1972 || info->mach == bfd_mach_x86_64_intel_syntax);
1973
1974 if (info->mach == bfd_mach_i386_i386
1975 || info->mach == bfd_mach_x86_64
1976 || info->mach == bfd_mach_i386_i386_intel_syntax
1977 || info->mach == bfd_mach_x86_64_intel_syntax)
1978 priv.orig_sizeflag = AFLAG | DFLAG;
1979 else if (info->mach == bfd_mach_i386_i8086)
1980 priv.orig_sizeflag = 0;
1981 else
1982 abort ();
1983
1984 for (p = info->disassembler_options; p != NULL; )
1985 {
1986 if (strncmp (p, "x86-64", 6) == 0)
1987 {
1988 mode_64bit = 1;
1989 priv.orig_sizeflag = AFLAG | DFLAG;
1990 }
1991 else if (strncmp (p, "i386", 4) == 0)
1992 {
1993 mode_64bit = 0;
1994 priv.orig_sizeflag = AFLAG | DFLAG;
1995 }
1996 else if (strncmp (p, "i8086", 5) == 0)
1997 {
1998 mode_64bit = 0;
1999 priv.orig_sizeflag = 0;
2000 }
2001 else if (strncmp (p, "intel", 5) == 0)
2002 {
2003 intel_syntax = 1;
2004 }
2005 else if (strncmp (p, "att", 3) == 0)
2006 {
2007 intel_syntax = 0;
2008 }
2009 else if (strncmp (p, "addr", 4) == 0)
2010 {
2011 if (p[4] == '1' && p[5] == '6')
2012 priv.orig_sizeflag &= ~AFLAG;
2013 else if (p[4] == '3' && p[5] == '2')
2014 priv.orig_sizeflag |= AFLAG;
2015 }
2016 else if (strncmp (p, "data", 4) == 0)
2017 {
2018 if (p[4] == '1' && p[5] == '6')
2019 priv.orig_sizeflag &= ~DFLAG;
2020 else if (p[4] == '3' && p[5] == '2')
2021 priv.orig_sizeflag |= DFLAG;
2022 }
2023 else if (strncmp (p, "suffix", 6) == 0)
2024 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2025
2026 p = strchr (p, ',');
2027 if (p != NULL)
2028 p++;
2029 }
2030
2031 if (intel_syntax)
2032 {
2033 names64 = intel_names64;
2034 names32 = intel_names32;
2035 names16 = intel_names16;
2036 names8 = intel_names8;
2037 names8rex = intel_names8rex;
2038 names_seg = intel_names_seg;
2039 index16 = intel_index16;
2040 open_char = '[';
2041 close_char = ']';
2042 separator_char = '+';
2043 scale_char = '*';
2044 }
2045 else
2046 {
2047 names64 = att_names64;
2048 names32 = att_names32;
2049 names16 = att_names16;
2050 names8 = att_names8;
2051 names8rex = att_names8rex;
2052 names_seg = att_names_seg;
2053 index16 = att_index16;
2054 open_char = '(';
2055 close_char = ')';
2056 separator_char = ',';
2057 scale_char = ',';
2058 }
2059
2060 /* The output looks better if we put 7 bytes on a line, since that
2061 puts most long word instructions on a single line. */
2062 info->bytes_per_line = 7;
2063
2064 info->private_data = &priv;
2065 priv.max_fetched = priv.the_buffer;
2066 priv.insn_start = pc;
2067
2068 obuf[0] = 0;
2069 op1out[0] = 0;
2070 op2out[0] = 0;
2071 op3out[0] = 0;
2072
2073 op_index[0] = op_index[1] = op_index[2] = -1;
2074
2075 the_info = info;
2076 start_pc = pc;
2077 start_codep = priv.the_buffer;
2078 codep = priv.the_buffer;
2079
2080 if (setjmp (priv.bailout) != 0)
2081 {
2082 const char *name;
2083
2084 /* Getting here means we tried for data but didn't get it. That
2085 means we have an incomplete instruction of some sort. Just
2086 print the first byte as a prefix or a .byte pseudo-op. */
2087 if (codep > priv.the_buffer)
2088 {
2089 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2090 if (name != NULL)
2091 (*info->fprintf_func) (info->stream, "%s", name);
2092 else
2093 {
2094 /* Just print the first byte as a .byte instruction. */
2095 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2096 (unsigned int) priv.the_buffer[0]);
2097 }
2098
2099 return 1;
2100 }
2101
2102 return -1;
2103 }
2104
2105 obufp = obuf;
2106 ckprefix ();
2107
2108 insn_codep = codep;
2109 sizeflag = priv.orig_sizeflag;
2110
2111 FETCH_DATA (info, codep + 1);
2112 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2113
2114 if ((prefixes & PREFIX_FWAIT)
2115 && ((*codep < 0xd8) || (*codep > 0xdf)))
2116 {
2117 const char *name;
2118
2119 /* fwait not followed by floating point instruction. Print the
2120 first prefix, which is probably fwait itself. */
2121 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2122 if (name == NULL)
2123 name = INTERNAL_DISASSEMBLER_ERROR;
2124 (*info->fprintf_func) (info->stream, "%s", name);
2125 return 1;
2126 }
2127
2128 if (*codep == 0x0f)
2129 {
2130 FETCH_DATA (info, codep + 2);
2131 dp = &dis386_twobyte[*++codep];
2132 need_modrm = twobyte_has_modrm[*codep];
2133 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2134 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
2135 }
2136 else
2137 {
2138 dp = &dis386[*codep];
2139 need_modrm = onebyte_has_modrm[*codep];
2140 uses_SSE_prefix = 0;
2141 uses_LOCK_prefix = 0;
2142 }
2143 codep++;
2144
2145 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2146 {
2147 oappend ("repz ");
2148 used_prefixes |= PREFIX_REPZ;
2149 }
2150 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2151 {
2152 oappend ("repnz ");
2153 used_prefixes |= PREFIX_REPNZ;
2154 }
2155 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
2156 {
2157 oappend ("lock ");
2158 used_prefixes |= PREFIX_LOCK;
2159 }
2160
2161 if (prefixes & PREFIX_ADDR)
2162 {
2163 sizeflag ^= AFLAG;
2164 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2165 {
2166 if ((sizeflag & AFLAG) || mode_64bit)
2167 oappend ("addr32 ");
2168 else
2169 oappend ("addr16 ");
2170 used_prefixes |= PREFIX_ADDR;
2171 }
2172 }
2173
2174 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2175 {
2176 sizeflag ^= DFLAG;
2177 if (dp->bytemode3 == cond_jump_mode
2178 && dp->bytemode1 == v_mode
2179 && !intel_syntax)
2180 {
2181 if (sizeflag & DFLAG)
2182 oappend ("data32 ");
2183 else
2184 oappend ("data16 ");
2185 used_prefixes |= PREFIX_DATA;
2186 }
2187 }
2188
2189 if (need_modrm)
2190 {
2191 FETCH_DATA (info, codep + 1);
2192 mod = (*codep >> 6) & 3;
2193 reg = (*codep >> 3) & 7;
2194 rm = *codep & 7;
2195 }
2196
2197 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2198 {
2199 dofloat (sizeflag);
2200 }
2201 else
2202 {
2203 int index;
2204 if (dp->name == NULL)
2205 {
2206 switch (dp->bytemode1)
2207 {
2208 case USE_GROUPS:
2209 dp = &grps[dp->bytemode2][reg];
2210 break;
2211
2212 case USE_PREFIX_USER_TABLE:
2213 index = 0;
2214 used_prefixes |= (prefixes & PREFIX_REPZ);
2215 if (prefixes & PREFIX_REPZ)
2216 index = 1;
2217 else
2218 {
2219 used_prefixes |= (prefixes & PREFIX_DATA);
2220 if (prefixes & PREFIX_DATA)
2221 index = 2;
2222 else
2223 {
2224 used_prefixes |= (prefixes & PREFIX_REPNZ);
2225 if (prefixes & PREFIX_REPNZ)
2226 index = 3;
2227 }
2228 }
2229 dp = &prefix_user_table[dp->bytemode2][index];
2230 break;
2231
2232 case X86_64_SPECIAL:
2233 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2234 break;
2235
2236 default:
2237 oappend (INTERNAL_DISASSEMBLER_ERROR);
2238 break;
2239 }
2240 }
2241
2242 if (putop (dp->name, sizeflag) == 0)
2243 {
2244 obufp = op1out;
2245 op_ad = 2;
2246 if (dp->op1)
2247 (*dp->op1) (dp->bytemode1, sizeflag);
2248
2249 obufp = op2out;
2250 op_ad = 1;
2251 if (dp->op2)
2252 (*dp->op2) (dp->bytemode2, sizeflag);
2253
2254 obufp = op3out;
2255 op_ad = 0;
2256 if (dp->op3)
2257 (*dp->op3) (dp->bytemode3, sizeflag);
2258 }
2259 }
2260
2261 /* See if any prefixes were not used. If so, print the first one
2262 separately. If we don't do this, we'll wind up printing an
2263 instruction stream which does not precisely correspond to the
2264 bytes we are disassembling. */
2265 if ((prefixes & ~used_prefixes) != 0)
2266 {
2267 const char *name;
2268
2269 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2270 if (name == NULL)
2271 name = INTERNAL_DISASSEMBLER_ERROR;
2272 (*info->fprintf_func) (info->stream, "%s", name);
2273 return 1;
2274 }
2275 if (rex & ~rex_used)
2276 {
2277 const char *name;
2278 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2279 if (name == NULL)
2280 name = INTERNAL_DISASSEMBLER_ERROR;
2281 (*info->fprintf_func) (info->stream, "%s ", name);
2282 }
2283
2284 obufp = obuf + strlen (obuf);
2285 for (i = strlen (obuf); i < 6; i++)
2286 oappend (" ");
2287 oappend (" ");
2288 (*info->fprintf_func) (info->stream, "%s", obuf);
2289
2290 /* The enter and bound instructions are printed with operands in the same
2291 order as the intel book; everything else is printed in reverse order. */
2292 if (intel_syntax || two_source_ops)
2293 {
2294 first = op1out;
2295 second = op2out;
2296 third = op3out;
2297 op_ad = op_index[0];
2298 op_index[0] = op_index[2];
2299 op_index[2] = op_ad;
2300 }
2301 else
2302 {
2303 first = op3out;
2304 second = op2out;
2305 third = op1out;
2306 }
2307 needcomma = 0;
2308 if (*first)
2309 {
2310 if (op_index[0] != -1 && !op_riprel[0])
2311 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2312 else
2313 (*info->fprintf_func) (info->stream, "%s", first);
2314 needcomma = 1;
2315 }
2316 if (*second)
2317 {
2318 if (needcomma)
2319 (*info->fprintf_func) (info->stream, ",");
2320 if (op_index[1] != -1 && !op_riprel[1])
2321 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2322 else
2323 (*info->fprintf_func) (info->stream, "%s", second);
2324 needcomma = 1;
2325 }
2326 if (*third)
2327 {
2328 if (needcomma)
2329 (*info->fprintf_func) (info->stream, ",");
2330 if (op_index[2] != -1 && !op_riprel[2])
2331 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2332 else
2333 (*info->fprintf_func) (info->stream, "%s", third);
2334 }
2335 for (i = 0; i < 3; i++)
2336 if (op_index[i] != -1 && op_riprel[i])
2337 {
2338 (*info->fprintf_func) (info->stream, " # ");
2339 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2340 + op_address[op_index[i]]), info);
2341 }
2342 return codep - priv.the_buffer;
2343 }
2344
2345 static const char *float_mem[] = {
2346 /* d8 */
2347 "fadd{s||s|}",
2348 "fmul{s||s|}",
2349 "fcom{s||s|}",
2350 "fcomp{s||s|}",
2351 "fsub{s||s|}",
2352 "fsubr{s||s|}",
2353 "fdiv{s||s|}",
2354 "fdivr{s||s|}",
2355 /* d9 */
2356 "fld{s||s|}",
2357 "(bad)",
2358 "fst{s||s|}",
2359 "fstp{s||s|}",
2360 "fldenvIC",
2361 "fldcw",
2362 "fNstenvIC",
2363 "fNstcw",
2364 /* da */
2365 "fiadd{l||l|}",
2366 "fimul{l||l|}",
2367 "ficom{l||l|}",
2368 "ficomp{l||l|}",
2369 "fisub{l||l|}",
2370 "fisubr{l||l|}",
2371 "fidiv{l||l|}",
2372 "fidivr{l||l|}",
2373 /* db */
2374 "fild{l||l|}",
2375 "fisttp{l||l|}",
2376 "fist{l||l|}",
2377 "fistp{l||l|}",
2378 "(bad)",
2379 "fld{t||t|}",
2380 "(bad)",
2381 "fstp{t||t|}",
2382 /* dc */
2383 "fadd{l||l|}",
2384 "fmul{l||l|}",
2385 "fcom{l||l|}",
2386 "fcomp{l||l|}",
2387 "fsub{l||l|}",
2388 "fsubr{l||l|}",
2389 "fdiv{l||l|}",
2390 "fdivr{l||l|}",
2391 /* dd */
2392 "fld{l||l|}",
2393 "fisttp{ll||ll|}",
2394 "fst{l||l|}",
2395 "fstp{l||l|}",
2396 "frstorIC",
2397 "(bad)",
2398 "fNsaveIC",
2399 "fNstsw",
2400 /* de */
2401 "fiadd",
2402 "fimul",
2403 "ficom",
2404 "ficomp",
2405 "fisub",
2406 "fisubr",
2407 "fidiv",
2408 "fidivr",
2409 /* df */
2410 "fild",
2411 "fisttp",
2412 "fist",
2413 "fistp",
2414 "fbld",
2415 "fild{ll||ll|}",
2416 "fbstp",
2417 "fistp{ll||ll|}",
2418 };
2419
2420 static const unsigned char float_mem_mode[] = {
2421 /* d8 */
2422 d_mode,
2423 d_mode,
2424 d_mode,
2425 d_mode,
2426 d_mode,
2427 d_mode,
2428 d_mode,
2429 d_mode,
2430 /* d9 */
2431 d_mode,
2432 0,
2433 d_mode,
2434 d_mode,
2435 0,
2436 w_mode,
2437 0,
2438 w_mode,
2439 /* da */
2440 d_mode,
2441 d_mode,
2442 d_mode,
2443 d_mode,
2444 d_mode,
2445 d_mode,
2446 d_mode,
2447 d_mode,
2448 /* db */
2449 d_mode,
2450 d_mode,
2451 d_mode,
2452 d_mode,
2453 0,
2454 t_mode,
2455 0,
2456 t_mode,
2457 /* dc */
2458 q_mode,
2459 q_mode,
2460 q_mode,
2461 q_mode,
2462 q_mode,
2463 q_mode,
2464 q_mode,
2465 q_mode,
2466 /* dd */
2467 q_mode,
2468 q_mode,
2469 q_mode,
2470 q_mode,
2471 0,
2472 0,
2473 0,
2474 w_mode,
2475 /* de */
2476 w_mode,
2477 w_mode,
2478 w_mode,
2479 w_mode,
2480 w_mode,
2481 w_mode,
2482 w_mode,
2483 w_mode,
2484 /* df */
2485 w_mode,
2486 w_mode,
2487 w_mode,
2488 w_mode,
2489 t_mode,
2490 q_mode,
2491 t_mode,
2492 q_mode
2493 };
2494
2495 #define ST OP_ST, 0
2496 #define STi OP_STi, 0
2497
2498 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2499 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2500 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2501 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2502 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2503 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2504 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2505 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2506 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2507
2508 static const struct dis386 float_reg[][8] = {
2509 /* d8 */
2510 {
2511 { "fadd", ST, STi, XX },
2512 { "fmul", ST, STi, XX },
2513 { "fcom", STi, XX, XX },
2514 { "fcomp", STi, XX, XX },
2515 { "fsub", ST, STi, XX },
2516 { "fsubr", ST, STi, XX },
2517 { "fdiv", ST, STi, XX },
2518 { "fdivr", ST, STi, XX },
2519 },
2520 /* d9 */
2521 {
2522 { "fld", STi, XX, XX },
2523 { "fxch", STi, XX, XX },
2524 { FGRPd9_2 },
2525 { "(bad)", XX, XX, XX },
2526 { FGRPd9_4 },
2527 { FGRPd9_5 },
2528 { FGRPd9_6 },
2529 { FGRPd9_7 },
2530 },
2531 /* da */
2532 {
2533 { "fcmovb", ST, STi, XX },
2534 { "fcmove", ST, STi, XX },
2535 { "fcmovbe",ST, STi, XX },
2536 { "fcmovu", ST, STi, XX },
2537 { "(bad)", XX, XX, XX },
2538 { FGRPda_5 },
2539 { "(bad)", XX, XX, XX },
2540 { "(bad)", XX, XX, XX },
2541 },
2542 /* db */
2543 {
2544 { "fcmovnb",ST, STi, XX },
2545 { "fcmovne",ST, STi, XX },
2546 { "fcmovnbe",ST, STi, XX },
2547 { "fcmovnu",ST, STi, XX },
2548 { FGRPdb_4 },
2549 { "fucomi", ST, STi, XX },
2550 { "fcomi", ST, STi, XX },
2551 { "(bad)", XX, XX, XX },
2552 },
2553 /* dc */
2554 {
2555 { "fadd", STi, ST, XX },
2556 { "fmul", STi, ST, XX },
2557 { "(bad)", XX, XX, XX },
2558 { "(bad)", XX, XX, XX },
2559 #if UNIXWARE_COMPAT
2560 { "fsub", STi, ST, XX },
2561 { "fsubr", STi, ST, XX },
2562 { "fdiv", STi, ST, XX },
2563 { "fdivr", STi, ST, XX },
2564 #else
2565 { "fsubr", STi, ST, XX },
2566 { "fsub", STi, ST, XX },
2567 { "fdivr", STi, ST, XX },
2568 { "fdiv", STi, ST, XX },
2569 #endif
2570 },
2571 /* dd */
2572 {
2573 { "ffree", STi, XX, XX },
2574 { "(bad)", XX, XX, XX },
2575 { "fst", STi, XX, XX },
2576 { "fstp", STi, XX, XX },
2577 { "fucom", STi, XX, XX },
2578 { "fucomp", STi, XX, XX },
2579 { "(bad)", XX, XX, XX },
2580 { "(bad)", XX, XX, XX },
2581 },
2582 /* de */
2583 {
2584 { "faddp", STi, ST, XX },
2585 { "fmulp", STi, ST, XX },
2586 { "(bad)", XX, XX, XX },
2587 { FGRPde_3 },
2588 #if UNIXWARE_COMPAT
2589 { "fsubp", STi, ST, XX },
2590 { "fsubrp", STi, ST, XX },
2591 { "fdivp", STi, ST, XX },
2592 { "fdivrp", STi, ST, XX },
2593 #else
2594 { "fsubrp", STi, ST, XX },
2595 { "fsubp", STi, ST, XX },
2596 { "fdivrp", STi, ST, XX },
2597 { "fdivp", STi, ST, XX },
2598 #endif
2599 },
2600 /* df */
2601 {
2602 { "ffreep", STi, XX, XX },
2603 { "(bad)", XX, XX, XX },
2604 { "(bad)", XX, XX, XX },
2605 { "(bad)", XX, XX, XX },
2606 { FGRPdf_4 },
2607 { "fucomip",ST, STi, XX },
2608 { "fcomip", ST, STi, XX },
2609 { "(bad)", XX, XX, XX },
2610 },
2611 };
2612
2613 static char *fgrps[][8] = {
2614 /* d9_2 0 */
2615 {
2616 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2617 },
2618
2619 /* d9_4 1 */
2620 {
2621 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2622 },
2623
2624 /* d9_5 2 */
2625 {
2626 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2627 },
2628
2629 /* d9_6 3 */
2630 {
2631 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2632 },
2633
2634 /* d9_7 4 */
2635 {
2636 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2637 },
2638
2639 /* da_5 5 */
2640 {
2641 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2642 },
2643
2644 /* db_4 6 */
2645 {
2646 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2647 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2648 },
2649
2650 /* de_3 7 */
2651 {
2652 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2653 },
2654
2655 /* df_4 8 */
2656 {
2657 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2658 },
2659 };
2660
2661 static void
2662 dofloat (int sizeflag)
2663 {
2664 const struct dis386 *dp;
2665 unsigned char floatop;
2666
2667 floatop = codep[-1];
2668
2669 if (mod != 3)
2670 {
2671 int fp_indx = (floatop - 0xd8) * 8 + reg;
2672
2673 putop (float_mem[fp_indx], sizeflag);
2674 obufp = op1out;
2675 OP_E (float_mem_mode[fp_indx], sizeflag);
2676 return;
2677 }
2678 /* Skip mod/rm byte. */
2679 MODRM_CHECK;
2680 codep++;
2681
2682 dp = &float_reg[floatop - 0xd8][reg];
2683 if (dp->name == NULL)
2684 {
2685 putop (fgrps[dp->bytemode1][rm], sizeflag);
2686
2687 /* Instruction fnstsw is only one with strange arg. */
2688 if (floatop == 0xdf && codep[-1] == 0xe0)
2689 strcpy (op1out, names16[0]);
2690 }
2691 else
2692 {
2693 putop (dp->name, sizeflag);
2694
2695 obufp = op1out;
2696 if (dp->op1)
2697 (*dp->op1) (dp->bytemode1, sizeflag);
2698 obufp = op2out;
2699 if (dp->op2)
2700 (*dp->op2) (dp->bytemode2, sizeflag);
2701 }
2702 }
2703
2704 static void
2705 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2706 {
2707 oappend ("%st");
2708 }
2709
2710 static void
2711 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2712 {
2713 sprintf (scratchbuf, "%%st(%d)", rm);
2714 oappend (scratchbuf + intel_syntax);
2715 }
2716
2717 /* Capital letters in template are macros. */
2718 static int
2719 putop (const char *template, int sizeflag)
2720 {
2721 const char *p;
2722 int alt = 0;
2723
2724 for (p = template; *p; p++)
2725 {
2726 switch (*p)
2727 {
2728 default:
2729 *obufp++ = *p;
2730 break;
2731 case '{':
2732 alt = 0;
2733 if (intel_syntax)
2734 alt += 1;
2735 if (mode_64bit)
2736 alt += 2;
2737 while (alt != 0)
2738 {
2739 while (*++p != '|')
2740 {
2741 if (*p == '}')
2742 {
2743 /* Alternative not valid. */
2744 strcpy (obuf, "(bad)");
2745 obufp = obuf + 5;
2746 return 1;
2747 }
2748 else if (*p == '\0')
2749 abort ();
2750 }
2751 alt--;
2752 }
2753 /* Fall through. */
2754 case 'I':
2755 alt = 1;
2756 continue;
2757 case '|':
2758 while (*++p != '}')
2759 {
2760 if (*p == '\0')
2761 abort ();
2762 }
2763 break;
2764 case '}':
2765 break;
2766 case 'A':
2767 if (intel_syntax)
2768 break;
2769 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2770 *obufp++ = 'b';
2771 break;
2772 case 'B':
2773 if (intel_syntax)
2774 break;
2775 if (sizeflag & SUFFIX_ALWAYS)
2776 *obufp++ = 'b';
2777 break;
2778 case 'C':
2779 if (intel_syntax && !alt)
2780 break;
2781 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
2782 {
2783 if (sizeflag & DFLAG)
2784 *obufp++ = intel_syntax ? 'd' : 'l';
2785 else
2786 *obufp++ = intel_syntax ? 'w' : 's';
2787 used_prefixes |= (prefixes & PREFIX_DATA);
2788 }
2789 break;
2790 case 'E': /* For jcxz/jecxz */
2791 if (mode_64bit)
2792 {
2793 if (sizeflag & AFLAG)
2794 *obufp++ = 'r';
2795 else
2796 *obufp++ = 'e';
2797 }
2798 else
2799 if (sizeflag & AFLAG)
2800 *obufp++ = 'e';
2801 used_prefixes |= (prefixes & PREFIX_ADDR);
2802 break;
2803 case 'F':
2804 if (intel_syntax)
2805 break;
2806 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2807 {
2808 if (sizeflag & AFLAG)
2809 *obufp++ = mode_64bit ? 'q' : 'l';
2810 else
2811 *obufp++ = mode_64bit ? 'l' : 'w';
2812 used_prefixes |= (prefixes & PREFIX_ADDR);
2813 }
2814 break;
2815 case 'H':
2816 if (intel_syntax)
2817 break;
2818 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2819 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2820 {
2821 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2822 *obufp++ = ',';
2823 *obufp++ = 'p';
2824 if (prefixes & PREFIX_DS)
2825 *obufp++ = 't';
2826 else
2827 *obufp++ = 'n';
2828 }
2829 break;
2830 case 'J':
2831 if (intel_syntax)
2832 break;
2833 *obufp++ = 'l';
2834 break;
2835 case 'L':
2836 if (intel_syntax)
2837 break;
2838 if (sizeflag & SUFFIX_ALWAYS)
2839 *obufp++ = 'l';
2840 break;
2841 case 'N':
2842 if ((prefixes & PREFIX_FWAIT) == 0)
2843 *obufp++ = 'n';
2844 else
2845 used_prefixes |= PREFIX_FWAIT;
2846 break;
2847 case 'O':
2848 USED_REX (REX_MODE64);
2849 if (rex & REX_MODE64)
2850 *obufp++ = 'o';
2851 else
2852 *obufp++ = 'd';
2853 break;
2854 case 'T':
2855 if (intel_syntax)
2856 break;
2857 if (mode_64bit)
2858 {
2859 *obufp++ = 'q';
2860 break;
2861 }
2862 /* Fall through. */
2863 case 'P':
2864 if (intel_syntax)
2865 break;
2866 if ((prefixes & PREFIX_DATA)
2867 || (rex & REX_MODE64)
2868 || (sizeflag & SUFFIX_ALWAYS))
2869 {
2870 USED_REX (REX_MODE64);
2871 if (rex & REX_MODE64)
2872 *obufp++ = 'q';
2873 else
2874 {
2875 if (sizeflag & DFLAG)
2876 *obufp++ = 'l';
2877 else
2878 *obufp++ = 'w';
2879 used_prefixes |= (prefixes & PREFIX_DATA);
2880 }
2881 }
2882 break;
2883 case 'U':
2884 if (intel_syntax)
2885 break;
2886 if (mode_64bit)
2887 {
2888 *obufp++ = 'q';
2889 break;
2890 }
2891 /* Fall through. */
2892 case 'Q':
2893 if (intel_syntax && !alt)
2894 break;
2895 USED_REX (REX_MODE64);
2896 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2897 {
2898 if (rex & REX_MODE64)
2899 *obufp++ = 'q';
2900 else
2901 {
2902 if (sizeflag & DFLAG)
2903 *obufp++ = intel_syntax ? 'd' : 'l';
2904 else
2905 *obufp++ = 'w';
2906 used_prefixes |= (prefixes & PREFIX_DATA);
2907 }
2908 }
2909 break;
2910 case 'R':
2911 USED_REX (REX_MODE64);
2912 if (intel_syntax)
2913 {
2914 if (rex & REX_MODE64)
2915 {
2916 *obufp++ = 'q';
2917 *obufp++ = 't';
2918 }
2919 else if (sizeflag & DFLAG)
2920 {
2921 *obufp++ = 'd';
2922 *obufp++ = 'q';
2923 }
2924 else
2925 {
2926 *obufp++ = 'w';
2927 *obufp++ = 'd';
2928 }
2929 }
2930 else
2931 {
2932 if (rex & REX_MODE64)
2933 *obufp++ = 'q';
2934 else if (sizeflag & DFLAG)
2935 *obufp++ = 'l';
2936 else
2937 *obufp++ = 'w';
2938 }
2939 if (!(rex & REX_MODE64))
2940 used_prefixes |= (prefixes & PREFIX_DATA);
2941 break;
2942 case 'S':
2943 if (intel_syntax)
2944 break;
2945 if (sizeflag & SUFFIX_ALWAYS)
2946 {
2947 if (rex & REX_MODE64)
2948 *obufp++ = 'q';
2949 else
2950 {
2951 if (sizeflag & DFLAG)
2952 *obufp++ = 'l';
2953 else
2954 *obufp++ = 'w';
2955 used_prefixes |= (prefixes & PREFIX_DATA);
2956 }
2957 }
2958 break;
2959 case 'X':
2960 if (prefixes & PREFIX_DATA)
2961 *obufp++ = 'd';
2962 else
2963 *obufp++ = 's';
2964 used_prefixes |= (prefixes & PREFIX_DATA);
2965 break;
2966 case 'Y':
2967 if (intel_syntax)
2968 break;
2969 if (rex & REX_MODE64)
2970 {
2971 USED_REX (REX_MODE64);
2972 *obufp++ = 'q';
2973 }
2974 break;
2975 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2976 case 'W':
2977 /* operand size flag for cwtl, cbtw */
2978 USED_REX (0);
2979 if (rex)
2980 *obufp++ = 'l';
2981 else if (sizeflag & DFLAG)
2982 *obufp++ = 'w';
2983 else
2984 *obufp++ = 'b';
2985 if (intel_syntax)
2986 {
2987 if (rex)
2988 {
2989 *obufp++ = 'q';
2990 *obufp++ = 'e';
2991 }
2992 if (sizeflag & DFLAG)
2993 {
2994 *obufp++ = 'd';
2995 *obufp++ = 'e';
2996 }
2997 else
2998 {
2999 *obufp++ = 'w';
3000 }
3001 }
3002 if (!rex)
3003 used_prefixes |= (prefixes & PREFIX_DATA);
3004 break;
3005 }
3006 alt = 0;
3007 }
3008 *obufp = 0;
3009 return 0;
3010 }
3011
3012 static void
3013 oappend (const char *s)
3014 {
3015 strcpy (obufp, s);
3016 obufp += strlen (s);
3017 }
3018
3019 static void
3020 append_seg (void)
3021 {
3022 if (prefixes & PREFIX_CS)
3023 {
3024 used_prefixes |= PREFIX_CS;
3025 oappend ("%cs:" + intel_syntax);
3026 }
3027 if (prefixes & PREFIX_DS)
3028 {
3029 used_prefixes |= PREFIX_DS;
3030 oappend ("%ds:" + intel_syntax);
3031 }
3032 if (prefixes & PREFIX_SS)
3033 {
3034 used_prefixes |= PREFIX_SS;
3035 oappend ("%ss:" + intel_syntax);
3036 }
3037 if (prefixes & PREFIX_ES)
3038 {
3039 used_prefixes |= PREFIX_ES;
3040 oappend ("%es:" + intel_syntax);
3041 }
3042 if (prefixes & PREFIX_FS)
3043 {
3044 used_prefixes |= PREFIX_FS;
3045 oappend ("%fs:" + intel_syntax);
3046 }
3047 if (prefixes & PREFIX_GS)
3048 {
3049 used_prefixes |= PREFIX_GS;
3050 oappend ("%gs:" + intel_syntax);
3051 }
3052 }
3053
3054 static void
3055 OP_indirE (int bytemode, int sizeflag)
3056 {
3057 if (!intel_syntax)
3058 oappend ("*");
3059 OP_E (bytemode, sizeflag);
3060 }
3061
3062 static void
3063 print_operand_value (char *buf, int hex, bfd_vma disp)
3064 {
3065 if (mode_64bit)
3066 {
3067 if (hex)
3068 {
3069 char tmp[30];
3070 int i;
3071 buf[0] = '0';
3072 buf[1] = 'x';
3073 sprintf_vma (tmp, disp);
3074 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
3075 strcpy (buf + 2, tmp + i);
3076 }
3077 else
3078 {
3079 bfd_signed_vma v = disp;
3080 char tmp[30];
3081 int i;
3082 if (v < 0)
3083 {
3084 *(buf++) = '-';
3085 v = -disp;
3086 /* Check for possible overflow on 0x8000000000000000. */
3087 if (v < 0)
3088 {
3089 strcpy (buf, "9223372036854775808");
3090 return;
3091 }
3092 }
3093 if (!v)
3094 {
3095 strcpy (buf, "0");
3096 return;
3097 }
3098
3099 i = 0;
3100 tmp[29] = 0;
3101 while (v)
3102 {
3103 tmp[28 - i] = (v % 10) + '0';
3104 v /= 10;
3105 i++;
3106 }
3107 strcpy (buf, tmp + 29 - i);
3108 }
3109 }
3110 else
3111 {
3112 if (hex)
3113 sprintf (buf, "0x%x", (unsigned int) disp);
3114 else
3115 sprintf (buf, "%d", (int) disp);
3116 }
3117 }
3118
3119 static void
3120 OP_E (int bytemode, int sizeflag)
3121 {
3122 bfd_vma disp;
3123 int add = 0;
3124 int riprel = 0;
3125 USED_REX (REX_EXTZ);
3126 if (rex & REX_EXTZ)
3127 add += 8;
3128
3129 /* Skip mod/rm byte. */
3130 MODRM_CHECK;
3131 codep++;
3132
3133 if (mod == 3)
3134 {
3135 switch (bytemode)
3136 {
3137 case b_mode:
3138 USED_REX (0);
3139 if (rex)
3140 oappend (names8rex[rm + add]);
3141 else
3142 oappend (names8[rm + add]);
3143 break;
3144 case w_mode:
3145 oappend (names16[rm + add]);
3146 break;
3147 case d_mode:
3148 oappend (names32[rm + add]);
3149 break;
3150 case q_mode:
3151 oappend (names64[rm + add]);
3152 break;
3153 case m_mode:
3154 if (mode_64bit)
3155 oappend (names64[rm + add]);
3156 else
3157 oappend (names32[rm + add]);
3158 break;
3159 case branch_v_mode:
3160 if (mode_64bit)
3161 oappend (names64[rm + add]);
3162 else
3163 {
3164 if ((sizeflag & DFLAG) || bytemode != branch_v_mode)
3165 oappend (names32[rm + add]);
3166 else
3167 oappend (names16[rm + add]);
3168 used_prefixes |= (prefixes & PREFIX_DATA);
3169 }
3170 break;
3171 case v_mode:
3172 case dq_mode:
3173 case dqw_mode:
3174 USED_REX (REX_MODE64);
3175 if (rex & REX_MODE64)
3176 oappend (names64[rm + add]);
3177 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3178 oappend (names32[rm + add]);
3179 else
3180 oappend (names16[rm + add]);
3181 used_prefixes |= (prefixes & PREFIX_DATA);
3182 break;
3183 case 0:
3184 break;
3185 default:
3186 oappend (INTERNAL_DISASSEMBLER_ERROR);
3187 break;
3188 }
3189 return;
3190 }
3191
3192 disp = 0;
3193 append_seg ();
3194
3195 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
3196 {
3197 int havesib;
3198 int havebase;
3199 int base;
3200 int index = 0;
3201 int scale = 0;
3202
3203 havesib = 0;
3204 havebase = 1;
3205 base = rm;
3206
3207 if (base == 4)
3208 {
3209 havesib = 1;
3210 FETCH_DATA (the_info, codep + 1);
3211 index = (*codep >> 3) & 7;
3212 if (mode_64bit || index != 0x4)
3213 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3214 scale = (*codep >> 6) & 3;
3215 base = *codep & 7;
3216 USED_REX (REX_EXTY);
3217 if (rex & REX_EXTY)
3218 index += 8;
3219 codep++;
3220 }
3221 base += add;
3222
3223 switch (mod)
3224 {
3225 case 0:
3226 if ((base & 7) == 5)
3227 {
3228 havebase = 0;
3229 if (mode_64bit && !havesib)
3230 riprel = 1;
3231 disp = get32s ();
3232 }
3233 break;
3234 case 1:
3235 FETCH_DATA (the_info, codep + 1);
3236 disp = *codep++;
3237 if ((disp & 0x80) != 0)
3238 disp -= 0x100;
3239 break;
3240 case 2:
3241 disp = get32s ();
3242 break;
3243 }
3244
3245 if (!intel_syntax)
3246 if (mod != 0 || (base & 7) == 5)
3247 {
3248 print_operand_value (scratchbuf, !riprel, disp);
3249 oappend (scratchbuf);
3250 if (riprel)
3251 {
3252 set_op (disp, 1);
3253 oappend ("(%rip)");
3254 }
3255 }
3256
3257 if (havebase || (havesib && (index != 4 || scale != 0)))
3258 {
3259 if (intel_syntax)
3260 {
3261 switch (bytemode)
3262 {
3263 case b_mode:
3264 oappend ("BYTE PTR ");
3265 break;
3266 case w_mode:
3267 case dqw_mode:
3268 oappend ("WORD PTR ");
3269 break;
3270 case branch_v_mode:
3271 case v_mode:
3272 case dq_mode:
3273 USED_REX (REX_MODE64);
3274 if (rex & REX_MODE64)
3275 oappend ("QWORD PTR ");
3276 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3277 oappend ("DWORD PTR ");
3278 else
3279 oappend ("WORD PTR ");
3280 used_prefixes |= (prefixes & PREFIX_DATA);
3281 break;
3282 case d_mode:
3283 oappend ("DWORD PTR ");
3284 break;
3285 case q_mode:
3286 oappend ("QWORD PTR ");
3287 break;
3288 case m_mode:
3289 if (mode_64bit)
3290 oappend ("QWORD PTR ");
3291 else
3292 oappend ("DWORD PTR ");
3293 break;
3294 case f_mode:
3295 if (sizeflag & DFLAG)
3296 {
3297 used_prefixes |= (prefixes & PREFIX_DATA);
3298 oappend ("FWORD PTR ");
3299 }
3300 else
3301 oappend ("DWORD PTR ");
3302 break;
3303 case t_mode:
3304 oappend ("TBYTE PTR ");
3305 break;
3306 case x_mode:
3307 oappend ("XMMWORD PTR ");
3308 break;
3309 default:
3310 break;
3311 }
3312 }
3313 *obufp++ = open_char;
3314 if (intel_syntax && riprel)
3315 oappend ("rip + ");
3316 *obufp = '\0';
3317 if (havebase)
3318 oappend (mode_64bit && (sizeflag & AFLAG)
3319 ? names64[base] : names32[base]);
3320 if (havesib)
3321 {
3322 if (index != 4)
3323 {
3324 if (!intel_syntax || havebase)
3325 {
3326 *obufp++ = separator_char;
3327 *obufp = '\0';
3328 }
3329 oappend (mode_64bit && (sizeflag & AFLAG)
3330 ? names64[index] : names32[index]);
3331 }
3332 if (scale != 0 || (!intel_syntax && index != 4))
3333 {
3334 *obufp++ = scale_char;
3335 *obufp = '\0';
3336 sprintf (scratchbuf, "%d", 1 << scale);
3337 oappend (scratchbuf);
3338 }
3339 }
3340 if (intel_syntax && disp)
3341 {
3342 if ((bfd_signed_vma) disp > 0)
3343 {
3344 *obufp++ = '+';
3345 *obufp = '\0';
3346 }
3347 else if (mod != 1)
3348 {
3349 *obufp++ = '-';
3350 *obufp = '\0';
3351 disp = - (bfd_signed_vma) disp;
3352 }
3353
3354 print_operand_value (scratchbuf, mod != 1, disp);
3355 oappend (scratchbuf);
3356 }
3357
3358 *obufp++ = close_char;
3359 *obufp = '\0';
3360 }
3361 else if (intel_syntax)
3362 {
3363 if (mod != 0 || (base & 7) == 5)
3364 {
3365 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3366 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3367 ;
3368 else
3369 {
3370 oappend (names_seg[ds_reg - es_reg]);
3371 oappend (":");
3372 }
3373 print_operand_value (scratchbuf, 1, disp);
3374 oappend (scratchbuf);
3375 }
3376 }
3377 }
3378 else
3379 { /* 16 bit address mode */
3380 switch (mod)
3381 {
3382 case 0:
3383 if (rm == 6)
3384 {
3385 disp = get16 ();
3386 if ((disp & 0x8000) != 0)
3387 disp -= 0x10000;
3388 }
3389 break;
3390 case 1:
3391 FETCH_DATA (the_info, codep + 1);
3392 disp = *codep++;
3393 if ((disp & 0x80) != 0)
3394 disp -= 0x100;
3395 break;
3396 case 2:
3397 disp = get16 ();
3398 if ((disp & 0x8000) != 0)
3399 disp -= 0x10000;
3400 break;
3401 }
3402
3403 if (!intel_syntax)
3404 if (mod != 0 || rm == 6)
3405 {
3406 print_operand_value (scratchbuf, 0, disp);
3407 oappend (scratchbuf);
3408 }
3409
3410 if (mod != 0 || rm != 6)
3411 {
3412 *obufp++ = open_char;
3413 *obufp = '\0';
3414 oappend (index16[rm]);
3415 if (intel_syntax && disp)
3416 {
3417 if ((bfd_signed_vma) disp > 0)
3418 {
3419 *obufp++ = '+';
3420 *obufp = '\0';
3421 }
3422 else if (mod != 1)
3423 {
3424 *obufp++ = '-';
3425 *obufp = '\0';
3426 disp = - (bfd_signed_vma) disp;
3427 }
3428
3429 print_operand_value (scratchbuf, mod != 1, disp);
3430 oappend (scratchbuf);
3431 }
3432
3433 *obufp++ = close_char;
3434 *obufp = '\0';
3435 }
3436 else if (intel_syntax)
3437 {
3438 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3439 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3440 ;
3441 else
3442 {
3443 oappend (names_seg[ds_reg - es_reg]);
3444 oappend (":");
3445 }
3446 print_operand_value (scratchbuf, 1, disp & 0xffff);
3447 oappend (scratchbuf);
3448 }
3449 }
3450 }
3451
3452 static void
3453 OP_G (int bytemode, int sizeflag)
3454 {
3455 int add = 0;
3456 USED_REX (REX_EXTX);
3457 if (rex & REX_EXTX)
3458 add += 8;
3459 switch (bytemode)
3460 {
3461 case b_mode:
3462 USED_REX (0);
3463 if (rex)
3464 oappend (names8rex[reg + add]);
3465 else
3466 oappend (names8[reg + add]);
3467 break;
3468 case w_mode:
3469 oappend (names16[reg + add]);
3470 break;
3471 case d_mode:
3472 oappend (names32[reg + add]);
3473 break;
3474 case q_mode:
3475 oappend (names64[reg + add]);
3476 break;
3477 case v_mode:
3478 case dq_mode:
3479 case dqw_mode:
3480 USED_REX (REX_MODE64);
3481 if (rex & REX_MODE64)
3482 oappend (names64[reg + add]);
3483 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3484 oappend (names32[reg + add]);
3485 else
3486 oappend (names16[reg + add]);
3487 used_prefixes |= (prefixes & PREFIX_DATA);
3488 break;
3489 default:
3490 oappend (INTERNAL_DISASSEMBLER_ERROR);
3491 break;
3492 }
3493 }
3494
3495 static bfd_vma
3496 get64 (void)
3497 {
3498 bfd_vma x;
3499 #ifdef BFD64
3500 unsigned int a;
3501 unsigned int b;
3502
3503 FETCH_DATA (the_info, codep + 8);
3504 a = *codep++ & 0xff;
3505 a |= (*codep++ & 0xff) << 8;
3506 a |= (*codep++ & 0xff) << 16;
3507 a |= (*codep++ & 0xff) << 24;
3508 b = *codep++ & 0xff;
3509 b |= (*codep++ & 0xff) << 8;
3510 b |= (*codep++ & 0xff) << 16;
3511 b |= (*codep++ & 0xff) << 24;
3512 x = a + ((bfd_vma) b << 32);
3513 #else
3514 abort ();
3515 x = 0;
3516 #endif
3517 return x;
3518 }
3519
3520 static bfd_signed_vma
3521 get32 (void)
3522 {
3523 bfd_signed_vma x = 0;
3524
3525 FETCH_DATA (the_info, codep + 4);
3526 x = *codep++ & (bfd_signed_vma) 0xff;
3527 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3528 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3529 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3530 return x;
3531 }
3532
3533 static bfd_signed_vma
3534 get32s (void)
3535 {
3536 bfd_signed_vma x = 0;
3537
3538 FETCH_DATA (the_info, codep + 4);
3539 x = *codep++ & (bfd_signed_vma) 0xff;
3540 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3541 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3542 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3543
3544 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3545
3546 return x;
3547 }
3548
3549 static int
3550 get16 (void)
3551 {
3552 int x = 0;
3553
3554 FETCH_DATA (the_info, codep + 2);
3555 x = *codep++ & 0xff;
3556 x |= (*codep++ & 0xff) << 8;
3557 return x;
3558 }
3559
3560 static void
3561 set_op (bfd_vma op, int riprel)
3562 {
3563 op_index[op_ad] = op_ad;
3564 if (mode_64bit)
3565 {
3566 op_address[op_ad] = op;
3567 op_riprel[op_ad] = riprel;
3568 }
3569 else
3570 {
3571 /* Mask to get a 32-bit address. */
3572 op_address[op_ad] = op & 0xffffffff;
3573 op_riprel[op_ad] = riprel & 0xffffffff;
3574 }
3575 }
3576
3577 static void
3578 OP_REG (int code, int sizeflag)
3579 {
3580 const char *s;
3581 int add = 0;
3582 USED_REX (REX_EXTZ);
3583 if (rex & REX_EXTZ)
3584 add = 8;
3585
3586 switch (code)
3587 {
3588 case indir_dx_reg:
3589 if (intel_syntax)
3590 s = "[dx]";
3591 else
3592 s = "(%dx)";
3593 break;
3594 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3595 case sp_reg: case bp_reg: case si_reg: case di_reg:
3596 s = names16[code - ax_reg + add];
3597 break;
3598 case es_reg: case ss_reg: case cs_reg:
3599 case ds_reg: case fs_reg: case gs_reg:
3600 s = names_seg[code - es_reg + add];
3601 break;
3602 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3603 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3604 USED_REX (0);
3605 if (rex)
3606 s = names8rex[code - al_reg + add];
3607 else
3608 s = names8[code - al_reg];
3609 break;
3610 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3611 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3612 if (mode_64bit)
3613 {
3614 s = names64[code - rAX_reg + add];
3615 break;
3616 }
3617 code += eAX_reg - rAX_reg;
3618 /* Fall through. */
3619 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3620 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3621 USED_REX (REX_MODE64);
3622 if (rex & REX_MODE64)
3623 s = names64[code - eAX_reg + add];
3624 else if (sizeflag & DFLAG)
3625 s = names32[code - eAX_reg + add];
3626 else
3627 s = names16[code - eAX_reg + add];
3628 used_prefixes |= (prefixes & PREFIX_DATA);
3629 break;
3630 default:
3631 s = INTERNAL_DISASSEMBLER_ERROR;
3632 break;
3633 }
3634 oappend (s);
3635 }
3636
3637 static void
3638 OP_IMREG (int code, int sizeflag)
3639 {
3640 const char *s;
3641
3642 switch (code)
3643 {
3644 case indir_dx_reg:
3645 if (intel_syntax)
3646 s = "[dx]";
3647 else
3648 s = "(%dx)";
3649 break;
3650 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3651 case sp_reg: case bp_reg: case si_reg: case di_reg:
3652 s = names16[code - ax_reg];
3653 break;
3654 case es_reg: case ss_reg: case cs_reg:
3655 case ds_reg: case fs_reg: case gs_reg:
3656 s = names_seg[code - es_reg];
3657 break;
3658 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3659 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3660 USED_REX (0);
3661 if (rex)
3662 s = names8rex[code - al_reg];
3663 else
3664 s = names8[code - al_reg];
3665 break;
3666 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3667 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3668 USED_REX (REX_MODE64);
3669 if (rex & REX_MODE64)
3670 s = names64[code - eAX_reg];
3671 else if (sizeflag & DFLAG)
3672 s = names32[code - eAX_reg];
3673 else
3674 s = names16[code - eAX_reg];
3675 used_prefixes |= (prefixes & PREFIX_DATA);
3676 break;
3677 default:
3678 s = INTERNAL_DISASSEMBLER_ERROR;
3679 break;
3680 }
3681 oappend (s);
3682 }
3683
3684 static void
3685 OP_I (int bytemode, int sizeflag)
3686 {
3687 bfd_signed_vma op;
3688 bfd_signed_vma mask = -1;
3689
3690 switch (bytemode)
3691 {
3692 case b_mode:
3693 FETCH_DATA (the_info, codep + 1);
3694 op = *codep++;
3695 mask = 0xff;
3696 break;
3697 case q_mode:
3698 if (mode_64bit)
3699 {
3700 op = get32s ();
3701 break;
3702 }
3703 /* Fall through. */
3704 case v_mode:
3705 USED_REX (REX_MODE64);
3706 if (rex & REX_MODE64)
3707 op = get32s ();
3708 else if (sizeflag & DFLAG)
3709 {
3710 op = get32 ();
3711 mask = 0xffffffff;
3712 }
3713 else
3714 {
3715 op = get16 ();
3716 mask = 0xfffff;
3717 }
3718 used_prefixes |= (prefixes & PREFIX_DATA);
3719 break;
3720 case w_mode:
3721 mask = 0xfffff;
3722 op = get16 ();
3723 break;
3724 case const_1_mode:
3725 if (intel_syntax)
3726 oappend ("1");
3727 return;
3728 default:
3729 oappend (INTERNAL_DISASSEMBLER_ERROR);
3730 return;
3731 }
3732
3733 op &= mask;
3734 scratchbuf[0] = '$';
3735 print_operand_value (scratchbuf + 1, 1, op);
3736 oappend (scratchbuf + intel_syntax);
3737 scratchbuf[0] = '\0';
3738 }
3739
3740 static void
3741 OP_I64 (int bytemode, int sizeflag)
3742 {
3743 bfd_signed_vma op;
3744 bfd_signed_vma mask = -1;
3745
3746 if (!mode_64bit)
3747 {
3748 OP_I (bytemode, sizeflag);
3749 return;
3750 }
3751
3752 switch (bytemode)
3753 {
3754 case b_mode:
3755 FETCH_DATA (the_info, codep + 1);
3756 op = *codep++;
3757 mask = 0xff;
3758 break;
3759 case v_mode:
3760 USED_REX (REX_MODE64);
3761 if (rex & REX_MODE64)
3762 op = get64 ();
3763 else if (sizeflag & DFLAG)
3764 {
3765 op = get32 ();
3766 mask = 0xffffffff;
3767 }
3768 else
3769 {
3770 op = get16 ();
3771 mask = 0xfffff;
3772 }
3773 used_prefixes |= (prefixes & PREFIX_DATA);
3774 break;
3775 case w_mode:
3776 mask = 0xfffff;
3777 op = get16 ();
3778 break;
3779 default:
3780 oappend (INTERNAL_DISASSEMBLER_ERROR);
3781 return;
3782 }
3783
3784 op &= mask;
3785 scratchbuf[0] = '$';
3786 print_operand_value (scratchbuf + 1, 1, op);
3787 oappend (scratchbuf + intel_syntax);
3788 scratchbuf[0] = '\0';
3789 }
3790
3791 static void
3792 OP_sI (int bytemode, int sizeflag)
3793 {
3794 bfd_signed_vma op;
3795 bfd_signed_vma mask = -1;
3796
3797 switch (bytemode)
3798 {
3799 case b_mode:
3800 FETCH_DATA (the_info, codep + 1);
3801 op = *codep++;
3802 if ((op & 0x80) != 0)
3803 op -= 0x100;
3804 mask = 0xffffffff;
3805 break;
3806 case v_mode:
3807 USED_REX (REX_MODE64);
3808 if (rex & REX_MODE64)
3809 op = get32s ();
3810 else if (sizeflag & DFLAG)
3811 {
3812 op = get32s ();
3813 mask = 0xffffffff;
3814 }
3815 else
3816 {
3817 mask = 0xffffffff;
3818 op = get16 ();
3819 if ((op & 0x8000) != 0)
3820 op -= 0x10000;
3821 }
3822 used_prefixes |= (prefixes & PREFIX_DATA);
3823 break;
3824 case w_mode:
3825 op = get16 ();
3826 mask = 0xffffffff;
3827 if ((op & 0x8000) != 0)
3828 op -= 0x10000;
3829 break;
3830 default:
3831 oappend (INTERNAL_DISASSEMBLER_ERROR);
3832 return;
3833 }
3834
3835 scratchbuf[0] = '$';
3836 print_operand_value (scratchbuf + 1, 1, op);
3837 oappend (scratchbuf + intel_syntax);
3838 }
3839
3840 static void
3841 OP_J (int bytemode, int sizeflag)
3842 {
3843 bfd_vma disp;
3844 bfd_vma mask = -1;
3845
3846 switch (bytemode)
3847 {
3848 case b_mode:
3849 FETCH_DATA (the_info, codep + 1);
3850 disp = *codep++;
3851 if ((disp & 0x80) != 0)
3852 disp -= 0x100;
3853 break;
3854 case v_mode:
3855 if (sizeflag & DFLAG)
3856 disp = get32s ();
3857 else
3858 {
3859 disp = get16 ();
3860 /* For some reason, a data16 prefix on a jump instruction
3861 means that the pc is masked to 16 bits after the
3862 displacement is added! */
3863 mask = 0xffff;
3864 }
3865 break;
3866 default:
3867 oappend (INTERNAL_DISASSEMBLER_ERROR);
3868 return;
3869 }
3870 disp = (start_pc + codep - start_codep + disp) & mask;
3871 set_op (disp, 0);
3872 print_operand_value (scratchbuf, 1, disp);
3873 oappend (scratchbuf);
3874 }
3875
3876 static void
3877 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3878 {
3879 oappend (names_seg[reg]);
3880 }
3881
3882 static void
3883 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
3884 {
3885 int seg, offset;
3886
3887 if (sizeflag & DFLAG)
3888 {
3889 offset = get32 ();
3890 seg = get16 ();
3891 }
3892 else
3893 {
3894 offset = get16 ();
3895 seg = get16 ();
3896 }
3897 used_prefixes |= (prefixes & PREFIX_DATA);
3898 if (intel_syntax)
3899 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
3900 else
3901 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3902 oappend (scratchbuf);
3903 }
3904
3905 static void
3906 OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag)
3907 {
3908 bfd_vma off;
3909
3910 append_seg ();
3911
3912 if ((sizeflag & AFLAG) || mode_64bit)
3913 off = get32 ();
3914 else
3915 off = get16 ();
3916
3917 if (intel_syntax)
3918 {
3919 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3920 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3921 {
3922 oappend (names_seg[ds_reg - es_reg]);
3923 oappend (":");
3924 }
3925 }
3926 print_operand_value (scratchbuf, 1, off);
3927 oappend (scratchbuf);
3928 }
3929
3930 static void
3931 OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3932 {
3933 bfd_vma off;
3934
3935 if (!mode_64bit)
3936 {
3937 OP_OFF (bytemode, sizeflag);
3938 return;
3939 }
3940
3941 append_seg ();
3942
3943 off = get64 ();
3944
3945 if (intel_syntax)
3946 {
3947 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3948 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3949 {
3950 oappend (names_seg[ds_reg - es_reg]);
3951 oappend (":");
3952 }
3953 }
3954 print_operand_value (scratchbuf, 1, off);
3955 oappend (scratchbuf);
3956 }
3957
3958 static void
3959 ptr_reg (int code, int sizeflag)
3960 {
3961 const char *s;
3962
3963 *obufp++ = open_char;
3964 used_prefixes |= (prefixes & PREFIX_ADDR);
3965 if (mode_64bit)
3966 {
3967 if (!(sizeflag & AFLAG))
3968 s = names32[code - eAX_reg];
3969 else
3970 s = names64[code - eAX_reg];
3971 }
3972 else if (sizeflag & AFLAG)
3973 s = names32[code - eAX_reg];
3974 else
3975 s = names16[code - eAX_reg];
3976 oappend (s);
3977 *obufp++ = close_char;
3978 *obufp = 0;
3979 }
3980
3981 static void
3982 OP_ESreg (int code, int sizeflag)
3983 {
3984 if (intel_syntax)
3985 {
3986 if (codep[-1] & 1)
3987 {
3988 USED_REX (REX_MODE64);
3989 used_prefixes |= (prefixes & PREFIX_DATA);
3990 if (rex & REX_MODE64)
3991 oappend ("QWORD PTR ");
3992 else if ((sizeflag & DFLAG))
3993 oappend ("DWORD PTR ");
3994 else
3995 oappend ("WORD PTR ");
3996 }
3997 else
3998 oappend ("BYTE PTR ");
3999 }
4000
4001 oappend ("%es:" + intel_syntax);
4002 ptr_reg (code, sizeflag);
4003 }
4004
4005 static void
4006 OP_DSreg (int code, int sizeflag)
4007 {
4008 if (intel_syntax)
4009 {
4010 if (codep[-1] != 0xd7 && (codep[-1] & 1))
4011 {
4012 USED_REX (REX_MODE64);
4013 used_prefixes |= (prefixes & PREFIX_DATA);
4014 if (rex & REX_MODE64)
4015 oappend ("QWORD PTR ");
4016 else if ((sizeflag & DFLAG))
4017 oappend ("DWORD PTR ");
4018 else
4019 oappend ("WORD PTR ");
4020 }
4021 else
4022 oappend ("BYTE PTR ");
4023 }
4024
4025 if ((prefixes
4026 & (PREFIX_CS
4027 | PREFIX_DS
4028 | PREFIX_SS
4029 | PREFIX_ES
4030 | PREFIX_FS
4031 | PREFIX_GS)) == 0)
4032 prefixes |= PREFIX_DS;
4033 append_seg ();
4034 ptr_reg (code, sizeflag);
4035 }
4036
4037 static void
4038 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4039 {
4040 int add = 0;
4041 if (rex & REX_EXTX)
4042 {
4043 USED_REX (REX_EXTX);
4044 add = 8;
4045 }
4046 else if (!mode_64bit && (prefixes & PREFIX_LOCK))
4047 {
4048 used_prefixes |= PREFIX_LOCK;
4049 add = 8;
4050 }
4051 sprintf (scratchbuf, "%%cr%d", reg + add);
4052 oappend (scratchbuf + intel_syntax);
4053 }
4054
4055 static void
4056 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4057 {
4058 int add = 0;
4059 USED_REX (REX_EXTX);
4060 if (rex & REX_EXTX)
4061 add = 8;
4062 if (intel_syntax)
4063 sprintf (scratchbuf, "db%d", reg + add);
4064 else
4065 sprintf (scratchbuf, "%%db%d", reg + add);
4066 oappend (scratchbuf);
4067 }
4068
4069 static void
4070 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4071 {
4072 sprintf (scratchbuf, "%%tr%d", reg);
4073 oappend (scratchbuf + intel_syntax);
4074 }
4075
4076 static void
4077 OP_Rd (int bytemode, int sizeflag)
4078 {
4079 if (mod == 3)
4080 OP_E (bytemode, sizeflag);
4081 else
4082 BadOp ();
4083 }
4084
4085 static void
4086 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4087 {
4088 used_prefixes |= (prefixes & PREFIX_DATA);
4089 if (prefixes & PREFIX_DATA)
4090 {
4091 int add = 0;
4092 USED_REX (REX_EXTX);
4093 if (rex & REX_EXTX)
4094 add = 8;
4095 sprintf (scratchbuf, "%%xmm%d", reg + add);
4096 }
4097 else
4098 sprintf (scratchbuf, "%%mm%d", reg);
4099 oappend (scratchbuf + intel_syntax);
4100 }
4101
4102 static void
4103 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4104 {
4105 int add = 0;
4106 USED_REX (REX_EXTX);
4107 if (rex & REX_EXTX)
4108 add = 8;
4109 sprintf (scratchbuf, "%%xmm%d", reg + add);
4110 oappend (scratchbuf + intel_syntax);
4111 }
4112
4113 static void
4114 OP_EM (int bytemode, int sizeflag)
4115 {
4116 if (mod != 3)
4117 {
4118 if (intel_syntax && bytemode == v_mode)
4119 {
4120 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4121 used_prefixes |= (prefixes & PREFIX_DATA);
4122 }
4123 OP_E (bytemode, sizeflag);
4124 return;
4125 }
4126
4127 /* Skip mod/rm byte. */
4128 MODRM_CHECK;
4129 codep++;
4130 used_prefixes |= (prefixes & PREFIX_DATA);
4131 if (prefixes & PREFIX_DATA)
4132 {
4133 int add = 0;
4134
4135 USED_REX (REX_EXTZ);
4136 if (rex & REX_EXTZ)
4137 add = 8;
4138 sprintf (scratchbuf, "%%xmm%d", rm + add);
4139 }
4140 else
4141 sprintf (scratchbuf, "%%mm%d", rm);
4142 oappend (scratchbuf + intel_syntax);
4143 }
4144
4145 static void
4146 OP_EX (int bytemode, int sizeflag)
4147 {
4148 int add = 0;
4149 if (mod != 3)
4150 {
4151 if (intel_syntax && bytemode == v_mode)
4152 {
4153 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4154 {
4155 case 0: bytemode = x_mode; break;
4156 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4157 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4158 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4159 default: bytemode = 0; break;
4160 }
4161 }
4162 OP_E (bytemode, sizeflag);
4163 return;
4164 }
4165 USED_REX (REX_EXTZ);
4166 if (rex & REX_EXTZ)
4167 add = 8;
4168
4169 /* Skip mod/rm byte. */
4170 MODRM_CHECK;
4171 codep++;
4172 sprintf (scratchbuf, "%%xmm%d", rm + add);
4173 oappend (scratchbuf + intel_syntax);
4174 }
4175
4176 static void
4177 OP_MS (int bytemode, int sizeflag)
4178 {
4179 if (mod == 3)
4180 OP_EM (bytemode, sizeflag);
4181 else
4182 BadOp ();
4183 }
4184
4185 static void
4186 OP_XS (int bytemode, int sizeflag)
4187 {
4188 if (mod == 3)
4189 OP_EX (bytemode, sizeflag);
4190 else
4191 BadOp ();
4192 }
4193
4194 static void
4195 OP_M (int bytemode, int sizeflag)
4196 {
4197 if (mod == 3)
4198 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4199 else
4200 OP_E (bytemode, sizeflag);
4201 }
4202
4203 static void
4204 OP_0f07 (int bytemode, int sizeflag)
4205 {
4206 if (mod != 3 || rm != 0)
4207 BadOp ();
4208 else
4209 OP_E (bytemode, sizeflag);
4210 }
4211
4212 static void
4213 OP_0fae (int bytemode, int sizeflag)
4214 {
4215 if (mod == 3)
4216 {
4217 if (reg == 7)
4218 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4219
4220 if (reg < 5 || rm != 0)
4221 {
4222 BadOp (); /* bad sfence, mfence, or lfence */
4223 return;
4224 }
4225 }
4226 else if (reg != 7)
4227 {
4228 BadOp (); /* bad clflush */
4229 return;
4230 }
4231
4232 OP_E (bytemode, sizeflag);
4233 }
4234
4235 static void
4236 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4237 {
4238 /* NOP with REPZ prefix is called PAUSE. */
4239 if (prefixes == PREFIX_REPZ)
4240 strcpy (obuf, "pause");
4241 }
4242
4243 static const char *const Suffix3DNow[] = {
4244 /* 00 */ NULL, NULL, NULL, NULL,
4245 /* 04 */ NULL, NULL, NULL, NULL,
4246 /* 08 */ NULL, NULL, NULL, NULL,
4247 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
4248 /* 10 */ NULL, NULL, NULL, NULL,
4249 /* 14 */ NULL, NULL, NULL, NULL,
4250 /* 18 */ NULL, NULL, NULL, NULL,
4251 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
4252 /* 20 */ NULL, NULL, NULL, NULL,
4253 /* 24 */ NULL, NULL, NULL, NULL,
4254 /* 28 */ NULL, NULL, NULL, NULL,
4255 /* 2C */ NULL, NULL, NULL, NULL,
4256 /* 30 */ NULL, NULL, NULL, NULL,
4257 /* 34 */ NULL, NULL, NULL, NULL,
4258 /* 38 */ NULL, NULL, NULL, NULL,
4259 /* 3C */ NULL, NULL, NULL, NULL,
4260 /* 40 */ NULL, NULL, NULL, NULL,
4261 /* 44 */ NULL, NULL, NULL, NULL,
4262 /* 48 */ NULL, NULL, NULL, NULL,
4263 /* 4C */ NULL, NULL, NULL, NULL,
4264 /* 50 */ NULL, NULL, NULL, NULL,
4265 /* 54 */ NULL, NULL, NULL, NULL,
4266 /* 58 */ NULL, NULL, NULL, NULL,
4267 /* 5C */ NULL, NULL, NULL, NULL,
4268 /* 60 */ NULL, NULL, NULL, NULL,
4269 /* 64 */ NULL, NULL, NULL, NULL,
4270 /* 68 */ NULL, NULL, NULL, NULL,
4271 /* 6C */ NULL, NULL, NULL, NULL,
4272 /* 70 */ NULL, NULL, NULL, NULL,
4273 /* 74 */ NULL, NULL, NULL, NULL,
4274 /* 78 */ NULL, NULL, NULL, NULL,
4275 /* 7C */ NULL, NULL, NULL, NULL,
4276 /* 80 */ NULL, NULL, NULL, NULL,
4277 /* 84 */ NULL, NULL, NULL, NULL,
4278 /* 88 */ NULL, NULL, "pfnacc", NULL,
4279 /* 8C */ NULL, NULL, "pfpnacc", NULL,
4280 /* 90 */ "pfcmpge", NULL, NULL, NULL,
4281 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4282 /* 98 */ NULL, NULL, "pfsub", NULL,
4283 /* 9C */ NULL, NULL, "pfadd", NULL,
4284 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
4285 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4286 /* A8 */ NULL, NULL, "pfsubr", NULL,
4287 /* AC */ NULL, NULL, "pfacc", NULL,
4288 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4289 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
4290 /* B8 */ NULL, NULL, NULL, "pswapd",
4291 /* BC */ NULL, NULL, NULL, "pavgusb",
4292 /* C0 */ NULL, NULL, NULL, NULL,
4293 /* C4 */ NULL, NULL, NULL, NULL,
4294 /* C8 */ NULL, NULL, NULL, NULL,
4295 /* CC */ NULL, NULL, NULL, NULL,
4296 /* D0 */ NULL, NULL, NULL, NULL,
4297 /* D4 */ NULL, NULL, NULL, NULL,
4298 /* D8 */ NULL, NULL, NULL, NULL,
4299 /* DC */ NULL, NULL, NULL, NULL,
4300 /* E0 */ NULL, NULL, NULL, NULL,
4301 /* E4 */ NULL, NULL, NULL, NULL,
4302 /* E8 */ NULL, NULL, NULL, NULL,
4303 /* EC */ NULL, NULL, NULL, NULL,
4304 /* F0 */ NULL, NULL, NULL, NULL,
4305 /* F4 */ NULL, NULL, NULL, NULL,
4306 /* F8 */ NULL, NULL, NULL, NULL,
4307 /* FC */ NULL, NULL, NULL, NULL,
4308 };
4309
4310 static void
4311 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4312 {
4313 const char *mnemonic;
4314
4315 FETCH_DATA (the_info, codep + 1);
4316 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4317 place where an 8-bit immediate would normally go. ie. the last
4318 byte of the instruction. */
4319 obufp = obuf + strlen (obuf);
4320 mnemonic = Suffix3DNow[*codep++ & 0xff];
4321 if (mnemonic)
4322 oappend (mnemonic);
4323 else
4324 {
4325 /* Since a variable sized modrm/sib chunk is between the start
4326 of the opcode (0x0f0f) and the opcode suffix, we need to do
4327 all the modrm processing first, and don't know until now that
4328 we have a bad opcode. This necessitates some cleaning up. */
4329 op1out[0] = '\0';
4330 op2out[0] = '\0';
4331 BadOp ();
4332 }
4333 }
4334
4335 static const char *simd_cmp_op[] = {
4336 "eq",
4337 "lt",
4338 "le",
4339 "unord",
4340 "neq",
4341 "nlt",
4342 "nle",
4343 "ord"
4344 };
4345
4346 static void
4347 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4348 {
4349 unsigned int cmp_type;
4350
4351 FETCH_DATA (the_info, codep + 1);
4352 obufp = obuf + strlen (obuf);
4353 cmp_type = *codep++ & 0xff;
4354 if (cmp_type < 8)
4355 {
4356 char suffix1 = 'p', suffix2 = 's';
4357 used_prefixes |= (prefixes & PREFIX_REPZ);
4358 if (prefixes & PREFIX_REPZ)
4359 suffix1 = 's';
4360 else
4361 {
4362 used_prefixes |= (prefixes & PREFIX_DATA);
4363 if (prefixes & PREFIX_DATA)
4364 suffix2 = 'd';
4365 else
4366 {
4367 used_prefixes |= (prefixes & PREFIX_REPNZ);
4368 if (prefixes & PREFIX_REPNZ)
4369 suffix1 = 's', suffix2 = 'd';
4370 }
4371 }
4372 sprintf (scratchbuf, "cmp%s%c%c",
4373 simd_cmp_op[cmp_type], suffix1, suffix2);
4374 used_prefixes |= (prefixes & PREFIX_REPZ);
4375 oappend (scratchbuf);
4376 }
4377 else
4378 {
4379 /* We have a bad extension byte. Clean up. */
4380 op1out[0] = '\0';
4381 op2out[0] = '\0';
4382 BadOp ();
4383 }
4384 }
4385
4386 static void
4387 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4388 {
4389 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4390 forms of these instructions. */
4391 if (mod == 3)
4392 {
4393 char *p = obuf + strlen (obuf);
4394 *(p + 1) = '\0';
4395 *p = *(p - 1);
4396 *(p - 1) = *(p - 2);
4397 *(p - 2) = *(p - 3);
4398 *(p - 3) = extrachar;
4399 }
4400 }
4401
4402 static void
4403 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4404 {
4405 if (mod == 3 && reg == 1 && rm <= 1)
4406 {
4407 /* Override "sidt". */
4408 char *p = obuf + strlen (obuf) - 4;
4409
4410 /* We might have a suffix. */
4411 if (*p == 'i')
4412 --p;
4413
4414 if (rm)
4415 {
4416 /* mwait %eax,%ecx */
4417 strcpy (p, "mwait");
4418 if (!intel_syntax)
4419 strcpy (op1out, names32[0]);
4420 }
4421 else
4422 {
4423 /* monitor %eax,%ecx,%edx" */
4424 strcpy (p, "monitor");
4425 if (!intel_syntax)
4426 {
4427 if (!mode_64bit)
4428 strcpy (op1out, names32[0]);
4429 else if (!(prefixes & PREFIX_ADDR))
4430 strcpy (op1out, names64[0]);
4431 else
4432 {
4433 strcpy (op1out, names32[0]);
4434 used_prefixes |= PREFIX_ADDR;
4435 }
4436 strcpy (op3out, names32[2]);
4437 }
4438 }
4439 if (!intel_syntax)
4440 {
4441 strcpy (op2out, names32[1]);
4442 two_source_ops = 1;
4443 }
4444
4445 codep++;
4446 }
4447 else
4448 OP_E (0, sizeflag);
4449 }
4450
4451 static void
4452 INVLPG_Fixup (int bytemode, int sizeflag)
4453 {
4454 const char *alt;
4455
4456 switch (*codep)
4457 {
4458 case 0xf8:
4459 alt = "swapgs";
4460 break;
4461 case 0xf9:
4462 alt = "rdtscp";
4463 break;
4464 default:
4465 OP_E (bytemode, sizeflag);
4466 return;
4467 }
4468 /* Override "invlpg". */
4469 strcpy (obuf + strlen (obuf) - 6, alt);
4470 codep++;
4471 }
4472
4473 static void
4474 BadOp (void)
4475 {
4476 /* Throw away prefixes and 1st. opcode byte. */
4477 codep = insn_codep + 1;
4478 oappend ("(bad)");
4479 }
4480
4481 static void
4482 SEG_Fixup (int extrachar, int sizeflag)
4483 {
4484 if (mod == 3)
4485 {
4486 /* We need to add a proper suffix with
4487
4488 movw %ds,%ax
4489 movl %ds,%eax
4490 movq %ds,%rax
4491 movw %ax,%ds
4492 movl %eax,%ds
4493 movq %rax,%ds
4494 */
4495 const char *suffix;
4496
4497 if (prefixes & PREFIX_DATA)
4498 suffix = "w";
4499 else
4500 {
4501 USED_REX (REX_MODE64);
4502 if (rex & REX_MODE64)
4503 suffix = "q";
4504 else
4505 suffix = "l";
4506 }
4507 strcat (obuf, suffix);
4508 }
4509 else
4510 {
4511 /* We need to fix the suffix for
4512
4513 movw %ds,(%eax)
4514 movw %ds,(%rax)
4515 movw (%eax),%ds
4516 movw (%rax),%ds
4517
4518 Override "mov[l|q]". */
4519 char *p = obuf + strlen (obuf) - 1;
4520
4521 /* We might not have a suffix. */
4522 if (*p == 'v')
4523 ++p;
4524 *p = 'w';
4525 }
4526
4527 OP_E (extrachar, sizeflag);
4528 }