1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
42 #ifndef UNIXWARE_COMPAT
43 /* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45 #define UNIXWARE_COMPAT 1
48 static int fetch_data (struct disassemble_info
*, bfd_byte
*);
49 static void ckprefix (void);
50 static const char *prefix_name (int, int);
51 static int print_insn (bfd_vma
, disassemble_info
*);
52 static void dofloat (int);
53 static void OP_ST (int, int);
54 static void OP_STi (int, int);
55 static int putop (const char *, int);
56 static void oappend (const char *);
57 static void append_seg (void);
58 static void OP_indirE (int, int);
59 static void print_operand_value (char *, int, bfd_vma
);
60 static void OP_E (int, int);
61 static void OP_G (int, int);
62 static bfd_vma
get64 (void);
63 static bfd_signed_vma
get32 (void);
64 static bfd_signed_vma
get32s (void);
65 static int get16 (void);
66 static void set_op (bfd_vma
, int);
67 static void OP_REG (int, int);
68 static void OP_IMREG (int, int);
69 static void OP_I (int, int);
70 static void OP_I64 (int, int);
71 static void OP_sI (int, int);
72 static void OP_J (int, int);
73 static void OP_SEG (int, int);
74 static void OP_DIR (int, int);
75 static void OP_OFF (int, int);
76 static void OP_OFF64 (int, int);
77 static void ptr_reg (int, int);
78 static void OP_ESreg (int, int);
79 static void OP_DSreg (int, int);
80 static void OP_C (int, int);
81 static void OP_D (int, int);
82 static void OP_T (int, int);
83 static void OP_Rd (int, int);
84 static void OP_MMX (int, int);
85 static void OP_XMM (int, int);
86 static void OP_EM (int, int);
87 static void OP_EX (int, int);
88 static void OP_EMC (int,int);
89 static void OP_MXC (int,int);
90 static void OP_MS (int, int);
91 static void OP_XS (int, int);
92 static void OP_M (int, int);
93 static void OP_VMX (int, int);
94 static void OP_0fae (int, int);
95 static void OP_0f07 (int, int);
96 static void NOP_Fixup1 (int, int);
97 static void NOP_Fixup2 (int, int);
98 static void OP_3DNowSuffix (int, int);
99 static void OP_SIMD_Suffix (int, int);
100 static void SIMD_Fixup (int, int);
101 static void PNI_Fixup (int, int);
102 static void SVME_Fixup (int, int);
103 static void INVLPG_Fixup (int, int);
104 static void BadOp (void);
105 static void SEG_Fixup (int, int);
106 static void VMX_Fixup (int, int);
107 static void REP_Fixup (int, int);
110 /* Points to first byte not fetched. */
111 bfd_byte
*max_fetched
;
112 bfd_byte the_buffer
[MAXLEN
];
118 /* The opcode for the fwait instruction, which we treat as a prefix
120 #define FWAIT_OPCODE (0x9b)
129 enum address_mode address_mode
;
131 /* Flags for the prefixes for the current instruction. See below. */
134 /* REX prefix the current instruction. See below. */
136 /* Bits of REX we've already used. */
142 /* Mark parts used in the REX prefix. When we are testing for
143 empty prefix (for 8bit register REX extension), just mask it
144 out. Otherwise test for REX bit is excuse for existence of REX
145 only in case value is nonzero. */
146 #define USED_REX(value) \
149 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
154 /* Flags for prefixes which we somehow handled when printing the
155 current instruction. */
156 static int used_prefixes
;
158 /* Flags stored in PREFIXES. */
159 #define PREFIX_REPZ 1
160 #define PREFIX_REPNZ 2
161 #define PREFIX_LOCK 4
163 #define PREFIX_SS 0x10
164 #define PREFIX_DS 0x20
165 #define PREFIX_ES 0x40
166 #define PREFIX_FS 0x80
167 #define PREFIX_GS 0x100
168 #define PREFIX_DATA 0x200
169 #define PREFIX_ADDR 0x400
170 #define PREFIX_FWAIT 0x800
172 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
173 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
175 #define FETCH_DATA(info, addr) \
176 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
177 ? 1 : fetch_data ((info), (addr)))
180 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
183 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
184 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
186 if (addr
<= priv
->the_buffer
+ MAXLEN
)
187 status
= (*info
->read_memory_func
) (start
,
189 addr
- priv
->max_fetched
,
195 /* If we did manage to read at least one byte, then
196 print_insn_i386 will do something sensible. Otherwise, print
197 an error. We do that here because this is where we know
199 if (priv
->max_fetched
== priv
->the_buffer
)
200 (*info
->memory_error_func
) (status
, start
, info
);
201 longjmp (priv
->bailout
, 1);
204 priv
->max_fetched
= addr
;
210 #define Eb OP_E, b_mode
211 #define Ev OP_E, v_mode
212 #define Ed OP_E, d_mode
213 #define Eq OP_E, q_mode
214 #define Edq OP_E, dq_mode
215 #define Edqw OP_E, dqw_mode
216 #define indirEv OP_indirE, stack_v_mode
217 #define indirEp OP_indirE, f_mode
218 #define stackEv OP_E, stack_v_mode
219 #define Em OP_E, m_mode
220 #define Ew OP_E, w_mode
221 #define Ma OP_E, v_mode
222 #define M OP_M, 0 /* lea, lgdt, etc. */
223 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
224 #define Gb OP_G, b_mode
225 #define Gv OP_G, v_mode
226 #define Gd OP_G, d_mode
227 #define Gdq OP_G, dq_mode
228 #define Gm OP_G, m_mode
229 #define Gw OP_G, w_mode
230 #define Rd OP_Rd, d_mode
231 #define Rm OP_Rd, m_mode
232 #define Ib OP_I, b_mode
233 #define sIb OP_sI, b_mode /* sign extened byte */
234 #define Iv OP_I, v_mode
235 #define Iq OP_I, q_mode
236 #define Iv64 OP_I64, v_mode
237 #define Iw OP_I, w_mode
238 #define I1 OP_I, const_1_mode
239 #define Jb OP_J, b_mode
240 #define Jv OP_J, v_mode
241 #define Cm OP_C, m_mode
242 #define Dm OP_D, m_mode
243 #define Td OP_T, d_mode
244 #define Sv SEG_Fixup, v_mode
246 #define RMeAX OP_REG, eAX_reg
247 #define RMeBX OP_REG, eBX_reg
248 #define RMeCX OP_REG, eCX_reg
249 #define RMeDX OP_REG, eDX_reg
250 #define RMeSP OP_REG, eSP_reg
251 #define RMeBP OP_REG, eBP_reg
252 #define RMeSI OP_REG, eSI_reg
253 #define RMeDI OP_REG, eDI_reg
254 #define RMrAX OP_REG, rAX_reg
255 #define RMrBX OP_REG, rBX_reg
256 #define RMrCX OP_REG, rCX_reg
257 #define RMrDX OP_REG, rDX_reg
258 #define RMrSP OP_REG, rSP_reg
259 #define RMrBP OP_REG, rBP_reg
260 #define RMrSI OP_REG, rSI_reg
261 #define RMrDI OP_REG, rDI_reg
262 #define RMAL OP_REG, al_reg
263 #define RMAL OP_REG, al_reg
264 #define RMCL OP_REG, cl_reg
265 #define RMDL OP_REG, dl_reg
266 #define RMBL OP_REG, bl_reg
267 #define RMAH OP_REG, ah_reg
268 #define RMCH OP_REG, ch_reg
269 #define RMDH OP_REG, dh_reg
270 #define RMBH OP_REG, bh_reg
271 #define RMAX OP_REG, ax_reg
272 #define RMDX OP_REG, dx_reg
274 #define eAX OP_IMREG, eAX_reg
275 #define eBX OP_IMREG, eBX_reg
276 #define eCX OP_IMREG, eCX_reg
277 #define eDX OP_IMREG, eDX_reg
278 #define eSP OP_IMREG, eSP_reg
279 #define eBP OP_IMREG, eBP_reg
280 #define eSI OP_IMREG, eSI_reg
281 #define eDI OP_IMREG, eDI_reg
282 #define AL OP_IMREG, al_reg
283 #define CL OP_IMREG, cl_reg
284 #define DL OP_IMREG, dl_reg
285 #define BL OP_IMREG, bl_reg
286 #define AH OP_IMREG, ah_reg
287 #define CH OP_IMREG, ch_reg
288 #define DH OP_IMREG, dh_reg
289 #define BH OP_IMREG, bh_reg
290 #define AX OP_IMREG, ax_reg
291 #define DX OP_IMREG, dx_reg
292 #define indirDX OP_IMREG, indir_dx_reg
294 #define Sw OP_SEG, w_mode
296 #define Ob OP_OFF64, b_mode
297 #define Ov OP_OFF64, v_mode
298 #define Xb OP_DSreg, eSI_reg
299 #define Xv OP_DSreg, eSI_reg
300 #define Yb OP_ESreg, eDI_reg
301 #define Yv OP_ESreg, eDI_reg
302 #define DSBX OP_DSreg, eBX_reg
304 #define es OP_REG, es_reg
305 #define ss OP_REG, ss_reg
306 #define cs OP_REG, cs_reg
307 #define ds OP_REG, ds_reg
308 #define fs OP_REG, fs_reg
309 #define gs OP_REG, gs_reg
313 #define EM OP_EM, v_mode
314 #define EX OP_EX, v_mode
315 #define MS OP_MS, v_mode
316 #define XS OP_XS, v_mode
317 #define EMC OP_EMC, v_mode
318 #define MXC OP_MXC, 0
319 #define VM OP_VMX, q_mode
320 #define OPSUF OP_3DNowSuffix, 0
321 #define OPSIMD OP_SIMD_Suffix, 0
323 /* Used handle "rep" prefix for string instructions. */
324 #define Xbr REP_Fixup, eSI_reg
325 #define Xvr REP_Fixup, eSI_reg
326 #define Ybr REP_Fixup, eDI_reg
327 #define Yvr REP_Fixup, eDI_reg
328 #define indirDXr REP_Fixup, indir_dx_reg
329 #define ALr REP_Fixup, al_reg
330 #define eAXr REP_Fixup, eAX_reg
332 #define cond_jump_flag NULL, cond_jump_mode
333 #define loop_jcxz_flag NULL, loop_jcxz_mode
335 /* bits in sizeflag */
336 #define SUFFIX_ALWAYS 4
340 #define b_mode 1 /* byte operand */
341 #define v_mode 2 /* operand size depends on prefixes */
342 #define w_mode 3 /* word operand */
343 #define d_mode 4 /* double word operand */
344 #define q_mode 5 /* quad word operand */
345 #define t_mode 6 /* ten-byte operand */
346 #define x_mode 7 /* 16-byte XMM operand */
347 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
348 #define cond_jump_mode 9
349 #define loop_jcxz_mode 10
350 #define dq_mode 11 /* operand size depends on REX prefixes. */
351 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
352 #define f_mode 13 /* 4- or 6-byte pointer operand */
353 #define const_1_mode 14
354 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
399 #define indir_dx_reg 150
403 #define USE_PREFIX_USER_TABLE 3
404 #define X86_64_SPECIAL 4
405 #define IS_3BYTE_OPCODE 5
407 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0, NULL, 0
409 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0, NULL, 0
410 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0, NULL, 0
411 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0, NULL, 0
412 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0, NULL, 0
413 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0, NULL, 0
414 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0, NULL, 0
415 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0, NULL, 0
416 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0, NULL, 0
417 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0, NULL, 0
418 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0, NULL, 0
419 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0, NULL, 0
420 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0, NULL, 0
421 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0, NULL, 0
422 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0, NULL, 0
423 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0, NULL, 0
424 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0, NULL, 0
425 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0, NULL, 0
426 #define GRP11_C6 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0, NULL, 0
427 #define GRP11_C7 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0, NULL, 0
428 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0, NULL, 0
429 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0, NULL, 0
430 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0, NULL, 0
431 #define GRP15 NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0, NULL, 0
432 #define GRP16 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0, NULL, 0
433 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0, NULL, 0
434 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 25, NULL, 0, NULL, 0
435 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 26, NULL, 0, NULL, 0
437 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0, NULL, 0
438 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0, NULL, 0
439 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0, NULL, 0
440 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0, NULL, 0
441 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0, NULL, 0
442 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0, NULL, 0
443 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0, NULL, 0
444 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0, NULL, 0
445 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0, NULL, 0
446 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0, NULL, 0
447 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0, NULL, 0
448 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0, NULL, 0
449 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0, NULL, 0
450 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0, NULL, 0
451 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0, NULL, 0
452 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0, NULL, 0
453 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0, NULL, 0
454 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0, NULL, 0
455 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0, NULL, 0
456 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0, NULL, 0
457 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0, NULL, 0
458 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0, NULL, 0
459 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0, NULL, 0
460 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0, NULL, 0
461 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0, NULL, 0
462 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0, NULL, 0
463 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0, NULL, 0
464 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0, NULL, 0
465 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0, NULL, 0
466 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0, NULL, 0
467 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0, NULL, 0
468 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0, NULL, 0
469 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0, NULL, 0
470 #define PREGRP33 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 33, NULL, 0, NULL, 0
471 #define PREGRP34 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 34, NULL, 0, NULL, 0
472 #define PREGRP35 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 35, NULL, 0, NULL, 0
473 #define PREGRP36 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 36, NULL, 0, NULL, 0
475 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0, NULL, 0
477 #define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0, NULL, 0
478 #define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0, NULL, 0
480 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
494 /* Upper case letters in the instruction names here are macros.
495 'A' => print 'b' if no register operands or suffix_always is true
496 'B' => print 'b' if suffix_always is true
497 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
499 'E' => print 'e' if 32-bit form of jcxz
500 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
501 'H' => print ",pt" or ",pn" branch hint
502 'I' => honor following macro letter even in Intel mode (implemented only
503 . for some of the macro letters)
505 'L' => print 'l' if suffix_always is true
506 'N' => print 'n' if instruction has no wait "prefix"
507 'O' => print 'd', or 'o'
508 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
509 . or suffix_always is true. print 'q' if rex prefix is present.
510 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
512 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
513 'S' => print 'w', 'l' or 'q' if suffix_always is true
514 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
515 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
516 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
517 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
518 'X' => print 's', 'd' depending on data16 prefix (for XMM)
519 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
520 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
522 Many of the above letters print nothing in Intel mode. See "putop"
525 Braces '{' and '}', and vertical bars '|', indicate alternative
526 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
527 modes. In cases where there are only two alternatives, the X86_64
528 instruction is reserved, and "(bad)" is printed.
531 static const struct dis386 dis386
[] = {
533 { "addB", Eb
, Gb
, XX
, XX
},
534 { "addS", Ev
, Gv
, XX
, XX
},
535 { "addB", Gb
, Eb
, XX
, XX
},
536 { "addS", Gv
, Ev
, XX
, XX
},
537 { "addB", AL
, Ib
, XX
, XX
},
538 { "addS", eAX
, Iv
, XX
, XX
},
539 { "push{T|}", es
, XX
, XX
, XX
},
540 { "pop{T|}", es
, XX
, XX
, XX
},
542 { "orB", Eb
, Gb
, XX
, XX
},
543 { "orS", Ev
, Gv
, XX
, XX
},
544 { "orB", Gb
, Eb
, XX
, XX
},
545 { "orS", Gv
, Ev
, XX
, XX
},
546 { "orB", AL
, Ib
, XX
, XX
},
547 { "orS", eAX
, Iv
, XX
, XX
},
548 { "push{T|}", cs
, XX
, XX
, XX
},
549 { "(bad)", XX
, XX
, XX
, XX
}, /* 0x0f extended opcode escape */
551 { "adcB", Eb
, Gb
, XX
, XX
},
552 { "adcS", Ev
, Gv
, XX
, XX
},
553 { "adcB", Gb
, Eb
, XX
, XX
},
554 { "adcS", Gv
, Ev
, XX
, XX
},
555 { "adcB", AL
, Ib
, XX
, XX
},
556 { "adcS", eAX
, Iv
, XX
, XX
},
557 { "push{T|}", ss
, XX
, XX
, XX
},
558 { "pop{T|}", ss
, XX
, XX
, XX
},
560 { "sbbB", Eb
, Gb
, XX
, XX
},
561 { "sbbS", Ev
, Gv
, XX
, XX
},
562 { "sbbB", Gb
, Eb
, XX
, XX
},
563 { "sbbS", Gv
, Ev
, XX
, XX
},
564 { "sbbB", AL
, Ib
, XX
, XX
},
565 { "sbbS", eAX
, Iv
, XX
, XX
},
566 { "push{T|}", ds
, XX
, XX
, XX
},
567 { "pop{T|}", ds
, XX
, XX
, XX
},
569 { "andB", Eb
, Gb
, XX
, XX
},
570 { "andS", Ev
, Gv
, XX
, XX
},
571 { "andB", Gb
, Eb
, XX
, XX
},
572 { "andS", Gv
, Ev
, XX
, XX
},
573 { "andB", AL
, Ib
, XX
, XX
},
574 { "andS", eAX
, Iv
, XX
, XX
},
575 { "(bad)", XX
, XX
, XX
, XX
}, /* SEG ES prefix */
576 { "daa{|}", XX
, XX
, XX
, XX
},
578 { "subB", Eb
, Gb
, XX
, XX
},
579 { "subS", Ev
, Gv
, XX
, XX
},
580 { "subB", Gb
, Eb
, XX
, XX
},
581 { "subS", Gv
, Ev
, XX
, XX
},
582 { "subB", AL
, Ib
, XX
, XX
},
583 { "subS", eAX
, Iv
, XX
, XX
},
584 { "(bad)", XX
, XX
, XX
, XX
}, /* SEG CS prefix */
585 { "das{|}", XX
, XX
, XX
, XX
},
587 { "xorB", Eb
, Gb
, XX
, XX
},
588 { "xorS", Ev
, Gv
, XX
, XX
},
589 { "xorB", Gb
, Eb
, XX
, XX
},
590 { "xorS", Gv
, Ev
, XX
, XX
},
591 { "xorB", AL
, Ib
, XX
, XX
},
592 { "xorS", eAX
, Iv
, XX
, XX
},
593 { "(bad)", XX
, XX
, XX
, XX
}, /* SEG SS prefix */
594 { "aaa{|}", XX
, XX
, XX
, XX
},
596 { "cmpB", Eb
, Gb
, XX
, XX
},
597 { "cmpS", Ev
, Gv
, XX
, XX
},
598 { "cmpB", Gb
, Eb
, XX
, XX
},
599 { "cmpS", Gv
, Ev
, XX
, XX
},
600 { "cmpB", AL
, Ib
, XX
, XX
},
601 { "cmpS", eAX
, Iv
, XX
, XX
},
602 { "(bad)", XX
, XX
, XX
, XX
}, /* SEG DS prefix */
603 { "aas{|}", XX
, XX
, XX
, XX
},
605 { "inc{S|}", RMeAX
, XX
, XX
, XX
},
606 { "inc{S|}", RMeCX
, XX
, XX
, XX
},
607 { "inc{S|}", RMeDX
, XX
, XX
, XX
},
608 { "inc{S|}", RMeBX
, XX
, XX
, XX
},
609 { "inc{S|}", RMeSP
, XX
, XX
, XX
},
610 { "inc{S|}", RMeBP
, XX
, XX
, XX
},
611 { "inc{S|}", RMeSI
, XX
, XX
, XX
},
612 { "inc{S|}", RMeDI
, XX
, XX
, XX
},
614 { "dec{S|}", RMeAX
, XX
, XX
, XX
},
615 { "dec{S|}", RMeCX
, XX
, XX
, XX
},
616 { "dec{S|}", RMeDX
, XX
, XX
, XX
},
617 { "dec{S|}", RMeBX
, XX
, XX
, XX
},
618 { "dec{S|}", RMeSP
, XX
, XX
, XX
},
619 { "dec{S|}", RMeBP
, XX
, XX
, XX
},
620 { "dec{S|}", RMeSI
, XX
, XX
, XX
},
621 { "dec{S|}", RMeDI
, XX
, XX
, XX
},
623 { "pushV", RMrAX
, XX
, XX
, XX
},
624 { "pushV", RMrCX
, XX
, XX
, XX
},
625 { "pushV", RMrDX
, XX
, XX
, XX
},
626 { "pushV", RMrBX
, XX
, XX
, XX
},
627 { "pushV", RMrSP
, XX
, XX
, XX
},
628 { "pushV", RMrBP
, XX
, XX
, XX
},
629 { "pushV", RMrSI
, XX
, XX
, XX
},
630 { "pushV", RMrDI
, XX
, XX
, XX
},
632 { "popV", RMrAX
, XX
, XX
, XX
},
633 { "popV", RMrCX
, XX
, XX
, XX
},
634 { "popV", RMrDX
, XX
, XX
, XX
},
635 { "popV", RMrBX
, XX
, XX
, XX
},
636 { "popV", RMrSP
, XX
, XX
, XX
},
637 { "popV", RMrBP
, XX
, XX
, XX
},
638 { "popV", RMrSI
, XX
, XX
, XX
},
639 { "popV", RMrDI
, XX
, XX
, XX
},
641 { "pusha{P|}", XX
, XX
, XX
, XX
},
642 { "popa{P|}", XX
, XX
, XX
, XX
},
643 { "bound{S|}", Gv
, Ma
, XX
, XX
},
645 { "(bad)", XX
, XX
, XX
, XX
}, /* seg fs */
646 { "(bad)", XX
, XX
, XX
, XX
}, /* seg gs */
647 { "(bad)", XX
, XX
, XX
, XX
}, /* op size prefix */
648 { "(bad)", XX
, XX
, XX
, XX
}, /* adr size prefix */
650 { "pushT", Iq
, XX
, XX
, XX
},
651 { "imulS", Gv
, Ev
, Iv
, XX
},
652 { "pushT", sIb
, XX
, XX
, XX
},
653 { "imulS", Gv
, Ev
, sIb
, XX
},
654 { "ins{b||b|}", Ybr
, indirDX
, XX
, XX
},
655 { "ins{R||R|}", Yvr
, indirDX
, XX
, XX
},
656 { "outs{b||b|}", indirDXr
, Xb
, XX
, XX
},
657 { "outs{R||R|}", indirDXr
, Xv
, XX
, XX
},
659 { "joH", Jb
, XX
, cond_jump_flag
, XX
},
660 { "jnoH", Jb
, XX
, cond_jump_flag
, XX
},
661 { "jbH", Jb
, XX
, cond_jump_flag
, XX
},
662 { "jaeH", Jb
, XX
, cond_jump_flag
, XX
},
663 { "jeH", Jb
, XX
, cond_jump_flag
, XX
},
664 { "jneH", Jb
, XX
, cond_jump_flag
, XX
},
665 { "jbeH", Jb
, XX
, cond_jump_flag
, XX
},
666 { "jaH", Jb
, XX
, cond_jump_flag
, XX
},
668 { "jsH", Jb
, XX
, cond_jump_flag
, XX
},
669 { "jnsH", Jb
, XX
, cond_jump_flag
, XX
},
670 { "jpH", Jb
, XX
, cond_jump_flag
, XX
},
671 { "jnpH", Jb
, XX
, cond_jump_flag
, XX
},
672 { "jlH", Jb
, XX
, cond_jump_flag
, XX
},
673 { "jgeH", Jb
, XX
, cond_jump_flag
, XX
},
674 { "jleH", Jb
, XX
, cond_jump_flag
, XX
},
675 { "jgH", Jb
, XX
, cond_jump_flag
, XX
},
679 { "(bad)", XX
, XX
, XX
, XX
},
681 { "testB", Eb
, Gb
, XX
, XX
},
682 { "testS", Ev
, Gv
, XX
, XX
},
683 { "xchgB", Eb
, Gb
, XX
, XX
},
684 { "xchgS", Ev
, Gv
, XX
, XX
},
686 { "movB", Eb
, Gb
, XX
, XX
},
687 { "movS", Ev
, Gv
, XX
, XX
},
688 { "movB", Gb
, Eb
, XX
, XX
},
689 { "movS", Gv
, Ev
, XX
, XX
},
690 { "movQ", Sv
, Sw
, XX
, XX
},
691 { "leaS", Gv
, M
, XX
, XX
},
692 { "movQ", Sw
, Sv
, XX
, XX
},
693 { "popU", stackEv
, XX
, XX
, XX
},
695 { "xchgS", NOP_Fixup1
, eAX_reg
, NOP_Fixup2
, eAX_reg
, XX
, XX
},
696 { "xchgS", RMeCX
, eAX
, XX
, XX
},
697 { "xchgS", RMeDX
, eAX
, XX
, XX
},
698 { "xchgS", RMeBX
, eAX
, XX
, XX
},
699 { "xchgS", RMeSP
, eAX
, XX
, XX
},
700 { "xchgS", RMeBP
, eAX
, XX
, XX
},
701 { "xchgS", RMeSI
, eAX
, XX
, XX
},
702 { "xchgS", RMeDI
, eAX
, XX
, XX
},
704 { "cW{tR||tR|}", XX
, XX
, XX
, XX
},
705 { "cR{tO||tO|}", XX
, XX
, XX
, XX
},
706 { "Jcall{T|}", Ap
, XX
, XX
, XX
},
707 { "(bad)", XX
, XX
, XX
, XX
}, /* fwait */
708 { "pushfT", XX
, XX
, XX
, XX
},
709 { "popfT", XX
, XX
, XX
, XX
},
710 { "sahf{|}", XX
, XX
, XX
, XX
},
711 { "lahf{|}", XX
, XX
, XX
, XX
},
713 { "movB", AL
, Ob
, XX
, XX
},
714 { "movS", eAX
, Ov
, XX
, XX
},
715 { "movB", Ob
, AL
, XX
, XX
},
716 { "movS", Ov
, eAX
, XX
, XX
},
717 { "movs{b||b|}", Ybr
, Xb
, XX
, XX
},
718 { "movs{R||R|}", Yvr
, Xv
, XX
, XX
},
719 { "cmps{b||b|}", Xb
, Yb
, XX
, XX
},
720 { "cmps{R||R|}", Xv
, Yv
, XX
, XX
},
722 { "testB", AL
, Ib
, XX
, XX
},
723 { "testS", eAX
, Iv
, XX
, XX
},
724 { "stosB", Ybr
, AL
, XX
, XX
},
725 { "stosS", Yvr
, eAX
, XX
, XX
},
726 { "lodsB", ALr
, Xb
, XX
, XX
},
727 { "lodsS", eAXr
, Xv
, XX
, XX
},
728 { "scasB", AL
, Yb
, XX
, XX
},
729 { "scasS", eAX
, Yv
, XX
, XX
},
731 { "movB", RMAL
, Ib
, XX
, XX
},
732 { "movB", RMCL
, Ib
, XX
, XX
},
733 { "movB", RMDL
, Ib
, XX
, XX
},
734 { "movB", RMBL
, Ib
, XX
, XX
},
735 { "movB", RMAH
, Ib
, XX
, XX
},
736 { "movB", RMCH
, Ib
, XX
, XX
},
737 { "movB", RMDH
, Ib
, XX
, XX
},
738 { "movB", RMBH
, Ib
, XX
, XX
},
740 { "movS", RMeAX
, Iv64
, XX
, XX
},
741 { "movS", RMeCX
, Iv64
, XX
, XX
},
742 { "movS", RMeDX
, Iv64
, XX
, XX
},
743 { "movS", RMeBX
, Iv64
, XX
, XX
},
744 { "movS", RMeSP
, Iv64
, XX
, XX
},
745 { "movS", RMeBP
, Iv64
, XX
, XX
},
746 { "movS", RMeSI
, Iv64
, XX
, XX
},
747 { "movS", RMeDI
, Iv64
, XX
, XX
},
751 { "retT", Iw
, XX
, XX
, XX
},
752 { "retT", XX
, XX
, XX
, XX
},
753 { "les{S|}", Gv
, Mp
, XX
, XX
},
754 { "ldsS", Gv
, Mp
, XX
, XX
},
758 { "enterT", Iw
, Ib
, XX
, XX
},
759 { "leaveT", XX
, XX
, XX
, XX
},
760 { "lretP", Iw
, XX
, XX
, XX
},
761 { "lretP", XX
, XX
, XX
, XX
},
762 { "int3", XX
, XX
, XX
, XX
},
763 { "int", Ib
, XX
, XX
, XX
},
764 { "into{|}", XX
, XX
, XX
, XX
},
765 { "iretP", XX
, XX
, XX
, XX
},
771 { "aam{|}", sIb
, XX
, XX
, XX
},
772 { "aad{|}", sIb
, XX
, XX
, XX
},
773 { "(bad)", XX
, XX
, XX
, XX
},
774 { "xlat", DSBX
, XX
, XX
, XX
},
785 { "loopneFH", Jb
, XX
, loop_jcxz_flag
, XX
},
786 { "loopeFH", Jb
, XX
, loop_jcxz_flag
, XX
},
787 { "loopFH", Jb
, XX
, loop_jcxz_flag
, XX
},
788 { "jEcxzH", Jb
, XX
, loop_jcxz_flag
, XX
},
789 { "inB", AL
, Ib
, XX
, XX
},
790 { "inS", eAX
, Ib
, XX
, XX
},
791 { "outB", Ib
, AL
, XX
, XX
},
792 { "outS", Ib
, eAX
, XX
, XX
},
794 { "callT", Jv
, XX
, XX
, XX
},
795 { "jmpT", Jv
, XX
, XX
, XX
},
796 { "Jjmp{T|}", Ap
, XX
, XX
, XX
},
797 { "jmp", Jb
, XX
, XX
, XX
},
798 { "inB", AL
, indirDX
, XX
, XX
},
799 { "inS", eAX
, indirDX
, XX
, XX
},
800 { "outB", indirDX
, AL
, XX
, XX
},
801 { "outS", indirDX
, eAX
, XX
, XX
},
803 { "(bad)", XX
, XX
, XX
, XX
}, /* lock prefix */
804 { "icebp", XX
, XX
, XX
, XX
},
805 { "(bad)", XX
, XX
, XX
, XX
}, /* repne */
806 { "(bad)", XX
, XX
, XX
, XX
}, /* repz */
807 { "hlt", XX
, XX
, XX
, XX
},
808 { "cmc", XX
, XX
, XX
, XX
},
812 { "clc", XX
, XX
, XX
, XX
},
813 { "stc", XX
, XX
, XX
, XX
},
814 { "cli", XX
, XX
, XX
, XX
},
815 { "sti", XX
, XX
, XX
, XX
},
816 { "cld", XX
, XX
, XX
, XX
},
817 { "std", XX
, XX
, XX
, XX
},
822 static const struct dis386 dis386_twobyte
[] = {
826 { "larS", Gv
, Ew
, XX
, XX
},
827 { "lslS", Gv
, Ew
, XX
, XX
},
828 { "(bad)", XX
, XX
, XX
, XX
},
829 { "syscall", XX
, XX
, XX
, XX
},
830 { "clts", XX
, XX
, XX
, XX
},
831 { "sysretP", XX
, XX
, XX
, XX
},
833 { "invd", XX
, XX
, XX
, XX
},
834 { "wbinvd", XX
, XX
, XX
, XX
},
835 { "(bad)", XX
, XX
, XX
, XX
},
836 { "ud2a", XX
, XX
, XX
, XX
},
837 { "(bad)", XX
, XX
, XX
, XX
},
839 { "femms", XX
, XX
, XX
, XX
},
840 { "", MX
, EM
, OPSUF
, XX
}, /* See OP_3DNowSuffix. */
845 { "movlpX", EX
, XM
, SIMD_Fixup
, 'h', XX
},
846 { "unpcklpX", XM
, EX
, XX
, XX
},
847 { "unpckhpX", XM
, EX
, XX
, XX
},
849 { "movhpX", EX
, XM
, SIMD_Fixup
, 'l', XX
},
852 { "(bad)", XX
, XX
, XX
, XX
},
853 { "(bad)", XX
, XX
, XX
, XX
},
854 { "(bad)", XX
, XX
, XX
, XX
},
855 { "(bad)", XX
, XX
, XX
, XX
},
856 { "(bad)", XX
, XX
, XX
, XX
},
857 { "(bad)", XX
, XX
, XX
, XX
},
858 { "nopQ", Ev
, XX
, XX
, XX
},
860 { "movZ", Rm
, Cm
, XX
, XX
},
861 { "movZ", Rm
, Dm
, XX
, XX
},
862 { "movZ", Cm
, Rm
, XX
, XX
},
863 { "movZ", Dm
, Rm
, XX
, XX
},
864 { "movL", Rd
, Td
, XX
, XX
},
865 { "(bad)", XX
, XX
, XX
, XX
},
866 { "movL", Td
, Rd
, XX
, XX
},
867 { "(bad)", XX
, XX
, XX
, XX
},
869 { "movapX", XM
, EX
, XX
, XX
},
870 { "movapX", EX
, XM
, XX
, XX
},
875 { "ucomisX", XM
,EX
, XX
, XX
},
876 { "comisX", XM
,EX
, XX
, XX
},
878 { "wrmsr", XX
, XX
, XX
, XX
},
879 { "rdtsc", XX
, XX
, XX
, XX
},
880 { "rdmsr", XX
, XX
, XX
, XX
},
881 { "rdpmc", XX
, XX
, XX
, XX
},
882 { "sysenter", XX
, XX
, XX
, XX
},
883 { "sysexit", XX
, XX
, XX
, XX
},
884 { "(bad)", XX
, XX
, XX
, XX
},
885 { "(bad)", XX
, XX
, XX
, XX
},
888 { "(bad)", XX
, XX
, XX
, XX
},
890 { "(bad)", XX
, XX
, XX
, XX
},
891 { "(bad)", XX
, XX
, XX
, XX
},
892 { "(bad)", XX
, XX
, XX
, XX
},
893 { "(bad)", XX
, XX
, XX
, XX
},
894 { "(bad)", XX
, XX
, XX
, XX
},
896 { "cmovo", Gv
, Ev
, XX
, XX
},
897 { "cmovno", Gv
, Ev
, XX
, XX
},
898 { "cmovb", Gv
, Ev
, XX
, XX
},
899 { "cmovae", Gv
, Ev
, XX
, XX
},
900 { "cmove", Gv
, Ev
, XX
, XX
},
901 { "cmovne", Gv
, Ev
, XX
, XX
},
902 { "cmovbe", Gv
, Ev
, XX
, XX
},
903 { "cmova", Gv
, Ev
, XX
, XX
},
905 { "cmovs", Gv
, Ev
, XX
, XX
},
906 { "cmovns", Gv
, Ev
, XX
, XX
},
907 { "cmovp", Gv
, Ev
, XX
, XX
},
908 { "cmovnp", Gv
, Ev
, XX
, XX
},
909 { "cmovl", Gv
, Ev
, XX
, XX
},
910 { "cmovge", Gv
, Ev
, XX
, XX
},
911 { "cmovle", Gv
, Ev
, XX
, XX
},
912 { "cmovg", Gv
, Ev
, XX
, XX
},
914 { "movmskpX", Gdq
, XS
, XX
, XX
},
918 { "andpX", XM
, EX
, XX
, XX
},
919 { "andnpX", XM
, EX
, XX
, XX
},
920 { "orpX", XM
, EX
, XX
, XX
},
921 { "xorpX", XM
, EX
, XX
, XX
},
932 { "punpcklbw", MX
, EM
, XX
, XX
},
933 { "punpcklwd", MX
, EM
, XX
, XX
},
934 { "punpckldq", MX
, EM
, XX
, XX
},
935 { "packsswb", MX
, EM
, XX
, XX
},
936 { "pcmpgtb", MX
, EM
, XX
, XX
},
937 { "pcmpgtw", MX
, EM
, XX
, XX
},
938 { "pcmpgtd", MX
, EM
, XX
, XX
},
939 { "packuswb", MX
, EM
, XX
, XX
},
941 { "punpckhbw", MX
, EM
, XX
, XX
},
942 { "punpckhwd", MX
, EM
, XX
, XX
},
943 { "punpckhdq", MX
, EM
, XX
, XX
},
944 { "packssdw", MX
, EM
, XX
, XX
},
947 { "movd", MX
, Edq
, XX
, XX
},
954 { "pcmpeqb", MX
, EM
, XX
, XX
},
955 { "pcmpeqw", MX
, EM
, XX
, XX
},
956 { "pcmpeqd", MX
, EM
, XX
, XX
},
957 { "emms", XX
, XX
, XX
, XX
},
961 { "(bad)", XX
, XX
, XX
, XX
},
962 { "(bad)", XX
, XX
, XX
, XX
},
968 { "joH", Jv
, XX
, cond_jump_flag
, XX
},
969 { "jnoH", Jv
, XX
, cond_jump_flag
, XX
},
970 { "jbH", Jv
, XX
, cond_jump_flag
, XX
},
971 { "jaeH", Jv
, XX
, cond_jump_flag
, XX
},
972 { "jeH", Jv
, XX
, cond_jump_flag
, XX
},
973 { "jneH", Jv
, XX
, cond_jump_flag
, XX
},
974 { "jbeH", Jv
, XX
, cond_jump_flag
, XX
},
975 { "jaH", Jv
, XX
, cond_jump_flag
, XX
},
977 { "jsH", Jv
, XX
, cond_jump_flag
, XX
},
978 { "jnsH", Jv
, XX
, cond_jump_flag
, XX
},
979 { "jpH", Jv
, XX
, cond_jump_flag
, XX
},
980 { "jnpH", Jv
, XX
, cond_jump_flag
, XX
},
981 { "jlH", Jv
, XX
, cond_jump_flag
, XX
},
982 { "jgeH", Jv
, XX
, cond_jump_flag
, XX
},
983 { "jleH", Jv
, XX
, cond_jump_flag
, XX
},
984 { "jgH", Jv
, XX
, cond_jump_flag
, XX
},
986 { "seto", Eb
, XX
, XX
, XX
},
987 { "setno", Eb
, XX
, XX
, XX
},
988 { "setb", Eb
, XX
, XX
, XX
},
989 { "setae", Eb
, XX
, XX
, XX
},
990 { "sete", Eb
, XX
, XX
, XX
},
991 { "setne", Eb
, XX
, XX
, XX
},
992 { "setbe", Eb
, XX
, XX
, XX
},
993 { "seta", Eb
, XX
, XX
, XX
},
995 { "sets", Eb
, XX
, XX
, XX
},
996 { "setns", Eb
, XX
, XX
, XX
},
997 { "setp", Eb
, XX
, XX
, XX
},
998 { "setnp", Eb
, XX
, XX
, XX
},
999 { "setl", Eb
, XX
, XX
, XX
},
1000 { "setge", Eb
, XX
, XX
, XX
},
1001 { "setle", Eb
, XX
, XX
, XX
},
1002 { "setg", Eb
, XX
, XX
, XX
},
1004 { "pushT", fs
, XX
, XX
, XX
},
1005 { "popT", fs
, XX
, XX
, XX
},
1006 { "cpuid", XX
, XX
, XX
, XX
},
1007 { "btS", Ev
, Gv
, XX
, XX
},
1008 { "shldS", Ev
, Gv
, Ib
, XX
},
1009 { "shldS", Ev
, Gv
, CL
, XX
},
1013 { "pushT", gs
, XX
, XX
, XX
},
1014 { "popT", gs
, XX
, XX
, XX
},
1015 { "rsm", XX
, XX
, XX
, XX
},
1016 { "btsS", Ev
, Gv
, XX
, XX
},
1017 { "shrdS", Ev
, Gv
, Ib
, XX
},
1018 { "shrdS", Ev
, Gv
, CL
, XX
},
1020 { "imulS", Gv
, Ev
, XX
, XX
},
1022 { "cmpxchgB", Eb
, Gb
, XX
, XX
},
1023 { "cmpxchgS", Ev
, Gv
, XX
, XX
},
1024 { "lssS", Gv
, Mp
, XX
, XX
},
1025 { "btrS", Ev
, Gv
, XX
, XX
},
1026 { "lfsS", Gv
, Mp
, XX
, XX
},
1027 { "lgsS", Gv
, Mp
, XX
, XX
},
1028 { "movz{bR|x|bR|x}", Gv
, Eb
, XX
, XX
},
1029 { "movz{wR|x|wR|x}", Gv
, Ew
, XX
, XX
}, /* yes, there really is movzww ! */
1031 { "popcntS", Gv
, Ev
, XX
, XX
},
1032 { "ud2b", XX
, XX
, XX
, XX
},
1034 { "btcS", Ev
, Gv
, XX
, XX
},
1035 { "bsfS", Gv
, Ev
, XX
, XX
},
1037 { "movs{bR|x|bR|x}", Gv
, Eb
, XX
, XX
},
1038 { "movs{wR|x|wR|x}", Gv
, Ew
, XX
, XX
}, /* yes, there really is movsww ! */
1040 { "xaddB", Eb
, Gb
, XX
, XX
},
1041 { "xaddS", Ev
, Gv
, XX
, XX
},
1043 { "movntiS", Ev
, Gv
, XX
, XX
},
1044 { "pinsrw", MX
, Edqw
, Ib
, XX
},
1045 { "pextrw", Gdq
, MS
, Ib
, XX
},
1046 { "shufpX", XM
, EX
, Ib
, XX
},
1049 { "bswap", RMeAX
, XX
, XX
, XX
},
1050 { "bswap", RMeCX
, XX
, XX
, XX
},
1051 { "bswap", RMeDX
, XX
, XX
, XX
},
1052 { "bswap", RMeBX
, XX
, XX
, XX
},
1053 { "bswap", RMeSP
, XX
, XX
, XX
},
1054 { "bswap", RMeBP
, XX
, XX
, XX
},
1055 { "bswap", RMeSI
, XX
, XX
, XX
},
1056 { "bswap", RMeDI
, XX
, XX
, XX
},
1059 { "psrlw", MX
, EM
, XX
, XX
},
1060 { "psrld", MX
, EM
, XX
, XX
},
1061 { "psrlq", MX
, EM
, XX
, XX
},
1062 { "paddq", MX
, EM
, XX
, XX
},
1063 { "pmullw", MX
, EM
, XX
, XX
},
1065 { "pmovmskb", Gdq
, MS
, XX
, XX
},
1067 { "psubusb", MX
, EM
, XX
, XX
},
1068 { "psubusw", MX
, EM
, XX
, XX
},
1069 { "pminub", MX
, EM
, XX
, XX
},
1070 { "pand", MX
, EM
, XX
, XX
},
1071 { "paddusb", MX
, EM
, XX
, XX
},
1072 { "paddusw", MX
, EM
, XX
, XX
},
1073 { "pmaxub", MX
, EM
, XX
, XX
},
1074 { "pandn", MX
, EM
, XX
, XX
},
1076 { "pavgb", MX
, EM
, XX
, XX
},
1077 { "psraw", MX
, EM
, XX
, XX
},
1078 { "psrad", MX
, EM
, XX
, XX
},
1079 { "pavgw", MX
, EM
, XX
, XX
},
1080 { "pmulhuw", MX
, EM
, XX
, XX
},
1081 { "pmulhw", MX
, EM
, XX
, XX
},
1085 { "psubsb", MX
, EM
, XX
, XX
},
1086 { "psubsw", MX
, EM
, XX
, XX
},
1087 { "pminsw", MX
, EM
, XX
, XX
},
1088 { "por", MX
, EM
, XX
, XX
},
1089 { "paddsb", MX
, EM
, XX
, XX
},
1090 { "paddsw", MX
, EM
, XX
, XX
},
1091 { "pmaxsw", MX
, EM
, XX
, XX
},
1092 { "pxor", MX
, EM
, XX
, XX
},
1095 { "psllw", MX
, EM
, XX
, XX
},
1096 { "pslld", MX
, EM
, XX
, XX
},
1097 { "psllq", MX
, EM
, XX
, XX
},
1098 { "pmuludq", MX
, EM
, XX
, XX
},
1099 { "pmaddwd", MX
, EM
, XX
, XX
},
1100 { "psadbw", MX
, EM
, XX
, XX
},
1103 { "psubb", MX
, EM
, XX
, XX
},
1104 { "psubw", MX
, EM
, XX
, XX
},
1105 { "psubd", MX
, EM
, XX
, XX
},
1106 { "psubq", MX
, EM
, XX
, XX
},
1107 { "paddb", MX
, EM
, XX
, XX
},
1108 { "paddw", MX
, EM
, XX
, XX
},
1109 { "paddd", MX
, EM
, XX
, XX
},
1110 { "(bad)", XX
, XX
, XX
, XX
}
1113 static const unsigned char onebyte_has_modrm
[256] = {
1114 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1115 /* ------------------------------- */
1116 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1117 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1118 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1119 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1120 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1121 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1122 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1123 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1124 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1125 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1126 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1127 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1128 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1129 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1130 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1131 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1132 /* ------------------------------- */
1133 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1136 static const unsigned char twobyte_has_modrm
[256] = {
1137 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1138 /* ------------------------------- */
1139 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1140 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1141 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1142 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1143 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1144 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1145 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1146 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1147 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1148 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1149 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1150 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1151 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1152 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1153 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1154 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1155 /* ------------------------------- */
1156 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1159 static const unsigned char twobyte_uses_SSE_prefix
[256] = {
1160 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1161 /* ------------------------------- */
1162 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1163 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1164 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1165 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1166 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1167 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1168 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1169 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1170 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1171 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1172 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1173 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1174 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1175 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1176 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1177 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1178 /* ------------------------------- */
1179 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1182 static char obuf
[100];
1184 static char scratchbuf
[100];
1185 static unsigned char *start_codep
;
1186 static unsigned char *insn_codep
;
1187 static unsigned char *codep
;
1188 static disassemble_info
*the_info
;
1192 static unsigned char need_modrm
;
1194 /* If we are accessing mod/rm/reg without need_modrm set, then the
1195 values are stale. Hitting this abort likely indicates that you
1196 need to update onebyte_has_modrm or twobyte_has_modrm. */
1197 #define MODRM_CHECK if (!need_modrm) abort ()
1199 static const char **names64
;
1200 static const char **names32
;
1201 static const char **names16
;
1202 static const char **names8
;
1203 static const char **names8rex
;
1204 static const char **names_seg
;
1205 static const char **index16
;
1207 static const char *intel_names64
[] = {
1208 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1209 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1211 static const char *intel_names32
[] = {
1212 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1213 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1215 static const char *intel_names16
[] = {
1216 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1217 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1219 static const char *intel_names8
[] = {
1220 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1222 static const char *intel_names8rex
[] = {
1223 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1224 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1226 static const char *intel_names_seg
[] = {
1227 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1229 static const char *intel_index16
[] = {
1230 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1233 static const char *att_names64
[] = {
1234 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1235 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1237 static const char *att_names32
[] = {
1238 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1239 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1241 static const char *att_names16
[] = {
1242 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1243 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1245 static const char *att_names8
[] = {
1246 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1248 static const char *att_names8rex
[] = {
1249 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1250 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1252 static const char *att_names_seg
[] = {
1253 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1255 static const char *att_index16
[] = {
1256 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1259 static const struct dis386 grps
[][8] = {
1262 { "addA", Eb
, Ib
, XX
, XX
},
1263 { "orA", Eb
, Ib
, XX
, XX
},
1264 { "adcA", Eb
, Ib
, XX
, XX
},
1265 { "sbbA", Eb
, Ib
, XX
, XX
},
1266 { "andA", Eb
, Ib
, XX
, XX
},
1267 { "subA", Eb
, Ib
, XX
, XX
},
1268 { "xorA", Eb
, Ib
, XX
, XX
},
1269 { "cmpA", Eb
, Ib
, XX
, XX
}
1273 { "addQ", Ev
, Iv
, XX
, XX
},
1274 { "orQ", Ev
, Iv
, XX
, XX
},
1275 { "adcQ", Ev
, Iv
, XX
, XX
},
1276 { "sbbQ", Ev
, Iv
, XX
, XX
},
1277 { "andQ", Ev
, Iv
, XX
, XX
},
1278 { "subQ", Ev
, Iv
, XX
, XX
},
1279 { "xorQ", Ev
, Iv
, XX
, XX
},
1280 { "cmpQ", Ev
, Iv
, XX
, XX
}
1284 { "addQ", Ev
, sIb
, XX
, XX
},
1285 { "orQ", Ev
, sIb
, XX
, XX
},
1286 { "adcQ", Ev
, sIb
, XX
, XX
},
1287 { "sbbQ", Ev
, sIb
, XX
, XX
},
1288 { "andQ", Ev
, sIb
, XX
, XX
},
1289 { "subQ", Ev
, sIb
, XX
, XX
},
1290 { "xorQ", Ev
, sIb
, XX
, XX
},
1291 { "cmpQ", Ev
, sIb
, XX
, XX
}
1295 { "rolA", Eb
, Ib
, XX
, XX
},
1296 { "rorA", Eb
, Ib
, XX
, XX
},
1297 { "rclA", Eb
, Ib
, XX
, XX
},
1298 { "rcrA", Eb
, Ib
, XX
, XX
},
1299 { "shlA", Eb
, Ib
, XX
, XX
},
1300 { "shrA", Eb
, Ib
, XX
, XX
},
1301 { "(bad)", XX
, XX
, XX
, XX
},
1302 { "sarA", Eb
, Ib
, XX
, XX
},
1306 { "rolQ", Ev
, Ib
, XX
, XX
},
1307 { "rorQ", Ev
, Ib
, XX
, XX
},
1308 { "rclQ", Ev
, Ib
, XX
, XX
},
1309 { "rcrQ", Ev
, Ib
, XX
, XX
},
1310 { "shlQ", Ev
, Ib
, XX
, XX
},
1311 { "shrQ", Ev
, Ib
, XX
, XX
},
1312 { "(bad)", XX
, XX
, XX
, XX
},
1313 { "sarQ", Ev
, Ib
, XX
, XX
},
1317 { "rolA", Eb
, I1
, XX
, XX
},
1318 { "rorA", Eb
, I1
, XX
, XX
},
1319 { "rclA", Eb
, I1
, XX
, XX
},
1320 { "rcrA", Eb
, I1
, XX
, XX
},
1321 { "shlA", Eb
, I1
, XX
, XX
},
1322 { "shrA", Eb
, I1
, XX
, XX
},
1323 { "(bad)", XX
, XX
, XX
, XX
},
1324 { "sarA", Eb
, I1
, XX
, XX
},
1328 { "rolQ", Ev
, I1
, XX
, XX
},
1329 { "rorQ", Ev
, I1
, XX
, XX
},
1330 { "rclQ", Ev
, I1
, XX
, XX
},
1331 { "rcrQ", Ev
, I1
, XX
, XX
},
1332 { "shlQ", Ev
, I1
, XX
, XX
},
1333 { "shrQ", Ev
, I1
, XX
, XX
},
1334 { "(bad)", XX
, XX
, XX
, XX
},
1335 { "sarQ", Ev
, I1
, XX
, XX
},
1339 { "rolA", Eb
, CL
, XX
, XX
},
1340 { "rorA", Eb
, CL
, XX
, XX
},
1341 { "rclA", Eb
, CL
, XX
, XX
},
1342 { "rcrA", Eb
, CL
, XX
, XX
},
1343 { "shlA", Eb
, CL
, XX
, XX
},
1344 { "shrA", Eb
, CL
, XX
, XX
},
1345 { "(bad)", XX
, XX
, XX
, XX
},
1346 { "sarA", Eb
, CL
, XX
, XX
},
1350 { "rolQ", Ev
, CL
, XX
, XX
},
1351 { "rorQ", Ev
, CL
, XX
, XX
},
1352 { "rclQ", Ev
, CL
, XX
, XX
},
1353 { "rcrQ", Ev
, CL
, XX
, XX
},
1354 { "shlQ", Ev
, CL
, XX
, XX
},
1355 { "shrQ", Ev
, CL
, XX
, XX
},
1356 { "(bad)", XX
, XX
, XX
, XX
},
1357 { "sarQ", Ev
, CL
, XX
, XX
}
1361 { "testA", Eb
, Ib
, XX
, XX
},
1362 { "(bad)", Eb
, XX
, XX
, XX
},
1363 { "notA", Eb
, XX
, XX
, XX
},
1364 { "negA", Eb
, XX
, XX
, XX
},
1365 { "mulA", Eb
, XX
, XX
, XX
}, /* Don't print the implicit %al register, */
1366 { "imulA", Eb
, XX
, XX
, XX
}, /* to distinguish these opcodes from other */
1367 { "divA", Eb
, XX
, XX
, XX
}, /* mul/imul opcodes. Do the same for div */
1368 { "idivA", Eb
, XX
, XX
, XX
} /* and idiv for consistency. */
1372 { "testQ", Ev
, Iv
, XX
, XX
},
1373 { "(bad)", XX
, XX
, XX
, XX
},
1374 { "notQ", Ev
, XX
, XX
, XX
},
1375 { "negQ", Ev
, XX
, XX
, XX
},
1376 { "mulQ", Ev
, XX
, XX
, XX
}, /* Don't print the implicit register. */
1377 { "imulQ", Ev
, XX
, XX
, XX
},
1378 { "divQ", Ev
, XX
, XX
, XX
},
1379 { "idivQ", Ev
, XX
, XX
, XX
},
1383 { "incA", Eb
, XX
, XX
, XX
},
1384 { "decA", Eb
, XX
, XX
, XX
},
1385 { "(bad)", XX
, XX
, XX
, XX
},
1386 { "(bad)", XX
, XX
, XX
, XX
},
1387 { "(bad)", XX
, XX
, XX
, XX
},
1388 { "(bad)", XX
, XX
, XX
, XX
},
1389 { "(bad)", XX
, XX
, XX
, XX
},
1390 { "(bad)", XX
, XX
, XX
, XX
},
1394 { "incQ", Ev
, XX
, XX
, XX
},
1395 { "decQ", Ev
, XX
, XX
, XX
},
1396 { "callT", indirEv
, XX
, XX
, XX
},
1397 { "JcallT", indirEp
, XX
, XX
, XX
},
1398 { "jmpT", indirEv
, XX
, XX
, XX
},
1399 { "JjmpT", indirEp
, XX
, XX
, XX
},
1400 { "pushU", stackEv
, XX
, XX
, XX
},
1401 { "(bad)", XX
, XX
, XX
, XX
},
1405 { "sldt", Ev
, XX
, XX
, XX
},
1406 { "str", Ev
, XX
, XX
, XX
},
1407 { "lldt", Ew
, XX
, XX
, XX
},
1408 { "ltr", Ew
, XX
, XX
, XX
},
1409 { "verr", Ew
, XX
, XX
, XX
},
1410 { "verw", Ew
, XX
, XX
, XX
},
1411 { "(bad)", XX
, XX
, XX
, XX
},
1412 { "(bad)", XX
, XX
, XX
, XX
}
1416 { "sgdt{Q|IQ||}", VMX_Fixup
, 0, XX
, XX
, XX
},
1417 { "sidt{Q|IQ||}", PNI_Fixup
, 0, XX
, XX
, XX
},
1418 { "lgdt{Q|Q||}", M
, XX
, XX
, XX
},
1419 { "lidt{Q|Q||}", SVME_Fixup
, 0, XX
, XX
, XX
},
1420 { "smsw", Ev
, XX
, XX
, XX
},
1421 { "(bad)", XX
, XX
, XX
, XX
},
1422 { "lmsw", Ew
, XX
, XX
, XX
},
1423 { "invlpg", INVLPG_Fixup
, w_mode
, XX
, XX
, XX
},
1427 { "(bad)", XX
, XX
, XX
, XX
},
1428 { "(bad)", XX
, XX
, XX
, XX
},
1429 { "(bad)", XX
, XX
, XX
, XX
},
1430 { "(bad)", XX
, XX
, XX
, XX
},
1431 { "btQ", Ev
, Ib
, XX
, XX
},
1432 { "btsQ", Ev
, Ib
, XX
, XX
},
1433 { "btrQ", Ev
, Ib
, XX
, XX
},
1434 { "btcQ", Ev
, Ib
, XX
, XX
},
1438 { "(bad)", XX
, XX
, XX
, XX
},
1439 { "cmpxchg8b", Eq
, XX
, XX
, XX
},
1440 { "(bad)", XX
, XX
, XX
, XX
},
1441 { "(bad)", XX
, XX
, XX
, XX
},
1442 { "(bad)", XX
, XX
, XX
, XX
},
1443 { "(bad)", XX
, XX
, XX
, XX
},
1444 { "", VM
, XX
, XX
, XX
}, /* See OP_VMX. */
1445 { "vmptrst", Eq
, XX
, XX
, XX
},
1449 { "movA", Eb
, Ib
, XX
, XX
},
1450 { "(bad)", XX
, XX
, XX
, XX
},
1451 { "(bad)", XX
, XX
, XX
, XX
},
1452 { "(bad)", XX
, XX
, XX
, XX
},
1453 { "(bad)", XX
, XX
, XX
, XX
},
1454 { "(bad)", XX
, XX
, XX
, XX
},
1455 { "(bad)", XX
, XX
, XX
, XX
},
1456 { "(bad)", XX
, XX
, XX
, XX
},
1460 { "movQ", Ev
, Iv
, XX
, XX
},
1461 { "(bad)", XX
, XX
, XX
, XX
},
1462 { "(bad)", XX
, XX
, XX
, XX
},
1463 { "(bad)", XX
, XX
, XX
, XX
},
1464 { "(bad)", XX
, XX
, XX
, XX
},
1465 { "(bad)", XX
, XX
, XX
, XX
},
1466 { "(bad)", XX
, XX
, XX
, XX
},
1467 { "(bad)", XX
, XX
, XX
, XX
},
1471 { "(bad)", XX
, XX
, XX
, XX
},
1472 { "(bad)", XX
, XX
, XX
, XX
},
1473 { "psrlw", MS
, Ib
, XX
, XX
},
1474 { "(bad)", XX
, XX
, XX
, XX
},
1475 { "psraw", MS
, Ib
, XX
, XX
},
1476 { "(bad)", XX
, XX
, XX
, XX
},
1477 { "psllw", MS
, Ib
, XX
, XX
},
1478 { "(bad)", XX
, XX
, XX
, XX
},
1482 { "(bad)", XX
, XX
, XX
, XX
},
1483 { "(bad)", XX
, XX
, XX
, XX
},
1484 { "psrld", MS
, Ib
, XX
, XX
},
1485 { "(bad)", XX
, XX
, XX
, XX
},
1486 { "psrad", MS
, Ib
, XX
, XX
},
1487 { "(bad)", XX
, XX
, XX
, XX
},
1488 { "pslld", MS
, Ib
, XX
, XX
},
1489 { "(bad)", XX
, XX
, XX
, XX
},
1493 { "(bad)", XX
, XX
, XX
, XX
},
1494 { "(bad)", XX
, XX
, XX
, XX
},
1495 { "psrlq", MS
, Ib
, XX
, XX
},
1496 { "psrldq", MS
, Ib
, XX
, XX
},
1497 { "(bad)", XX
, XX
, XX
, XX
},
1498 { "(bad)", XX
, XX
, XX
, XX
},
1499 { "psllq", MS
, Ib
, XX
, XX
},
1500 { "pslldq", MS
, Ib
, XX
, XX
},
1504 { "fxsave", Ev
, XX
, XX
, XX
},
1505 { "fxrstor", Ev
, XX
, XX
, XX
},
1506 { "ldmxcsr", Ev
, XX
, XX
, XX
},
1507 { "stmxcsr", Ev
, XX
, XX
, XX
},
1508 { "(bad)", XX
, XX
, XX
, XX
},
1509 { "lfence", OP_0fae
, 0, XX
, XX
, XX
},
1510 { "mfence", OP_0fae
, 0, XX
, XX
, XX
},
1511 { "clflush", OP_0fae
, 0, XX
, XX
, XX
},
1515 { "prefetchnta", Ev
, XX
, XX
, XX
},
1516 { "prefetcht0", Ev
, XX
, XX
, XX
},
1517 { "prefetcht1", Ev
, XX
, XX
, XX
},
1518 { "prefetcht2", Ev
, XX
, XX
, XX
},
1519 { "(bad)", XX
, XX
, XX
, XX
},
1520 { "(bad)", XX
, XX
, XX
, XX
},
1521 { "(bad)", XX
, XX
, XX
, XX
},
1522 { "(bad)", XX
, XX
, XX
, XX
},
1526 { "prefetch", Eb
, XX
, XX
, XX
},
1527 { "prefetchw", Eb
, XX
, XX
, XX
},
1528 { "(bad)", XX
, XX
, XX
, XX
},
1529 { "(bad)", XX
, XX
, XX
, XX
},
1530 { "(bad)", XX
, XX
, XX
, XX
},
1531 { "(bad)", XX
, XX
, XX
, XX
},
1532 { "(bad)", XX
, XX
, XX
, XX
},
1533 { "(bad)", XX
, XX
, XX
, XX
},
1537 { "xstore-rng", OP_0f07
, 0, XX
, XX
, XX
},
1538 { "xcrypt-ecb", OP_0f07
, 0, XX
, XX
, XX
},
1539 { "xcrypt-cbc", OP_0f07
, 0, XX
, XX
, XX
},
1540 { "xcrypt-ctr", OP_0f07
, 0, XX
, XX
, XX
},
1541 { "xcrypt-cfb", OP_0f07
, 0, XX
, XX
, XX
},
1542 { "xcrypt-ofb", OP_0f07
, 0, XX
, XX
, XX
},
1543 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1544 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1548 { "montmul", OP_0f07
, 0, XX
, XX
, XX
},
1549 { "xsha1", OP_0f07
, 0, XX
, XX
, XX
},
1550 { "xsha256", OP_0f07
, 0, XX
, XX
, XX
},
1551 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1552 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1553 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1554 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1555 { "(bad)", OP_0f07
, 0, XX
, XX
, XX
},
1559 static const struct dis386 prefix_user_table
[][4] = {
1562 { "addps", XM
, EX
, XX
, XX
},
1563 { "addss", XM
, EX
, XX
, XX
},
1564 { "addpd", XM
, EX
, XX
, XX
},
1565 { "addsd", XM
, EX
, XX
, XX
},
1569 { "", XM
, EX
, OPSIMD
, XX
}, /* See OP_SIMD_SUFFIX. */
1570 { "", XM
, EX
, OPSIMD
, XX
},
1571 { "", XM
, EX
, OPSIMD
, XX
},
1572 { "", XM
, EX
, OPSIMD
, XX
},
1576 { "cvtpi2ps", XM
, EMC
, XX
, XX
},
1577 { "cvtsi2ssY", XM
, Ev
, XX
, XX
},
1578 { "cvtpi2pd", XM
, EMC
, XX
, XX
},
1579 { "cvtsi2sdY", XM
, Ev
, XX
, XX
},
1583 { "cvtps2pi", MXC
, EX
, XX
, XX
},
1584 { "cvtss2siY", Gv
, EX
, XX
, XX
},
1585 { "cvtpd2pi", MXC
, EX
, XX
, XX
},
1586 { "cvtsd2siY", Gv
, EX
, XX
, XX
},
1590 { "cvttps2pi", MXC
, EX
, XX
, XX
},
1591 { "cvttss2siY", Gv
, EX
, XX
, XX
},
1592 { "cvttpd2pi", MXC
, EX
, XX
, XX
},
1593 { "cvttsd2siY", Gv
, EX
, XX
, XX
},
1597 { "divps", XM
, EX
, XX
, XX
},
1598 { "divss", XM
, EX
, XX
, XX
},
1599 { "divpd", XM
, EX
, XX
, XX
},
1600 { "divsd", XM
, EX
, XX
, XX
},
1604 { "maxps", XM
, EX
, XX
, XX
},
1605 { "maxss", XM
, EX
, XX
, XX
},
1606 { "maxpd", XM
, EX
, XX
, XX
},
1607 { "maxsd", XM
, EX
, XX
, XX
},
1611 { "minps", XM
, EX
, XX
, XX
},
1612 { "minss", XM
, EX
, XX
, XX
},
1613 { "minpd", XM
, EX
, XX
, XX
},
1614 { "minsd", XM
, EX
, XX
, XX
},
1618 { "movups", XM
, EX
, XX
, XX
},
1619 { "movss", XM
, EX
, XX
, XX
},
1620 { "movupd", XM
, EX
, XX
, XX
},
1621 { "movsd", XM
, EX
, XX
, XX
},
1625 { "movups", EX
, XM
, XX
, XX
},
1626 { "movss", EX
, XM
, XX
, XX
},
1627 { "movupd", EX
, XM
, XX
, XX
},
1628 { "movsd", EX
, XM
, XX
, XX
},
1632 { "mulps", XM
, EX
, XX
, XX
},
1633 { "mulss", XM
, EX
, XX
, XX
},
1634 { "mulpd", XM
, EX
, XX
, XX
},
1635 { "mulsd", XM
, EX
, XX
, XX
},
1639 { "rcpps", XM
, EX
, XX
, XX
},
1640 { "rcpss", XM
, EX
, XX
, XX
},
1641 { "(bad)", XM
, EX
, XX
, XX
},
1642 { "(bad)", XM
, EX
, XX
, XX
},
1646 { "rsqrtps", XM
, EX
, XX
, XX
},
1647 { "rsqrtss", XM
, EX
, XX
, XX
},
1648 { "(bad)", XM
, EX
, XX
, XX
},
1649 { "(bad)", XM
, EX
, XX
, XX
},
1653 { "sqrtps", XM
, EX
, XX
, XX
},
1654 { "sqrtss", XM
, EX
, XX
, XX
},
1655 { "sqrtpd", XM
, EX
, XX
, XX
},
1656 { "sqrtsd", XM
, EX
, XX
, XX
},
1660 { "subps", XM
, EX
, XX
, XX
},
1661 { "subss", XM
, EX
, XX
, XX
},
1662 { "subpd", XM
, EX
, XX
, XX
},
1663 { "subsd", XM
, EX
, XX
, XX
},
1667 { "(bad)", XM
, EX
, XX
, XX
},
1668 { "cvtdq2pd", XM
, EX
, XX
, XX
},
1669 { "cvttpd2dq", XM
, EX
, XX
, XX
},
1670 { "cvtpd2dq", XM
, EX
, XX
, XX
},
1674 { "cvtdq2ps", XM
, EX
, XX
, XX
},
1675 { "cvttps2dq",XM
, EX
, XX
, XX
},
1676 { "cvtps2dq",XM
, EX
, XX
, XX
},
1677 { "(bad)", XM
, EX
, XX
, XX
},
1681 { "cvtps2pd", XM
, EX
, XX
, XX
},
1682 { "cvtss2sd", XM
, EX
, XX
, XX
},
1683 { "cvtpd2ps", XM
, EX
, XX
, XX
},
1684 { "cvtsd2ss", XM
, EX
, XX
, XX
},
1688 { "maskmovq", MX
, MS
, XX
, XX
},
1689 { "(bad)", XM
, EX
, XX
, XX
},
1690 { "maskmovdqu", XM
, EX
, XX
, XX
},
1691 { "(bad)", XM
, EX
, XX
, XX
},
1695 { "movq", MX
, EM
, XX
, XX
},
1696 { "movdqu", XM
, EX
, XX
, XX
},
1697 { "movdqa", XM
, EX
, XX
, XX
},
1698 { "(bad)", XM
, EX
, XX
, XX
},
1702 { "movq", EM
, MX
, XX
, XX
},
1703 { "movdqu", EX
, XM
, XX
, XX
},
1704 { "movdqa", EX
, XM
, XX
, XX
},
1705 { "(bad)", EX
, XM
, XX
, XX
},
1709 { "(bad)", EX
, XM
, XX
, XX
},
1710 { "movq2dq", XM
, MS
, XX
, XX
},
1711 { "movq", EX
, XM
, XX
, XX
},
1712 { "movdq2q", MX
, XS
, XX
, XX
},
1716 { "pshufw", MX
, EM
, Ib
, XX
},
1717 { "pshufhw", XM
, EX
, Ib
, XX
},
1718 { "pshufd", XM
, EX
, Ib
, XX
},
1719 { "pshuflw", XM
, EX
, Ib
, XX
},
1723 { "movd", Edq
, MX
, XX
, XX
},
1724 { "movq", XM
, EX
, XX
, XX
},
1725 { "movd", Edq
, XM
, XX
, XX
},
1726 { "(bad)", Ed
, XM
, XX
, XX
},
1730 { "(bad)", MX
, EX
, XX
, XX
},
1731 { "(bad)", XM
, EX
, XX
, XX
},
1732 { "punpckhqdq", XM
, EX
, XX
, XX
},
1733 { "(bad)", XM
, EX
, XX
, XX
},
1737 { "movntq", EM
, MX
, XX
, XX
},
1738 { "(bad)", EM
, XM
, XX
, XX
},
1739 { "movntdq", EM
, XM
, XX
, XX
},
1740 { "(bad)", EM
, XM
, XX
, XX
},
1744 { "(bad)", MX
, EX
, XX
, XX
},
1745 { "(bad)", XM
, EX
, XX
, XX
},
1746 { "punpcklqdq", XM
, EX
, XX
, XX
},
1747 { "(bad)", XM
, EX
, XX
, XX
},
1751 { "(bad)", MX
, EX
, XX
, XX
},
1752 { "(bad)", XM
, EX
, XX
, XX
},
1753 { "addsubpd", XM
, EX
, XX
, XX
},
1754 { "addsubps", XM
, EX
, XX
, XX
},
1758 { "(bad)", MX
, EX
, XX
, XX
},
1759 { "(bad)", XM
, EX
, XX
, XX
},
1760 { "haddpd", XM
, EX
, XX
, XX
},
1761 { "haddps", XM
, EX
, XX
, XX
},
1765 { "(bad)", MX
, EX
, XX
, XX
},
1766 { "(bad)", XM
, EX
, XX
, XX
},
1767 { "hsubpd", XM
, EX
, XX
, XX
},
1768 { "hsubps", XM
, EX
, XX
, XX
},
1772 { "movlpX", XM
, EX
, SIMD_Fixup
, 'h', XX
}, /* really only 2 operands */
1773 { "movsldup", XM
, EX
, XX
, XX
},
1774 { "movlpd", XM
, EX
, XX
, XX
},
1775 { "movddup", XM
, EX
, XX
, XX
},
1779 { "movhpX", XM
, EX
, SIMD_Fixup
, 'l', XX
},
1780 { "movshdup", XM
, EX
, XX
, XX
},
1781 { "movhpd", XM
, EX
, XX
, XX
},
1782 { "(bad)", XM
, EX
, XX
, XX
},
1786 { "(bad)", XM
, EX
, XX
, XX
},
1787 { "(bad)", XM
, EX
, XX
, XX
},
1788 { "(bad)", XM
, EX
, XX
, XX
},
1789 { "lddqu", XM
, M
, XX
, XX
},
1793 {"movntps",Ev
, XM
, XX
, XX
},
1794 {"movntss",Ev
, XM
, XX
, XX
},
1795 {"movntpd",Ev
, XM
, XX
, XX
},
1796 {"movntsd",Ev
, XM
, XX
, XX
},
1801 {"vmread", Em
, Gm
, XX
, XX
},
1802 {"(bad)", XX
, XX
, XX
, XX
},
1803 {"extrq", XS
, Ib
, Ib
, XX
},
1804 {"insertq",XM
, XS
, Ib
, Ib
},
1809 {"vmwrite", Gm
, Em
, XX
, XX
},
1810 {"(bad)", XX
, XX
, XX
, XX
},
1811 {"extrq", XM
, XS
, XX
, XX
},
1812 {"insertq", XM
, XS
, XX
, XX
},
1817 { "bsrS", Gv
, Ev
, XX
, XX
},
1818 { "lzcntS", Gv
, Ev
, XX
, XX
},
1819 { "bsrS", Gv
, Ev
, XX
, XX
},
1820 { "(bad)", XX
, XX
, XX
, XX
},
1825 static const struct dis386 x86_64_table
[][2] = {
1827 { "arpl", Ew
, Gw
, XX
, XX
},
1828 { "movs{||lq|xd}", Gv
, Ed
, XX
, XX
},
1832 static const struct dis386 three_byte_table
[][32] = {
1835 { "pshufb", MX
, EM
, XX
, XX
},
1836 { "phaddw", MX
, EM
, XX
, XX
},
1837 { "phaddd", MX
, EM
, XX
, XX
},
1838 { "phaddsw", MX
, EM
, XX
, XX
},
1839 { "pmaddubsw", MX
, EM
, XX
, XX
},
1840 { "phsubw", MX
, EM
, XX
, XX
},
1841 { "phsubd", MX
, EM
, XX
, XX
},
1842 { "phsubsw", MX
, EM
, XX
, XX
},
1843 { "psignb", MX
, EM
, XX
, XX
},
1844 { "psignw", MX
, EM
, XX
, XX
},
1845 { "psignd", MX
, EM
, XX
, XX
},
1846 { "pmulhrsw", MX
, EM
, XX
, XX
},
1847 { "(bad)", XX
, XX
, XX
, XX
},
1848 { "(bad)", XX
, XX
, XX
, XX
},
1849 { "(bad)", XX
, XX
, XX
, XX
},
1850 { "(bad)", XX
, XX
, XX
, XX
},
1851 { "(bad)", XX
, XX
, XX
, XX
},
1852 { "(bad)", XX
, XX
, XX
, XX
},
1853 { "(bad)", XX
, XX
, XX
, XX
},
1854 { "(bad)", XX
, XX
, XX
, XX
},
1855 { "(bad)", XX
, XX
, XX
, XX
},
1856 { "(bad)", XX
, XX
, XX
, XX
},
1857 { "(bad)", XX
, XX
, XX
, XX
},
1858 { "(bad)", XX
, XX
, XX
, XX
},
1859 { "(bad)", XX
, XX
, XX
, XX
},
1860 { "(bad)", XX
, XX
, XX
, XX
},
1861 { "(bad)", XX
, XX
, XX
, XX
},
1862 { "(bad)", XX
, XX
, XX
, XX
},
1863 { "pabsb", MX
, EM
, XX
, XX
},
1864 { "pabsw", MX
, EM
, XX
, XX
},
1865 { "pabsd", MX
, EM
, XX
, XX
},
1866 { "(bad)", XX
, XX
, XX
, XX
}
1870 { "(bad)", XX
, XX
, XX
, XX
},
1871 { "(bad)", XX
, XX
, XX
, XX
},
1872 { "(bad)", XX
, XX
, XX
, XX
},
1873 { "(bad)", XX
, XX
, XX
, XX
},
1874 { "(bad)", XX
, XX
, XX
, XX
},
1875 { "(bad)", XX
, XX
, XX
, XX
},
1876 { "(bad)", XX
, XX
, XX
, XX
},
1877 { "(bad)", XX
, XX
, XX
, XX
},
1878 { "(bad)", XX
, XX
, XX
, XX
},
1879 { "(bad)", XX
, XX
, XX
, XX
},
1880 { "(bad)", XX
, XX
, XX
, XX
},
1881 { "(bad)", XX
, XX
, XX
, XX
},
1882 { "(bad)", XX
, XX
, XX
, XX
},
1883 { "(bad)", XX
, XX
, XX
, XX
},
1884 { "(bad)", XX
, XX
, XX
, XX
},
1885 { "palignr", MX
, EM
, Ib
, XX
},
1886 { "(bad)", XX
, XX
, XX
, XX
},
1887 { "(bad)", XX
, XX
, XX
, XX
},
1888 { "(bad)", XX
, XX
, XX
, XX
},
1889 { "(bad)", XX
, XX
, XX
, XX
},
1890 { "(bad)", XX
, XX
, XX
, XX
},
1891 { "(bad)", XX
, XX
, XX
, XX
},
1892 { "(bad)", XX
, XX
, XX
, XX
},
1893 { "(bad)", XX
, XX
, XX
, XX
},
1894 { "(bad)", XX
, XX
, XX
, XX
},
1895 { "(bad)", XX
, XX
, XX
, XX
},
1896 { "(bad)", XX
, XX
, XX
, XX
},
1897 { "(bad)", XX
, XX
, XX
, XX
},
1898 { "(bad)", XX
, XX
, XX
, XX
},
1899 { "(bad)", XX
, XX
, XX
, XX
},
1900 { "(bad)", XX
, XX
, XX
, XX
},
1901 { "(bad)", XX
, XX
, XX
, XX
}
1905 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1917 FETCH_DATA (the_info
, codep
+ 1);
1921 /* REX prefixes family. */
1938 if (address_mode
== mode_64bit
)
1944 prefixes
|= PREFIX_REPZ
;
1947 prefixes
|= PREFIX_REPNZ
;
1950 prefixes
|= PREFIX_LOCK
;
1953 prefixes
|= PREFIX_CS
;
1956 prefixes
|= PREFIX_SS
;
1959 prefixes
|= PREFIX_DS
;
1962 prefixes
|= PREFIX_ES
;
1965 prefixes
|= PREFIX_FS
;
1968 prefixes
|= PREFIX_GS
;
1971 prefixes
|= PREFIX_DATA
;
1974 prefixes
|= PREFIX_ADDR
;
1977 /* fwait is really an instruction. If there are prefixes
1978 before the fwait, they belong to the fwait, *not* to the
1979 following instruction. */
1980 if (prefixes
|| rex
)
1982 prefixes
|= PREFIX_FWAIT
;
1986 prefixes
= PREFIX_FWAIT
;
1991 /* Rex is ignored when followed by another prefix. */
2002 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
2006 prefix_name (int pref
, int sizeflag
)
2010 /* REX prefixes family. */
2062 return (sizeflag
& DFLAG
) ? "data16" : "data32";
2064 if (address_mode
== mode_64bit
)
2065 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
2067 return (sizeflag
& AFLAG
) ? "addr16" : "addr32";
2075 static char op1out
[100], op2out
[100], op3out
[100], op4out
[100];
2076 static int op_ad
, op_index
[4];
2077 static int two_source_ops
;
2078 static bfd_vma op_address
[4];
2079 static bfd_vma op_riprel
[4];
2080 static bfd_vma start_pc
;
2083 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2084 * (see topic "Redundant prefixes" in the "Differences from 8086"
2085 * section of the "Virtual 8086 Mode" chapter.)
2086 * 'pc' should be the address of this instruction, it will
2087 * be used to print the target address if this is a relative jump or call
2088 * The function returns the length of this instruction in bytes.
2091 static char intel_syntax
;
2092 static char open_char
;
2093 static char close_char
;
2094 static char separator_char
;
2095 static char scale_char
;
2097 /* Here for backwards compatibility. When gdb stops using
2098 print_insn_i386_att and print_insn_i386_intel these functions can
2099 disappear, and print_insn_i386 be merged into print_insn. */
2101 print_insn_i386_att (bfd_vma pc
, disassemble_info
*info
)
2105 return print_insn (pc
, info
);
2109 print_insn_i386_intel (bfd_vma pc
, disassemble_info
*info
)
2113 return print_insn (pc
, info
);
2117 print_insn_i386 (bfd_vma pc
, disassemble_info
*info
)
2121 return print_insn (pc
, info
);
2125 print_insn (bfd_vma pc
, disassemble_info
*info
)
2127 const struct dis386
*dp
;
2129 char *first
, *second
, *third
, *fourth
;
2131 unsigned char uses_SSE_prefix
, uses_LOCK_prefix
;
2134 struct dis_private priv
;
2136 if (info
->mach
== bfd_mach_x86_64_intel_syntax
2137 || info
->mach
== bfd_mach_x86_64
)
2138 address_mode
= mode_64bit
;
2140 address_mode
= mode_32bit
;
2142 if (intel_syntax
== (char) -1)
2143 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
2144 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
2146 if (info
->mach
== bfd_mach_i386_i386
2147 || info
->mach
== bfd_mach_x86_64
2148 || info
->mach
== bfd_mach_i386_i386_intel_syntax
2149 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
2150 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2151 else if (info
->mach
== bfd_mach_i386_i8086
)
2152 priv
.orig_sizeflag
= 0;
2156 for (p
= info
->disassembler_options
; p
!= NULL
; )
2158 if (strncmp (p
, "x86-64", 6) == 0)
2160 address_mode
= mode_64bit
;
2161 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2163 else if (strncmp (p
, "i386", 4) == 0)
2165 address_mode
= mode_32bit
;
2166 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2168 else if (strncmp (p
, "i8086", 5) == 0)
2170 address_mode
= mode_16bit
;
2171 priv
.orig_sizeflag
= 0;
2173 else if (strncmp (p
, "intel", 5) == 0)
2177 else if (strncmp (p
, "att", 3) == 0)
2181 else if (strncmp (p
, "addr", 4) == 0)
2183 if (p
[4] == '1' && p
[5] == '6')
2184 priv
.orig_sizeflag
&= ~AFLAG
;
2185 else if (p
[4] == '3' && p
[5] == '2')
2186 priv
.orig_sizeflag
|= AFLAG
;
2188 else if (strncmp (p
, "data", 4) == 0)
2190 if (p
[4] == '1' && p
[5] == '6')
2191 priv
.orig_sizeflag
&= ~DFLAG
;
2192 else if (p
[4] == '3' && p
[5] == '2')
2193 priv
.orig_sizeflag
|= DFLAG
;
2195 else if (strncmp (p
, "suffix", 6) == 0)
2196 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
2198 p
= strchr (p
, ',');
2205 names64
= intel_names64
;
2206 names32
= intel_names32
;
2207 names16
= intel_names16
;
2208 names8
= intel_names8
;
2209 names8rex
= intel_names8rex
;
2210 names_seg
= intel_names_seg
;
2211 index16
= intel_index16
;
2214 separator_char
= '+';
2219 names64
= att_names64
;
2220 names32
= att_names32
;
2221 names16
= att_names16
;
2222 names8
= att_names8
;
2223 names8rex
= att_names8rex
;
2224 names_seg
= att_names_seg
;
2225 index16
= att_index16
;
2228 separator_char
= ',';
2232 /* The output looks better if we put 7 bytes on a line, since that
2233 puts most long word instructions on a single line. */
2234 info
->bytes_per_line
= 7;
2236 info
->private_data
= &priv
;
2237 priv
.max_fetched
= priv
.the_buffer
;
2238 priv
.insn_start
= pc
;
2246 op_index
[0] = op_index
[1] = op_index
[2] = op_index
[3] = -1;
2250 start_codep
= priv
.the_buffer
;
2251 codep
= priv
.the_buffer
;
2253 if (setjmp (priv
.bailout
) != 0)
2257 /* Getting here means we tried for data but didn't get it. That
2258 means we have an incomplete instruction of some sort. Just
2259 print the first byte as a prefix or a .byte pseudo-op. */
2260 if (codep
> priv
.the_buffer
)
2262 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2264 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2267 /* Just print the first byte as a .byte instruction. */
2268 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
2269 (unsigned int) priv
.the_buffer
[0]);
2282 sizeflag
= priv
.orig_sizeflag
;
2284 FETCH_DATA (info
, codep
+ 1);
2285 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
2287 if (((prefixes
& PREFIX_FWAIT
)
2288 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
2289 || (rex
&& rex_used
))
2293 /* fwait not followed by floating point instruction, or rex followed
2294 by other prefixes. Print the first prefix. */
2295 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2297 name
= INTERNAL_DISASSEMBLER_ERROR
;
2298 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2304 FETCH_DATA (info
, codep
+ 2);
2305 dp
= &dis386_twobyte
[*++codep
];
2306 need_modrm
= twobyte_has_modrm
[*codep
];
2307 uses_SSE_prefix
= twobyte_uses_SSE_prefix
[*codep
];
2308 uses_LOCK_prefix
= (*codep
& ~0x02) == 0x20;
2312 dp
= &dis386
[*codep
];
2313 need_modrm
= onebyte_has_modrm
[*codep
];
2314 uses_SSE_prefix
= 0;
2315 uses_LOCK_prefix
= 0;
2318 /*"lzcnt"=0xBD is the only non-sse instruction which uses F3 in the opcode without any "rep(z|nz)"*/
2319 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_REPZ
) && *codep
!=0xBD)
2322 used_prefixes
|= PREFIX_REPZ
;
2324 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_REPNZ
) && *codep
!=0xBD)
2327 used_prefixes
|= PREFIX_REPNZ
;
2332 if (!uses_LOCK_prefix
&& (prefixes
& PREFIX_LOCK
))
2335 used_prefixes
|= PREFIX_LOCK
;
2338 if (prefixes
& PREFIX_ADDR
)
2341 if (dp
->bytemode3
!= loop_jcxz_mode
|| intel_syntax
)
2343 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
2344 oappend ("addr32 ");
2346 oappend ("addr16 ");
2347 used_prefixes
|= PREFIX_ADDR
;
2351 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_DATA
))
2354 if (dp
->bytemode3
== cond_jump_mode
2355 && dp
->bytemode1
== v_mode
2358 if (sizeflag
& DFLAG
)
2359 oappend ("data32 ");
2361 oappend ("data16 ");
2362 used_prefixes
|= PREFIX_DATA
;
2366 if (dp
->name
== NULL
&& dp
->bytemode1
== IS_3BYTE_OPCODE
)
2368 FETCH_DATA (info
, codep
+ 2);
2369 dp
= &three_byte_table
[dp
->bytemode2
][*codep
++];
2370 mod
= (*codep
>> 6) & 3;
2371 reg
= (*codep
>> 3) & 7;
2374 else if (need_modrm
)
2376 FETCH_DATA (info
, codep
+ 1);
2377 mod
= (*codep
>> 6) & 3;
2378 reg
= (*codep
>> 3) & 7;
2382 if (dp
->name
== NULL
&& dp
->bytemode1
== FLOATCODE
)
2389 if (dp
->name
== NULL
)
2391 switch (dp
->bytemode1
)
2394 dp
= &grps
[dp
->bytemode2
][reg
];
2397 case USE_PREFIX_USER_TABLE
:
2399 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
2400 if (prefixes
& PREFIX_REPZ
)
2404 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2405 if (prefixes
& PREFIX_DATA
)
2409 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
2410 if (prefixes
& PREFIX_REPNZ
)
2414 dp
= &prefix_user_table
[dp
->bytemode2
][index
];
2417 case X86_64_SPECIAL
:
2418 index
= address_mode
== mode_64bit
? 1 : 0;
2419 dp
= &x86_64_table
[dp
->bytemode2
][index
];
2423 oappend (INTERNAL_DISASSEMBLER_ERROR
);
2428 if (putop (dp
->name
, sizeflag
) == 0)
2433 (*dp
->op1
) (dp
->bytemode1
, sizeflag
);
2438 (*dp
->op2
) (dp
->bytemode2
, sizeflag
);
2443 (*dp
->op3
) (dp
->bytemode3
, sizeflag
);
2448 (*dp
->op4
) (dp
->bytemode4
, sizeflag
);
2452 /* See if any prefixes were not used. If so, print the first one
2453 separately. If we don't do this, we'll wind up printing an
2454 instruction stream which does not precisely correspond to the
2455 bytes we are disassembling. */
2456 if ((prefixes
& ~used_prefixes
) != 0)
2460 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2462 name
= INTERNAL_DISASSEMBLER_ERROR
;
2463 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2466 if (rex
& ~rex_used
)
2469 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
2471 name
= INTERNAL_DISASSEMBLER_ERROR
;
2472 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
2475 obufp
= obuf
+ strlen (obuf
);
2476 for (i
= strlen (obuf
); i
< 6; i
++)
2479 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
2481 /* The enter and bound instructions are printed with operands in the same
2482 order as the intel book; everything else is printed in reverse order. */
2483 if (intel_syntax
|| two_source_ops
)
2489 op_ad
= op_index
[0];
2490 op_index
[0] = op_index
[3];
2491 op_index
[3] = op_ad
;
2492 op_ad
= op_index
[1];
2493 op_index
[1] = op_index
[2];
2494 op_index
[2] = op_ad
;
2507 if (op_index
[0] != -1 && !op_riprel
[0])
2508 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[0]], info
);
2510 (*info
->fprintf_func
) (info
->stream
, "%s", first
);
2517 (*info
->fprintf_func
) (info
->stream
, ",");
2518 if (op_index
[1] != -1 && !op_riprel
[1])
2519 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[1]], info
);
2521 (*info
->fprintf_func
) (info
->stream
, "%s", second
);
2528 (*info
->fprintf_func
) (info
->stream
, ",");
2529 if (op_index
[2] != -1 && !op_riprel
[2])
2530 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[2]], info
);
2532 (*info
->fprintf_func
) (info
->stream
, "%s", third
);
2539 (*info
->fprintf_func
) (info
->stream
, ",");
2540 if (op_index
[3] != -1 && !op_riprel
[3])
2541 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[3]], info
);
2543 (*info
->fprintf_func
) (info
->stream
, "%s", fourth
);
2546 for (i
= 0; i
< 4; i
++)
2547 if (op_index
[i
] != -1 && op_riprel
[i
])
2549 (*info
->fprintf_func
) (info
->stream
, " # ");
2550 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
2551 + op_address
[op_index
[i
]]), info
);
2553 return codep
- priv
.the_buffer
;
2556 static const char *float_mem
[] = {
2631 static const unsigned char float_mem_mode
[] = {
2707 #define STi OP_STi, 0
2709 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0, NULL, 0
2710 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0, NULL, 0
2711 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0, NULL, 0
2712 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0, NULL, 0
2713 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0, NULL, 0
2714 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0, NULL, 0
2715 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0, NULL, 0
2716 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0, NULL, 0
2717 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0, NULL, 0
2719 static const struct dis386 float_reg
[][8] = {
2722 { "fadd", ST
, STi
, XX
, XX
},
2723 { "fmul", ST
, STi
, XX
, XX
},
2724 { "fcom", STi
, XX
, XX
, XX
},
2725 { "fcomp", STi
, XX
, XX
, XX
},
2726 { "fsub", ST
, STi
, XX
, XX
},
2727 { "fsubr", ST
, STi
, XX
, XX
},
2728 { "fdiv", ST
, STi
, XX
, XX
},
2729 { "fdivr", ST
, STi
, XX
, XX
},
2733 { "fld", STi
, XX
, XX
, XX
},
2734 { "fxch", STi
, XX
, XX
, XX
},
2736 { "(bad)", XX
, XX
, XX
, XX
},
2744 { "fcmovb", ST
, STi
, XX
, XX
},
2745 { "fcmove", ST
, STi
, XX
, XX
},
2746 { "fcmovbe",ST
, STi
, XX
, XX
},
2747 { "fcmovu", ST
, STi
, XX
, XX
},
2748 { "(bad)", XX
, XX
, XX
, XX
},
2750 { "(bad)", XX
, XX
, XX
, XX
},
2751 { "(bad)", XX
, XX
, XX
, XX
},
2755 { "fcmovnb",ST
, STi
, XX
, XX
},
2756 { "fcmovne",ST
, STi
, XX
, XX
},
2757 { "fcmovnbe",ST
, STi
, XX
, XX
},
2758 { "fcmovnu",ST
, STi
, XX
, XX
},
2760 { "fucomi", ST
, STi
, XX
, XX
},
2761 { "fcomi", ST
, STi
, XX
, XX
},
2762 { "(bad)", XX
, XX
, XX
, XX
},
2766 { "fadd", STi
, ST
, XX
, XX
},
2767 { "fmul", STi
, ST
, XX
, XX
},
2768 { "(bad)", XX
, XX
, XX
, XX
},
2769 { "(bad)", XX
, XX
, XX
, XX
},
2771 { "fsub", STi
, ST
, XX
, XX
},
2772 { "fsubr", STi
, ST
, XX
, XX
},
2773 { "fdiv", STi
, ST
, XX
, XX
},
2774 { "fdivr", STi
, ST
, XX
, XX
},
2776 { "fsubr", STi
, ST
, XX
, XX
},
2777 { "fsub", STi
, ST
, XX
, XX
},
2778 { "fdivr", STi
, ST
, XX
, XX
},
2779 { "fdiv", STi
, ST
, XX
, XX
},
2784 { "ffree", STi
, XX
, XX
, XX
},
2785 { "(bad)", XX
, XX
, XX
, XX
},
2786 { "fst", STi
, XX
, XX
, XX
},
2787 { "fstp", STi
, XX
, XX
, XX
},
2788 { "fucom", STi
, XX
, XX
, XX
},
2789 { "fucomp", STi
, XX
, XX
, XX
},
2790 { "(bad)", XX
, XX
, XX
, XX
},
2791 { "(bad)", XX
, XX
, XX
, XX
},
2795 { "faddp", STi
, ST
, XX
, XX
},
2796 { "fmulp", STi
, ST
, XX
, XX
},
2797 { "(bad)", XX
, XX
, XX
, XX
},
2800 { "fsubp", STi
, ST
, XX
, XX
},
2801 { "fsubrp", STi
, ST
, XX
, XX
},
2802 { "fdivp", STi
, ST
, XX
, XX
},
2803 { "fdivrp", STi
, ST
, XX
, XX
},
2805 { "fsubrp", STi
, ST
, XX
, XX
},
2806 { "fsubp", STi
, ST
, XX
, XX
},
2807 { "fdivrp", STi
, ST
, XX
, XX
},
2808 { "fdivp", STi
, ST
, XX
, XX
},
2813 { "ffreep", STi
, XX
, XX
, XX
},
2814 { "(bad)", XX
, XX
, XX
, XX
},
2815 { "(bad)", XX
, XX
, XX
, XX
},
2816 { "(bad)", XX
, XX
, XX
, XX
},
2818 { "fucomip",ST
, STi
, XX
, XX
},
2819 { "fcomip", ST
, STi
, XX
, XX
},
2820 { "(bad)", XX
, XX
, XX
, XX
},
2824 static char *fgrps
[][8] = {
2827 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2832 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2837 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2842 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2847 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2852 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2857 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2858 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2863 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2868 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2873 dofloat (int sizeflag
)
2875 const struct dis386
*dp
;
2876 unsigned char floatop
;
2878 floatop
= codep
[-1];
2882 int fp_indx
= (floatop
- 0xd8) * 8 + reg
;
2884 putop (float_mem
[fp_indx
], sizeflag
);
2887 OP_E (float_mem_mode
[fp_indx
], sizeflag
);
2890 /* Skip mod/rm byte. */
2894 dp
= &float_reg
[floatop
- 0xd8][reg
];
2895 if (dp
->name
== NULL
)
2897 putop (fgrps
[dp
->bytemode1
][rm
], sizeflag
);
2899 /* Instruction fnstsw is only one with strange arg. */
2900 if (floatop
== 0xdf && codep
[-1] == 0xe0)
2901 strcpy (op1out
, names16
[0]);
2905 putop (dp
->name
, sizeflag
);
2910 (*dp
->op1
) (dp
->bytemode1
, sizeflag
);
2915 (*dp
->op2
) (dp
->bytemode2
, sizeflag
);
2920 OP_ST (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
2922 oappend ("%st" + intel_syntax
);
2926 OP_STi (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
2928 sprintf (scratchbuf
, "%%st(%d)", rm
);
2929 oappend (scratchbuf
+ intel_syntax
);
2932 /* Capital letters in template are macros. */
2934 putop (const char *template, int sizeflag
)
2939 for (p
= template; *p
; p
++)
2950 if (address_mode
== mode_64bit
)
2958 /* Alternative not valid. */
2959 strcpy (obuf
, "(bad)");
2963 else if (*p
== '\0')
2984 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
2990 if (sizeflag
& SUFFIX_ALWAYS
)
2994 if (intel_syntax
&& !alt
)
2996 if ((prefixes
& PREFIX_DATA
) || (sizeflag
& SUFFIX_ALWAYS
))
2998 if (sizeflag
& DFLAG
)
2999 *obufp
++ = intel_syntax
? 'd' : 'l';
3001 *obufp
++ = intel_syntax
? 'w' : 's';
3002 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3005 case 'E': /* For jcxz/jecxz */
3006 if (address_mode
== mode_64bit
)
3008 if (sizeflag
& AFLAG
)
3014 if (sizeflag
& AFLAG
)
3016 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
3021 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
3023 if (sizeflag
& AFLAG
)
3024 *obufp
++ = address_mode
== mode_64bit
? 'q' : 'l';
3026 *obufp
++ = address_mode
== mode_64bit
? 'l' : 'w';
3027 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
3033 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
3034 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
3036 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
3039 if (prefixes
& PREFIX_DS
)
3053 if (address_mode
== mode_64bit
&& (sizeflag
& SUFFIX_ALWAYS
))
3062 if (sizeflag
& SUFFIX_ALWAYS
)
3066 if ((prefixes
& PREFIX_FWAIT
) == 0)
3069 used_prefixes
|= PREFIX_FWAIT
;
3072 USED_REX (REX_MODE64
);
3073 if (rex
& REX_MODE64
)
3081 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
3090 if ((prefixes
& PREFIX_DATA
)
3091 || (rex
& REX_MODE64
)
3092 || (sizeflag
& SUFFIX_ALWAYS
))
3094 USED_REX (REX_MODE64
);
3095 if (rex
& REX_MODE64
)
3099 if (sizeflag
& DFLAG
)
3104 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3110 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
3112 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
3118 if (intel_syntax
&& !alt
)
3120 USED_REX (REX_MODE64
);
3121 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
3123 if (rex
& REX_MODE64
)
3127 if (sizeflag
& DFLAG
)
3128 *obufp
++ = intel_syntax
? 'd' : 'l';
3132 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3136 USED_REX (REX_MODE64
);
3139 if (rex
& REX_MODE64
)
3144 else if (sizeflag
& DFLAG
)
3157 if (rex
& REX_MODE64
)
3159 else if (sizeflag
& DFLAG
)
3164 if (!(rex
& REX_MODE64
))
3165 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3170 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
3172 if (sizeflag
& SUFFIX_ALWAYS
)
3180 if (sizeflag
& SUFFIX_ALWAYS
)
3182 if (rex
& REX_MODE64
)
3186 if (sizeflag
& DFLAG
)
3190 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3195 if (prefixes
& PREFIX_DATA
)
3199 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3204 if (rex
& REX_MODE64
)
3206 USED_REX (REX_MODE64
);
3210 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
3212 /* operand size flag for cwtl, cbtw */
3216 else if (sizeflag
& DFLAG
)
3227 if (sizeflag
& DFLAG
)
3238 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3248 oappend (const char *s
)
3251 obufp
+= strlen (s
);
3257 if (prefixes
& PREFIX_CS
)
3259 used_prefixes
|= PREFIX_CS
;
3260 oappend ("%cs:" + intel_syntax
);
3262 if (prefixes
& PREFIX_DS
)
3264 used_prefixes
|= PREFIX_DS
;
3265 oappend ("%ds:" + intel_syntax
);
3267 if (prefixes
& PREFIX_SS
)
3269 used_prefixes
|= PREFIX_SS
;
3270 oappend ("%ss:" + intel_syntax
);
3272 if (prefixes
& PREFIX_ES
)
3274 used_prefixes
|= PREFIX_ES
;
3275 oappend ("%es:" + intel_syntax
);
3277 if (prefixes
& PREFIX_FS
)
3279 used_prefixes
|= PREFIX_FS
;
3280 oappend ("%fs:" + intel_syntax
);
3282 if (prefixes
& PREFIX_GS
)
3284 used_prefixes
|= PREFIX_GS
;
3285 oappend ("%gs:" + intel_syntax
);
3290 OP_indirE (int bytemode
, int sizeflag
)
3294 OP_E (bytemode
, sizeflag
);
3298 print_operand_value (char *buf
, int hex
, bfd_vma disp
)
3300 if (address_mode
== mode_64bit
)
3308 sprintf_vma (tmp
, disp
);
3309 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++);
3310 strcpy (buf
+ 2, tmp
+ i
);
3314 bfd_signed_vma v
= disp
;
3321 /* Check for possible overflow on 0x8000000000000000. */
3324 strcpy (buf
, "9223372036854775808");
3338 tmp
[28 - i
] = (v
% 10) + '0';
3342 strcpy (buf
, tmp
+ 29 - i
);
3348 sprintf (buf
, "0x%x", (unsigned int) disp
);
3350 sprintf (buf
, "%d", (int) disp
);
3355 intel_operand_size (int bytemode
, int sizeflag
)
3360 oappend ("BYTE PTR ");
3364 oappend ("WORD PTR ");
3367 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
3369 oappend ("QWORD PTR ");
3370 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3376 USED_REX (REX_MODE64
);
3377 if (rex
& REX_MODE64
)
3378 oappend ("QWORD PTR ");
3379 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
3380 oappend ("DWORD PTR ");
3382 oappend ("WORD PTR ");
3383 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3386 oappend ("DWORD PTR ");
3389 oappend ("QWORD PTR ");
3392 if (address_mode
== mode_64bit
)
3393 oappend ("QWORD PTR ");
3395 oappend ("DWORD PTR ");
3398 if (sizeflag
& DFLAG
)
3399 oappend ("FWORD PTR ");
3401 oappend ("DWORD PTR ");
3402 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3405 oappend ("TBYTE PTR ");
3408 oappend ("XMMWORD PTR ");
3416 OP_E (int bytemode
, int sizeflag
)
3421 USED_REX (REX_EXTZ
);
3425 /* Skip mod/rm byte. */
3436 oappend (names8rex
[rm
+ add
]);
3438 oappend (names8
[rm
+ add
]);
3441 oappend (names16
[rm
+ add
]);
3444 oappend (names32
[rm
+ add
]);
3447 oappend (names64
[rm
+ add
]);
3450 if (address_mode
== mode_64bit
)
3451 oappend (names64
[rm
+ add
]);
3453 oappend (names32
[rm
+ add
]);
3456 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
3458 oappend (names64
[rm
+ add
]);
3459 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3467 USED_REX (REX_MODE64
);
3468 if (rex
& REX_MODE64
)
3469 oappend (names64
[rm
+ add
]);
3470 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
3471 oappend (names32
[rm
+ add
]);
3473 oappend (names16
[rm
+ add
]);
3474 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3479 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3487 intel_operand_size (bytemode
, sizeflag
);
3490 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
) /* 32 bit address mode */
3505 FETCH_DATA (the_info
, codep
+ 1);
3506 index
= (*codep
>> 3) & 7;
3507 if (address_mode
== mode_64bit
|| index
!= 0x4)
3508 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3509 scale
= (*codep
>> 6) & 3;
3511 USED_REX (REX_EXTY
);
3521 if ((base
& 7) == 5)
3524 if (address_mode
== mode_64bit
&& !havesib
)
3530 FETCH_DATA (the_info
, codep
+ 1);
3532 if ((disp
& 0x80) != 0)
3541 if (mod
!= 0 || (base
& 7) == 5)
3543 print_operand_value (scratchbuf
, !riprel
, disp
);
3544 oappend (scratchbuf
);
3552 if (havebase
|| (havesib
&& (index
!= 4 || scale
!= 0)))
3554 *obufp
++ = open_char
;
3555 if (intel_syntax
&& riprel
)
3559 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
3560 ? names64
[base
] : names32
[base
]);
3565 if (!intel_syntax
|| havebase
)
3567 *obufp
++ = separator_char
;
3570 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
3571 ? names64
[index
] : names32
[index
]);
3573 if (scale
!= 0 || (!intel_syntax
&& index
!= 4))
3575 *obufp
++ = scale_char
;
3577 sprintf (scratchbuf
, "%d", 1 << scale
);
3578 oappend (scratchbuf
);
3581 if (intel_syntax
&& disp
)
3583 if ((bfd_signed_vma
) disp
> 0)
3592 disp
= - (bfd_signed_vma
) disp
;
3595 print_operand_value (scratchbuf
, mod
!= 1, disp
);
3596 oappend (scratchbuf
);
3599 *obufp
++ = close_char
;
3602 else if (intel_syntax
)
3604 if (mod
!= 0 || (base
& 7) == 5)
3606 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3607 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
3611 oappend (names_seg
[ds_reg
- es_reg
]);
3614 print_operand_value (scratchbuf
, 1, disp
);
3615 oappend (scratchbuf
);
3620 { /* 16 bit address mode */
3627 if ((disp
& 0x8000) != 0)
3632 FETCH_DATA (the_info
, codep
+ 1);
3634 if ((disp
& 0x80) != 0)
3639 if ((disp
& 0x8000) != 0)
3645 if (mod
!= 0 || rm
== 6)
3647 print_operand_value (scratchbuf
, 0, disp
);
3648 oappend (scratchbuf
);
3651 if (mod
!= 0 || rm
!= 6)
3653 *obufp
++ = open_char
;
3655 oappend (index16
[rm
]);
3656 if (intel_syntax
&& disp
)
3658 if ((bfd_signed_vma
) disp
> 0)
3667 disp
= - (bfd_signed_vma
) disp
;
3670 print_operand_value (scratchbuf
, mod
!= 1, disp
);
3671 oappend (scratchbuf
);
3674 *obufp
++ = close_char
;
3677 else if (intel_syntax
)
3679 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3680 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
3684 oappend (names_seg
[ds_reg
- es_reg
]);
3687 print_operand_value (scratchbuf
, 1, disp
& 0xffff);
3688 oappend (scratchbuf
);
3694 OP_G (int bytemode
, int sizeflag
)
3697 USED_REX (REX_EXTX
);
3705 oappend (names8rex
[reg
+ add
]);
3707 oappend (names8
[reg
+ add
]);
3710 oappend (names16
[reg
+ add
]);
3713 oappend (names32
[reg
+ add
]);
3716 oappend (names64
[reg
+ add
]);
3721 USED_REX (REX_MODE64
);
3722 if (rex
& REX_MODE64
)
3723 oappend (names64
[reg
+ add
]);
3724 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
3725 oappend (names32
[reg
+ add
]);
3727 oappend (names16
[reg
+ add
]);
3728 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3731 if (address_mode
== mode_64bit
)
3732 oappend (names64
[reg
+ add
]);
3734 oappend (names32
[reg
+ add
]);
3737 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3750 FETCH_DATA (the_info
, codep
+ 8);
3751 a
= *codep
++ & 0xff;
3752 a
|= (*codep
++ & 0xff) << 8;
3753 a
|= (*codep
++ & 0xff) << 16;
3754 a
|= (*codep
++ & 0xff) << 24;
3755 b
= *codep
++ & 0xff;
3756 b
|= (*codep
++ & 0xff) << 8;
3757 b
|= (*codep
++ & 0xff) << 16;
3758 b
|= (*codep
++ & 0xff) << 24;
3759 x
= a
+ ((bfd_vma
) b
<< 32);
3767 static bfd_signed_vma
3770 bfd_signed_vma x
= 0;
3772 FETCH_DATA (the_info
, codep
+ 4);
3773 x
= *codep
++ & (bfd_signed_vma
) 0xff;
3774 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
3775 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
3776 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
3780 static bfd_signed_vma
3783 bfd_signed_vma x
= 0;
3785 FETCH_DATA (the_info
, codep
+ 4);
3786 x
= *codep
++ & (bfd_signed_vma
) 0xff;
3787 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
3788 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
3789 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
3791 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
3801 FETCH_DATA (the_info
, codep
+ 2);
3802 x
= *codep
++ & 0xff;
3803 x
|= (*codep
++ & 0xff) << 8;
3808 set_op (bfd_vma op
, int riprel
)
3810 op_index
[op_ad
] = op_ad
;
3811 if (address_mode
== mode_64bit
)
3813 op_address
[op_ad
] = op
;
3814 op_riprel
[op_ad
] = riprel
;
3818 /* Mask to get a 32-bit address. */
3819 op_address
[op_ad
] = op
& 0xffffffff;
3820 op_riprel
[op_ad
] = riprel
& 0xffffffff;
3825 OP_REG (int code
, int sizeflag
)
3829 USED_REX (REX_EXTZ
);
3841 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
3842 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
3843 s
= names16
[code
- ax_reg
+ add
];
3845 case es_reg
: case ss_reg
: case cs_reg
:
3846 case ds_reg
: case fs_reg
: case gs_reg
:
3847 s
= names_seg
[code
- es_reg
+ add
];
3849 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
3850 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
3853 s
= names8rex
[code
- al_reg
+ add
];
3855 s
= names8
[code
- al_reg
];
3857 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
3858 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
3859 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
3861 s
= names64
[code
- rAX_reg
+ add
];
3864 code
+= eAX_reg
- rAX_reg
;
3866 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
3867 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
3868 USED_REX (REX_MODE64
);
3869 if (rex
& REX_MODE64
)
3870 s
= names64
[code
- eAX_reg
+ add
];
3871 else if (sizeflag
& DFLAG
)
3872 s
= names32
[code
- eAX_reg
+ add
];
3874 s
= names16
[code
- eAX_reg
+ add
];
3875 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3878 s
= INTERNAL_DISASSEMBLER_ERROR
;
3885 OP_IMREG (int code
, int sizeflag
)
3897 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
3898 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
3899 s
= names16
[code
- ax_reg
];
3901 case es_reg
: case ss_reg
: case cs_reg
:
3902 case ds_reg
: case fs_reg
: case gs_reg
:
3903 s
= names_seg
[code
- es_reg
];
3905 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
3906 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
3909 s
= names8rex
[code
- al_reg
];
3911 s
= names8
[code
- al_reg
];
3913 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
3914 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
3915 USED_REX (REX_MODE64
);
3916 if (rex
& REX_MODE64
)
3917 s
= names64
[code
- eAX_reg
];
3918 else if (sizeflag
& DFLAG
)
3919 s
= names32
[code
- eAX_reg
];
3921 s
= names16
[code
- eAX_reg
];
3922 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3925 s
= INTERNAL_DISASSEMBLER_ERROR
;
3932 OP_I (int bytemode
, int sizeflag
)
3935 bfd_signed_vma mask
= -1;
3940 FETCH_DATA (the_info
, codep
+ 1);
3945 if (address_mode
== mode_64bit
)
3952 USED_REX (REX_MODE64
);
3953 if (rex
& REX_MODE64
)
3955 else if (sizeflag
& DFLAG
)
3965 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3976 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3981 scratchbuf
[0] = '$';
3982 print_operand_value (scratchbuf
+ 1, 1, op
);
3983 oappend (scratchbuf
+ intel_syntax
);
3984 scratchbuf
[0] = '\0';
3988 OP_I64 (int bytemode
, int sizeflag
)
3991 bfd_signed_vma mask
= -1;
3993 if (address_mode
!= mode_64bit
)
3995 OP_I (bytemode
, sizeflag
);
4002 FETCH_DATA (the_info
, codep
+ 1);
4007 USED_REX (REX_MODE64
);
4008 if (rex
& REX_MODE64
)
4010 else if (sizeflag
& DFLAG
)
4020 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4027 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4032 scratchbuf
[0] = '$';
4033 print_operand_value (scratchbuf
+ 1, 1, op
);
4034 oappend (scratchbuf
+ intel_syntax
);
4035 scratchbuf
[0] = '\0';
4039 OP_sI (int bytemode
, int sizeflag
)
4042 bfd_signed_vma mask
= -1;
4047 FETCH_DATA (the_info
, codep
+ 1);
4049 if ((op
& 0x80) != 0)
4054 USED_REX (REX_MODE64
);
4055 if (rex
& REX_MODE64
)
4057 else if (sizeflag
& DFLAG
)
4066 if ((op
& 0x8000) != 0)
4069 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4074 if ((op
& 0x8000) != 0)
4078 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4082 scratchbuf
[0] = '$';
4083 print_operand_value (scratchbuf
+ 1, 1, op
);
4084 oappend (scratchbuf
+ intel_syntax
);
4088 OP_J (int bytemode
, int sizeflag
)
4096 FETCH_DATA (the_info
, codep
+ 1);
4098 if ((disp
& 0x80) != 0)
4102 if ((sizeflag
& DFLAG
) || (rex
& REX_MODE64
))
4107 /* For some reason, a data16 prefix on a jump instruction
4108 means that the pc is masked to 16 bits after the
4109 displacement is added! */
4114 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4117 disp
= (start_pc
+ codep
- start_codep
+ disp
) & mask
;
4119 print_operand_value (scratchbuf
, 1, disp
);
4120 oappend (scratchbuf
);
4124 OP_SEG (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4126 oappend (names_seg
[reg
]);
4130 OP_DIR (int dummy ATTRIBUTE_UNUSED
, int sizeflag
)
4134 if (sizeflag
& DFLAG
)
4144 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4146 sprintf (scratchbuf
, "0x%x:0x%x", seg
, offset
);
4148 sprintf (scratchbuf
, "$0x%x,$0x%x", seg
, offset
);
4149 oappend (scratchbuf
);
4153 OP_OFF (int bytemode
, int sizeflag
)
4157 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
4158 intel_operand_size (bytemode
, sizeflag
);
4161 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
4168 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
4169 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
4171 oappend (names_seg
[ds_reg
- es_reg
]);
4175 print_operand_value (scratchbuf
, 1, off
);
4176 oappend (scratchbuf
);
4180 OP_OFF64 (int bytemode
, int sizeflag
)
4184 if (address_mode
!= mode_64bit
)
4186 OP_OFF (bytemode
, sizeflag
);
4190 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
4191 intel_operand_size (bytemode
, sizeflag
);
4198 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
4199 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
4201 oappend (names_seg
[ds_reg
- es_reg
]);
4205 print_operand_value (scratchbuf
, 1, off
);
4206 oappend (scratchbuf
);
4210 ptr_reg (int code
, int sizeflag
)
4214 *obufp
++ = open_char
;
4215 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4216 if (address_mode
== mode_64bit
)
4218 if (!(sizeflag
& AFLAG
))
4219 s
= names32
[code
- eAX_reg
];
4221 s
= names64
[code
- eAX_reg
];
4223 else if (sizeflag
& AFLAG
)
4224 s
= names32
[code
- eAX_reg
];
4226 s
= names16
[code
- eAX_reg
];
4228 *obufp
++ = close_char
;
4233 OP_ESreg (int code
, int sizeflag
)
4236 intel_operand_size (codep
[-1] & 1 ? v_mode
: b_mode
, sizeflag
);
4237 oappend ("%es:" + intel_syntax
);
4238 ptr_reg (code
, sizeflag
);
4242 OP_DSreg (int code
, int sizeflag
)
4245 intel_operand_size (codep
[-1] != 0xd7 && (codep
[-1] & 1)
4256 prefixes
|= PREFIX_DS
;
4258 ptr_reg (code
, sizeflag
);
4262 OP_C (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4267 USED_REX (REX_EXTX
);
4270 else if (address_mode
!= mode_64bit
&& (prefixes
& PREFIX_LOCK
))
4272 used_prefixes
|= PREFIX_LOCK
;
4275 sprintf (scratchbuf
, "%%cr%d", reg
+ add
);
4276 oappend (scratchbuf
+ intel_syntax
);
4280 OP_D (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4283 USED_REX (REX_EXTX
);
4287 sprintf (scratchbuf
, "db%d", reg
+ add
);
4289 sprintf (scratchbuf
, "%%db%d", reg
+ add
);
4290 oappend (scratchbuf
);
4294 OP_T (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4296 sprintf (scratchbuf
, "%%tr%d", reg
);
4297 oappend (scratchbuf
+ intel_syntax
);
4301 OP_Rd (int bytemode
, int sizeflag
)
4304 OP_E (bytemode
, sizeflag
);
4310 OP_MMX (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4312 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4313 if (prefixes
& PREFIX_DATA
)
4316 USED_REX (REX_EXTX
);
4319 sprintf (scratchbuf
, "%%xmm%d", reg
+ add
);
4322 sprintf (scratchbuf
, "%%mm%d", reg
);
4323 oappend (scratchbuf
+ intel_syntax
);
4327 OP_XMM (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4330 USED_REX (REX_EXTX
);
4333 sprintf (scratchbuf
, "%%xmm%d", reg
+ add
);
4334 oappend (scratchbuf
+ intel_syntax
);
4338 OP_EM (int bytemode
, int sizeflag
)
4342 if (intel_syntax
&& bytemode
== v_mode
)
4344 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
4345 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4347 OP_E (bytemode
, sizeflag
);
4351 /* Skip mod/rm byte. */
4354 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4355 if (prefixes
& PREFIX_DATA
)
4359 USED_REX (REX_EXTZ
);
4362 sprintf (scratchbuf
, "%%xmm%d", rm
+ add
);
4365 sprintf (scratchbuf
, "%%mm%d", rm
);
4366 oappend (scratchbuf
+ intel_syntax
);
4369 /* cvt* are the only instructions in sse2 which have
4370 both SSE and MMX operands and also have 0x66 prefix
4371 in their opcode. 0x66 was originally used to differentiate
4372 between SSE and MMX instruction(operands). So we have to handle the
4373 cvt* separately using OP_EMC and OP_MXC */
4375 OP_EMC (int bytemode
, int sizeflag
)
4379 if (intel_syntax
&& bytemode
== v_mode
)
4381 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
4382 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4384 OP_E (bytemode
, sizeflag
);
4388 /* Skip mod/rm byte. */
4391 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4392 sprintf (scratchbuf
, "%%mm%d", rm
);
4393 oappend (scratchbuf
+ intel_syntax
);
4397 OP_MXC (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4399 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4400 sprintf (scratchbuf
, "%%mm%d", reg
);
4401 oappend (scratchbuf
+ intel_syntax
);
4405 OP_EX (int bytemode
, int sizeflag
)
4410 if (intel_syntax
&& bytemode
== v_mode
)
4412 switch (prefixes
& (PREFIX_DATA
|PREFIX_REPZ
|PREFIX_REPNZ
))
4414 case 0: bytemode
= x_mode
; break;
4415 case PREFIX_REPZ
: bytemode
= d_mode
; used_prefixes
|= PREFIX_REPZ
; break;
4416 case PREFIX_DATA
: bytemode
= x_mode
; used_prefixes
|= PREFIX_DATA
; break;
4417 case PREFIX_REPNZ
: bytemode
= q_mode
; used_prefixes
|= PREFIX_REPNZ
; break;
4418 default: bytemode
= 0; break;
4421 OP_E (bytemode
, sizeflag
);
4424 USED_REX (REX_EXTZ
);
4428 /* Skip mod/rm byte. */
4431 sprintf (scratchbuf
, "%%xmm%d", rm
+ add
);
4432 oappend (scratchbuf
+ intel_syntax
);
4436 OP_MS (int bytemode
, int sizeflag
)
4439 OP_EM (bytemode
, sizeflag
);
4445 OP_XS (int bytemode
, int sizeflag
)
4448 OP_EX (bytemode
, sizeflag
);
4454 OP_M (int bytemode
, int sizeflag
)
4457 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4459 OP_E (bytemode
, sizeflag
);
4463 OP_0f07 (int bytemode
, int sizeflag
)
4465 if (mod
!= 3 || rm
!= 0)
4468 OP_E (bytemode
, sizeflag
);
4472 OP_0fae (int bytemode
, int sizeflag
)
4477 strcpy (obuf
+ strlen (obuf
) - sizeof ("clflush") + 1, "sfence");
4479 if (reg
< 5 || rm
!= 0)
4481 BadOp (); /* bad sfence, mfence, or lfence */
4487 BadOp (); /* bad clflush */
4491 OP_E (bytemode
, sizeflag
);
4494 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
4495 32bit mode and "xchg %rax,%rax" in 64bit mode. NOP with REPZ prefix
4496 is called PAUSE. We display "xchg %ax,%ax" instead of "data16 nop".
4500 NOP_Fixup1 (int bytemode
, int sizeflag
)
4502 if (prefixes
== PREFIX_REPZ
)
4503 strcpy (obuf
, "pause");
4504 else if (prefixes
== PREFIX_DATA
4505 || ((rex
& REX_MODE64
) && rex
!= 0x48))
4506 OP_REG (bytemode
, sizeflag
);
4508 strcpy (obuf
, "nop");
4512 NOP_Fixup2 (int bytemode
, int sizeflag
)
4514 if (prefixes
== PREFIX_DATA
4515 || ((rex
& REX_MODE64
) && rex
!= 0x48))
4516 OP_IMREG (bytemode
, sizeflag
);
4519 static const char *const Suffix3DNow
[] = {
4520 /* 00 */ NULL
, NULL
, NULL
, NULL
,
4521 /* 04 */ NULL
, NULL
, NULL
, NULL
,
4522 /* 08 */ NULL
, NULL
, NULL
, NULL
,
4523 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
4524 /* 10 */ NULL
, NULL
, NULL
, NULL
,
4525 /* 14 */ NULL
, NULL
, NULL
, NULL
,
4526 /* 18 */ NULL
, NULL
, NULL
, NULL
,
4527 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
4528 /* 20 */ NULL
, NULL
, NULL
, NULL
,
4529 /* 24 */ NULL
, NULL
, NULL
, NULL
,
4530 /* 28 */ NULL
, NULL
, NULL
, NULL
,
4531 /* 2C */ NULL
, NULL
, NULL
, NULL
,
4532 /* 30 */ NULL
, NULL
, NULL
, NULL
,
4533 /* 34 */ NULL
, NULL
, NULL
, NULL
,
4534 /* 38 */ NULL
, NULL
, NULL
, NULL
,
4535 /* 3C */ NULL
, NULL
, NULL
, NULL
,
4536 /* 40 */ NULL
, NULL
, NULL
, NULL
,
4537 /* 44 */ NULL
, NULL
, NULL
, NULL
,
4538 /* 48 */ NULL
, NULL
, NULL
, NULL
,
4539 /* 4C */ NULL
, NULL
, NULL
, NULL
,
4540 /* 50 */ NULL
, NULL
, NULL
, NULL
,
4541 /* 54 */ NULL
, NULL
, NULL
, NULL
,
4542 /* 58 */ NULL
, NULL
, NULL
, NULL
,
4543 /* 5C */ NULL
, NULL
, NULL
, NULL
,
4544 /* 60 */ NULL
, NULL
, NULL
, NULL
,
4545 /* 64 */ NULL
, NULL
, NULL
, NULL
,
4546 /* 68 */ NULL
, NULL
, NULL
, NULL
,
4547 /* 6C */ NULL
, NULL
, NULL
, NULL
,
4548 /* 70 */ NULL
, NULL
, NULL
, NULL
,
4549 /* 74 */ NULL
, NULL
, NULL
, NULL
,
4550 /* 78 */ NULL
, NULL
, NULL
, NULL
,
4551 /* 7C */ NULL
, NULL
, NULL
, NULL
,
4552 /* 80 */ NULL
, NULL
, NULL
, NULL
,
4553 /* 84 */ NULL
, NULL
, NULL
, NULL
,
4554 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
4555 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
4556 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
4557 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
4558 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
4559 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
4560 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
4561 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
4562 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
4563 /* AC */ NULL
, NULL
, "pfacc", NULL
,
4564 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
4565 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pfmulhrw",
4566 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
4567 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
4568 /* C0 */ NULL
, NULL
, NULL
, NULL
,
4569 /* C4 */ NULL
, NULL
, NULL
, NULL
,
4570 /* C8 */ NULL
, NULL
, NULL
, NULL
,
4571 /* CC */ NULL
, NULL
, NULL
, NULL
,
4572 /* D0 */ NULL
, NULL
, NULL
, NULL
,
4573 /* D4 */ NULL
, NULL
, NULL
, NULL
,
4574 /* D8 */ NULL
, NULL
, NULL
, NULL
,
4575 /* DC */ NULL
, NULL
, NULL
, NULL
,
4576 /* E0 */ NULL
, NULL
, NULL
, NULL
,
4577 /* E4 */ NULL
, NULL
, NULL
, NULL
,
4578 /* E8 */ NULL
, NULL
, NULL
, NULL
,
4579 /* EC */ NULL
, NULL
, NULL
, NULL
,
4580 /* F0 */ NULL
, NULL
, NULL
, NULL
,
4581 /* F4 */ NULL
, NULL
, NULL
, NULL
,
4582 /* F8 */ NULL
, NULL
, NULL
, NULL
,
4583 /* FC */ NULL
, NULL
, NULL
, NULL
,
4587 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4589 const char *mnemonic
;
4591 FETCH_DATA (the_info
, codep
+ 1);
4592 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4593 place where an 8-bit immediate would normally go. ie. the last
4594 byte of the instruction. */
4595 obufp
= obuf
+ strlen (obuf
);
4596 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
4601 /* Since a variable sized modrm/sib chunk is between the start
4602 of the opcode (0x0f0f) and the opcode suffix, we need to do
4603 all the modrm processing first, and don't know until now that
4604 we have a bad opcode. This necessitates some cleaning up. */
4611 static const char *simd_cmp_op
[] = {
4623 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4625 unsigned int cmp_type
;
4627 FETCH_DATA (the_info
, codep
+ 1);
4628 obufp
= obuf
+ strlen (obuf
);
4629 cmp_type
= *codep
++ & 0xff;
4632 char suffix1
= 'p', suffix2
= 's';
4633 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
4634 if (prefixes
& PREFIX_REPZ
)
4638 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4639 if (prefixes
& PREFIX_DATA
)
4643 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
4644 if (prefixes
& PREFIX_REPNZ
)
4645 suffix1
= 's', suffix2
= 'd';
4648 sprintf (scratchbuf
, "cmp%s%c%c",
4649 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
4650 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
4651 oappend (scratchbuf
);
4655 /* We have a bad extension byte. Clean up. */
4663 SIMD_Fixup (int extrachar
, int sizeflag ATTRIBUTE_UNUSED
)
4665 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4666 forms of these instructions. */
4669 char *p
= obuf
+ strlen (obuf
);
4672 *(p
- 1) = *(p
- 2);
4673 *(p
- 2) = *(p
- 3);
4674 *(p
- 3) = extrachar
;
4679 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
4681 if (mod
== 3 && reg
== 1 && rm
<= 1)
4683 /* Override "sidt". */
4684 size_t olen
= strlen (obuf
);
4685 char *p
= obuf
+ olen
- 4;
4686 const char **names
= (address_mode
== mode_64bit
4687 ? names64
: names32
);
4689 /* We might have a suffix when disassembling with -Msuffix. */
4693 /* Remove "addr16/addr32" if we aren't in Intel mode. */
4695 && (prefixes
& PREFIX_ADDR
)
4698 && strncmp (p
- 7, "addr", 4) == 0
4699 && (strncmp (p
- 3, "16", 2) == 0
4700 || strncmp (p
- 3, "32", 2) == 0))
4705 /* mwait %eax,%ecx */
4706 strcpy (p
, "mwait");
4708 strcpy (op1out
, names
[0]);
4712 /* monitor %eax,%ecx,%edx" */
4713 strcpy (p
, "monitor");
4716 const char **op1_names
;
4717 if (!(prefixes
& PREFIX_ADDR
))
4718 op1_names
= (address_mode
== mode_16bit
4722 op1_names
= (address_mode
!= mode_32bit
4723 ? names32
: names16
);
4724 used_prefixes
|= PREFIX_ADDR
;
4726 strcpy (op1out
, op1_names
[0]);
4727 strcpy (op3out
, names
[2]);
4732 strcpy (op2out
, names
[1]);
4743 SVME_Fixup (int bytemode
, int sizeflag
)
4775 OP_M (bytemode
, sizeflag
);
4778 /* Override "lidt". */
4779 p
= obuf
+ strlen (obuf
) - 4;
4780 /* We might have a suffix. */
4784 if (!(prefixes
& PREFIX_ADDR
))
4789 used_prefixes
|= PREFIX_ADDR
;
4793 strcpy (op2out
, names32
[1]);
4799 *obufp
++ = open_char
;
4800 if (address_mode
== mode_64bit
|| (sizeflag
& AFLAG
))
4804 strcpy (obufp
, alt
);
4805 obufp
+= strlen (alt
);
4806 *obufp
++ = close_char
;
4813 INVLPG_Fixup (int bytemode
, int sizeflag
)
4826 OP_M (bytemode
, sizeflag
);
4829 /* Override "invlpg". */
4830 strcpy (obuf
+ strlen (obuf
) - 6, alt
);
4837 /* Throw away prefixes and 1st. opcode byte. */
4838 codep
= insn_codep
+ 1;
4843 SEG_Fixup (int extrachar
, int sizeflag
)
4847 /* We need to add a proper suffix with
4858 if (prefixes
& PREFIX_DATA
)
4862 USED_REX (REX_MODE64
);
4863 if (rex
& REX_MODE64
)
4868 strcat (obuf
, suffix
);
4872 /* We need to fix the suffix for
4879 Override "mov[l|q]". */
4880 char *p
= obuf
+ strlen (obuf
) - 1;
4882 /* We might not have a suffix. */
4888 OP_E (extrachar
, sizeflag
);
4892 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
4894 if (mod
== 3 && reg
== 0 && rm
>=1 && rm
<= 4)
4896 /* Override "sgdt". */
4897 char *p
= obuf
+ strlen (obuf
) - 4;
4899 /* We might have a suffix when disassembling with -Msuffix. */
4906 strcpy (p
, "vmcall");
4909 strcpy (p
, "vmlaunch");
4912 strcpy (p
, "vmresume");
4915 strcpy (p
, "vmxoff");
4926 OP_VMX (int bytemode
, int sizeflag
)
4928 used_prefixes
|= (prefixes
& (PREFIX_DATA
| PREFIX_REPZ
));
4929 if (prefixes
& PREFIX_DATA
)
4930 strcpy (obuf
, "vmclear");
4931 else if (prefixes
& PREFIX_REPZ
)
4932 strcpy (obuf
, "vmxon");
4934 strcpy (obuf
, "vmptrld");
4935 OP_E (bytemode
, sizeflag
);
4939 REP_Fixup (int bytemode
, int sizeflag
)
4941 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
4945 if (prefixes
& PREFIX_REPZ
)
4946 switch (*insn_codep
)
4948 case 0x6e: /* outsb */
4949 case 0x6f: /* outsw/outsl */
4950 case 0xa4: /* movsb */
4951 case 0xa5: /* movsw/movsl/movsq */
4957 case 0xaa: /* stosb */
4958 case 0xab: /* stosw/stosl/stosq */
4959 case 0xac: /* lodsb */
4960 case 0xad: /* lodsw/lodsl/lodsq */
4961 if (!intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
4966 case 0x6c: /* insb */
4967 case 0x6d: /* insl/insw */
4983 olen
= strlen (obuf
);
4984 p
= obuf
+ olen
- ilen
- 1 - 4;
4985 /* Handle "repz [addr16|addr32]". */
4986 if ((prefixes
& PREFIX_ADDR
))
4989 memmove (p
+ 3, p
+ 4, olen
- (p
+ 3 - obuf
));
4997 OP_IMREG (bytemode
, sizeflag
);
5000 OP_ESreg (bytemode
, sizeflag
);
5003 OP_DSreg (bytemode
, sizeflag
);