1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
23 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
25 modified by John Hassey (hassey@dg-rtp.dg.com)
26 x86-64 support added by Jan Hubicka (jh@suse.cz)
27 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
29 /* The main tables describing the instructions is essentially a copy
30 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
31 Programmers Manual. Usually, there is a capital letter, followed
32 by a small letter. The capital letter tell the addressing mode,
33 and the small letter tells about the operand size. Refer to
34 the Intel manual for details. */
39 #include "opcode/i386.h"
43 static int fetch_data (struct disassemble_info
*, bfd_byte
*);
44 static void ckprefix (void);
45 static const char *prefix_name (int, int);
46 static int print_insn (bfd_vma
, disassemble_info
*);
47 static void dofloat (int);
48 static void OP_ST (int, int);
49 static void OP_STi (int, int);
50 static int putop (const char *, int);
51 static void oappend (const char *);
52 static void append_seg (void);
53 static void OP_indirE (int, int);
54 static void print_operand_value (char *, int, bfd_vma
);
55 static void print_displacement (char *, bfd_vma
);
56 static void OP_E (int, int);
57 static void OP_G (int, int);
58 static bfd_vma
get64 (void);
59 static bfd_signed_vma
get32 (void);
60 static bfd_signed_vma
get32s (void);
61 static int get16 (void);
62 static void set_op (bfd_vma
, int);
63 static void OP_Skip_MODRM (int, int);
64 static void OP_REG (int, int);
65 static void OP_IMREG (int, int);
66 static void OP_I (int, int);
67 static void OP_I64 (int, int);
68 static void OP_sI (int, int);
69 static void OP_J (int, int);
70 static void OP_SEG (int, int);
71 static void OP_DIR (int, int);
72 static void OP_OFF (int, int);
73 static void OP_OFF64 (int, int);
74 static void ptr_reg (int, int);
75 static void OP_ESreg (int, int);
76 static void OP_DSreg (int, int);
77 static void OP_C (int, int);
78 static void OP_D (int, int);
79 static void OP_T (int, int);
80 static void OP_R (int, int);
81 static void OP_MMX (int, int);
82 static void OP_XMM (int, int);
83 static void OP_EM (int, int);
84 static void OP_EX (int, int);
85 static void OP_EMC (int,int);
86 static void OP_MXC (int,int);
87 static void OP_MS (int, int);
88 static void OP_XS (int, int);
89 static void OP_M (int, int);
90 static void OP_0f07 (int, int);
91 static void OP_Monitor (int, int);
92 static void OP_Mwait (int, int);
93 static void NOP_Fixup1 (int, int);
94 static void NOP_Fixup2 (int, int);
95 static void OP_3DNowSuffix (int, int);
96 static void OP_SIMD_Suffix (int, int);
97 static void SIMD_Fixup (int, int);
98 static void SVME_Fixup (int, int);
99 static void INVLPG_Fixup (int, int);
100 static void BadOp (void);
101 static void REP_Fixup (int, int);
102 static void CMPXCHG8B_Fixup (int, int);
103 static void XMM_Fixup (int, int);
104 static void CRC32_Fixup (int, int);
107 /* Points to first byte not fetched. */
108 bfd_byte
*max_fetched
;
109 bfd_byte the_buffer
[MAX_MNEM_SIZE
];
122 enum address_mode address_mode
;
124 /* Flags for the prefixes for the current instruction. See below. */
127 /* REX prefix the current instruction. See below. */
129 /* Bits of REX we've already used. */
131 /* Mark parts used in the REX prefix. When we are testing for
132 empty prefix (for 8bit register REX extension), just mask it
133 out. Otherwise test for REX bit is excuse for existence of REX
134 only in case value is nonzero. */
135 #define USED_REX(value) \
140 rex_used |= (value) | REX_OPCODE; \
143 rex_used |= REX_OPCODE; \
146 /* Flags for prefixes which we somehow handled when printing the
147 current instruction. */
148 static int used_prefixes
;
150 /* Flags stored in PREFIXES. */
151 #define PREFIX_REPZ 1
152 #define PREFIX_REPNZ 2
153 #define PREFIX_LOCK 4
155 #define PREFIX_SS 0x10
156 #define PREFIX_DS 0x20
157 #define PREFIX_ES 0x40
158 #define PREFIX_FS 0x80
159 #define PREFIX_GS 0x100
160 #define PREFIX_DATA 0x200
161 #define PREFIX_ADDR 0x400
162 #define PREFIX_FWAIT 0x800
164 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
165 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
167 #define FETCH_DATA(info, addr) \
168 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
169 ? 1 : fetch_data ((info), (addr)))
172 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
175 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
176 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
178 if (addr
<= priv
->the_buffer
+ MAX_MNEM_SIZE
)
179 status
= (*info
->read_memory_func
) (start
,
181 addr
- priv
->max_fetched
,
187 /* If we did manage to read at least one byte, then
188 print_insn_i386 will do something sensible. Otherwise, print
189 an error. We do that here because this is where we know
191 if (priv
->max_fetched
== priv
->the_buffer
)
192 (*info
->memory_error_func
) (status
, start
, info
);
193 longjmp (priv
->bailout
, 1);
196 priv
->max_fetched
= addr
;
200 #define XX { NULL, 0 }
202 #define Eb { OP_E, b_mode }
203 #define Ev { OP_E, v_mode }
204 #define Ed { OP_E, d_mode }
205 #define Edq { OP_E, dq_mode }
206 #define Edqw { OP_E, dqw_mode }
207 #define Edqb { OP_E, dqb_mode }
208 #define Edqd { OP_E, dqd_mode }
209 #define Eq { OP_E, q_mode }
210 #define indirEv { OP_indirE, stack_v_mode }
211 #define indirEp { OP_indirE, f_mode }
212 #define stackEv { OP_E, stack_v_mode }
213 #define Em { OP_E, m_mode }
214 #define Ew { OP_E, w_mode }
215 #define M { OP_M, 0 } /* lea, lgdt, etc. */
216 #define Ma { OP_M, v_mode }
217 #define Mb { OP_M, b_mode }
218 #define Md { OP_M, d_mode }
219 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
220 #define Mq { OP_M, q_mode }
221 #define Gb { OP_G, b_mode }
222 #define Gv { OP_G, v_mode }
223 #define Gd { OP_G, d_mode }
224 #define Gdq { OP_G, dq_mode }
225 #define Gm { OP_G, m_mode }
226 #define Gw { OP_G, w_mode }
227 #define Rd { OP_R, d_mode }
228 #define Rm { OP_R, m_mode }
229 #define Ib { OP_I, b_mode }
230 #define sIb { OP_sI, b_mode } /* sign extened byte */
231 #define Iv { OP_I, v_mode }
232 #define Iq { OP_I, q_mode }
233 #define Iv64 { OP_I64, v_mode }
234 #define Iw { OP_I, w_mode }
235 #define I1 { OP_I, const_1_mode }
236 #define Jb { OP_J, b_mode }
237 #define Jv { OP_J, v_mode }
238 #define Cm { OP_C, m_mode }
239 #define Dm { OP_D, m_mode }
240 #define Td { OP_T, d_mode }
241 #define Skip_MODRM { OP_Skip_MODRM, 0 }
243 #define RMeAX { OP_REG, eAX_reg }
244 #define RMeBX { OP_REG, eBX_reg }
245 #define RMeCX { OP_REG, eCX_reg }
246 #define RMeDX { OP_REG, eDX_reg }
247 #define RMeSP { OP_REG, eSP_reg }
248 #define RMeBP { OP_REG, eBP_reg }
249 #define RMeSI { OP_REG, eSI_reg }
250 #define RMeDI { OP_REG, eDI_reg }
251 #define RMrAX { OP_REG, rAX_reg }
252 #define RMrBX { OP_REG, rBX_reg }
253 #define RMrCX { OP_REG, rCX_reg }
254 #define RMrDX { OP_REG, rDX_reg }
255 #define RMrSP { OP_REG, rSP_reg }
256 #define RMrBP { OP_REG, rBP_reg }
257 #define RMrSI { OP_REG, rSI_reg }
258 #define RMrDI { OP_REG, rDI_reg }
259 #define RMAL { OP_REG, al_reg }
260 #define RMAL { OP_REG, al_reg }
261 #define RMCL { OP_REG, cl_reg }
262 #define RMDL { OP_REG, dl_reg }
263 #define RMBL { OP_REG, bl_reg }
264 #define RMAH { OP_REG, ah_reg }
265 #define RMCH { OP_REG, ch_reg }
266 #define RMDH { OP_REG, dh_reg }
267 #define RMBH { OP_REG, bh_reg }
268 #define RMAX { OP_REG, ax_reg }
269 #define RMDX { OP_REG, dx_reg }
271 #define eAX { OP_IMREG, eAX_reg }
272 #define eBX { OP_IMREG, eBX_reg }
273 #define eCX { OP_IMREG, eCX_reg }
274 #define eDX { OP_IMREG, eDX_reg }
275 #define eSP { OP_IMREG, eSP_reg }
276 #define eBP { OP_IMREG, eBP_reg }
277 #define eSI { OP_IMREG, eSI_reg }
278 #define eDI { OP_IMREG, eDI_reg }
279 #define AL { OP_IMREG, al_reg }
280 #define CL { OP_IMREG, cl_reg }
281 #define DL { OP_IMREG, dl_reg }
282 #define BL { OP_IMREG, bl_reg }
283 #define AH { OP_IMREG, ah_reg }
284 #define CH { OP_IMREG, ch_reg }
285 #define DH { OP_IMREG, dh_reg }
286 #define BH { OP_IMREG, bh_reg }
287 #define AX { OP_IMREG, ax_reg }
288 #define DX { OP_IMREG, dx_reg }
289 #define zAX { OP_IMREG, z_mode_ax_reg }
290 #define indirDX { OP_IMREG, indir_dx_reg }
292 #define Sw { OP_SEG, w_mode }
293 #define Sv { OP_SEG, v_mode }
294 #define Ap { OP_DIR, 0 }
295 #define Ob { OP_OFF64, b_mode }
296 #define Ov { OP_OFF64, v_mode }
297 #define Xb { OP_DSreg, eSI_reg }
298 #define Xv { OP_DSreg, eSI_reg }
299 #define Xz { OP_DSreg, eSI_reg }
300 #define Yb { OP_ESreg, eDI_reg }
301 #define Yv { OP_ESreg, eDI_reg }
302 #define DSBX { OP_DSreg, eBX_reg }
304 #define es { OP_REG, es_reg }
305 #define ss { OP_REG, ss_reg }
306 #define cs { OP_REG, cs_reg }
307 #define ds { OP_REG, ds_reg }
308 #define fs { OP_REG, fs_reg }
309 #define gs { OP_REG, gs_reg }
311 #define MX { OP_MMX, 0 }
312 #define XM { OP_XMM, 0 }
313 #define EM { OP_EM, v_mode }
314 #define EMd { OP_EM, d_mode }
315 #define EMx { OP_EM, x_mode }
316 #define EXw { OP_EX, w_mode }
317 #define EXd { OP_EX, d_mode }
318 #define EXq { OP_EX, q_mode }
319 #define EXx { OP_EX, x_mode }
320 #define MS { OP_MS, v_mode }
321 #define XS { OP_XS, v_mode }
322 #define EMCq { OP_EMC, q_mode }
323 #define MXC { OP_MXC, 0 }
324 #define OPSUF { OP_3DNowSuffix, 0 }
325 #define OPSIMD { OP_SIMD_Suffix, 0 }
326 #define XMM0 { XMM_Fixup, 0 }
328 /* Used handle "rep" prefix for string instructions. */
329 #define Xbr { REP_Fixup, eSI_reg }
330 #define Xvr { REP_Fixup, eSI_reg }
331 #define Ybr { REP_Fixup, eDI_reg }
332 #define Yvr { REP_Fixup, eDI_reg }
333 #define Yzr { REP_Fixup, eDI_reg }
334 #define indirDXr { REP_Fixup, indir_dx_reg }
335 #define ALr { REP_Fixup, al_reg }
336 #define eAXr { REP_Fixup, eAX_reg }
338 #define cond_jump_flag { NULL, cond_jump_mode }
339 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
341 /* bits in sizeflag */
342 #define SUFFIX_ALWAYS 4
346 #define b_mode 1 /* byte operand */
347 #define v_mode 2 /* operand size depends on prefixes */
348 #define w_mode 3 /* word operand */
349 #define d_mode 4 /* double word operand */
350 #define q_mode 5 /* quad word operand */
351 #define t_mode 6 /* ten-byte operand */
352 #define x_mode 7 /* 16-byte XMM operand */
353 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
354 #define cond_jump_mode 9
355 #define loop_jcxz_mode 10
356 #define dq_mode 11 /* operand size depends on REX prefixes. */
357 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
358 #define f_mode 13 /* 4- or 6-byte pointer operand */
359 #define const_1_mode 14
360 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
361 #define z_mode 16 /* non-quad operand size depends on prefixes */
362 #define o_mode 17 /* 16-byte operand */
363 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
364 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
409 #define z_mode_ax_reg 149
410 #define indir_dx_reg 150
414 #define USE_PREFIX_USER_TABLE 3
415 #define X86_64_SPECIAL 4
416 #define IS_3BYTE_OPCODE 5
417 #define USE_OPC_EXT_TABLE 6
418 #define USE_OPC_EXT_RM_TABLE 7
420 #define FLOAT NULL, { { NULL, FLOATCODE } }
422 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
423 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
424 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
425 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
426 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
427 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
428 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
429 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
430 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
431 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
432 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
433 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
434 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
435 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
436 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
437 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
438 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
439 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
440 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
441 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
442 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
443 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
444 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
445 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
446 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
447 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
448 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
449 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
451 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
452 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
453 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
454 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
455 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
456 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
457 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
458 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
459 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
460 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
461 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
462 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
463 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
464 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
465 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
466 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
467 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
468 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
469 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
470 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
471 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
472 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
473 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
474 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
475 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
476 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
477 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
478 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
479 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
480 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
481 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
482 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
483 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
484 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
485 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
486 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
487 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
488 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
489 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
490 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
491 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
492 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
493 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
494 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
495 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
496 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
497 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
498 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
499 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
500 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
501 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
502 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
503 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
504 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
505 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
506 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
507 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
508 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
509 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
510 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
511 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
512 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
513 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
514 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
515 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
516 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
517 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
518 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
519 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
520 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
521 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
522 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
523 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
524 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
525 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
526 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
527 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
528 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
529 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
530 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
531 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
532 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
533 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
534 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
535 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
536 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
537 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
538 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
539 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
540 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
541 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
542 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
543 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
544 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
545 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
546 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
547 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
548 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
549 #define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
550 #define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
551 #define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
554 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
555 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
556 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
557 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
559 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
560 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
562 #define OPC_EXT_0 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 0 } }
563 #define OPC_EXT_1 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 1 } }
564 #define OPC_EXT_2 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 2 } }
565 #define OPC_EXT_3 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 3 } }
566 #define OPC_EXT_4 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 4 } }
567 #define OPC_EXT_5 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 5 } }
568 #define OPC_EXT_6 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 6 } }
569 #define OPC_EXT_7 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 7 } }
570 #define OPC_EXT_8 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 8 } }
571 #define OPC_EXT_9 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 9 } }
572 #define OPC_EXT_10 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 10 } }
573 #define OPC_EXT_11 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 11 } }
574 #define OPC_EXT_12 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 12 } }
575 #define OPC_EXT_13 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 13 } }
576 #define OPC_EXT_14 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 14 } }
577 #define OPC_EXT_15 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 15 } }
578 #define OPC_EXT_16 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 16 } }
579 #define OPC_EXT_17 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 17 } }
580 #define OPC_EXT_18 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 18 } }
581 #define OPC_EXT_19 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 19 } }
582 #define OPC_EXT_20 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 20 } }
583 #define OPC_EXT_21 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 21 } }
584 #define OPC_EXT_22 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 22 } }
585 #define OPC_EXT_23 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 23 } }
586 #define OPC_EXT_24 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 24 } }
588 #define OPC_EXT_RM_0 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 0 } }
589 #define OPC_EXT_RM_1 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 1 } }
590 #define OPC_EXT_RM_2 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 2 } }
591 #define OPC_EXT_RM_3 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 3 } }
592 #define OPC_EXT_RM_4 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 4 } }
594 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
605 /* Upper case letters in the instruction names here are macros.
606 'A' => print 'b' if no register operands or suffix_always is true
607 'B' => print 'b' if suffix_always is true
608 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
610 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
611 . suffix_always is true
612 'E' => print 'e' if 32-bit form of jcxz
613 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
614 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
615 'H' => print ",pt" or ",pn" branch hint
616 'I' => honor following macro letter even in Intel mode (implemented only
617 . for some of the macro letters)
619 'K' => print 'd' or 'q' if rex prefix is present.
620 'L' => print 'l' if suffix_always is true
621 'N' => print 'n' if instruction has no wait "prefix"
622 'O' => print 'd' or 'o' (or 'q' in Intel mode)
623 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
624 . or suffix_always is true. print 'q' if rex prefix is present.
625 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
627 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
628 'S' => print 'w', 'l' or 'q' if suffix_always is true
629 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
630 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
631 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
632 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
633 'X' => print 's', 'd' depending on data16 prefix (for XMM)
634 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
635 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
637 Many of the above letters print nothing in Intel mode. See "putop"
640 Braces '{' and '}', and vertical bars '|', indicate alternative
641 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
642 modes. In cases where there are only two alternatives, the X86_64
643 instruction is reserved, and "(bad)" is printed.
646 static const struct dis386 dis386
[] = {
648 { "addB", { Eb
, Gb
} },
649 { "addS", { Ev
, Gv
} },
650 { "addB", { Gb
, Eb
} },
651 { "addS", { Gv
, Ev
} },
652 { "addB", { AL
, Ib
} },
653 { "addS", { eAX
, Iv
} },
654 { "push{T|}", { es
} },
655 { "pop{T|}", { es
} },
657 { "orB", { Eb
, Gb
} },
658 { "orS", { Ev
, Gv
} },
659 { "orB", { Gb
, Eb
} },
660 { "orS", { Gv
, Ev
} },
661 { "orB", { AL
, Ib
} },
662 { "orS", { eAX
, Iv
} },
663 { "push{T|}", { cs
} },
664 { "(bad)", { XX
} }, /* 0x0f extended opcode escape */
666 { "adcB", { Eb
, Gb
} },
667 { "adcS", { Ev
, Gv
} },
668 { "adcB", { Gb
, Eb
} },
669 { "adcS", { Gv
, Ev
} },
670 { "adcB", { AL
, Ib
} },
671 { "adcS", { eAX
, Iv
} },
672 { "push{T|}", { ss
} },
673 { "pop{T|}", { ss
} },
675 { "sbbB", { Eb
, Gb
} },
676 { "sbbS", { Ev
, Gv
} },
677 { "sbbB", { Gb
, Eb
} },
678 { "sbbS", { Gv
, Ev
} },
679 { "sbbB", { AL
, Ib
} },
680 { "sbbS", { eAX
, Iv
} },
681 { "push{T|}", { ds
} },
682 { "pop{T|}", { ds
} },
684 { "andB", { Eb
, Gb
} },
685 { "andS", { Ev
, Gv
} },
686 { "andB", { Gb
, Eb
} },
687 { "andS", { Gv
, Ev
} },
688 { "andB", { AL
, Ib
} },
689 { "andS", { eAX
, Iv
} },
690 { "(bad)", { XX
} }, /* SEG ES prefix */
691 { "daa{|}", { XX
} },
693 { "subB", { Eb
, Gb
} },
694 { "subS", { Ev
, Gv
} },
695 { "subB", { Gb
, Eb
} },
696 { "subS", { Gv
, Ev
} },
697 { "subB", { AL
, Ib
} },
698 { "subS", { eAX
, Iv
} },
699 { "(bad)", { XX
} }, /* SEG CS prefix */
700 { "das{|}", { XX
} },
702 { "xorB", { Eb
, Gb
} },
703 { "xorS", { Ev
, Gv
} },
704 { "xorB", { Gb
, Eb
} },
705 { "xorS", { Gv
, Ev
} },
706 { "xorB", { AL
, Ib
} },
707 { "xorS", { eAX
, Iv
} },
708 { "(bad)", { XX
} }, /* SEG SS prefix */
709 { "aaa{|}", { XX
} },
711 { "cmpB", { Eb
, Gb
} },
712 { "cmpS", { Ev
, Gv
} },
713 { "cmpB", { Gb
, Eb
} },
714 { "cmpS", { Gv
, Ev
} },
715 { "cmpB", { AL
, Ib
} },
716 { "cmpS", { eAX
, Iv
} },
717 { "(bad)", { XX
} }, /* SEG DS prefix */
718 { "aas{|}", { XX
} },
720 { "inc{S|}", { RMeAX
} },
721 { "inc{S|}", { RMeCX
} },
722 { "inc{S|}", { RMeDX
} },
723 { "inc{S|}", { RMeBX
} },
724 { "inc{S|}", { RMeSP
} },
725 { "inc{S|}", { RMeBP
} },
726 { "inc{S|}", { RMeSI
} },
727 { "inc{S|}", { RMeDI
} },
729 { "dec{S|}", { RMeAX
} },
730 { "dec{S|}", { RMeCX
} },
731 { "dec{S|}", { RMeDX
} },
732 { "dec{S|}", { RMeBX
} },
733 { "dec{S|}", { RMeSP
} },
734 { "dec{S|}", { RMeBP
} },
735 { "dec{S|}", { RMeSI
} },
736 { "dec{S|}", { RMeDI
} },
738 { "pushV", { RMrAX
} },
739 { "pushV", { RMrCX
} },
740 { "pushV", { RMrDX
} },
741 { "pushV", { RMrBX
} },
742 { "pushV", { RMrSP
} },
743 { "pushV", { RMrBP
} },
744 { "pushV", { RMrSI
} },
745 { "pushV", { RMrDI
} },
747 { "popV", { RMrAX
} },
748 { "popV", { RMrCX
} },
749 { "popV", { RMrDX
} },
750 { "popV", { RMrBX
} },
751 { "popV", { RMrSP
} },
752 { "popV", { RMrBP
} },
753 { "popV", { RMrSI
} },
754 { "popV", { RMrDI
} },
760 { "(bad)", { XX
} }, /* seg fs */
761 { "(bad)", { XX
} }, /* seg gs */
762 { "(bad)", { XX
} }, /* op size prefix */
763 { "(bad)", { XX
} }, /* adr size prefix */
766 { "imulS", { Gv
, Ev
, Iv
} },
767 { "pushT", { sIb
} },
768 { "imulS", { Gv
, Ev
, sIb
} },
769 { "ins{b||b|}", { Ybr
, indirDX
} },
770 { "ins{R||G|}", { Yzr
, indirDX
} },
771 { "outs{b||b|}", { indirDXr
, Xb
} },
772 { "outs{R||G|}", { indirDXr
, Xz
} },
774 { "joH", { Jb
, XX
, cond_jump_flag
} },
775 { "jnoH", { Jb
, XX
, cond_jump_flag
} },
776 { "jbH", { Jb
, XX
, cond_jump_flag
} },
777 { "jaeH", { Jb
, XX
, cond_jump_flag
} },
778 { "jeH", { Jb
, XX
, cond_jump_flag
} },
779 { "jneH", { Jb
, XX
, cond_jump_flag
} },
780 { "jbeH", { Jb
, XX
, cond_jump_flag
} },
781 { "jaH", { Jb
, XX
, cond_jump_flag
} },
783 { "jsH", { Jb
, XX
, cond_jump_flag
} },
784 { "jnsH", { Jb
, XX
, cond_jump_flag
} },
785 { "jpH", { Jb
, XX
, cond_jump_flag
} },
786 { "jnpH", { Jb
, XX
, cond_jump_flag
} },
787 { "jlH", { Jb
, XX
, cond_jump_flag
} },
788 { "jgeH", { Jb
, XX
, cond_jump_flag
} },
789 { "jleH", { Jb
, XX
, cond_jump_flag
} },
790 { "jgH", { Jb
, XX
, cond_jump_flag
} },
796 { "testB", { Eb
, Gb
} },
797 { "testS", { Ev
, Gv
} },
798 { "xchgB", { Eb
, Gb
} },
799 { "xchgS", { Ev
, Gv
} },
801 { "movB", { Eb
, Gb
} },
802 { "movS", { Ev
, Gv
} },
803 { "movB", { Gb
, Eb
} },
804 { "movS", { Gv
, Ev
} },
805 { "movD", { Sv
, Sw
} },
806 { "leaS", { Gv
, M
} },
807 { "movD", { Sw
, Sv
} },
811 { "xchgS", { RMeCX
, eAX
} },
812 { "xchgS", { RMeDX
, eAX
} },
813 { "xchgS", { RMeBX
, eAX
} },
814 { "xchgS", { RMeSP
, eAX
} },
815 { "xchgS", { RMeBP
, eAX
} },
816 { "xchgS", { RMeSI
, eAX
} },
817 { "xchgS", { RMeDI
, eAX
} },
819 { "cW{t||t|}R", { XX
} },
820 { "cR{t||t|}O", { XX
} },
821 { "Jcall{T|}", { Ap
} },
822 { "(bad)", { XX
} }, /* fwait */
823 { "pushfT", { XX
} },
825 { "sahf{|}", { XX
} },
826 { "lahf{|}", { XX
} },
828 { "movB", { AL
, Ob
} },
829 { "movS", { eAX
, Ov
} },
830 { "movB", { Ob
, AL
} },
831 { "movS", { Ov
, eAX
} },
832 { "movs{b||b|}", { Ybr
, Xb
} },
833 { "movs{R||R|}", { Yvr
, Xv
} },
834 { "cmps{b||b|}", { Xb
, Yb
} },
835 { "cmps{R||R|}", { Xv
, Yv
} },
837 { "testB", { AL
, Ib
} },
838 { "testS", { eAX
, Iv
} },
839 { "stosB", { Ybr
, AL
} },
840 { "stosS", { Yvr
, eAX
} },
841 { "lodsB", { ALr
, Xb
} },
842 { "lodsS", { eAXr
, Xv
} },
843 { "scasB", { AL
, Yb
} },
844 { "scasS", { eAX
, Yv
} },
846 { "movB", { RMAL
, Ib
} },
847 { "movB", { RMCL
, Ib
} },
848 { "movB", { RMDL
, Ib
} },
849 { "movB", { RMBL
, Ib
} },
850 { "movB", { RMAH
, Ib
} },
851 { "movB", { RMCH
, Ib
} },
852 { "movB", { RMDH
, Ib
} },
853 { "movB", { RMBH
, Ib
} },
855 { "movS", { RMeAX
, Iv64
} },
856 { "movS", { RMeCX
, Iv64
} },
857 { "movS", { RMeDX
, Iv64
} },
858 { "movS", { RMeBX
, Iv64
} },
859 { "movS", { RMeSP
, Iv64
} },
860 { "movS", { RMeBP
, Iv64
} },
861 { "movS", { RMeSI
, Iv64
} },
862 { "movS", { RMeDI
, Iv64
} },
868 { "les{S|}", { Gv
, Mp
} },
869 { "ldsS", { Gv
, Mp
} },
873 { "enterT", { Iw
, Ib
} },
874 { "leaveT", { XX
} },
879 { "into{|}", { XX
} },
886 { "aam{|}", { sIb
} },
887 { "aad{|}", { sIb
} },
889 { "xlat", { DSBX
} },
900 { "loopneFH", { Jb
, XX
, loop_jcxz_flag
} },
901 { "loopeFH", { Jb
, XX
, loop_jcxz_flag
} },
902 { "loopFH", { Jb
, XX
, loop_jcxz_flag
} },
903 { "jEcxzH", { Jb
, XX
, loop_jcxz_flag
} },
904 { "inB", { AL
, Ib
} },
905 { "inG", { zAX
, Ib
} },
906 { "outB", { Ib
, AL
} },
907 { "outG", { Ib
, zAX
} },
911 { "Jjmp{T|}", { Ap
} },
913 { "inB", { AL
, indirDX
} },
914 { "inG", { zAX
, indirDX
} },
915 { "outB", { indirDX
, AL
} },
916 { "outG", { indirDX
, zAX
} },
918 { "(bad)", { XX
} }, /* lock prefix */
920 { "(bad)", { XX
} }, /* repne */
921 { "(bad)", { XX
} }, /* repz */
937 static const struct dis386 dis386_twobyte
[] = {
941 { "larS", { Gv
, Ew
} },
942 { "lslS", { Gv
, Ew
} },
944 { "syscall", { XX
} },
946 { "sysretP", { XX
} },
949 { "wbinvd", { XX
} },
955 { "", { MX
, EM
, OPSUF
} }, /* See OP_3DNowSuffix. */
960 { "movlpX", { EXq
, XM
, { SIMD_Fixup
, 'h' } } },
961 { "unpcklpX", { XM
, EXq
} },
962 { "unpckhpX", { XM
, EXq
} },
964 { "movhpX", { EXq
, XM
, { SIMD_Fixup
, 'l' } } },
975 { "movZ", { Rm
, Cm
} },
976 { "movZ", { Rm
, Dm
} },
977 { "movZ", { Cm
, Rm
} },
978 { "movZ", { Dm
, Rm
} },
979 { "movL", { Rd
, Td
} },
981 { "movL", { Td
, Rd
} },
984 { "movapX", { XM
, EXx
} },
985 { "movapX", { EXx
, XM
} },
997 { "sysenter", { XX
} },
998 { "sysexit", { XX
} },
1000 { "(bad)", { XX
} },
1003 { "(bad)", { XX
} },
1005 { "(bad)", { XX
} },
1006 { "(bad)", { XX
} },
1007 { "(bad)", { XX
} },
1008 { "(bad)", { XX
} },
1009 { "(bad)", { XX
} },
1011 { "cmovo", { Gv
, Ev
} },
1012 { "cmovno", { Gv
, Ev
} },
1013 { "cmovb", { Gv
, Ev
} },
1014 { "cmovae", { Gv
, Ev
} },
1015 { "cmove", { Gv
, Ev
} },
1016 { "cmovne", { Gv
, Ev
} },
1017 { "cmovbe", { Gv
, Ev
} },
1018 { "cmova", { Gv
, Ev
} },
1020 { "cmovs", { Gv
, Ev
} },
1021 { "cmovns", { Gv
, Ev
} },
1022 { "cmovp", { Gv
, Ev
} },
1023 { "cmovnp", { Gv
, Ev
} },
1024 { "cmovl", { Gv
, Ev
} },
1025 { "cmovge", { Gv
, Ev
} },
1026 { "cmovle", { Gv
, Ev
} },
1027 { "cmovg", { Gv
, Ev
} },
1029 { "movmskpX", { Gdq
, XS
} },
1033 { "andpX", { XM
, EXx
} },
1034 { "andnpX", { XM
, EXx
} },
1035 { "orpX", { XM
, EXx
} },
1036 { "xorpX", { XM
, EXx
} },
1050 { "packsswb", { MX
, EM
} },
1051 { "pcmpgtb", { MX
, EM
} },
1052 { "pcmpgtw", { MX
, EM
} },
1053 { "pcmpgtd", { MX
, EM
} },
1054 { "packuswb", { MX
, EM
} },
1056 { "punpckhbw", { MX
, EM
} },
1057 { "punpckhwd", { MX
, EM
} },
1058 { "punpckhdq", { MX
, EM
} },
1059 { "packssdw", { MX
, EM
} },
1062 { "movK", { MX
, Edq
} },
1069 { "pcmpeqb", { MX
, EM
} },
1070 { "pcmpeqw", { MX
, EM
} },
1071 { "pcmpeqd", { MX
, EM
} },
1076 { "(bad)", { XX
} },
1077 { "(bad)", { XX
} },
1083 { "joH", { Jv
, XX
, cond_jump_flag
} },
1084 { "jnoH", { Jv
, XX
, cond_jump_flag
} },
1085 { "jbH", { Jv
, XX
, cond_jump_flag
} },
1086 { "jaeH", { Jv
, XX
, cond_jump_flag
} },
1087 { "jeH", { Jv
, XX
, cond_jump_flag
} },
1088 { "jneH", { Jv
, XX
, cond_jump_flag
} },
1089 { "jbeH", { Jv
, XX
, cond_jump_flag
} },
1090 { "jaH", { Jv
, XX
, cond_jump_flag
} },
1092 { "jsH", { Jv
, XX
, cond_jump_flag
} },
1093 { "jnsH", { Jv
, XX
, cond_jump_flag
} },
1094 { "jpH", { Jv
, XX
, cond_jump_flag
} },
1095 { "jnpH", { Jv
, XX
, cond_jump_flag
} },
1096 { "jlH", { Jv
, XX
, cond_jump_flag
} },
1097 { "jgeH", { Jv
, XX
, cond_jump_flag
} },
1098 { "jleH", { Jv
, XX
, cond_jump_flag
} },
1099 { "jgH", { Jv
, XX
, cond_jump_flag
} },
1102 { "setno", { Eb
} },
1104 { "setae", { Eb
} },
1106 { "setne", { Eb
} },
1107 { "setbe", { Eb
} },
1111 { "setns", { Eb
} },
1113 { "setnp", { Eb
} },
1115 { "setge", { Eb
} },
1116 { "setle", { Eb
} },
1119 { "pushT", { fs
} },
1121 { "cpuid", { XX
} },
1122 { "btS", { Ev
, Gv
} },
1123 { "shldS", { Ev
, Gv
, Ib
} },
1124 { "shldS", { Ev
, Gv
, CL
} },
1128 { "pushT", { gs
} },
1131 { "btsS", { Ev
, Gv
} },
1132 { "shrdS", { Ev
, Gv
, Ib
} },
1133 { "shrdS", { Ev
, Gv
, CL
} },
1135 { "imulS", { Gv
, Ev
} },
1137 { "cmpxchgB", { Eb
, Gb
} },
1138 { "cmpxchgS", { Ev
, Gv
} },
1139 { "lssS", { Gv
, Mp
} },
1140 { "btrS", { Ev
, Gv
} },
1141 { "lfsS", { Gv
, Mp
} },
1142 { "lgsS", { Gv
, Mp
} },
1143 { "movz{bR|x|bR|x}", { Gv
, Eb
} },
1144 { "movz{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movzww ! */
1149 { "btcS", { Ev
, Gv
} },
1150 { "bsfS", { Gv
, Ev
} },
1152 { "movs{bR|x|bR|x}", { Gv
, Eb
} },
1153 { "movs{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movsww ! */
1155 { "xaddB", { Eb
, Gb
} },
1156 { "xaddS", { Ev
, Gv
} },
1158 { "movntiS", { Ev
, Gv
} },
1159 { "pinsrw", { MX
, Edqw
, Ib
} },
1160 { "pextrw", { Gdq
, MS
, Ib
} },
1161 { "shufpX", { XM
, EXx
, Ib
} },
1164 { "bswap", { RMeAX
} },
1165 { "bswap", { RMeCX
} },
1166 { "bswap", { RMeDX
} },
1167 { "bswap", { RMeBX
} },
1168 { "bswap", { RMeSP
} },
1169 { "bswap", { RMeBP
} },
1170 { "bswap", { RMeSI
} },
1171 { "bswap", { RMeDI
} },
1174 { "psrlw", { MX
, EM
} },
1175 { "psrld", { MX
, EM
} },
1176 { "psrlq", { MX
, EM
} },
1177 { "paddq", { MX
, EM
} },
1178 { "pmullw", { MX
, EM
} },
1180 { "pmovmskb", { Gdq
, MS
} },
1182 { "psubusb", { MX
, EM
} },
1183 { "psubusw", { MX
, EM
} },
1184 { "pminub", { MX
, EM
} },
1185 { "pand", { MX
, EM
} },
1186 { "paddusb", { MX
, EM
} },
1187 { "paddusw", { MX
, EM
} },
1188 { "pmaxub", { MX
, EM
} },
1189 { "pandn", { MX
, EM
} },
1191 { "pavgb", { MX
, EM
} },
1192 { "psraw", { MX
, EM
} },
1193 { "psrad", { MX
, EM
} },
1194 { "pavgw", { MX
, EM
} },
1195 { "pmulhuw", { MX
, EM
} },
1196 { "pmulhw", { MX
, EM
} },
1200 { "psubsb", { MX
, EM
} },
1201 { "psubsw", { MX
, EM
} },
1202 { "pminsw", { MX
, EM
} },
1203 { "por", { MX
, EM
} },
1204 { "paddsb", { MX
, EM
} },
1205 { "paddsw", { MX
, EM
} },
1206 { "pmaxsw", { MX
, EM
} },
1207 { "pxor", { MX
, EM
} },
1210 { "psllw", { MX
, EM
} },
1211 { "pslld", { MX
, EM
} },
1212 { "psllq", { MX
, EM
} },
1213 { "pmuludq", { MX
, EM
} },
1214 { "pmaddwd", { MX
, EM
} },
1215 { "psadbw", { MX
, EM
} },
1218 { "psubb", { MX
, EM
} },
1219 { "psubw", { MX
, EM
} },
1220 { "psubd", { MX
, EM
} },
1221 { "psubq", { MX
, EM
} },
1222 { "paddb", { MX
, EM
} },
1223 { "paddw", { MX
, EM
} },
1224 { "paddd", { MX
, EM
} },
1225 { "(bad)", { XX
} },
1228 static const unsigned char onebyte_has_modrm
[256] = {
1229 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1230 /* ------------------------------- */
1231 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1232 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1233 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1234 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1235 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1236 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1237 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1238 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1239 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1240 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1241 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1242 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1243 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1244 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1245 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1246 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1247 /* ------------------------------- */
1248 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1251 static const unsigned char twobyte_has_modrm
[256] = {
1252 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1253 /* ------------------------------- */
1254 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1255 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1256 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1257 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1258 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1259 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1260 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1261 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1262 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1263 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1264 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1265 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1266 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1267 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1268 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1269 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1270 /* ------------------------------- */
1271 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1274 static char obuf
[100];
1276 static char scratchbuf
[100];
1277 static unsigned char *start_codep
;
1278 static unsigned char *insn_codep
;
1279 static unsigned char *codep
;
1280 static const char *lock_prefix
;
1281 static const char *data_prefix
;
1282 static const char *addr_prefix
;
1283 static const char *repz_prefix
;
1284 static const char *repnz_prefix
;
1285 static disassemble_info
*the_info
;
1293 static unsigned char need_modrm
;
1295 /* If we are accessing mod/rm/reg without need_modrm set, then the
1296 values are stale. Hitting this abort likely indicates that you
1297 need to update onebyte_has_modrm or twobyte_has_modrm. */
1298 #define MODRM_CHECK if (!need_modrm) abort ()
1300 static const char **names64
;
1301 static const char **names32
;
1302 static const char **names16
;
1303 static const char **names8
;
1304 static const char **names8rex
;
1305 static const char **names_seg
;
1306 static const char **index16
;
1308 static const char *intel_names64
[] = {
1309 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1310 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1312 static const char *intel_names32
[] = {
1313 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1314 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1316 static const char *intel_names16
[] = {
1317 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1318 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1320 static const char *intel_names8
[] = {
1321 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1323 static const char *intel_names8rex
[] = {
1324 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1325 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1327 static const char *intel_names_seg
[] = {
1328 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1330 static const char *intel_index16
[] = {
1331 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1334 static const char *att_names64
[] = {
1335 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1336 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1338 static const char *att_names32
[] = {
1339 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1340 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1342 static const char *att_names16
[] = {
1343 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1344 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1346 static const char *att_names8
[] = {
1347 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1349 static const char *att_names8rex
[] = {
1350 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1351 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1353 static const char *att_names_seg
[] = {
1354 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1356 static const char *att_index16
[] = {
1357 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1360 static const struct dis386 grps
[][8] = {
1363 { "popU", { stackEv
} },
1364 { "(bad)", { XX
} },
1365 { "(bad)", { XX
} },
1366 { "(bad)", { XX
} },
1367 { "(bad)", { XX
} },
1368 { "(bad)", { XX
} },
1369 { "(bad)", { XX
} },
1370 { "(bad)", { XX
} },
1374 { "addA", { Eb
, Ib
} },
1375 { "orA", { Eb
, Ib
} },
1376 { "adcA", { Eb
, Ib
} },
1377 { "sbbA", { Eb
, Ib
} },
1378 { "andA", { Eb
, Ib
} },
1379 { "subA", { Eb
, Ib
} },
1380 { "xorA", { Eb
, Ib
} },
1381 { "cmpA", { Eb
, Ib
} },
1385 { "addQ", { Ev
, Iv
} },
1386 { "orQ", { Ev
, Iv
} },
1387 { "adcQ", { Ev
, Iv
} },
1388 { "sbbQ", { Ev
, Iv
} },
1389 { "andQ", { Ev
, Iv
} },
1390 { "subQ", { Ev
, Iv
} },
1391 { "xorQ", { Ev
, Iv
} },
1392 { "cmpQ", { Ev
, Iv
} },
1396 { "addQ", { Ev
, sIb
} },
1397 { "orQ", { Ev
, sIb
} },
1398 { "adcQ", { Ev
, sIb
} },
1399 { "sbbQ", { Ev
, sIb
} },
1400 { "andQ", { Ev
, sIb
} },
1401 { "subQ", { Ev
, sIb
} },
1402 { "xorQ", { Ev
, sIb
} },
1403 { "cmpQ", { Ev
, sIb
} },
1407 { "rolA", { Eb
, Ib
} },
1408 { "rorA", { Eb
, Ib
} },
1409 { "rclA", { Eb
, Ib
} },
1410 { "rcrA", { Eb
, Ib
} },
1411 { "shlA", { Eb
, Ib
} },
1412 { "shrA", { Eb
, Ib
} },
1413 { "(bad)", { XX
} },
1414 { "sarA", { Eb
, Ib
} },
1418 { "rolQ", { Ev
, Ib
} },
1419 { "rorQ", { Ev
, Ib
} },
1420 { "rclQ", { Ev
, Ib
} },
1421 { "rcrQ", { Ev
, Ib
} },
1422 { "shlQ", { Ev
, Ib
} },
1423 { "shrQ", { Ev
, Ib
} },
1424 { "(bad)", { XX
} },
1425 { "sarQ", { Ev
, Ib
} },
1429 { "rolA", { Eb
, I1
} },
1430 { "rorA", { Eb
, I1
} },
1431 { "rclA", { Eb
, I1
} },
1432 { "rcrA", { Eb
, I1
} },
1433 { "shlA", { Eb
, I1
} },
1434 { "shrA", { Eb
, I1
} },
1435 { "(bad)", { XX
} },
1436 { "sarA", { Eb
, I1
} },
1440 { "rolQ", { Ev
, I1
} },
1441 { "rorQ", { Ev
, I1
} },
1442 { "rclQ", { Ev
, I1
} },
1443 { "rcrQ", { Ev
, I1
} },
1444 { "shlQ", { Ev
, I1
} },
1445 { "shrQ", { Ev
, I1
} },
1446 { "(bad)", { XX
} },
1447 { "sarQ", { Ev
, I1
} },
1451 { "rolA", { Eb
, CL
} },
1452 { "rorA", { Eb
, CL
} },
1453 { "rclA", { Eb
, CL
} },
1454 { "rcrA", { Eb
, CL
} },
1455 { "shlA", { Eb
, CL
} },
1456 { "shrA", { Eb
, CL
} },
1457 { "(bad)", { XX
} },
1458 { "sarA", { Eb
, CL
} },
1462 { "rolQ", { Ev
, CL
} },
1463 { "rorQ", { Ev
, CL
} },
1464 { "rclQ", { Ev
, CL
} },
1465 { "rcrQ", { Ev
, CL
} },
1466 { "shlQ", { Ev
, CL
} },
1467 { "shrQ", { Ev
, CL
} },
1468 { "(bad)", { XX
} },
1469 { "sarQ", { Ev
, CL
} },
1473 { "testA", { Eb
, Ib
} },
1474 { "(bad)", { Eb
} },
1477 { "mulA", { Eb
} }, /* Don't print the implicit %al register, */
1478 { "imulA", { Eb
} }, /* to distinguish these opcodes from other */
1479 { "divA", { Eb
} }, /* mul/imul opcodes. Do the same for div */
1480 { "idivA", { Eb
} }, /* and idiv for consistency. */
1484 { "testQ", { Ev
, Iv
} },
1485 { "(bad)", { XX
} },
1488 { "mulQ", { Ev
} }, /* Don't print the implicit register. */
1489 { "imulQ", { Ev
} },
1491 { "idivQ", { Ev
} },
1497 { "(bad)", { XX
} },
1498 { "(bad)", { XX
} },
1499 { "(bad)", { XX
} },
1500 { "(bad)", { XX
} },
1501 { "(bad)", { XX
} },
1502 { "(bad)", { XX
} },
1508 { "callT", { indirEv
} },
1509 { "JcallT", { indirEp
} },
1510 { "jmpT", { indirEv
} },
1511 { "JjmpT", { indirEp
} },
1512 { "pushU", { stackEv
} },
1513 { "(bad)", { XX
} },
1517 { "sldtD", { Sv
} },
1523 { "(bad)", { XX
} },
1524 { "(bad)", { XX
} },
1530 { "lgdt{Q|Q||}", { M
} },
1531 { "lidt{Q|Q||}", { { SVME_Fixup
, 0 } } },
1532 { "smswD", { Sv
} },
1533 { "(bad)", { XX
} },
1535 { "invlpg", { { INVLPG_Fixup
, 0 } } },
1539 { "(bad)", { XX
} },
1540 { "(bad)", { XX
} },
1541 { "(bad)", { XX
} },
1542 { "(bad)", { XX
} },
1543 { "btQ", { Ev
, Ib
} },
1544 { "btsQ", { Ev
, Ib
} },
1545 { "btrQ", { Ev
, Ib
} },
1546 { "btcQ", { Ev
, Ib
} },
1550 { "(bad)", { XX
} },
1551 { "cmpxchg8b", { { CMPXCHG8B_Fixup
, q_mode
} } },
1552 { "(bad)", { XX
} },
1553 { "(bad)", { XX
} },
1554 { "(bad)", { XX
} },
1555 { "(bad)", { XX
} },
1561 { "movA", { Eb
, Ib
} },
1562 { "(bad)", { XX
} },
1563 { "(bad)", { XX
} },
1564 { "(bad)", { XX
} },
1565 { "(bad)", { XX
} },
1566 { "(bad)", { XX
} },
1567 { "(bad)", { XX
} },
1568 { "(bad)", { XX
} },
1572 { "movQ", { Ev
, Iv
} },
1573 { "(bad)", { XX
} },
1574 { "(bad)", { XX
} },
1575 { "(bad)", { XX
} },
1576 { "(bad)", { XX
} },
1577 { "(bad)", { XX
} },
1578 { "(bad)", { XX
} },
1579 { "(bad)", { XX
} },
1583 { "(bad)", { XX
} },
1584 { "(bad)", { XX
} },
1586 { "(bad)", { XX
} },
1588 { "(bad)", { XX
} },
1590 { "(bad)", { XX
} },
1594 { "(bad)", { XX
} },
1595 { "(bad)", { XX
} },
1597 { "(bad)", { XX
} },
1599 { "(bad)", { XX
} },
1601 { "(bad)", { XX
} },
1605 { "(bad)", { XX
} },
1606 { "(bad)", { XX
} },
1609 { "(bad)", { XX
} },
1610 { "(bad)", { XX
} },
1620 { "(bad)", { XX
} },
1631 { "(bad)", { XX
} },
1632 { "(bad)", { XX
} },
1633 { "(bad)", { XX
} },
1634 { "(bad)", { XX
} },
1638 { "prefetch", { Eb
} },
1639 { "prefetchw", { Eb
} },
1640 { "(bad)", { XX
} },
1641 { "(bad)", { XX
} },
1642 { "(bad)", { XX
} },
1643 { "(bad)", { XX
} },
1644 { "(bad)", { XX
} },
1645 { "(bad)", { XX
} },
1649 { "xstore-rng", { { OP_0f07
, 0 } } },
1650 { "xcrypt-ecb", { { OP_0f07
, 0 } } },
1651 { "xcrypt-cbc", { { OP_0f07
, 0 } } },
1652 { "xcrypt-ctr", { { OP_0f07
, 0 } } },
1653 { "xcrypt-cfb", { { OP_0f07
, 0 } } },
1654 { "xcrypt-ofb", { { OP_0f07
, 0 } } },
1655 { "(bad)", { { OP_0f07
, 0 } } },
1656 { "(bad)", { { OP_0f07
, 0 } } },
1660 { "montmul", { { OP_0f07
, 0 } } },
1661 { "xsha1", { { OP_0f07
, 0 } } },
1662 { "xsha256", { { OP_0f07
, 0 } } },
1663 { "(bad)", { { OP_0f07
, 0 } } },
1664 { "(bad)", { { OP_0f07
, 0 } } },
1665 { "(bad)", { { OP_0f07
, 0 } } },
1666 { "(bad)", { { OP_0f07
, 0 } } },
1667 { "(bad)", { { OP_0f07
, 0 } } },
1671 static const struct dis386 prefix_user_table
[][4] = {
1674 { "addps", { XM
, EXx
} },
1675 { "addss", { XM
, EXd
} },
1676 { "addpd", { XM
, EXx
} },
1677 { "addsd", { XM
, EXq
} },
1681 { "", { XM
, EXx
, OPSIMD
} }, /* See OP_SIMD_SUFFIX. */
1682 { "", { XM
, EXd
, OPSIMD
} },
1683 { "", { XM
, EXx
, OPSIMD
} },
1684 { "", { XM
, EXq
, OPSIMD
} },
1688 { "cvtpi2ps", { XM
, EMCq
} },
1689 { "cvtsi2ssY", { XM
, Ev
} },
1690 { "cvtpi2pd", { XM
, EMCq
} },
1691 { "cvtsi2sdY", { XM
, Ev
} },
1695 { "cvtps2pi", { MXC
, EXq
} },
1696 { "cvtss2siY", { Gv
, EXd
} },
1697 { "cvtpd2pi", { MXC
, EXx
} },
1698 { "cvtsd2siY", { Gv
, EXq
} },
1702 { "cvttps2pi", { MXC
, EXq
} },
1703 { "cvttss2siY", { Gv
, EXd
} },
1704 { "cvttpd2pi", { MXC
, EXx
} },
1705 { "cvttsd2siY", { Gv
, EXq
} },
1709 { "divps", { XM
, EXx
} },
1710 { "divss", { XM
, EXd
} },
1711 { "divpd", { XM
, EXx
} },
1712 { "divsd", { XM
, EXq
} },
1716 { "maxps", { XM
, EXx
} },
1717 { "maxss", { XM
, EXd
} },
1718 { "maxpd", { XM
, EXx
} },
1719 { "maxsd", { XM
, EXq
} },
1723 { "minps", { XM
, EXx
} },
1724 { "minss", { XM
, EXd
} },
1725 { "minpd", { XM
, EXx
} },
1726 { "minsd", { XM
, EXq
} },
1730 { "movups", { XM
, EXx
} },
1731 { "movss", { XM
, EXd
} },
1732 { "movupd", { XM
, EXx
} },
1733 { "movsd", { XM
, EXq
} },
1737 { "movups", { EXx
, XM
} },
1738 { "movss", { EXd
, XM
} },
1739 { "movupd", { EXx
, XM
} },
1740 { "movsd", { EXq
, XM
} },
1744 { "mulps", { XM
, EXx
} },
1745 { "mulss", { XM
, EXd
} },
1746 { "mulpd", { XM
, EXx
} },
1747 { "mulsd", { XM
, EXq
} },
1751 { "rcpps", { XM
, EXx
} },
1752 { "rcpss", { XM
, EXd
} },
1753 { "(bad)", { XM
, EXx
} },
1754 { "(bad)", { XM
, EXx
} },
1758 { "rsqrtps",{ XM
, EXx
} },
1759 { "rsqrtss",{ XM
, EXd
} },
1760 { "(bad)", { XM
, EXx
} },
1761 { "(bad)", { XM
, EXx
} },
1765 { "sqrtps", { XM
, EXx
} },
1766 { "sqrtss", { XM
, EXd
} },
1767 { "sqrtpd", { XM
, EXx
} },
1768 { "sqrtsd", { XM
, EXq
} },
1772 { "subps", { XM
, EXx
} },
1773 { "subss", { XM
, EXd
} },
1774 { "subpd", { XM
, EXx
} },
1775 { "subsd", { XM
, EXq
} },
1779 { "(bad)", { XM
, EXx
} },
1780 { "cvtdq2pd", { XM
, EXq
} },
1781 { "cvttpd2dq", { XM
, EXx
} },
1782 { "cvtpd2dq", { XM
, EXx
} },
1786 { "cvtdq2ps", { XM
, EXx
} },
1787 { "cvttps2dq", { XM
, EXx
} },
1788 { "cvtps2dq", { XM
, EXx
} },
1789 { "(bad)", { XM
, EXx
} },
1793 { "cvtps2pd", { XM
, EXq
} },
1794 { "cvtss2sd", { XM
, EXd
} },
1795 { "cvtpd2ps", { XM
, EXx
} },
1796 { "cvtsd2ss", { XM
, EXq
} },
1800 { "maskmovq", { MX
, MS
} },
1801 { "(bad)", { XM
, EXx
} },
1802 { "maskmovdqu", { XM
, XS
} },
1803 { "(bad)", { XM
, EXx
} },
1807 { "movq", { MX
, EM
} },
1808 { "movdqu", { XM
, EXx
} },
1809 { "movdqa", { XM
, EXx
} },
1810 { "(bad)", { XM
, EXx
} },
1814 { "movq", { EM
, MX
} },
1815 { "movdqu", { EXx
, XM
} },
1816 { "movdqa", { EXx
, XM
} },
1817 { "(bad)", { EXx
, XM
} },
1821 { "(bad)", { EXx
, XM
} },
1822 { "movq2dq",{ XM
, MS
} },
1823 { "movq", { EXq
, XM
} },
1824 { "movdq2q",{ MX
, XS
} },
1828 { "pshufw", { MX
, EM
, Ib
} },
1829 { "pshufhw",{ XM
, EXx
, Ib
} },
1830 { "pshufd", { XM
, EXx
, Ib
} },
1831 { "pshuflw",{ XM
, EXx
, Ib
} },
1835 { "movK", { Edq
, MX
} },
1836 { "movq", { XM
, EXq
} },
1837 { "movK", { Edq
, XM
} },
1838 { "(bad)", { Ed
, XM
} },
1842 { "(bad)", { MX
, EXx
} },
1843 { "(bad)", { XM
, EXx
} },
1844 { "punpckhqdq", { XM
, EXx
} },
1845 { "(bad)", { XM
, EXx
} },
1849 { "movntq", { EM
, MX
} },
1850 { "(bad)", { EM
, XM
} },
1851 { "movntdq",{ EM
, XM
} },
1852 { "(bad)", { EM
, XM
} },
1856 { "(bad)", { MX
, EXx
} },
1857 { "(bad)", { XM
, EXx
} },
1858 { "punpcklqdq", { XM
, EXx
} },
1859 { "(bad)", { XM
, EXx
} },
1863 { "(bad)", { MX
, EXx
} },
1864 { "(bad)", { XM
, EXx
} },
1865 { "addsubpd", { XM
, EXx
} },
1866 { "addsubps", { XM
, EXx
} },
1870 { "(bad)", { MX
, EXx
} },
1871 { "(bad)", { XM
, EXx
} },
1872 { "haddpd", { XM
, EXx
} },
1873 { "haddps", { XM
, EXx
} },
1877 { "(bad)", { MX
, EXx
} },
1878 { "(bad)", { XM
, EXx
} },
1879 { "hsubpd", { XM
, EXx
} },
1880 { "hsubps", { XM
, EXx
} },
1884 { "movlpX", { XM
, EXq
, { SIMD_Fixup
, 'h' } } }, /* really only 2 operands */
1885 { "movsldup", { XM
, EXx
} },
1886 { "movlpd", { XM
, EXq
} },
1887 { "movddup", { XM
, EXq
} },
1891 { "movhpX", { XM
, EXq
, { SIMD_Fixup
, 'l' } } },
1892 { "movshdup", { XM
, EXx
} },
1893 { "movhpd", { XM
, EXq
} },
1894 { "(bad)", { XM
, EXq
} },
1898 { "(bad)", { XM
, EXx
} },
1899 { "(bad)", { XM
, EXx
} },
1900 { "(bad)", { XM
, EXx
} },
1901 { "lddqu", { XM
, M
} },
1905 {"movntps", { Ev
, XM
} },
1906 {"movntss", { Ed
, XM
} },
1907 {"movntpd", { Ev
, XM
} },
1908 {"movntsd", { Eq
, XM
} },
1913 {"vmread", { Em
, Gm
} },
1915 {"extrq", { XS
, Ib
, Ib
} },
1916 {"insertq", { XM
, XS
, Ib
, Ib
} },
1921 {"vmwrite", { Gm
, Em
} },
1923 {"extrq", { XM
, XS
} },
1924 {"insertq", { XM
, XS
} },
1929 { "bsrS", { Gv
, Ev
} },
1930 { "lzcntS", { Gv
, Ev
} },
1931 { "bsrS", { Gv
, Ev
} },
1932 { "(bad)", { XX
} },
1937 { "(bad)", { XX
} },
1938 { "popcntS", { Gv
, Ev
} },
1939 { "(bad)", { XX
} },
1940 { "(bad)", { XX
} },
1945 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
1946 { "pause", { XX
} },
1947 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
1948 { "(bad)", { XX
} },
1953 { "(bad)", { XX
} },
1954 { "(bad)", { XX
} },
1955 { "pblendvb", {XM
, EXx
, XMM0
} },
1956 { "(bad)", { XX
} },
1961 { "(bad)", { XX
} },
1962 { "(bad)", { XX
} },
1963 { "blendvps", {XM
, EXx
, XMM0
} },
1964 { "(bad)", { XX
} },
1969 { "(bad)", { XX
} },
1970 { "(bad)", { XX
} },
1971 { "blendvpd", { XM
, EXx
, XMM0
} },
1972 { "(bad)", { XX
} },
1977 { "(bad)", { XX
} },
1978 { "(bad)", { XX
} },
1979 { "ptest", { XM
, EXx
} },
1980 { "(bad)", { XX
} },
1985 { "(bad)", { XX
} },
1986 { "(bad)", { XX
} },
1987 { "pmovsxbw", { XM
, EXq
} },
1988 { "(bad)", { XX
} },
1993 { "(bad)", { XX
} },
1994 { "(bad)", { XX
} },
1995 { "pmovsxbd", { XM
, EXd
} },
1996 { "(bad)", { XX
} },
2001 { "(bad)", { XX
} },
2002 { "(bad)", { XX
} },
2003 { "pmovsxbq", { XM
, EXw
} },
2004 { "(bad)", { XX
} },
2009 { "(bad)", { XX
} },
2010 { "(bad)", { XX
} },
2011 { "pmovsxwd", { XM
, EXq
} },
2012 { "(bad)", { XX
} },
2017 { "(bad)", { XX
} },
2018 { "(bad)", { XX
} },
2019 { "pmovsxwq", { XM
, EXd
} },
2020 { "(bad)", { XX
} },
2025 { "(bad)", { XX
} },
2026 { "(bad)", { XX
} },
2027 { "pmovsxdq", { XM
, EXq
} },
2028 { "(bad)", { XX
} },
2033 { "(bad)", { XX
} },
2034 { "(bad)", { XX
} },
2035 { "pmuldq", { XM
, EXx
} },
2036 { "(bad)", { XX
} },
2041 { "(bad)", { XX
} },
2042 { "(bad)", { XX
} },
2043 { "pcmpeqq", { XM
, EXx
} },
2044 { "(bad)", { XX
} },
2049 { "(bad)", { XX
} },
2050 { "(bad)", { XX
} },
2051 { "movntdqa", { XM
, EM
} },
2052 { "(bad)", { XX
} },
2057 { "(bad)", { XX
} },
2058 { "(bad)", { XX
} },
2059 { "packusdw", { XM
, EXx
} },
2060 { "(bad)", { XX
} },
2065 { "(bad)", { XX
} },
2066 { "(bad)", { XX
} },
2067 { "pmovzxbw", { XM
, EXq
} },
2068 { "(bad)", { XX
} },
2073 { "(bad)", { XX
} },
2074 { "(bad)", { XX
} },
2075 { "pmovzxbd", { XM
, EXd
} },
2076 { "(bad)", { XX
} },
2081 { "(bad)", { XX
} },
2082 { "(bad)", { XX
} },
2083 { "pmovzxbq", { XM
, EXw
} },
2084 { "(bad)", { XX
} },
2089 { "(bad)", { XX
} },
2090 { "(bad)", { XX
} },
2091 { "pmovzxwd", { XM
, EXq
} },
2092 { "(bad)", { XX
} },
2097 { "(bad)", { XX
} },
2098 { "(bad)", { XX
} },
2099 { "pmovzxwq", { XM
, EXd
} },
2100 { "(bad)", { XX
} },
2105 { "(bad)", { XX
} },
2106 { "(bad)", { XX
} },
2107 { "pmovzxdq", { XM
, EXq
} },
2108 { "(bad)", { XX
} },
2113 { "(bad)", { XX
} },
2114 { "(bad)", { XX
} },
2115 { "pminsb", { XM
, EXx
} },
2116 { "(bad)", { XX
} },
2121 { "(bad)", { XX
} },
2122 { "(bad)", { XX
} },
2123 { "pminsd", { XM
, EXx
} },
2124 { "(bad)", { XX
} },
2129 { "(bad)", { XX
} },
2130 { "(bad)", { XX
} },
2131 { "pminuw", { XM
, EXx
} },
2132 { "(bad)", { XX
} },
2137 { "(bad)", { XX
} },
2138 { "(bad)", { XX
} },
2139 { "pminud", { XM
, EXx
} },
2140 { "(bad)", { XX
} },
2145 { "(bad)", { XX
} },
2146 { "(bad)", { XX
} },
2147 { "pmaxsb", { XM
, EXx
} },
2148 { "(bad)", { XX
} },
2153 { "(bad)", { XX
} },
2154 { "(bad)", { XX
} },
2155 { "pmaxsd", { XM
, EXx
} },
2156 { "(bad)", { XX
} },
2161 { "(bad)", { XX
} },
2162 { "(bad)", { XX
} },
2163 { "pmaxuw", { XM
, EXx
} },
2164 { "(bad)", { XX
} },
2169 { "(bad)", { XX
} },
2170 { "(bad)", { XX
} },
2171 { "pmaxud", { XM
, EXx
} },
2172 { "(bad)", { XX
} },
2177 { "(bad)", { XX
} },
2178 { "(bad)", { XX
} },
2179 { "pmulld", { XM
, EXx
} },
2180 { "(bad)", { XX
} },
2185 { "(bad)", { XX
} },
2186 { "(bad)", { XX
} },
2187 { "phminposuw", { XM
, EXx
} },
2188 { "(bad)", { XX
} },
2193 { "(bad)", { XX
} },
2194 { "(bad)", { XX
} },
2195 { "roundps", { XM
, EXx
, Ib
} },
2196 { "(bad)", { XX
} },
2201 { "(bad)", { XX
} },
2202 { "(bad)", { XX
} },
2203 { "roundpd", { XM
, EXx
, Ib
} },
2204 { "(bad)", { XX
} },
2209 { "(bad)", { XX
} },
2210 { "(bad)", { XX
} },
2211 { "roundss", { XM
, EXd
, Ib
} },
2212 { "(bad)", { XX
} },
2217 { "(bad)", { XX
} },
2218 { "(bad)", { XX
} },
2219 { "roundsd", { XM
, EXq
, Ib
} },
2220 { "(bad)", { XX
} },
2225 { "(bad)", { XX
} },
2226 { "(bad)", { XX
} },
2227 { "blendps", { XM
, EXx
, Ib
} },
2228 { "(bad)", { XX
} },
2233 { "(bad)", { XX
} },
2234 { "(bad)", { XX
} },
2235 { "blendpd", { XM
, EXx
, Ib
} },
2236 { "(bad)", { XX
} },
2241 { "(bad)", { XX
} },
2242 { "(bad)", { XX
} },
2243 { "pblendw", { XM
, EXx
, Ib
} },
2244 { "(bad)", { XX
} },
2249 { "(bad)", { XX
} },
2250 { "(bad)", { XX
} },
2251 { "pextrb", { Edqb
, XM
, Ib
} },
2252 { "(bad)", { XX
} },
2257 { "(bad)", { XX
} },
2258 { "(bad)", { XX
} },
2259 { "pextrw", { Edqw
, XM
, Ib
} },
2260 { "(bad)", { XX
} },
2265 { "(bad)", { XX
} },
2266 { "(bad)", { XX
} },
2267 { "pextrK", { Edq
, XM
, Ib
} },
2268 { "(bad)", { XX
} },
2273 { "(bad)", { XX
} },
2274 { "(bad)", { XX
} },
2275 { "extractps", { Edqd
, XM
, Ib
} },
2276 { "(bad)", { XX
} },
2281 { "(bad)", { XX
} },
2282 { "(bad)", { XX
} },
2283 { "pinsrb", { XM
, Edqb
, Ib
} },
2284 { "(bad)", { XX
} },
2289 { "(bad)", { XX
} },
2290 { "(bad)", { XX
} },
2291 { "insertps", { XM
, EXd
, Ib
} },
2292 { "(bad)", { XX
} },
2297 { "(bad)", { XX
} },
2298 { "(bad)", { XX
} },
2299 { "pinsrK", { XM
, Edq
, Ib
} },
2300 { "(bad)", { XX
} },
2305 { "(bad)", { XX
} },
2306 { "(bad)", { XX
} },
2307 { "dpps", { XM
, EXx
, Ib
} },
2308 { "(bad)", { XX
} },
2313 { "(bad)", { XX
} },
2314 { "(bad)", { XX
} },
2315 { "dppd", { XM
, EXx
, Ib
} },
2316 { "(bad)", { XX
} },
2321 { "(bad)", { XX
} },
2322 { "(bad)", { XX
} },
2323 { "mpsadbw", { XM
, EXx
, Ib
} },
2324 { "(bad)", { XX
} },
2329 { "(bad)", { XX
} },
2330 { "(bad)", { XX
} },
2331 { "pcmpgtq", { XM
, EXx
} },
2332 { "(bad)", { XX
} },
2337 { "(bad)", { XX
} },
2338 { "(bad)", { XX
} },
2339 { "(bad)", { XX
} },
2340 { "crc32", { Gdq
, { CRC32_Fixup
, b_mode
} } },
2345 { "(bad)", { XX
} },
2346 { "(bad)", { XX
} },
2347 { "(bad)", { XX
} },
2348 { "crc32", { Gdq
, { CRC32_Fixup
, v_mode
} } },
2353 { "(bad)", { XX
} },
2354 { "(bad)", { XX
} },
2355 { "pcmpestrm", { XM
, EXx
, Ib
} },
2356 { "(bad)", { XX
} },
2361 { "(bad)", { XX
} },
2362 { "(bad)", { XX
} },
2363 { "pcmpestri", { XM
, EXx
, Ib
} },
2364 { "(bad)", { XX
} },
2369 { "(bad)", { XX
} },
2370 { "(bad)", { XX
} },
2371 { "pcmpistrm", { XM
, EXx
, Ib
} },
2372 { "(bad)", { XX
} },
2377 { "(bad)", { XX
} },
2378 { "(bad)", { XX
} },
2379 { "pcmpistri", { XM
, EXx
, Ib
} },
2380 { "(bad)", { XX
} },
2385 { "ucomiss",{ XM
, EXd
} },
2386 { "(bad)", { XX
} },
2387 { "ucomisd",{ XM
, EXq
} },
2388 { "(bad)", { XX
} },
2393 { "comiss", { XM
, EXd
} },
2394 { "(bad)", { XX
} },
2395 { "comisd", { XM
, EXq
} },
2396 { "(bad)", { XX
} },
2401 { "punpcklbw",{ MX
, EMd
} },
2402 { "(bad)", { XX
} },
2403 { "punpcklbw",{ MX
, EMx
} },
2404 { "(bad)", { XX
} },
2409 { "punpcklwd",{ MX
, EMd
} },
2410 { "(bad)", { XX
} },
2411 { "punpcklwd",{ MX
, EMx
} },
2412 { "(bad)", { XX
} },
2417 { "punpckldq",{ MX
, EMd
} },
2418 { "(bad)", { XX
} },
2419 { "punpckldq",{ MX
, EMx
} },
2420 { "(bad)", { XX
} },
2425 { "vmptrld",{ Mq
} },
2426 { "vmxon", { Mq
} },
2427 { "vmclear",{ Mq
} },
2428 { "(bad)", { XX
} },
2433 { "(bad)", { XX
} },
2434 { "(bad)", { XX
} },
2435 { "psrldq", { MS
, Ib
} },
2436 { "(bad)", { XX
} },
2441 { "(bad)", { XX
} },
2442 { "(bad)", { XX
} },
2443 { "pslldq", { MS
, Ib
} },
2444 { "(bad)", { XX
} },
2448 static const struct dis386 x86_64_table
[][2] = {
2450 { "pusha{P|}", { XX
} },
2451 { "(bad)", { XX
} },
2454 { "popa{P|}", { XX
} },
2455 { "(bad)", { XX
} },
2458 { "bound{S|}", { Gv
, Ma
} },
2459 { "(bad)", { XX
} },
2462 { "arpl", { Ew
, Gw
} },
2463 { "movs{||lq|xd}", { Gv
, Ed
} },
2467 static const struct dis386 three_byte_table
[][256] = {
2471 { "pshufb", { MX
, EM
} },
2472 { "phaddw", { MX
, EM
} },
2473 { "phaddd", { MX
, EM
} },
2474 { "phaddsw", { MX
, EM
} },
2475 { "pmaddubsw", { MX
, EM
} },
2476 { "phsubw", { MX
, EM
} },
2477 { "phsubd", { MX
, EM
} },
2478 { "phsubsw", { MX
, EM
} },
2480 { "psignb", { MX
, EM
} },
2481 { "psignw", { MX
, EM
} },
2482 { "psignd", { MX
, EM
} },
2483 { "pmulhrsw", { MX
, EM
} },
2484 { "(bad)", { XX
} },
2485 { "(bad)", { XX
} },
2486 { "(bad)", { XX
} },
2487 { "(bad)", { XX
} },
2490 { "(bad)", { XX
} },
2491 { "(bad)", { XX
} },
2492 { "(bad)", { XX
} },
2495 { "(bad)", { XX
} },
2498 { "(bad)", { XX
} },
2499 { "(bad)", { XX
} },
2500 { "(bad)", { XX
} },
2501 { "(bad)", { XX
} },
2502 { "pabsb", { MX
, EM
} },
2503 { "pabsw", { MX
, EM
} },
2504 { "pabsd", { MX
, EM
} },
2505 { "(bad)", { XX
} },
2513 { "(bad)", { XX
} },
2514 { "(bad)", { XX
} },
2520 { "(bad)", { XX
} },
2521 { "(bad)", { XX
} },
2522 { "(bad)", { XX
} },
2523 { "(bad)", { XX
} },
2531 { "(bad)", { XX
} },
2545 { "(bad)", { XX
} },
2546 { "(bad)", { XX
} },
2547 { "(bad)", { XX
} },
2548 { "(bad)", { XX
} },
2549 { "(bad)", { XX
} },
2550 { "(bad)", { XX
} },
2552 { "(bad)", { XX
} },
2553 { "(bad)", { XX
} },
2554 { "(bad)", { XX
} },
2555 { "(bad)", { XX
} },
2556 { "(bad)", { XX
} },
2557 { "(bad)", { XX
} },
2558 { "(bad)", { XX
} },
2559 { "(bad)", { XX
} },
2561 { "(bad)", { XX
} },
2562 { "(bad)", { XX
} },
2563 { "(bad)", { XX
} },
2564 { "(bad)", { XX
} },
2565 { "(bad)", { XX
} },
2566 { "(bad)", { XX
} },
2567 { "(bad)", { XX
} },
2568 { "(bad)", { XX
} },
2570 { "(bad)", { XX
} },
2571 { "(bad)", { XX
} },
2572 { "(bad)", { XX
} },
2573 { "(bad)", { XX
} },
2574 { "(bad)", { XX
} },
2575 { "(bad)", { XX
} },
2576 { "(bad)", { XX
} },
2577 { "(bad)", { XX
} },
2579 { "(bad)", { XX
} },
2580 { "(bad)", { XX
} },
2581 { "(bad)", { XX
} },
2582 { "(bad)", { XX
} },
2583 { "(bad)", { XX
} },
2584 { "(bad)", { XX
} },
2585 { "(bad)", { XX
} },
2586 { "(bad)", { XX
} },
2588 { "(bad)", { XX
} },
2589 { "(bad)", { XX
} },
2590 { "(bad)", { XX
} },
2591 { "(bad)", { XX
} },
2592 { "(bad)", { XX
} },
2593 { "(bad)", { XX
} },
2594 { "(bad)", { XX
} },
2595 { "(bad)", { XX
} },
2597 { "(bad)", { XX
} },
2598 { "(bad)", { XX
} },
2599 { "(bad)", { XX
} },
2600 { "(bad)", { XX
} },
2601 { "(bad)", { XX
} },
2602 { "(bad)", { XX
} },
2603 { "(bad)", { XX
} },
2604 { "(bad)", { XX
} },
2606 { "(bad)", { XX
} },
2607 { "(bad)", { XX
} },
2608 { "(bad)", { XX
} },
2609 { "(bad)", { XX
} },
2610 { "(bad)", { XX
} },
2611 { "(bad)", { XX
} },
2612 { "(bad)", { XX
} },
2613 { "(bad)", { XX
} },
2615 { "(bad)", { XX
} },
2616 { "(bad)", { XX
} },
2617 { "(bad)", { XX
} },
2618 { "(bad)", { XX
} },
2619 { "(bad)", { XX
} },
2620 { "(bad)", { XX
} },
2621 { "(bad)", { XX
} },
2622 { "(bad)", { XX
} },
2624 { "(bad)", { XX
} },
2625 { "(bad)", { XX
} },
2626 { "(bad)", { XX
} },
2627 { "(bad)", { XX
} },
2628 { "(bad)", { XX
} },
2629 { "(bad)", { XX
} },
2630 { "(bad)", { XX
} },
2631 { "(bad)", { XX
} },
2633 { "(bad)", { XX
} },
2634 { "(bad)", { XX
} },
2635 { "(bad)", { XX
} },
2636 { "(bad)", { XX
} },
2637 { "(bad)", { XX
} },
2638 { "(bad)", { XX
} },
2639 { "(bad)", { XX
} },
2640 { "(bad)", { XX
} },
2642 { "(bad)", { XX
} },
2643 { "(bad)", { XX
} },
2644 { "(bad)", { XX
} },
2645 { "(bad)", { XX
} },
2646 { "(bad)", { XX
} },
2647 { "(bad)", { XX
} },
2648 { "(bad)", { XX
} },
2649 { "(bad)", { XX
} },
2651 { "(bad)", { XX
} },
2652 { "(bad)", { XX
} },
2653 { "(bad)", { XX
} },
2654 { "(bad)", { XX
} },
2655 { "(bad)", { XX
} },
2656 { "(bad)", { XX
} },
2657 { "(bad)", { XX
} },
2658 { "(bad)", { XX
} },
2660 { "(bad)", { XX
} },
2661 { "(bad)", { XX
} },
2662 { "(bad)", { XX
} },
2663 { "(bad)", { XX
} },
2664 { "(bad)", { XX
} },
2665 { "(bad)", { XX
} },
2666 { "(bad)", { XX
} },
2667 { "(bad)", { XX
} },
2669 { "(bad)", { XX
} },
2670 { "(bad)", { XX
} },
2671 { "(bad)", { XX
} },
2672 { "(bad)", { XX
} },
2673 { "(bad)", { XX
} },
2674 { "(bad)", { XX
} },
2675 { "(bad)", { XX
} },
2676 { "(bad)", { XX
} },
2678 { "(bad)", { XX
} },
2679 { "(bad)", { XX
} },
2680 { "(bad)", { XX
} },
2681 { "(bad)", { XX
} },
2682 { "(bad)", { XX
} },
2683 { "(bad)", { XX
} },
2684 { "(bad)", { XX
} },
2685 { "(bad)", { XX
} },
2687 { "(bad)", { XX
} },
2688 { "(bad)", { XX
} },
2689 { "(bad)", { XX
} },
2690 { "(bad)", { XX
} },
2691 { "(bad)", { XX
} },
2692 { "(bad)", { XX
} },
2693 { "(bad)", { XX
} },
2694 { "(bad)", { XX
} },
2696 { "(bad)", { XX
} },
2697 { "(bad)", { XX
} },
2698 { "(bad)", { XX
} },
2699 { "(bad)", { XX
} },
2700 { "(bad)", { XX
} },
2701 { "(bad)", { XX
} },
2702 { "(bad)", { XX
} },
2703 { "(bad)", { XX
} },
2705 { "(bad)", { XX
} },
2706 { "(bad)", { XX
} },
2707 { "(bad)", { XX
} },
2708 { "(bad)", { XX
} },
2709 { "(bad)", { XX
} },
2710 { "(bad)", { XX
} },
2711 { "(bad)", { XX
} },
2712 { "(bad)", { XX
} },
2714 { "(bad)", { XX
} },
2715 { "(bad)", { XX
} },
2716 { "(bad)", { XX
} },
2717 { "(bad)", { XX
} },
2718 { "(bad)", { XX
} },
2719 { "(bad)", { XX
} },
2720 { "(bad)", { XX
} },
2721 { "(bad)", { XX
} },
2723 { "(bad)", { XX
} },
2724 { "(bad)", { XX
} },
2725 { "(bad)", { XX
} },
2726 { "(bad)", { XX
} },
2727 { "(bad)", { XX
} },
2728 { "(bad)", { XX
} },
2729 { "(bad)", { XX
} },
2730 { "(bad)", { XX
} },
2732 { "(bad)", { XX
} },
2733 { "(bad)", { XX
} },
2734 { "(bad)", { XX
} },
2735 { "(bad)", { XX
} },
2736 { "(bad)", { XX
} },
2737 { "(bad)", { XX
} },
2738 { "(bad)", { XX
} },
2739 { "(bad)", { XX
} },
2743 { "(bad)", { XX
} },
2744 { "(bad)", { XX
} },
2745 { "(bad)", { XX
} },
2746 { "(bad)", { XX
} },
2747 { "(bad)", { XX
} },
2748 { "(bad)", { XX
} },
2750 { "(bad)", { XX
} },
2751 { "(bad)", { XX
} },
2752 { "(bad)", { XX
} },
2753 { "(bad)", { XX
} },
2754 { "(bad)", { XX
} },
2755 { "(bad)", { XX
} },
2756 { "(bad)", { XX
} },
2757 { "(bad)", { XX
} },
2762 { "(bad)", { XX
} },
2763 { "(bad)", { XX
} },
2764 { "(bad)", { XX
} },
2765 { "(bad)", { XX
} },
2766 { "(bad)", { XX
} },
2767 { "(bad)", { XX
} },
2768 { "(bad)", { XX
} },
2769 { "(bad)", { XX
} },
2778 { "palignr", { MX
, EM
, Ib
} },
2780 { "(bad)", { XX
} },
2781 { "(bad)", { XX
} },
2782 { "(bad)", { XX
} },
2783 { "(bad)", { XX
} },
2789 { "(bad)", { XX
} },
2790 { "(bad)", { XX
} },
2791 { "(bad)", { XX
} },
2792 { "(bad)", { XX
} },
2793 { "(bad)", { XX
} },
2794 { "(bad)", { XX
} },
2795 { "(bad)", { XX
} },
2796 { "(bad)", { XX
} },
2801 { "(bad)", { XX
} },
2802 { "(bad)", { XX
} },
2803 { "(bad)", { XX
} },
2804 { "(bad)", { XX
} },
2805 { "(bad)", { XX
} },
2807 { "(bad)", { XX
} },
2808 { "(bad)", { XX
} },
2809 { "(bad)", { XX
} },
2810 { "(bad)", { XX
} },
2811 { "(bad)", { XX
} },
2812 { "(bad)", { XX
} },
2813 { "(bad)", { XX
} },
2814 { "(bad)", { XX
} },
2816 { "(bad)", { XX
} },
2817 { "(bad)", { XX
} },
2818 { "(bad)", { XX
} },
2819 { "(bad)", { XX
} },
2820 { "(bad)", { XX
} },
2821 { "(bad)", { XX
} },
2822 { "(bad)", { XX
} },
2823 { "(bad)", { XX
} },
2825 { "(bad)", { XX
} },
2826 { "(bad)", { XX
} },
2827 { "(bad)", { XX
} },
2828 { "(bad)", { XX
} },
2829 { "(bad)", { XX
} },
2830 { "(bad)", { XX
} },
2831 { "(bad)", { XX
} },
2832 { "(bad)", { XX
} },
2837 { "(bad)", { XX
} },
2838 { "(bad)", { XX
} },
2839 { "(bad)", { XX
} },
2840 { "(bad)", { XX
} },
2841 { "(bad)", { XX
} },
2843 { "(bad)", { XX
} },
2844 { "(bad)", { XX
} },
2845 { "(bad)", { XX
} },
2846 { "(bad)", { XX
} },
2847 { "(bad)", { XX
} },
2848 { "(bad)", { XX
} },
2849 { "(bad)", { XX
} },
2850 { "(bad)", { XX
} },
2852 { "(bad)", { XX
} },
2853 { "(bad)", { XX
} },
2854 { "(bad)", { XX
} },
2855 { "(bad)", { XX
} },
2856 { "(bad)", { XX
} },
2857 { "(bad)", { XX
} },
2858 { "(bad)", { XX
} },
2859 { "(bad)", { XX
} },
2861 { "(bad)", { XX
} },
2862 { "(bad)", { XX
} },
2863 { "(bad)", { XX
} },
2864 { "(bad)", { XX
} },
2865 { "(bad)", { XX
} },
2866 { "(bad)", { XX
} },
2867 { "(bad)", { XX
} },
2868 { "(bad)", { XX
} },
2874 { "(bad)", { XX
} },
2875 { "(bad)", { XX
} },
2876 { "(bad)", { XX
} },
2877 { "(bad)", { XX
} },
2879 { "(bad)", { XX
} },
2880 { "(bad)", { XX
} },
2881 { "(bad)", { XX
} },
2882 { "(bad)", { XX
} },
2883 { "(bad)", { XX
} },
2884 { "(bad)", { XX
} },
2885 { "(bad)", { XX
} },
2886 { "(bad)", { XX
} },
2888 { "(bad)", { XX
} },
2889 { "(bad)", { XX
} },
2890 { "(bad)", { XX
} },
2891 { "(bad)", { XX
} },
2892 { "(bad)", { XX
} },
2893 { "(bad)", { XX
} },
2894 { "(bad)", { XX
} },
2895 { "(bad)", { XX
} },
2897 { "(bad)", { XX
} },
2898 { "(bad)", { XX
} },
2899 { "(bad)", { XX
} },
2900 { "(bad)", { XX
} },
2901 { "(bad)", { XX
} },
2902 { "(bad)", { XX
} },
2903 { "(bad)", { XX
} },
2904 { "(bad)", { XX
} },
2906 { "(bad)", { XX
} },
2907 { "(bad)", { XX
} },
2908 { "(bad)", { XX
} },
2909 { "(bad)", { XX
} },
2910 { "(bad)", { XX
} },
2911 { "(bad)", { XX
} },
2912 { "(bad)", { XX
} },
2913 { "(bad)", { XX
} },
2915 { "(bad)", { XX
} },
2916 { "(bad)", { XX
} },
2917 { "(bad)", { XX
} },
2918 { "(bad)", { XX
} },
2919 { "(bad)", { XX
} },
2920 { "(bad)", { XX
} },
2921 { "(bad)", { XX
} },
2922 { "(bad)", { XX
} },
2924 { "(bad)", { XX
} },
2925 { "(bad)", { XX
} },
2926 { "(bad)", { XX
} },
2927 { "(bad)", { XX
} },
2928 { "(bad)", { XX
} },
2929 { "(bad)", { XX
} },
2930 { "(bad)", { XX
} },
2931 { "(bad)", { XX
} },
2933 { "(bad)", { XX
} },
2934 { "(bad)", { XX
} },
2935 { "(bad)", { XX
} },
2936 { "(bad)", { XX
} },
2937 { "(bad)", { XX
} },
2938 { "(bad)", { XX
} },
2939 { "(bad)", { XX
} },
2940 { "(bad)", { XX
} },
2942 { "(bad)", { XX
} },
2943 { "(bad)", { XX
} },
2944 { "(bad)", { XX
} },
2945 { "(bad)", { XX
} },
2946 { "(bad)", { XX
} },
2947 { "(bad)", { XX
} },
2948 { "(bad)", { XX
} },
2949 { "(bad)", { XX
} },
2951 { "(bad)", { XX
} },
2952 { "(bad)", { XX
} },
2953 { "(bad)", { XX
} },
2954 { "(bad)", { XX
} },
2955 { "(bad)", { XX
} },
2956 { "(bad)", { XX
} },
2957 { "(bad)", { XX
} },
2958 { "(bad)", { XX
} },
2960 { "(bad)", { XX
} },
2961 { "(bad)", { XX
} },
2962 { "(bad)", { XX
} },
2963 { "(bad)", { XX
} },
2964 { "(bad)", { XX
} },
2965 { "(bad)", { XX
} },
2966 { "(bad)", { XX
} },
2967 { "(bad)", { XX
} },
2969 { "(bad)", { XX
} },
2970 { "(bad)", { XX
} },
2971 { "(bad)", { XX
} },
2972 { "(bad)", { XX
} },
2973 { "(bad)", { XX
} },
2974 { "(bad)", { XX
} },
2975 { "(bad)", { XX
} },
2976 { "(bad)", { XX
} },
2978 { "(bad)", { XX
} },
2979 { "(bad)", { XX
} },
2980 { "(bad)", { XX
} },
2981 { "(bad)", { XX
} },
2982 { "(bad)", { XX
} },
2983 { "(bad)", { XX
} },
2984 { "(bad)", { XX
} },
2985 { "(bad)", { XX
} },
2987 { "(bad)", { XX
} },
2988 { "(bad)", { XX
} },
2989 { "(bad)", { XX
} },
2990 { "(bad)", { XX
} },
2991 { "(bad)", { XX
} },
2992 { "(bad)", { XX
} },
2993 { "(bad)", { XX
} },
2994 { "(bad)", { XX
} },
2996 { "(bad)", { XX
} },
2997 { "(bad)", { XX
} },
2998 { "(bad)", { XX
} },
2999 { "(bad)", { XX
} },
3000 { "(bad)", { XX
} },
3001 { "(bad)", { XX
} },
3002 { "(bad)", { XX
} },
3003 { "(bad)", { XX
} },
3005 { "(bad)", { XX
} },
3006 { "(bad)", { XX
} },
3007 { "(bad)", { XX
} },
3008 { "(bad)", { XX
} },
3009 { "(bad)", { XX
} },
3010 { "(bad)", { XX
} },
3011 { "(bad)", { XX
} },
3012 { "(bad)", { XX
} },
3014 { "(bad)", { XX
} },
3015 { "(bad)", { XX
} },
3016 { "(bad)", { XX
} },
3017 { "(bad)", { XX
} },
3018 { "(bad)", { XX
} },
3019 { "(bad)", { XX
} },
3020 { "(bad)", { XX
} },
3021 { "(bad)", { XX
} },
3023 { "(bad)", { XX
} },
3024 { "(bad)", { XX
} },
3025 { "(bad)", { XX
} },
3026 { "(bad)", { XX
} },
3027 { "(bad)", { XX
} },
3028 { "(bad)", { XX
} },
3029 { "(bad)", { XX
} },
3030 { "(bad)", { XX
} },
3032 { "(bad)", { XX
} },
3033 { "(bad)", { XX
} },
3034 { "(bad)", { XX
} },
3035 { "(bad)", { XX
} },
3036 { "(bad)", { XX
} },
3037 { "(bad)", { XX
} },
3038 { "(bad)", { XX
} },
3039 { "(bad)", { XX
} },
3041 { "(bad)", { XX
} },
3042 { "(bad)", { XX
} },
3043 { "(bad)", { XX
} },
3044 { "(bad)", { XX
} },
3045 { "(bad)", { XX
} },
3046 { "(bad)", { XX
} },
3047 { "(bad)", { XX
} },
3048 { "(bad)", { XX
} },
3052 static const struct dis386 opc_ext_table
[][2] = {
3055 { "sgdt{Q|IQ||}", { M
} },
3060 { "sidt{Q|IQ||}", { M
} },
3066 { "(bad)", { XX
} },
3070 { "vmptrst", { Mq
} },
3071 { "(bad)", { XX
} },
3075 { "(bad)", { XX
} },
3076 { "psrlw", { MS
, Ib
} },
3080 { "(bad)", { XX
} },
3081 { "psraw", { MS
, Ib
} },
3085 { "(bad)", { XX
} },
3086 { "psllw", { MS
, Ib
} },
3090 { "(bad)", { XX
} },
3091 { "psrld", { MS
, Ib
} },
3095 { "(bad)", { XX
} },
3096 { "psrad", { MS
, Ib
} },
3100 { "(bad)", { XX
} },
3101 { "pslld", { MS
, Ib
} },
3105 { "(bad)", { XX
} },
3106 { "psrlq", { MS
, Ib
} },
3110 { "(bad)", { XX
} },
3115 { "(bad)", { XX
} },
3116 { "psllq", { MS
, Ib
} },
3120 { "(bad)", { XX
} },
3125 { "fxsave", { M
} },
3126 { "(bad)", { XX
} },
3130 { "fxrstor", { M
} },
3131 { "(bad)", { XX
} },
3135 { "ldmxcsr", { Md
} },
3136 { "(bad)", { XX
} },
3140 { "stmxcsr", { Md
} },
3141 { "(bad)", { XX
} },
3145 { "(bad)", { XX
} },
3150 { "(bad)", { XX
} },
3155 { "clflush", { Mb
} },
3160 { "prefetchnta", { Mb
} },
3161 { "(bad)", { XX
} },
3165 { "prefetcht0", { Mb
} },
3166 { "(bad)", { XX
} },
3170 { "prefetcht1", { Mb
} },
3171 { "(bad)", { XX
} },
3175 { "prefetcht2", { Mb
} },
3176 { "(bad)", { XX
} },
3180 static const struct dis386 opc_ext_rm_table
[][8] = {
3183 { "(bad)", { XX
} },
3184 { "vmcall", { Skip_MODRM
} },
3185 { "vmlaunch", { Skip_MODRM
} },
3186 { "vmresume", { Skip_MODRM
} },
3187 { "vmxoff", { Skip_MODRM
} },
3188 { "(bad)", { XX
} },
3189 { "(bad)", { XX
} },
3190 { "(bad)", { XX
} },
3194 { "monitor", { { OP_Monitor
, 0 } } },
3195 { "mwait", { { OP_Mwait
, 0 } } },
3196 { "(bad)", { XX
} },
3197 { "(bad)", { XX
} },
3198 { "(bad)", { XX
} },
3199 { "(bad)", { XX
} },
3200 { "(bad)", { XX
} },
3201 { "(bad)", { XX
} },
3205 { "lfence", { Skip_MODRM
} },
3206 { "(bad)", { XX
} },
3207 { "(bad)", { XX
} },
3208 { "(bad)", { XX
} },
3209 { "(bad)", { XX
} },
3210 { "(bad)", { XX
} },
3211 { "(bad)", { XX
} },
3212 { "(bad)", { XX
} },
3216 { "mfence", { Skip_MODRM
} },
3217 { "(bad)", { XX
} },
3218 { "(bad)", { XX
} },
3219 { "(bad)", { XX
} },
3220 { "(bad)", { XX
} },
3221 { "(bad)", { XX
} },
3222 { "(bad)", { XX
} },
3223 { "(bad)", { XX
} },
3227 { "sfence", { Skip_MODRM
} },
3228 { "(bad)", { XX
} },
3229 { "(bad)", { XX
} },
3230 { "(bad)", { XX
} },
3231 { "(bad)", { XX
} },
3232 { "(bad)", { XX
} },
3233 { "(bad)", { XX
} },
3234 { "(bad)", { XX
} },
3238 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3250 FETCH_DATA (the_info
, codep
+ 1);
3254 /* REX prefixes family. */
3271 if (address_mode
== mode_64bit
)
3277 prefixes
|= PREFIX_REPZ
;
3280 prefixes
|= PREFIX_REPNZ
;
3283 prefixes
|= PREFIX_LOCK
;
3286 prefixes
|= PREFIX_CS
;
3289 prefixes
|= PREFIX_SS
;
3292 prefixes
|= PREFIX_DS
;
3295 prefixes
|= PREFIX_ES
;
3298 prefixes
|= PREFIX_FS
;
3301 prefixes
|= PREFIX_GS
;
3304 prefixes
|= PREFIX_DATA
;
3307 prefixes
|= PREFIX_ADDR
;
3310 /* fwait is really an instruction. If there are prefixes
3311 before the fwait, they belong to the fwait, *not* to the
3312 following instruction. */
3313 if (prefixes
|| rex
)
3315 prefixes
|= PREFIX_FWAIT
;
3319 prefixes
= PREFIX_FWAIT
;
3324 /* Rex is ignored when followed by another prefix. */
3335 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3339 prefix_name (int pref
, int sizeflag
)
3341 static const char *rexes
[16] =
3346 "rex.XB", /* 0x43 */
3348 "rex.RB", /* 0x45 */
3349 "rex.RX", /* 0x46 */
3350 "rex.RXB", /* 0x47 */
3352 "rex.WB", /* 0x49 */
3353 "rex.WX", /* 0x4a */
3354 "rex.WXB", /* 0x4b */
3355 "rex.WR", /* 0x4c */
3356 "rex.WRB", /* 0x4d */
3357 "rex.WRX", /* 0x4e */
3358 "rex.WRXB", /* 0x4f */
3363 /* REX prefixes family. */
3380 return rexes
[pref
- 0x40];
3400 return (sizeflag
& DFLAG
) ? "data16" : "data32";
3402 if (address_mode
== mode_64bit
)
3403 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
3405 return (sizeflag
& AFLAG
) ? "addr16" : "addr32";
3413 static char op_out
[MAX_OPERANDS
][100];
3414 static int op_ad
, op_index
[MAX_OPERANDS
];
3415 static int two_source_ops
;
3416 static bfd_vma op_address
[MAX_OPERANDS
];
3417 static bfd_vma op_riprel
[MAX_OPERANDS
];
3418 static bfd_vma start_pc
;
3421 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3422 * (see topic "Redundant prefixes" in the "Differences from 8086"
3423 * section of the "Virtual 8086 Mode" chapter.)
3424 * 'pc' should be the address of this instruction, it will
3425 * be used to print the target address if this is a relative jump or call
3426 * The function returns the length of this instruction in bytes.
3429 static char intel_syntax
;
3430 static char open_char
;
3431 static char close_char
;
3432 static char separator_char
;
3433 static char scale_char
;
3435 /* Here for backwards compatibility. When gdb stops using
3436 print_insn_i386_att and print_insn_i386_intel these functions can
3437 disappear, and print_insn_i386 be merged into print_insn. */
3439 print_insn_i386_att (bfd_vma pc
, disassemble_info
*info
)
3443 return print_insn (pc
, info
);
3447 print_insn_i386_intel (bfd_vma pc
, disassemble_info
*info
)
3451 return print_insn (pc
, info
);
3455 print_insn_i386 (bfd_vma pc
, disassemble_info
*info
)
3459 return print_insn (pc
, info
);
3463 print_i386_disassembler_options (FILE *stream
)
3465 fprintf (stream
, _("\n\
3466 The following i386/x86-64 specific disassembler options are supported for use\n\
3467 with the -M switch (multiple options should be separated by commas):\n"));
3469 fprintf (stream
, _(" x86-64 Disassemble in 64bit mode\n"));
3470 fprintf (stream
, _(" i386 Disassemble in 32bit mode\n"));
3471 fprintf (stream
, _(" i8086 Disassemble in 16bit mode\n"));
3472 fprintf (stream
, _(" att Display instruction in AT&T syntax\n"));
3473 fprintf (stream
, _(" intel Display instruction in Intel syntax\n"));
3474 fprintf (stream
, _(" addr64 Assume 64bit address size\n"));
3475 fprintf (stream
, _(" addr32 Assume 32bit address size\n"));
3476 fprintf (stream
, _(" addr16 Assume 16bit address size\n"));
3477 fprintf (stream
, _(" data32 Assume 32bit data size\n"));
3478 fprintf (stream
, _(" data16 Assume 16bit data size\n"));
3479 fprintf (stream
, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3482 /* Get a pointer to struct dis386 with a valid name. */
3484 static const struct dis386
*
3485 get_valid_dis386 (const struct dis386
*dp
)
3489 if (dp
->name
!= NULL
)
3492 switch (dp
->op
[0].bytemode
)
3495 dp
= &grps
[dp
->op
[1].bytemode
][modrm
.reg
];
3498 case USE_PREFIX_USER_TABLE
:
3500 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
3501 if (prefixes
& PREFIX_REPZ
)
3508 /* We should check PREFIX_REPNZ and PREFIX_REPZ before
3510 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
3511 if (prefixes
& PREFIX_REPNZ
)
3514 repnz_prefix
= NULL
;
3518 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3519 if (prefixes
& PREFIX_DATA
)
3526 dp
= &prefix_user_table
[dp
->op
[1].bytemode
][index
];
3529 case X86_64_SPECIAL
:
3530 index
= address_mode
== mode_64bit
? 1 : 0;
3531 dp
= &x86_64_table
[dp
->op
[1].bytemode
][index
];
3534 case USE_OPC_EXT_TABLE
:
3535 index
= modrm
.mod
== 0x3 ? 1 : 0;
3536 dp
= &opc_ext_table
[dp
->op
[1].bytemode
][index
];
3539 case USE_OPC_EXT_RM_TABLE
:
3541 dp
= &opc_ext_rm_table
[dp
->op
[1].bytemode
][index
];
3545 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3549 if (dp
->name
!= NULL
)
3552 return get_valid_dis386 (dp
);
3556 print_insn (bfd_vma pc
, disassemble_info
*info
)
3558 const struct dis386
*dp
;
3560 char *op_txt
[MAX_OPERANDS
];
3564 struct dis_private priv
;
3566 char prefix_obuf
[32];
3569 if (info
->mach
== bfd_mach_x86_64_intel_syntax
3570 || info
->mach
== bfd_mach_x86_64
)
3571 address_mode
= mode_64bit
;
3573 address_mode
= mode_32bit
;
3575 if (intel_syntax
== (char) -1)
3576 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
3577 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
3579 if (info
->mach
== bfd_mach_i386_i386
3580 || info
->mach
== bfd_mach_x86_64
3581 || info
->mach
== bfd_mach_i386_i386_intel_syntax
3582 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
3583 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3584 else if (info
->mach
== bfd_mach_i386_i8086
)
3585 priv
.orig_sizeflag
= 0;
3589 for (p
= info
->disassembler_options
; p
!= NULL
; )
3591 if (CONST_STRNEQ (p
, "x86-64"))
3593 address_mode
= mode_64bit
;
3594 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3596 else if (CONST_STRNEQ (p
, "i386"))
3598 address_mode
= mode_32bit
;
3599 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3601 else if (CONST_STRNEQ (p
, "i8086"))
3603 address_mode
= mode_16bit
;
3604 priv
.orig_sizeflag
= 0;
3606 else if (CONST_STRNEQ (p
, "intel"))
3610 else if (CONST_STRNEQ (p
, "att"))
3614 else if (CONST_STRNEQ (p
, "addr"))
3616 if (address_mode
== mode_64bit
)
3618 if (p
[4] == '3' && p
[5] == '2')
3619 priv
.orig_sizeflag
&= ~AFLAG
;
3620 else if (p
[4] == '6' && p
[5] == '4')
3621 priv
.orig_sizeflag
|= AFLAG
;
3625 if (p
[4] == '1' && p
[5] == '6')
3626 priv
.orig_sizeflag
&= ~AFLAG
;
3627 else if (p
[4] == '3' && p
[5] == '2')
3628 priv
.orig_sizeflag
|= AFLAG
;
3631 else if (CONST_STRNEQ (p
, "data"))
3633 if (p
[4] == '1' && p
[5] == '6')
3634 priv
.orig_sizeflag
&= ~DFLAG
;
3635 else if (p
[4] == '3' && p
[5] == '2')
3636 priv
.orig_sizeflag
|= DFLAG
;
3638 else if (CONST_STRNEQ (p
, "suffix"))
3639 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
3641 p
= strchr (p
, ',');
3648 names64
= intel_names64
;
3649 names32
= intel_names32
;
3650 names16
= intel_names16
;
3651 names8
= intel_names8
;
3652 names8rex
= intel_names8rex
;
3653 names_seg
= intel_names_seg
;
3654 index16
= intel_index16
;
3657 separator_char
= '+';
3662 names64
= att_names64
;
3663 names32
= att_names32
;
3664 names16
= att_names16
;
3665 names8
= att_names8
;
3666 names8rex
= att_names8rex
;
3667 names_seg
= att_names_seg
;
3668 index16
= att_index16
;
3671 separator_char
= ',';
3675 /* The output looks better if we put 7 bytes on a line, since that
3676 puts most long word instructions on a single line. */
3677 info
->bytes_per_line
= 7;
3679 info
->private_data
= &priv
;
3680 priv
.max_fetched
= priv
.the_buffer
;
3681 priv
.insn_start
= pc
;
3684 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3692 start_codep
= priv
.the_buffer
;
3693 codep
= priv
.the_buffer
;
3695 if (setjmp (priv
.bailout
) != 0)
3699 /* Getting here means we tried for data but didn't get it. That
3700 means we have an incomplete instruction of some sort. Just
3701 print the first byte as a prefix or a .byte pseudo-op. */
3702 if (codep
> priv
.the_buffer
)
3704 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3706 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3709 /* Just print the first byte as a .byte instruction. */
3710 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
3711 (unsigned int) priv
.the_buffer
[0]);
3724 sizeflag
= priv
.orig_sizeflag
;
3726 FETCH_DATA (info
, codep
+ 1);
3727 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
3729 if (((prefixes
& PREFIX_FWAIT
)
3730 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
3731 || (rex
&& rex_used
))
3735 /* fwait not followed by floating point instruction, or rex followed
3736 by other prefixes. Print the first prefix. */
3737 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3739 name
= INTERNAL_DISASSEMBLER_ERROR
;
3740 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3747 unsigned char threebyte
;
3748 FETCH_DATA (info
, codep
+ 2);
3749 threebyte
= *++codep
;
3750 dp
= &dis386_twobyte
[threebyte
];
3751 need_modrm
= twobyte_has_modrm
[*codep
];
3753 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3755 FETCH_DATA (info
, codep
+ 2);
3761 dp
= &dis386
[*codep
];
3762 need_modrm
= onebyte_has_modrm
[*codep
];
3766 if ((prefixes
& PREFIX_REPZ
))
3768 repz_prefix
= "repz ";
3769 used_prefixes
|= PREFIX_REPZ
;
3774 if ((prefixes
& PREFIX_REPNZ
))
3776 repnz_prefix
= "repnz ";
3777 used_prefixes
|= PREFIX_REPNZ
;
3780 repnz_prefix
= NULL
;
3782 if ((prefixes
& PREFIX_LOCK
))
3784 lock_prefix
= "lock ";
3785 used_prefixes
|= PREFIX_LOCK
;
3791 if (prefixes
& PREFIX_ADDR
)
3794 if (dp
->op
[2].bytemode
!= loop_jcxz_mode
|| intel_syntax
)
3796 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
3797 addr_prefix
= "addr32 ";
3799 addr_prefix
= "addr16 ";
3800 used_prefixes
|= PREFIX_ADDR
;
3805 if ((prefixes
& PREFIX_DATA
))
3808 if (dp
->op
[2].bytemode
== cond_jump_mode
3809 && dp
->op
[0].bytemode
== v_mode
3812 if (sizeflag
& DFLAG
)
3813 data_prefix
= "data32 ";
3815 data_prefix
= "data16 ";
3816 used_prefixes
|= PREFIX_DATA
;
3820 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3822 dp
= &three_byte_table
[dp
->op
[1].bytemode
][op
];
3823 modrm
.mod
= (*codep
>> 6) & 3;
3824 modrm
.reg
= (*codep
>> 3) & 7;
3825 modrm
.rm
= *codep
& 7;
3827 else if (need_modrm
)
3829 FETCH_DATA (info
, codep
+ 1);
3830 modrm
.mod
= (*codep
>> 6) & 3;
3831 modrm
.reg
= (*codep
>> 3) & 7;
3832 modrm
.rm
= *codep
& 7;
3835 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== FLOATCODE
)
3841 dp
= get_valid_dis386 (dp
);
3842 if (dp
!= NULL
&& putop (dp
->name
, sizeflag
) == 0)
3844 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3847 op_ad
= MAX_OPERANDS
- 1 - i
;
3849 (*dp
->op
[i
].rtn
) (dp
->op
[i
].bytemode
, sizeflag
);
3854 /* See if any prefixes were not used. If so, print the first one
3855 separately. If we don't do this, we'll wind up printing an
3856 instruction stream which does not precisely correspond to the
3857 bytes we are disassembling. */
3858 if ((prefixes
& ~used_prefixes
) != 0)
3862 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3864 name
= INTERNAL_DISASSEMBLER_ERROR
;
3865 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3868 if (rex
& ~rex_used
)
3871 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
3873 name
= INTERNAL_DISASSEMBLER_ERROR
;
3874 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
3878 prefix_obufp
= prefix_obuf
;
3880 prefix_obufp
= stpcpy (prefix_obufp
, lock_prefix
);
3882 prefix_obufp
= stpcpy (prefix_obufp
, repz_prefix
);
3884 prefix_obufp
= stpcpy (prefix_obufp
, repnz_prefix
);
3886 prefix_obufp
= stpcpy (prefix_obufp
, addr_prefix
);
3888 prefix_obufp
= stpcpy (prefix_obufp
, data_prefix
);
3890 if (prefix_obuf
[0] != 0)
3891 (*info
->fprintf_func
) (info
->stream
, "%s", prefix_obuf
);
3893 obufp
= obuf
+ strlen (obuf
);
3894 for (i
= strlen (obuf
) + strlen (prefix_obuf
); i
< 6; i
++)
3897 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
3899 /* The enter and bound instructions are printed with operands in the same
3900 order as the intel book; everything else is printed in reverse order. */
3901 if (intel_syntax
|| two_source_ops
)
3905 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3906 op_txt
[i
] = op_out
[i
];
3908 for (i
= 0; i
< (MAX_OPERANDS
>> 1); ++i
)
3910 op_ad
= op_index
[i
];
3911 op_index
[i
] = op_index
[MAX_OPERANDS
- 1 - i
];
3912 op_index
[MAX_OPERANDS
- 1 - i
] = op_ad
;
3913 riprel
= op_riprel
[i
];
3914 op_riprel
[i
] = op_riprel
[MAX_OPERANDS
- 1 - i
];
3915 op_riprel
[MAX_OPERANDS
- 1 - i
] = riprel
;
3920 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3921 op_txt
[MAX_OPERANDS
- 1 - i
] = op_out
[i
];
3925 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3929 (*info
->fprintf_func
) (info
->stream
, ",");
3930 if (op_index
[i
] != -1 && !op_riprel
[i
])
3931 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[i
]], info
);
3933 (*info
->fprintf_func
) (info
->stream
, "%s", op_txt
[i
]);
3937 for (i
= 0; i
< MAX_OPERANDS
; i
++)
3938 if (op_index
[i
] != -1 && op_riprel
[i
])
3940 (*info
->fprintf_func
) (info
->stream
, " # ");
3941 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
3942 + op_address
[op_index
[i
]]), info
);
3945 return codep
- priv
.the_buffer
;
3948 static const char *float_mem
[] = {
4023 static const unsigned char float_mem_mode
[] = {
4098 #define ST { OP_ST, 0 }
4099 #define STi { OP_STi, 0 }
4101 #define FGRPd9_2 NULL, { { NULL, 0 } }
4102 #define FGRPd9_4 NULL, { { NULL, 1 } }
4103 #define FGRPd9_5 NULL, { { NULL, 2 } }
4104 #define FGRPd9_6 NULL, { { NULL, 3 } }
4105 #define FGRPd9_7 NULL, { { NULL, 4 } }
4106 #define FGRPda_5 NULL, { { NULL, 5 } }
4107 #define FGRPdb_4 NULL, { { NULL, 6 } }
4108 #define FGRPde_3 NULL, { { NULL, 7 } }
4109 #define FGRPdf_4 NULL, { { NULL, 8 } }
4111 static const struct dis386 float_reg
[][8] = {
4114 { "fadd", { ST
, STi
} },
4115 { "fmul", { ST
, STi
} },
4116 { "fcom", { STi
} },
4117 { "fcomp", { STi
} },
4118 { "fsub", { ST
, STi
} },
4119 { "fsubr", { ST
, STi
} },
4120 { "fdiv", { ST
, STi
} },
4121 { "fdivr", { ST
, STi
} },
4126 { "fxch", { STi
} },
4128 { "(bad)", { XX
} },
4136 { "fcmovb", { ST
, STi
} },
4137 { "fcmove", { ST
, STi
} },
4138 { "fcmovbe",{ ST
, STi
} },
4139 { "fcmovu", { ST
, STi
} },
4140 { "(bad)", { XX
} },
4142 { "(bad)", { XX
} },
4143 { "(bad)", { XX
} },
4147 { "fcmovnb",{ ST
, STi
} },
4148 { "fcmovne",{ ST
, STi
} },
4149 { "fcmovnbe",{ ST
, STi
} },
4150 { "fcmovnu",{ ST
, STi
} },
4152 { "fucomi", { ST
, STi
} },
4153 { "fcomi", { ST
, STi
} },
4154 { "(bad)", { XX
} },
4158 { "fadd", { STi
, ST
} },
4159 { "fmul", { STi
, ST
} },
4160 { "(bad)", { XX
} },
4161 { "(bad)", { XX
} },
4163 { "fsub", { STi
, ST
} },
4164 { "fsubr", { STi
, ST
} },
4165 { "fdiv", { STi
, ST
} },
4166 { "fdivr", { STi
, ST
} },
4168 { "fsubr", { STi
, ST
} },
4169 { "fsub", { STi
, ST
} },
4170 { "fdivr", { STi
, ST
} },
4171 { "fdiv", { STi
, ST
} },
4176 { "ffree", { STi
} },
4177 { "(bad)", { XX
} },
4179 { "fstp", { STi
} },
4180 { "fucom", { STi
} },
4181 { "fucomp", { STi
} },
4182 { "(bad)", { XX
} },
4183 { "(bad)", { XX
} },
4187 { "faddp", { STi
, ST
} },
4188 { "fmulp", { STi
, ST
} },
4189 { "(bad)", { XX
} },
4192 { "fsubp", { STi
, ST
} },
4193 { "fsubrp", { STi
, ST
} },
4194 { "fdivp", { STi
, ST
} },
4195 { "fdivrp", { STi
, ST
} },
4197 { "fsubrp", { STi
, ST
} },
4198 { "fsubp", { STi
, ST
} },
4199 { "fdivrp", { STi
, ST
} },
4200 { "fdivp", { STi
, ST
} },
4205 { "ffreep", { STi
} },
4206 { "(bad)", { XX
} },
4207 { "(bad)", { XX
} },
4208 { "(bad)", { XX
} },
4210 { "fucomip", { ST
, STi
} },
4211 { "fcomip", { ST
, STi
} },
4212 { "(bad)", { XX
} },
4216 static char *fgrps
[][8] = {
4219 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4224 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4229 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4234 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4239 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4244 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4249 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4250 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4255 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4260 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4265 OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED
,
4266 int sizeflag ATTRIBUTE_UNUSED
)
4268 /* Skip mod/rm byte. */
4274 dofloat (int sizeflag
)
4276 const struct dis386
*dp
;
4277 unsigned char floatop
;
4279 floatop
= codep
[-1];
4283 int fp_indx
= (floatop
- 0xd8) * 8 + modrm
.reg
;
4285 putop (float_mem
[fp_indx
], sizeflag
);
4288 OP_E (float_mem_mode
[fp_indx
], sizeflag
);
4291 /* Skip mod/rm byte. */
4295 dp
= &float_reg
[floatop
- 0xd8][modrm
.reg
];
4296 if (dp
->name
== NULL
)
4298 putop (fgrps
[dp
->op
[0].bytemode
][modrm
.rm
], sizeflag
);
4300 /* Instruction fnstsw is only one with strange arg. */
4301 if (floatop
== 0xdf && codep
[-1] == 0xe0)
4302 strcpy (op_out
[0], names16
[0]);
4306 putop (dp
->name
, sizeflag
);
4311 (*dp
->op
[0].rtn
) (dp
->op
[0].bytemode
, sizeflag
);
4316 (*dp
->op
[1].rtn
) (dp
->op
[1].bytemode
, sizeflag
);
4321 OP_ST (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4323 oappend ("%st" + intel_syntax
);
4327 OP_STi (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4329 sprintf (scratchbuf
, "%%st(%d)", modrm
.rm
);
4330 oappend (scratchbuf
+ intel_syntax
);
4333 /* Capital letters in template are macros. */
4335 putop (const char *template, int sizeflag
)
4340 for (p
= template; *p
; p
++)
4351 if (address_mode
== mode_64bit
)
4359 /* Alternative not valid. */
4360 strcpy (obuf
, "(bad)");
4364 else if (*p
== '\0')
4385 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4391 if (sizeflag
& SUFFIX_ALWAYS
)
4395 if (intel_syntax
&& !alt
)
4397 if ((prefixes
& PREFIX_DATA
) || (sizeflag
& SUFFIX_ALWAYS
))
4399 if (sizeflag
& DFLAG
)
4400 *obufp
++ = intel_syntax
? 'd' : 'l';
4402 *obufp
++ = intel_syntax
? 'w' : 's';
4403 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4407 if (intel_syntax
|| !(sizeflag
& SUFFIX_ALWAYS
))
4414 else if (sizeflag
& DFLAG
)
4415 *obufp
++ = intel_syntax
? 'd' : 'l';
4418 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4423 case 'E': /* For jcxz/jecxz */
4424 if (address_mode
== mode_64bit
)
4426 if (sizeflag
& AFLAG
)
4432 if (sizeflag
& AFLAG
)
4434 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4439 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
4441 if (sizeflag
& AFLAG
)
4442 *obufp
++ = address_mode
== mode_64bit
? 'q' : 'l';
4444 *obufp
++ = address_mode
== mode_64bit
? 'l' : 'w';
4445 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4449 if (intel_syntax
|| (obufp
[-1] != 's' && !(sizeflag
& SUFFIX_ALWAYS
)))
4451 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4456 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4461 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
4462 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
4464 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
4467 if (prefixes
& PREFIX_DS
)
4488 if (address_mode
== mode_64bit
&& (sizeflag
& SUFFIX_ALWAYS
))
4497 if (sizeflag
& SUFFIX_ALWAYS
)
4501 if ((prefixes
& PREFIX_FWAIT
) == 0)
4504 used_prefixes
|= PREFIX_FWAIT
;
4510 else if (intel_syntax
&& (sizeflag
& DFLAG
))
4515 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4520 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4529 if ((prefixes
& PREFIX_DATA
)
4531 || (sizeflag
& SUFFIX_ALWAYS
))
4538 if (sizeflag
& DFLAG
)
4543 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4549 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4551 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4557 if (intel_syntax
&& !alt
)
4560 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4566 if (sizeflag
& DFLAG
)
4567 *obufp
++ = intel_syntax
? 'd' : 'l';
4571 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4578 else if (sizeflag
& DFLAG
)
4587 if (intel_syntax
&& !p
[1]
4588 && ((rex
& REX_W
) || (sizeflag
& DFLAG
)))
4591 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4596 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4598 if (sizeflag
& SUFFIX_ALWAYS
)
4606 if (sizeflag
& SUFFIX_ALWAYS
)
4612 if (sizeflag
& DFLAG
)
4616 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4621 if (prefixes
& PREFIX_DATA
)
4625 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4636 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4638 /* operand size flag for cwtl, cbtw */
4647 else if (sizeflag
& DFLAG
)
4652 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4662 oappend (const char *s
)
4665 obufp
+= strlen (s
);
4671 if (prefixes
& PREFIX_CS
)
4673 used_prefixes
|= PREFIX_CS
;
4674 oappend ("%cs:" + intel_syntax
);
4676 if (prefixes
& PREFIX_DS
)
4678 used_prefixes
|= PREFIX_DS
;
4679 oappend ("%ds:" + intel_syntax
);
4681 if (prefixes
& PREFIX_SS
)
4683 used_prefixes
|= PREFIX_SS
;
4684 oappend ("%ss:" + intel_syntax
);
4686 if (prefixes
& PREFIX_ES
)
4688 used_prefixes
|= PREFIX_ES
;
4689 oappend ("%es:" + intel_syntax
);
4691 if (prefixes
& PREFIX_FS
)
4693 used_prefixes
|= PREFIX_FS
;
4694 oappend ("%fs:" + intel_syntax
);
4696 if (prefixes
& PREFIX_GS
)
4698 used_prefixes
|= PREFIX_GS
;
4699 oappend ("%gs:" + intel_syntax
);
4704 OP_indirE (int bytemode
, int sizeflag
)
4708 OP_E (bytemode
, sizeflag
);
4712 print_operand_value (char *buf
, int hex
, bfd_vma disp
)
4714 if (address_mode
== mode_64bit
)
4722 sprintf_vma (tmp
, disp
);
4723 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++);
4724 strcpy (buf
+ 2, tmp
+ i
);
4728 bfd_signed_vma v
= disp
;
4735 /* Check for possible overflow on 0x8000000000000000. */
4738 strcpy (buf
, "9223372036854775808");
4752 tmp
[28 - i
] = (v
% 10) + '0';
4756 strcpy (buf
, tmp
+ 29 - i
);
4762 sprintf (buf
, "0x%x", (unsigned int) disp
);
4764 sprintf (buf
, "%d", (int) disp
);
4768 /* Put DISP in BUF as signed hex number. */
4771 print_displacement (char *buf
, bfd_vma disp
)
4773 bfd_signed_vma val
= disp
;
4782 /* Check for possible overflow. */
4785 switch (address_mode
)
4788 strcpy (buf
+ j
, "0x8000000000000000");
4791 strcpy (buf
+ j
, "0x80000000");
4794 strcpy (buf
+ j
, "0x8000");
4804 sprintf_vma (tmp
, val
);
4805 for (i
= 0; tmp
[i
] == '0'; i
++)
4809 strcpy (buf
+ j
, tmp
+ i
);
4813 intel_operand_size (int bytemode
, int sizeflag
)
4819 oappend ("BYTE PTR ");
4823 oappend ("WORD PTR ");
4826 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4828 oappend ("QWORD PTR ");
4829 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4837 oappend ("QWORD PTR ");
4838 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
4839 oappend ("DWORD PTR ");
4841 oappend ("WORD PTR ");
4842 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4845 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4847 oappend ("WORD PTR ");
4849 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4853 oappend ("DWORD PTR ");
4856 oappend ("QWORD PTR ");
4859 if (address_mode
== mode_64bit
)
4860 oappend ("QWORD PTR ");
4862 oappend ("DWORD PTR ");
4865 if (sizeflag
& DFLAG
)
4866 oappend ("FWORD PTR ");
4868 oappend ("DWORD PTR ");
4869 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4872 oappend ("TBYTE PTR ");
4875 oappend ("XMMWORD PTR ");
4878 oappend ("OWORD PTR ");
4886 OP_E (int bytemode
, int sizeflag
)
4895 /* Skip mod/rm byte. */
4906 oappend (names8rex
[modrm
.rm
+ add
]);
4908 oappend (names8
[modrm
.rm
+ add
]);
4911 oappend (names16
[modrm
.rm
+ add
]);
4914 oappend (names32
[modrm
.rm
+ add
]);
4917 oappend (names64
[modrm
.rm
+ add
]);
4920 if (address_mode
== mode_64bit
)
4921 oappend (names64
[modrm
.rm
+ add
]);
4923 oappend (names32
[modrm
.rm
+ add
]);
4926 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4928 oappend (names64
[modrm
.rm
+ add
]);
4929 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4941 oappend (names64
[modrm
.rm
+ add
]);
4942 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
4943 oappend (names32
[modrm
.rm
+ add
]);
4945 oappend (names16
[modrm
.rm
+ add
]);
4946 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4951 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4959 intel_operand_size (bytemode
, sizeflag
);
4962 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
4964 /* 32/64 bit address mode */
4979 FETCH_DATA (the_info
, codep
+ 1);
4980 index
= (*codep
>> 3) & 7;
4981 if (address_mode
== mode_64bit
|| index
!= 0x4)
4982 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
4983 scale
= (*codep
>> 6) & 3;
4995 if ((base
& 7) == 5)
4998 if (address_mode
== mode_64bit
&& !havesib
)
5004 FETCH_DATA (the_info
, codep
+ 1);
5006 if ((disp
& 0x80) != 0)
5014 havedisp
= havebase
|| (havesib
&& (index
!= 4 || scale
!= 0));
5017 if (modrm
.mod
!= 0 || (base
& 7) == 5)
5019 if (havedisp
|| riprel
)
5020 print_displacement (scratchbuf
, disp
);
5022 print_operand_value (scratchbuf
, 1, disp
);
5023 oappend (scratchbuf
);
5031 if (havedisp
|| (intel_syntax
&& riprel
))
5033 *obufp
++ = open_char
;
5034 if (intel_syntax
&& riprel
)
5041 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
5042 ? names64
[base
] : names32
[base
]);
5047 if (!intel_syntax
|| havebase
)
5049 *obufp
++ = separator_char
;
5052 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
5053 ? names64
[index
] : names32
[index
]);
5055 if (scale
!= 0 || (!intel_syntax
&& index
!= 4))
5057 *obufp
++ = scale_char
;
5059 sprintf (scratchbuf
, "%d", 1 << scale
);
5060 oappend (scratchbuf
);
5064 && (disp
|| modrm
.mod
!= 0 || (base
& 7) == 5))
5066 if ((bfd_signed_vma
) disp
>= 0)
5071 else if (modrm
.mod
!= 1)
5075 disp
= - (bfd_signed_vma
) disp
;
5078 print_displacement (scratchbuf
, disp
);
5079 oappend (scratchbuf
);
5082 *obufp
++ = close_char
;
5085 else if (intel_syntax
)
5087 if (modrm
.mod
!= 0 || (base
& 7) == 5)
5089 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5090 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5094 oappend (names_seg
[ds_reg
- es_reg
]);
5097 print_operand_value (scratchbuf
, 1, disp
);
5098 oappend (scratchbuf
);
5103 { /* 16 bit address mode */
5110 if ((disp
& 0x8000) != 0)
5115 FETCH_DATA (the_info
, codep
+ 1);
5117 if ((disp
& 0x80) != 0)
5122 if ((disp
& 0x8000) != 0)
5128 if (modrm
.mod
!= 0 || modrm
.rm
== 6)
5130 print_displacement (scratchbuf
, disp
);
5131 oappend (scratchbuf
);
5134 if (modrm
.mod
!= 0 || modrm
.rm
!= 6)
5136 *obufp
++ = open_char
;
5138 oappend (index16
[modrm
.rm
]);
5140 && (disp
|| modrm
.mod
!= 0 || modrm
.rm
== 6))
5142 if ((bfd_signed_vma
) disp
>= 0)
5147 else if (modrm
.mod
!= 1)
5151 disp
= - (bfd_signed_vma
) disp
;
5154 print_displacement (scratchbuf
, disp
);
5155 oappend (scratchbuf
);
5158 *obufp
++ = close_char
;
5161 else if (intel_syntax
)
5163 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5164 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5168 oappend (names_seg
[ds_reg
- es_reg
]);
5171 print_operand_value (scratchbuf
, 1, disp
& 0xffff);
5172 oappend (scratchbuf
);
5178 OP_G (int bytemode
, int sizeflag
)
5189 oappend (names8rex
[modrm
.reg
+ add
]);
5191 oappend (names8
[modrm
.reg
+ add
]);
5194 oappend (names16
[modrm
.reg
+ add
]);
5197 oappend (names32
[modrm
.reg
+ add
]);
5200 oappend (names64
[modrm
.reg
+ add
]);
5209 oappend (names64
[modrm
.reg
+ add
]);
5210 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
5211 oappend (names32
[modrm
.reg
+ add
]);
5213 oappend (names16
[modrm
.reg
+ add
]);
5214 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5217 if (address_mode
== mode_64bit
)
5218 oappend (names64
[modrm
.reg
+ add
]);
5220 oappend (names32
[modrm
.reg
+ add
]);
5223 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5236 FETCH_DATA (the_info
, codep
+ 8);
5237 a
= *codep
++ & 0xff;
5238 a
|= (*codep
++ & 0xff) << 8;
5239 a
|= (*codep
++ & 0xff) << 16;
5240 a
|= (*codep
++ & 0xff) << 24;
5241 b
= *codep
++ & 0xff;
5242 b
|= (*codep
++ & 0xff) << 8;
5243 b
|= (*codep
++ & 0xff) << 16;
5244 b
|= (*codep
++ & 0xff) << 24;
5245 x
= a
+ ((bfd_vma
) b
<< 32);
5253 static bfd_signed_vma
5256 bfd_signed_vma x
= 0;
5258 FETCH_DATA (the_info
, codep
+ 4);
5259 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5260 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5261 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5262 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5266 static bfd_signed_vma
5269 bfd_signed_vma x
= 0;
5271 FETCH_DATA (the_info
, codep
+ 4);
5272 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5273 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5274 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5275 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5277 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
5287 FETCH_DATA (the_info
, codep
+ 2);
5288 x
= *codep
++ & 0xff;
5289 x
|= (*codep
++ & 0xff) << 8;
5294 set_op (bfd_vma op
, int riprel
)
5296 op_index
[op_ad
] = op_ad
;
5297 if (address_mode
== mode_64bit
)
5299 op_address
[op_ad
] = op
;
5300 op_riprel
[op_ad
] = riprel
;
5304 /* Mask to get a 32-bit address. */
5305 op_address
[op_ad
] = op
& 0xffffffff;
5306 op_riprel
[op_ad
] = riprel
& 0xffffffff;
5311 OP_REG (int code
, int sizeflag
)
5321 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5322 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5323 s
= names16
[code
- ax_reg
+ add
];
5325 case es_reg
: case ss_reg
: case cs_reg
:
5326 case ds_reg
: case fs_reg
: case gs_reg
:
5327 s
= names_seg
[code
- es_reg
+ add
];
5329 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5330 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5333 s
= names8rex
[code
- al_reg
+ add
];
5335 s
= names8
[code
- al_reg
];
5337 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
5338 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
5339 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
5341 s
= names64
[code
- rAX_reg
+ add
];
5344 code
+= eAX_reg
- rAX_reg
;
5346 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5347 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5350 s
= names64
[code
- eAX_reg
+ add
];
5351 else if (sizeflag
& DFLAG
)
5352 s
= names32
[code
- eAX_reg
+ add
];
5354 s
= names16
[code
- eAX_reg
+ add
];
5355 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5358 s
= INTERNAL_DISASSEMBLER_ERROR
;
5365 OP_IMREG (int code
, int sizeflag
)
5377 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5378 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5379 s
= names16
[code
- ax_reg
];
5381 case es_reg
: case ss_reg
: case cs_reg
:
5382 case ds_reg
: case fs_reg
: case gs_reg
:
5383 s
= names_seg
[code
- es_reg
];
5385 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5386 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5389 s
= names8rex
[code
- al_reg
];
5391 s
= names8
[code
- al_reg
];
5393 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5394 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5397 s
= names64
[code
- eAX_reg
];
5398 else if (sizeflag
& DFLAG
)
5399 s
= names32
[code
- eAX_reg
];
5401 s
= names16
[code
- eAX_reg
];
5402 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5405 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
5410 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5413 s
= INTERNAL_DISASSEMBLER_ERROR
;
5420 OP_I (int bytemode
, int sizeflag
)
5423 bfd_signed_vma mask
= -1;
5428 FETCH_DATA (the_info
, codep
+ 1);
5433 if (address_mode
== mode_64bit
)
5443 else if (sizeflag
& DFLAG
)
5453 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5464 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5469 scratchbuf
[0] = '$';
5470 print_operand_value (scratchbuf
+ 1, 1, op
);
5471 oappend (scratchbuf
+ intel_syntax
);
5472 scratchbuf
[0] = '\0';
5476 OP_I64 (int bytemode
, int sizeflag
)
5479 bfd_signed_vma mask
= -1;
5481 if (address_mode
!= mode_64bit
)
5483 OP_I (bytemode
, sizeflag
);
5490 FETCH_DATA (the_info
, codep
+ 1);
5498 else if (sizeflag
& DFLAG
)
5508 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5515 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5520 scratchbuf
[0] = '$';
5521 print_operand_value (scratchbuf
+ 1, 1, op
);
5522 oappend (scratchbuf
+ intel_syntax
);
5523 scratchbuf
[0] = '\0';
5527 OP_sI (int bytemode
, int sizeflag
)
5530 bfd_signed_vma mask
= -1;
5535 FETCH_DATA (the_info
, codep
+ 1);
5537 if ((op
& 0x80) != 0)
5545 else if (sizeflag
& DFLAG
)
5554 if ((op
& 0x8000) != 0)
5557 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5562 if ((op
& 0x8000) != 0)
5566 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5570 scratchbuf
[0] = '$';
5571 print_operand_value (scratchbuf
+ 1, 1, op
);
5572 oappend (scratchbuf
+ intel_syntax
);
5576 OP_J (int bytemode
, int sizeflag
)
5580 bfd_vma segment
= 0;
5585 FETCH_DATA (the_info
, codep
+ 1);
5587 if ((disp
& 0x80) != 0)
5591 if ((sizeflag
& DFLAG
) || (rex
& REX_W
))
5596 if ((disp
& 0x8000) != 0)
5598 /* In 16bit mode, address is wrapped around at 64k within
5599 the same segment. Otherwise, a data16 prefix on a jump
5600 instruction means that the pc is masked to 16 bits after
5601 the displacement is added! */
5603 if ((prefixes
& PREFIX_DATA
) == 0)
5604 segment
= ((start_pc
+ codep
- start_codep
)
5605 & ~((bfd_vma
) 0xffff));
5607 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5610 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5613 disp
= ((start_pc
+ codep
- start_codep
+ disp
) & mask
) | segment
;
5615 print_operand_value (scratchbuf
, 1, disp
);
5616 oappend (scratchbuf
);
5620 OP_SEG (int bytemode
, int sizeflag
)
5622 if (bytemode
== w_mode
)
5623 oappend (names_seg
[modrm
.reg
]);
5625 OP_E (modrm
.mod
== 3 ? bytemode
: w_mode
, sizeflag
);
5629 OP_DIR (int dummy ATTRIBUTE_UNUSED
, int sizeflag
)
5633 if (sizeflag
& DFLAG
)
5643 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5645 sprintf (scratchbuf
, "0x%x:0x%x", seg
, offset
);
5647 sprintf (scratchbuf
, "$0x%x,$0x%x", seg
, offset
);
5648 oappend (scratchbuf
);
5652 OP_OFF (int bytemode
, int sizeflag
)
5656 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5657 intel_operand_size (bytemode
, sizeflag
);
5660 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
5667 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5668 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5670 oappend (names_seg
[ds_reg
- es_reg
]);
5674 print_operand_value (scratchbuf
, 1, off
);
5675 oappend (scratchbuf
);
5679 OP_OFF64 (int bytemode
, int sizeflag
)
5683 if (address_mode
!= mode_64bit
5684 || (prefixes
& PREFIX_ADDR
))
5686 OP_OFF (bytemode
, sizeflag
);
5690 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5691 intel_operand_size (bytemode
, sizeflag
);
5698 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5699 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5701 oappend (names_seg
[ds_reg
- es_reg
]);
5705 print_operand_value (scratchbuf
, 1, off
);
5706 oappend (scratchbuf
);
5710 ptr_reg (int code
, int sizeflag
)
5714 *obufp
++ = open_char
;
5715 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
5716 if (address_mode
== mode_64bit
)
5718 if (!(sizeflag
& AFLAG
))
5719 s
= names32
[code
- eAX_reg
];
5721 s
= names64
[code
- eAX_reg
];
5723 else if (sizeflag
& AFLAG
)
5724 s
= names32
[code
- eAX_reg
];
5726 s
= names16
[code
- eAX_reg
];
5728 *obufp
++ = close_char
;
5733 OP_ESreg (int code
, int sizeflag
)
5739 case 0x6d: /* insw/insl */
5740 intel_operand_size (z_mode
, sizeflag
);
5742 case 0xa5: /* movsw/movsl/movsq */
5743 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5744 case 0xab: /* stosw/stosl */
5745 case 0xaf: /* scasw/scasl */
5746 intel_operand_size (v_mode
, sizeflag
);
5749 intel_operand_size (b_mode
, sizeflag
);
5752 oappend ("%es:" + intel_syntax
);
5753 ptr_reg (code
, sizeflag
);
5757 OP_DSreg (int code
, int sizeflag
)
5763 case 0x6f: /* outsw/outsl */
5764 intel_operand_size (z_mode
, sizeflag
);
5766 case 0xa5: /* movsw/movsl/movsq */
5767 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5768 case 0xad: /* lodsw/lodsl/lodsq */
5769 intel_operand_size (v_mode
, sizeflag
);
5772 intel_operand_size (b_mode
, sizeflag
);
5782 prefixes
|= PREFIX_DS
;
5784 ptr_reg (code
, sizeflag
);
5788 OP_C (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5796 else if (address_mode
!= mode_64bit
&& (prefixes
& PREFIX_LOCK
))
5799 used_prefixes
|= PREFIX_LOCK
;
5802 sprintf (scratchbuf
, "%%cr%d", modrm
.reg
+ add
);
5803 oappend (scratchbuf
+ intel_syntax
);
5807 OP_D (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5814 sprintf (scratchbuf
, "db%d", modrm
.reg
+ add
);
5816 sprintf (scratchbuf
, "%%db%d", modrm
.reg
+ add
);
5817 oappend (scratchbuf
);
5821 OP_T (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5823 sprintf (scratchbuf
, "%%tr%d", modrm
.reg
);
5824 oappend (scratchbuf
+ intel_syntax
);
5828 OP_R (int bytemode
, int sizeflag
)
5831 OP_E (bytemode
, sizeflag
);
5837 OP_MMX (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5839 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5840 if (prefixes
& PREFIX_DATA
)
5846 sprintf (scratchbuf
, "%%xmm%d", modrm
.reg
+ add
);
5849 sprintf (scratchbuf
, "%%mm%d", modrm
.reg
);
5850 oappend (scratchbuf
+ intel_syntax
);
5854 OP_XMM (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5860 sprintf (scratchbuf
, "%%xmm%d", modrm
.reg
+ add
);
5861 oappend (scratchbuf
+ intel_syntax
);
5865 OP_EM (int bytemode
, int sizeflag
)
5869 if (intel_syntax
&& bytemode
== v_mode
)
5871 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5872 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5874 OP_E (bytemode
, sizeflag
);
5878 /* Skip mod/rm byte. */
5881 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5882 if (prefixes
& PREFIX_DATA
)
5889 sprintf (scratchbuf
, "%%xmm%d", modrm
.rm
+ add
);
5892 sprintf (scratchbuf
, "%%mm%d", modrm
.rm
);
5893 oappend (scratchbuf
+ intel_syntax
);
5896 /* cvt* are the only instructions in sse2 which have
5897 both SSE and MMX operands and also have 0x66 prefix
5898 in their opcode. 0x66 was originally used to differentiate
5899 between SSE and MMX instruction(operands). So we have to handle the
5900 cvt* separately using OP_EMC and OP_MXC */
5902 OP_EMC (int bytemode
, int sizeflag
)
5906 if (intel_syntax
&& bytemode
== v_mode
)
5908 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5909 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5911 OP_E (bytemode
, sizeflag
);
5915 /* Skip mod/rm byte. */
5918 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5919 sprintf (scratchbuf
, "%%mm%d", modrm
.rm
);
5920 oappend (scratchbuf
+ intel_syntax
);
5924 OP_MXC (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5926 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5927 sprintf (scratchbuf
, "%%mm%d", modrm
.reg
);
5928 oappend (scratchbuf
+ intel_syntax
);
5932 OP_EX (int bytemode
, int sizeflag
)
5937 OP_E (bytemode
, sizeflag
);
5944 /* Skip mod/rm byte. */
5947 sprintf (scratchbuf
, "%%xmm%d", modrm
.rm
+ add
);
5948 oappend (scratchbuf
+ intel_syntax
);
5952 OP_MS (int bytemode
, int sizeflag
)
5955 OP_EM (bytemode
, sizeflag
);
5961 OP_XS (int bytemode
, int sizeflag
)
5964 OP_EX (bytemode
, sizeflag
);
5970 OP_M (int bytemode
, int sizeflag
)
5973 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
5976 OP_E (bytemode
, sizeflag
);
5980 OP_0f07 (int bytemode
, int sizeflag
)
5982 if (modrm
.mod
!= 3 || modrm
.rm
!= 0)
5985 OP_E (bytemode
, sizeflag
);
5988 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
5989 32bit mode and "xchg %rax,%rax" in 64bit mode. */
5992 NOP_Fixup1 (int bytemode
, int sizeflag
)
5994 if ((prefixes
& PREFIX_DATA
) != 0
5997 && address_mode
== mode_64bit
))
5998 OP_REG (bytemode
, sizeflag
);
6000 strcpy (obuf
, "nop");
6004 NOP_Fixup2 (int bytemode
, int sizeflag
)
6006 if ((prefixes
& PREFIX_DATA
) != 0
6009 && address_mode
== mode_64bit
))
6010 OP_IMREG (bytemode
, sizeflag
);
6013 static const char *const Suffix3DNow
[] = {
6014 /* 00 */ NULL
, NULL
, NULL
, NULL
,
6015 /* 04 */ NULL
, NULL
, NULL
, NULL
,
6016 /* 08 */ NULL
, NULL
, NULL
, NULL
,
6017 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
6018 /* 10 */ NULL
, NULL
, NULL
, NULL
,
6019 /* 14 */ NULL
, NULL
, NULL
, NULL
,
6020 /* 18 */ NULL
, NULL
, NULL
, NULL
,
6021 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
6022 /* 20 */ NULL
, NULL
, NULL
, NULL
,
6023 /* 24 */ NULL
, NULL
, NULL
, NULL
,
6024 /* 28 */ NULL
, NULL
, NULL
, NULL
,
6025 /* 2C */ NULL
, NULL
, NULL
, NULL
,
6026 /* 30 */ NULL
, NULL
, NULL
, NULL
,
6027 /* 34 */ NULL
, NULL
, NULL
, NULL
,
6028 /* 38 */ NULL
, NULL
, NULL
, NULL
,
6029 /* 3C */ NULL
, NULL
, NULL
, NULL
,
6030 /* 40 */ NULL
, NULL
, NULL
, NULL
,
6031 /* 44 */ NULL
, NULL
, NULL
, NULL
,
6032 /* 48 */ NULL
, NULL
, NULL
, NULL
,
6033 /* 4C */ NULL
, NULL
, NULL
, NULL
,
6034 /* 50 */ NULL
, NULL
, NULL
, NULL
,
6035 /* 54 */ NULL
, NULL
, NULL
, NULL
,
6036 /* 58 */ NULL
, NULL
, NULL
, NULL
,
6037 /* 5C */ NULL
, NULL
, NULL
, NULL
,
6038 /* 60 */ NULL
, NULL
, NULL
, NULL
,
6039 /* 64 */ NULL
, NULL
, NULL
, NULL
,
6040 /* 68 */ NULL
, NULL
, NULL
, NULL
,
6041 /* 6C */ NULL
, NULL
, NULL
, NULL
,
6042 /* 70 */ NULL
, NULL
, NULL
, NULL
,
6043 /* 74 */ NULL
, NULL
, NULL
, NULL
,
6044 /* 78 */ NULL
, NULL
, NULL
, NULL
,
6045 /* 7C */ NULL
, NULL
, NULL
, NULL
,
6046 /* 80 */ NULL
, NULL
, NULL
, NULL
,
6047 /* 84 */ NULL
, NULL
, NULL
, NULL
,
6048 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
6049 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
6050 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
6051 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
6052 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
6053 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
6054 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
6055 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
6056 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
6057 /* AC */ NULL
, NULL
, "pfacc", NULL
,
6058 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
6059 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pmulhrw",
6060 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
6061 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
6062 /* C0 */ NULL
, NULL
, NULL
, NULL
,
6063 /* C4 */ NULL
, NULL
, NULL
, NULL
,
6064 /* C8 */ NULL
, NULL
, NULL
, NULL
,
6065 /* CC */ NULL
, NULL
, NULL
, NULL
,
6066 /* D0 */ NULL
, NULL
, NULL
, NULL
,
6067 /* D4 */ NULL
, NULL
, NULL
, NULL
,
6068 /* D8 */ NULL
, NULL
, NULL
, NULL
,
6069 /* DC */ NULL
, NULL
, NULL
, NULL
,
6070 /* E0 */ NULL
, NULL
, NULL
, NULL
,
6071 /* E4 */ NULL
, NULL
, NULL
, NULL
,
6072 /* E8 */ NULL
, NULL
, NULL
, NULL
,
6073 /* EC */ NULL
, NULL
, NULL
, NULL
,
6074 /* F0 */ NULL
, NULL
, NULL
, NULL
,
6075 /* F4 */ NULL
, NULL
, NULL
, NULL
,
6076 /* F8 */ NULL
, NULL
, NULL
, NULL
,
6077 /* FC */ NULL
, NULL
, NULL
, NULL
,
6081 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6083 const char *mnemonic
;
6085 FETCH_DATA (the_info
, codep
+ 1);
6086 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6087 place where an 8-bit immediate would normally go. ie. the last
6088 byte of the instruction. */
6089 obufp
= obuf
+ strlen (obuf
);
6090 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
6095 /* Since a variable sized modrm/sib chunk is between the start
6096 of the opcode (0x0f0f) and the opcode suffix, we need to do
6097 all the modrm processing first, and don't know until now that
6098 we have a bad opcode. This necessitates some cleaning up. */
6099 op_out
[0][0] = '\0';
6100 op_out
[1][0] = '\0';
6105 static const char *simd_cmp_op
[] = {
6117 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6119 unsigned int cmp_type
;
6121 FETCH_DATA (the_info
, codep
+ 1);
6122 obufp
= obuf
+ strlen (obuf
);
6123 cmp_type
= *codep
++ & 0xff;
6126 char suffix1
= 'p', suffix2
= 's';
6127 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6128 if (prefixes
& PREFIX_REPZ
)
6132 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6133 if (prefixes
& PREFIX_DATA
)
6137 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
6138 if (prefixes
& PREFIX_REPNZ
)
6139 suffix1
= 's', suffix2
= 'd';
6142 sprintf (scratchbuf
, "cmp%s%c%c",
6143 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
6144 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6145 oappend (scratchbuf
);
6149 /* We have a bad extension byte. Clean up. */
6150 op_out
[0][0] = '\0';
6151 op_out
[1][0] = '\0';
6157 SIMD_Fixup (int extrachar
, int sizeflag ATTRIBUTE_UNUSED
)
6159 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6160 forms of these instructions. */
6163 char *p
= obuf
+ strlen (obuf
);
6166 *(p
- 1) = *(p
- 2);
6167 *(p
- 2) = *(p
- 3);
6168 *(p
- 3) = extrachar
;
6173 OP_Mwait (int bytemode ATTRIBUTE_UNUSED
,
6174 int sizeflag ATTRIBUTE_UNUSED
)
6176 /* mwait %eax,%ecx */
6179 const char **names
= (address_mode
== mode_64bit
6180 ? names64
: names32
);
6181 strcpy (op_out
[0], names
[0]);
6182 strcpy (op_out
[1], names
[1]);
6185 /* Skip mod/rm byte. */
6191 OP_Monitor (int bytemode ATTRIBUTE_UNUSED
,
6192 int sizeflag ATTRIBUTE_UNUSED
)
6194 /* monitor %eax,%ecx,%edx" */
6197 const char **op1_names
;
6198 const char **names
= (address_mode
== mode_64bit
6199 ? names64
: names32
);
6201 if (!(prefixes
& PREFIX_ADDR
))
6202 op1_names
= (address_mode
== mode_16bit
6206 /* Remove "addr16/addr32". */
6208 op1_names
= (address_mode
!= mode_32bit
6209 ? names32
: names16
);
6210 used_prefixes
|= PREFIX_ADDR
;
6212 strcpy (op_out
[0], op1_names
[0]);
6213 strcpy (op_out
[1], names
[1]);
6214 strcpy (op_out
[2], names
[2]);
6217 /* Skip mod/rm byte. */
6223 SVME_Fixup (int bytemode
, int sizeflag
)
6255 OP_M (bytemode
, sizeflag
);
6258 /* Override "lidt". */
6259 p
= obuf
+ strlen (obuf
) - 4;
6260 /* We might have a suffix. */
6264 if (!(prefixes
& PREFIX_ADDR
))
6269 used_prefixes
|= PREFIX_ADDR
;
6273 strcpy (op_out
[1], names32
[1]);
6279 *obufp
++ = open_char
;
6280 if (address_mode
== mode_64bit
|| (sizeflag
& AFLAG
))
6284 strcpy (obufp
, alt
);
6285 obufp
+= strlen (alt
);
6286 *obufp
++ = close_char
;
6293 INVLPG_Fixup (int bytemode
, int sizeflag
)
6306 OP_M (bytemode
, sizeflag
);
6309 /* Override "invlpg". */
6310 strcpy (obuf
+ strlen (obuf
) - 6, alt
);
6317 /* Throw away prefixes and 1st. opcode byte. */
6318 codep
= insn_codep
+ 1;
6323 REP_Fixup (int bytemode
, int sizeflag
)
6325 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6327 if (prefixes
& PREFIX_REPZ
)
6328 repz_prefix
= "rep ";
6335 OP_IMREG (bytemode
, sizeflag
);
6338 OP_ESreg (bytemode
, sizeflag
);
6341 OP_DSreg (bytemode
, sizeflag
);
6350 CMPXCHG8B_Fixup (int bytemode
, int sizeflag
)
6355 /* Change cmpxchg8b to cmpxchg16b. */
6356 char *p
= obuf
+ strlen (obuf
) - 2;
6360 OP_M (bytemode
, sizeflag
);
6364 XMM_Fixup (int reg
, int sizeflag ATTRIBUTE_UNUSED
)
6366 sprintf (scratchbuf
, "%%xmm%d", reg
);
6367 oappend (scratchbuf
+ intel_syntax
);
6371 CRC32_Fixup (int bytemode
, int sizeflag
)
6373 /* Add proper suffix to "crc32". */
6374 char *p
= obuf
+ strlen (obuf
);
6391 else if (sizeflag
& DFLAG
)
6395 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6398 oappend (INTERNAL_DISASSEMBLER_ERROR
);
6407 /* Skip mod/rm byte. */
6412 add
= (rex
& REX_B
) ? 8 : 0;
6413 if (bytemode
== b_mode
)
6417 oappend (names8rex
[modrm
.rm
+ add
]);
6419 oappend (names8
[modrm
.rm
+ add
]);
6425 oappend (names64
[modrm
.rm
+ add
]);
6426 else if ((prefixes
& PREFIX_DATA
))
6427 oappend (names16
[modrm
.rm
+ add
]);
6429 oappend (names32
[modrm
.rm
+ add
]);
6433 OP_E (bytemode
, sizeflag
);