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2007-08-29 H.J. Lu <hongjiu.lu@intel.com>
[binutils-gdb.git] / opcodes / i386-dis.c
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
4
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22
23 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 July 1988
25 modified by John Hassey (hassey@dg-rtp.dg.com)
26 x86-64 support added by Jan Hubicka (jh@suse.cz)
27 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
28
29 /* The main tables describing the instructions is essentially a copy
30 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
31 Programmers Manual. Usually, there is a capital letter, followed
32 by a small letter. The capital letter tell the addressing mode,
33 and the small letter tells about the operand size. Refer to
34 the Intel manual for details. */
35
36 #include "dis-asm.h"
37 #include "sysdep.h"
38 #include "opintl.h"
39 #include "opcode/i386.h"
40
41 #include <setjmp.h>
42
43 static int fetch_data (struct disassemble_info *, bfd_byte *);
44 static void ckprefix (void);
45 static const char *prefix_name (int, int);
46 static int print_insn (bfd_vma, disassemble_info *);
47 static void dofloat (int);
48 static void OP_ST (int, int);
49 static void OP_STi (int, int);
50 static int putop (const char *, int);
51 static void oappend (const char *);
52 static void append_seg (void);
53 static void OP_indirE (int, int);
54 static void print_operand_value (char *, int, bfd_vma);
55 static void print_displacement (char *, bfd_vma);
56 static void OP_E (int, int);
57 static void OP_G (int, int);
58 static bfd_vma get64 (void);
59 static bfd_signed_vma get32 (void);
60 static bfd_signed_vma get32s (void);
61 static int get16 (void);
62 static void set_op (bfd_vma, int);
63 static void OP_Skip_MODRM (int, int);
64 static void OP_REG (int, int);
65 static void OP_IMREG (int, int);
66 static void OP_I (int, int);
67 static void OP_I64 (int, int);
68 static void OP_sI (int, int);
69 static void OP_J (int, int);
70 static void OP_SEG (int, int);
71 static void OP_DIR (int, int);
72 static void OP_OFF (int, int);
73 static void OP_OFF64 (int, int);
74 static void ptr_reg (int, int);
75 static void OP_ESreg (int, int);
76 static void OP_DSreg (int, int);
77 static void OP_C (int, int);
78 static void OP_D (int, int);
79 static void OP_T (int, int);
80 static void OP_R (int, int);
81 static void OP_MMX (int, int);
82 static void OP_XMM (int, int);
83 static void OP_EM (int, int);
84 static void OP_EX (int, int);
85 static void OP_EMC (int,int);
86 static void OP_MXC (int,int);
87 static void OP_MS (int, int);
88 static void OP_XS (int, int);
89 static void OP_M (int, int);
90 static void OP_0f07 (int, int);
91 static void OP_Monitor (int, int);
92 static void OP_Mwait (int, int);
93 static void NOP_Fixup1 (int, int);
94 static void NOP_Fixup2 (int, int);
95 static void OP_3DNowSuffix (int, int);
96 static void OP_SIMD_Suffix (int, int);
97 static void SIMD_Fixup (int, int);
98 static void SVME_Fixup (int, int);
99 static void INVLPG_Fixup (int, int);
100 static void BadOp (void);
101 static void REP_Fixup (int, int);
102 static void CMPXCHG8B_Fixup (int, int);
103 static void XMM_Fixup (int, int);
104 static void CRC32_Fixup (int, int);
105
106 struct dis_private {
107 /* Points to first byte not fetched. */
108 bfd_byte *max_fetched;
109 bfd_byte the_buffer[MAX_MNEM_SIZE];
110 bfd_vma insn_start;
111 int orig_sizeflag;
112 jmp_buf bailout;
113 };
114
115 enum address_mode
116 {
117 mode_16bit,
118 mode_32bit,
119 mode_64bit
120 };
121
122 enum address_mode address_mode;
123
124 /* Flags for the prefixes for the current instruction. See below. */
125 static int prefixes;
126
127 /* REX prefix the current instruction. See below. */
128 static int rex;
129 /* Bits of REX we've already used. */
130 static int rex_used;
131 /* Mark parts used in the REX prefix. When we are testing for
132 empty prefix (for 8bit register REX extension), just mask it
133 out. Otherwise test for REX bit is excuse for existence of REX
134 only in case value is nonzero. */
135 #define USED_REX(value) \
136 { \
137 if (value) \
138 { \
139 if ((rex & value)) \
140 rex_used |= (value) | REX_OPCODE; \
141 } \
142 else \
143 rex_used |= REX_OPCODE; \
144 }
145
146 /* Flags for prefixes which we somehow handled when printing the
147 current instruction. */
148 static int used_prefixes;
149
150 /* Flags stored in PREFIXES. */
151 #define PREFIX_REPZ 1
152 #define PREFIX_REPNZ 2
153 #define PREFIX_LOCK 4
154 #define PREFIX_CS 8
155 #define PREFIX_SS 0x10
156 #define PREFIX_DS 0x20
157 #define PREFIX_ES 0x40
158 #define PREFIX_FS 0x80
159 #define PREFIX_GS 0x100
160 #define PREFIX_DATA 0x200
161 #define PREFIX_ADDR 0x400
162 #define PREFIX_FWAIT 0x800
163
164 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
165 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
166 on error. */
167 #define FETCH_DATA(info, addr) \
168 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
169 ? 1 : fetch_data ((info), (addr)))
170
171 static int
172 fetch_data (struct disassemble_info *info, bfd_byte *addr)
173 {
174 int status;
175 struct dis_private *priv = (struct dis_private *) info->private_data;
176 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
177
178 if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
179 status = (*info->read_memory_func) (start,
180 priv->max_fetched,
181 addr - priv->max_fetched,
182 info);
183 else
184 status = -1;
185 if (status != 0)
186 {
187 /* If we did manage to read at least one byte, then
188 print_insn_i386 will do something sensible. Otherwise, print
189 an error. We do that here because this is where we know
190 STATUS. */
191 if (priv->max_fetched == priv->the_buffer)
192 (*info->memory_error_func) (status, start, info);
193 longjmp (priv->bailout, 1);
194 }
195 else
196 priv->max_fetched = addr;
197 return 1;
198 }
199
200 #define XX { NULL, 0 }
201
202 #define Eb { OP_E, b_mode }
203 #define Ev { OP_E, v_mode }
204 #define Ed { OP_E, d_mode }
205 #define Edq { OP_E, dq_mode }
206 #define Edqw { OP_E, dqw_mode }
207 #define Edqb { OP_E, dqb_mode }
208 #define Edqd { OP_E, dqd_mode }
209 #define Eq { OP_E, q_mode }
210 #define indirEv { OP_indirE, stack_v_mode }
211 #define indirEp { OP_indirE, f_mode }
212 #define stackEv { OP_E, stack_v_mode }
213 #define Em { OP_E, m_mode }
214 #define Ew { OP_E, w_mode }
215 #define M { OP_M, 0 } /* lea, lgdt, etc. */
216 #define Ma { OP_M, v_mode }
217 #define Mb { OP_M, b_mode }
218 #define Md { OP_M, d_mode }
219 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
220 #define Mq { OP_M, q_mode }
221 #define Gb { OP_G, b_mode }
222 #define Gv { OP_G, v_mode }
223 #define Gd { OP_G, d_mode }
224 #define Gdq { OP_G, dq_mode }
225 #define Gm { OP_G, m_mode }
226 #define Gw { OP_G, w_mode }
227 #define Rd { OP_R, d_mode }
228 #define Rm { OP_R, m_mode }
229 #define Ib { OP_I, b_mode }
230 #define sIb { OP_sI, b_mode } /* sign extened byte */
231 #define Iv { OP_I, v_mode }
232 #define Iq { OP_I, q_mode }
233 #define Iv64 { OP_I64, v_mode }
234 #define Iw { OP_I, w_mode }
235 #define I1 { OP_I, const_1_mode }
236 #define Jb { OP_J, b_mode }
237 #define Jv { OP_J, v_mode }
238 #define Cm { OP_C, m_mode }
239 #define Dm { OP_D, m_mode }
240 #define Td { OP_T, d_mode }
241 #define Skip_MODRM { OP_Skip_MODRM, 0 }
242
243 #define RMeAX { OP_REG, eAX_reg }
244 #define RMeBX { OP_REG, eBX_reg }
245 #define RMeCX { OP_REG, eCX_reg }
246 #define RMeDX { OP_REG, eDX_reg }
247 #define RMeSP { OP_REG, eSP_reg }
248 #define RMeBP { OP_REG, eBP_reg }
249 #define RMeSI { OP_REG, eSI_reg }
250 #define RMeDI { OP_REG, eDI_reg }
251 #define RMrAX { OP_REG, rAX_reg }
252 #define RMrBX { OP_REG, rBX_reg }
253 #define RMrCX { OP_REG, rCX_reg }
254 #define RMrDX { OP_REG, rDX_reg }
255 #define RMrSP { OP_REG, rSP_reg }
256 #define RMrBP { OP_REG, rBP_reg }
257 #define RMrSI { OP_REG, rSI_reg }
258 #define RMrDI { OP_REG, rDI_reg }
259 #define RMAL { OP_REG, al_reg }
260 #define RMAL { OP_REG, al_reg }
261 #define RMCL { OP_REG, cl_reg }
262 #define RMDL { OP_REG, dl_reg }
263 #define RMBL { OP_REG, bl_reg }
264 #define RMAH { OP_REG, ah_reg }
265 #define RMCH { OP_REG, ch_reg }
266 #define RMDH { OP_REG, dh_reg }
267 #define RMBH { OP_REG, bh_reg }
268 #define RMAX { OP_REG, ax_reg }
269 #define RMDX { OP_REG, dx_reg }
270
271 #define eAX { OP_IMREG, eAX_reg }
272 #define eBX { OP_IMREG, eBX_reg }
273 #define eCX { OP_IMREG, eCX_reg }
274 #define eDX { OP_IMREG, eDX_reg }
275 #define eSP { OP_IMREG, eSP_reg }
276 #define eBP { OP_IMREG, eBP_reg }
277 #define eSI { OP_IMREG, eSI_reg }
278 #define eDI { OP_IMREG, eDI_reg }
279 #define AL { OP_IMREG, al_reg }
280 #define CL { OP_IMREG, cl_reg }
281 #define DL { OP_IMREG, dl_reg }
282 #define BL { OP_IMREG, bl_reg }
283 #define AH { OP_IMREG, ah_reg }
284 #define CH { OP_IMREG, ch_reg }
285 #define DH { OP_IMREG, dh_reg }
286 #define BH { OP_IMREG, bh_reg }
287 #define AX { OP_IMREG, ax_reg }
288 #define DX { OP_IMREG, dx_reg }
289 #define zAX { OP_IMREG, z_mode_ax_reg }
290 #define indirDX { OP_IMREG, indir_dx_reg }
291
292 #define Sw { OP_SEG, w_mode }
293 #define Sv { OP_SEG, v_mode }
294 #define Ap { OP_DIR, 0 }
295 #define Ob { OP_OFF64, b_mode }
296 #define Ov { OP_OFF64, v_mode }
297 #define Xb { OP_DSreg, eSI_reg }
298 #define Xv { OP_DSreg, eSI_reg }
299 #define Xz { OP_DSreg, eSI_reg }
300 #define Yb { OP_ESreg, eDI_reg }
301 #define Yv { OP_ESreg, eDI_reg }
302 #define DSBX { OP_DSreg, eBX_reg }
303
304 #define es { OP_REG, es_reg }
305 #define ss { OP_REG, ss_reg }
306 #define cs { OP_REG, cs_reg }
307 #define ds { OP_REG, ds_reg }
308 #define fs { OP_REG, fs_reg }
309 #define gs { OP_REG, gs_reg }
310
311 #define MX { OP_MMX, 0 }
312 #define XM { OP_XMM, 0 }
313 #define EM { OP_EM, v_mode }
314 #define EMd { OP_EM, d_mode }
315 #define EMx { OP_EM, x_mode }
316 #define EXw { OP_EX, w_mode }
317 #define EXd { OP_EX, d_mode }
318 #define EXq { OP_EX, q_mode }
319 #define EXx { OP_EX, x_mode }
320 #define MS { OP_MS, v_mode }
321 #define XS { OP_XS, v_mode }
322 #define EMCq { OP_EMC, q_mode }
323 #define MXC { OP_MXC, 0 }
324 #define OPSUF { OP_3DNowSuffix, 0 }
325 #define OPSIMD { OP_SIMD_Suffix, 0 }
326 #define XMM0 { XMM_Fixup, 0 }
327
328 /* Used handle "rep" prefix for string instructions. */
329 #define Xbr { REP_Fixup, eSI_reg }
330 #define Xvr { REP_Fixup, eSI_reg }
331 #define Ybr { REP_Fixup, eDI_reg }
332 #define Yvr { REP_Fixup, eDI_reg }
333 #define Yzr { REP_Fixup, eDI_reg }
334 #define indirDXr { REP_Fixup, indir_dx_reg }
335 #define ALr { REP_Fixup, al_reg }
336 #define eAXr { REP_Fixup, eAX_reg }
337
338 #define cond_jump_flag { NULL, cond_jump_mode }
339 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
340
341 /* bits in sizeflag */
342 #define SUFFIX_ALWAYS 4
343 #define AFLAG 2
344 #define DFLAG 1
345
346 #define b_mode 1 /* byte operand */
347 #define v_mode 2 /* operand size depends on prefixes */
348 #define w_mode 3 /* word operand */
349 #define d_mode 4 /* double word operand */
350 #define q_mode 5 /* quad word operand */
351 #define t_mode 6 /* ten-byte operand */
352 #define x_mode 7 /* 16-byte XMM operand */
353 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
354 #define cond_jump_mode 9
355 #define loop_jcxz_mode 10
356 #define dq_mode 11 /* operand size depends on REX prefixes. */
357 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
358 #define f_mode 13 /* 4- or 6-byte pointer operand */
359 #define const_1_mode 14
360 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
361 #define z_mode 16 /* non-quad operand size depends on prefixes */
362 #define o_mode 17 /* 16-byte operand */
363 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
364 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
365
366 #define es_reg 100
367 #define cs_reg 101
368 #define ss_reg 102
369 #define ds_reg 103
370 #define fs_reg 104
371 #define gs_reg 105
372
373 #define eAX_reg 108
374 #define eCX_reg 109
375 #define eDX_reg 110
376 #define eBX_reg 111
377 #define eSP_reg 112
378 #define eBP_reg 113
379 #define eSI_reg 114
380 #define eDI_reg 115
381
382 #define al_reg 116
383 #define cl_reg 117
384 #define dl_reg 118
385 #define bl_reg 119
386 #define ah_reg 120
387 #define ch_reg 121
388 #define dh_reg 122
389 #define bh_reg 123
390
391 #define ax_reg 124
392 #define cx_reg 125
393 #define dx_reg 126
394 #define bx_reg 127
395 #define sp_reg 128
396 #define bp_reg 129
397 #define si_reg 130
398 #define di_reg 131
399
400 #define rAX_reg 132
401 #define rCX_reg 133
402 #define rDX_reg 134
403 #define rBX_reg 135
404 #define rSP_reg 136
405 #define rBP_reg 137
406 #define rSI_reg 138
407 #define rDI_reg 139
408
409 #define z_mode_ax_reg 149
410 #define indir_dx_reg 150
411
412 #define FLOATCODE 1
413 #define USE_GROUPS 2
414 #define USE_PREFIX_USER_TABLE 3
415 #define X86_64_SPECIAL 4
416 #define IS_3BYTE_OPCODE 5
417 #define USE_OPC_EXT_TABLE 6
418 #define USE_OPC_EXT_RM_TABLE 7
419
420 #define FLOAT NULL, { { NULL, FLOATCODE } }
421
422 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
423 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
424 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
425 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
426 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
427 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
428 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
429 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
430 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
431 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
432 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
433 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
434 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
435 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
436 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
437 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
438 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
439 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
440 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
441 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
442 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
443 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
444 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
445 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
446 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
447 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
448 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
449 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
450
451 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
452 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
453 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
454 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
455 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
456 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
457 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
458 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
459 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
460 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
461 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
462 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
463 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
464 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
465 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
466 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
467 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
468 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
469 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
470 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
471 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
472 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
473 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
474 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
475 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
476 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
477 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
478 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
479 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
480 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
481 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
482 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
483 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
484 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
485 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
486 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
487 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
488 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
489 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
490 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
491 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
492 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
493 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
494 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
495 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
496 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
497 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
498 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
499 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
500 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
501 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
502 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
503 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
504 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
505 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
506 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
507 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
508 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
509 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
510 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
511 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
512 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
513 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
514 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
515 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
516 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
517 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
518 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
519 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
520 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
521 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
522 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
523 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
524 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
525 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
526 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
527 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
528 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
529 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
530 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
531 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
532 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
533 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
534 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
535 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
536 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
537 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
538 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
539 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
540 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
541 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
542 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
543 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
544 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
545 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
546 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
547 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
548 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
549 #define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
550 #define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
551 #define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
552
553
554 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
555 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
556 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
557 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
558
559 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
560 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
561
562 #define OPC_EXT_0 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 0 } }
563 #define OPC_EXT_1 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 1 } }
564 #define OPC_EXT_2 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 2 } }
565 #define OPC_EXT_3 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 3 } }
566 #define OPC_EXT_4 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 4 } }
567 #define OPC_EXT_5 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 5 } }
568 #define OPC_EXT_6 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 6 } }
569 #define OPC_EXT_7 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 7 } }
570 #define OPC_EXT_8 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 8 } }
571 #define OPC_EXT_9 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 9 } }
572 #define OPC_EXT_10 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 10 } }
573 #define OPC_EXT_11 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 11 } }
574 #define OPC_EXT_12 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 12 } }
575 #define OPC_EXT_13 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 13 } }
576 #define OPC_EXT_14 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 14 } }
577 #define OPC_EXT_15 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 15 } }
578 #define OPC_EXT_16 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 16 } }
579 #define OPC_EXT_17 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 17 } }
580 #define OPC_EXT_18 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 18 } }
581 #define OPC_EXT_19 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 19 } }
582 #define OPC_EXT_20 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 20 } }
583 #define OPC_EXT_21 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 21 } }
584 #define OPC_EXT_22 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 22 } }
585 #define OPC_EXT_23 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 23 } }
586 #define OPC_EXT_24 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 24 } }
587 #define OPC_EXT_25 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 25 } }
588 #define OPC_EXT_26 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 26 } }
589 #define OPC_EXT_27 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 27 } }
590 #define OPC_EXT_28 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 28 } }
591 #define OPC_EXT_29 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 29 } }
592 #define OPC_EXT_30 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 30 } }
593 #define OPC_EXT_31 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 31 } }
594 #define OPC_EXT_32 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 32 } }
595 #define OPC_EXT_33 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 33 } }
596
597 #define OPC_EXT_RM_0 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 0 } }
598 #define OPC_EXT_RM_1 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 1 } }
599 #define OPC_EXT_RM_2 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 2 } }
600 #define OPC_EXT_RM_3 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 3 } }
601 #define OPC_EXT_RM_4 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 4 } }
602
603 typedef void (*op_rtn) (int bytemode, int sizeflag);
604
605 struct dis386 {
606 const char *name;
607 struct
608 {
609 op_rtn rtn;
610 int bytemode;
611 } op[MAX_OPERANDS];
612 };
613
614 /* Upper case letters in the instruction names here are macros.
615 'A' => print 'b' if no register operands or suffix_always is true
616 'B' => print 'b' if suffix_always is true
617 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
618 . size prefix
619 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
620 . suffix_always is true
621 'E' => print 'e' if 32-bit form of jcxz
622 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
623 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
624 'H' => print ",pt" or ",pn" branch hint
625 'I' => honor following macro letter even in Intel mode (implemented only
626 . for some of the macro letters)
627 'J' => print 'l'
628 'K' => print 'd' or 'q' if rex prefix is present.
629 'L' => print 'l' if suffix_always is true
630 'N' => print 'n' if instruction has no wait "prefix"
631 'O' => print 'd' or 'o' (or 'q' in Intel mode)
632 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
633 . or suffix_always is true. print 'q' if rex prefix is present.
634 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
635 . is true
636 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
637 'S' => print 'w', 'l' or 'q' if suffix_always is true
638 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
639 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
640 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
641 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
642 'X' => print 's', 'd' depending on data16 prefix (for XMM)
643 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
644 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
645
646 Many of the above letters print nothing in Intel mode. See "putop"
647 for the details.
648
649 Braces '{' and '}', and vertical bars '|', indicate alternative
650 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
651 modes. In cases where there are only two alternatives, the X86_64
652 instruction is reserved, and "(bad)" is printed.
653 */
654
655 static const struct dis386 dis386[] = {
656 /* 00 */
657 { "addB", { Eb, Gb } },
658 { "addS", { Ev, Gv } },
659 { "addB", { Gb, Eb } },
660 { "addS", { Gv, Ev } },
661 { "addB", { AL, Ib } },
662 { "addS", { eAX, Iv } },
663 { "push{T|}", { es } },
664 { "pop{T|}", { es } },
665 /* 08 */
666 { "orB", { Eb, Gb } },
667 { "orS", { Ev, Gv } },
668 { "orB", { Gb, Eb } },
669 { "orS", { Gv, Ev } },
670 { "orB", { AL, Ib } },
671 { "orS", { eAX, Iv } },
672 { "push{T|}", { cs } },
673 { "(bad)", { XX } }, /* 0x0f extended opcode escape */
674 /* 10 */
675 { "adcB", { Eb, Gb } },
676 { "adcS", { Ev, Gv } },
677 { "adcB", { Gb, Eb } },
678 { "adcS", { Gv, Ev } },
679 { "adcB", { AL, Ib } },
680 { "adcS", { eAX, Iv } },
681 { "push{T|}", { ss } },
682 { "pop{T|}", { ss } },
683 /* 18 */
684 { "sbbB", { Eb, Gb } },
685 { "sbbS", { Ev, Gv } },
686 { "sbbB", { Gb, Eb } },
687 { "sbbS", { Gv, Ev } },
688 { "sbbB", { AL, Ib } },
689 { "sbbS", { eAX, Iv } },
690 { "push{T|}", { ds } },
691 { "pop{T|}", { ds } },
692 /* 20 */
693 { "andB", { Eb, Gb } },
694 { "andS", { Ev, Gv } },
695 { "andB", { Gb, Eb } },
696 { "andS", { Gv, Ev } },
697 { "andB", { AL, Ib } },
698 { "andS", { eAX, Iv } },
699 { "(bad)", { XX } }, /* SEG ES prefix */
700 { "daa{|}", { XX } },
701 /* 28 */
702 { "subB", { Eb, Gb } },
703 { "subS", { Ev, Gv } },
704 { "subB", { Gb, Eb } },
705 { "subS", { Gv, Ev } },
706 { "subB", { AL, Ib } },
707 { "subS", { eAX, Iv } },
708 { "(bad)", { XX } }, /* SEG CS prefix */
709 { "das{|}", { XX } },
710 /* 30 */
711 { "xorB", { Eb, Gb } },
712 { "xorS", { Ev, Gv } },
713 { "xorB", { Gb, Eb } },
714 { "xorS", { Gv, Ev } },
715 { "xorB", { AL, Ib } },
716 { "xorS", { eAX, Iv } },
717 { "(bad)", { XX } }, /* SEG SS prefix */
718 { "aaa{|}", { XX } },
719 /* 38 */
720 { "cmpB", { Eb, Gb } },
721 { "cmpS", { Ev, Gv } },
722 { "cmpB", { Gb, Eb } },
723 { "cmpS", { Gv, Ev } },
724 { "cmpB", { AL, Ib } },
725 { "cmpS", { eAX, Iv } },
726 { "(bad)", { XX } }, /* SEG DS prefix */
727 { "aas{|}", { XX } },
728 /* 40 */
729 { "inc{S|}", { RMeAX } },
730 { "inc{S|}", { RMeCX } },
731 { "inc{S|}", { RMeDX } },
732 { "inc{S|}", { RMeBX } },
733 { "inc{S|}", { RMeSP } },
734 { "inc{S|}", { RMeBP } },
735 { "inc{S|}", { RMeSI } },
736 { "inc{S|}", { RMeDI } },
737 /* 48 */
738 { "dec{S|}", { RMeAX } },
739 { "dec{S|}", { RMeCX } },
740 { "dec{S|}", { RMeDX } },
741 { "dec{S|}", { RMeBX } },
742 { "dec{S|}", { RMeSP } },
743 { "dec{S|}", { RMeBP } },
744 { "dec{S|}", { RMeSI } },
745 { "dec{S|}", { RMeDI } },
746 /* 50 */
747 { "pushV", { RMrAX } },
748 { "pushV", { RMrCX } },
749 { "pushV", { RMrDX } },
750 { "pushV", { RMrBX } },
751 { "pushV", { RMrSP } },
752 { "pushV", { RMrBP } },
753 { "pushV", { RMrSI } },
754 { "pushV", { RMrDI } },
755 /* 58 */
756 { "popV", { RMrAX } },
757 { "popV", { RMrCX } },
758 { "popV", { RMrDX } },
759 { "popV", { RMrBX } },
760 { "popV", { RMrSP } },
761 { "popV", { RMrBP } },
762 { "popV", { RMrSI } },
763 { "popV", { RMrDI } },
764 /* 60 */
765 { X86_64_0 },
766 { X86_64_1 },
767 { X86_64_2 },
768 { X86_64_3 },
769 { "(bad)", { XX } }, /* seg fs */
770 { "(bad)", { XX } }, /* seg gs */
771 { "(bad)", { XX } }, /* op size prefix */
772 { "(bad)", { XX } }, /* adr size prefix */
773 /* 68 */
774 { "pushT", { Iq } },
775 { "imulS", { Gv, Ev, Iv } },
776 { "pushT", { sIb } },
777 { "imulS", { Gv, Ev, sIb } },
778 { "ins{b||b|}", { Ybr, indirDX } },
779 { "ins{R||G|}", { Yzr, indirDX } },
780 { "outs{b||b|}", { indirDXr, Xb } },
781 { "outs{R||G|}", { indirDXr, Xz } },
782 /* 70 */
783 { "joH", { Jb, XX, cond_jump_flag } },
784 { "jnoH", { Jb, XX, cond_jump_flag } },
785 { "jbH", { Jb, XX, cond_jump_flag } },
786 { "jaeH", { Jb, XX, cond_jump_flag } },
787 { "jeH", { Jb, XX, cond_jump_flag } },
788 { "jneH", { Jb, XX, cond_jump_flag } },
789 { "jbeH", { Jb, XX, cond_jump_flag } },
790 { "jaH", { Jb, XX, cond_jump_flag } },
791 /* 78 */
792 { "jsH", { Jb, XX, cond_jump_flag } },
793 { "jnsH", { Jb, XX, cond_jump_flag } },
794 { "jpH", { Jb, XX, cond_jump_flag } },
795 { "jnpH", { Jb, XX, cond_jump_flag } },
796 { "jlH", { Jb, XX, cond_jump_flag } },
797 { "jgeH", { Jb, XX, cond_jump_flag } },
798 { "jleH", { Jb, XX, cond_jump_flag } },
799 { "jgH", { Jb, XX, cond_jump_flag } },
800 /* 80 */
801 { GRP1b },
802 { GRP1S },
803 { "(bad)", { XX } },
804 { GRP1Ss },
805 { "testB", { Eb, Gb } },
806 { "testS", { Ev, Gv } },
807 { "xchgB", { Eb, Gb } },
808 { "xchgS", { Ev, Gv } },
809 /* 88 */
810 { "movB", { Eb, Gb } },
811 { "movS", { Ev, Gv } },
812 { "movB", { Gb, Eb } },
813 { "movS", { Gv, Ev } },
814 { "movD", { Sv, Sw } },
815 { OPC_EXT_0 },
816 { "movD", { Sw, Sv } },
817 { GRP1a },
818 /* 90 */
819 { PREGRP38 },
820 { "xchgS", { RMeCX, eAX } },
821 { "xchgS", { RMeDX, eAX } },
822 { "xchgS", { RMeBX, eAX } },
823 { "xchgS", { RMeSP, eAX } },
824 { "xchgS", { RMeBP, eAX } },
825 { "xchgS", { RMeSI, eAX } },
826 { "xchgS", { RMeDI, eAX } },
827 /* 98 */
828 { "cW{t||t|}R", { XX } },
829 { "cR{t||t|}O", { XX } },
830 { "Jcall{T|}", { Ap } },
831 { "(bad)", { XX } }, /* fwait */
832 { "pushfT", { XX } },
833 { "popfT", { XX } },
834 { "sahf{|}", { XX } },
835 { "lahf{|}", { XX } },
836 /* a0 */
837 { "movB", { AL, Ob } },
838 { "movS", { eAX, Ov } },
839 { "movB", { Ob, AL } },
840 { "movS", { Ov, eAX } },
841 { "movs{b||b|}", { Ybr, Xb } },
842 { "movs{R||R|}", { Yvr, Xv } },
843 { "cmps{b||b|}", { Xb, Yb } },
844 { "cmps{R||R|}", { Xv, Yv } },
845 /* a8 */
846 { "testB", { AL, Ib } },
847 { "testS", { eAX, Iv } },
848 { "stosB", { Ybr, AL } },
849 { "stosS", { Yvr, eAX } },
850 { "lodsB", { ALr, Xb } },
851 { "lodsS", { eAXr, Xv } },
852 { "scasB", { AL, Yb } },
853 { "scasS", { eAX, Yv } },
854 /* b0 */
855 { "movB", { RMAL, Ib } },
856 { "movB", { RMCL, Ib } },
857 { "movB", { RMDL, Ib } },
858 { "movB", { RMBL, Ib } },
859 { "movB", { RMAH, Ib } },
860 { "movB", { RMCH, Ib } },
861 { "movB", { RMDH, Ib } },
862 { "movB", { RMBH, Ib } },
863 /* b8 */
864 { "movS", { RMeAX, Iv64 } },
865 { "movS", { RMeCX, Iv64 } },
866 { "movS", { RMeDX, Iv64 } },
867 { "movS", { RMeBX, Iv64 } },
868 { "movS", { RMeSP, Iv64 } },
869 { "movS", { RMeBP, Iv64 } },
870 { "movS", { RMeSI, Iv64 } },
871 { "movS", { RMeDI, Iv64 } },
872 /* c0 */
873 { GRP2b },
874 { GRP2S },
875 { "retT", { Iw } },
876 { "retT", { XX } },
877 { OPC_EXT_1 },
878 { OPC_EXT_2 },
879 { GRP11_C6 },
880 { GRP11_C7 },
881 /* c8 */
882 { "enterT", { Iw, Ib } },
883 { "leaveT", { XX } },
884 { "lretP", { Iw } },
885 { "lretP", { XX } },
886 { "int3", { XX } },
887 { "int", { Ib } },
888 { "into{|}", { XX } },
889 { "iretP", { XX } },
890 /* d0 */
891 { GRP2b_one },
892 { GRP2S_one },
893 { GRP2b_cl },
894 { GRP2S_cl },
895 { "aam{|}", { sIb } },
896 { "aad{|}", { sIb } },
897 { "(bad)", { XX } },
898 { "xlat", { DSBX } },
899 /* d8 */
900 { FLOAT },
901 { FLOAT },
902 { FLOAT },
903 { FLOAT },
904 { FLOAT },
905 { FLOAT },
906 { FLOAT },
907 { FLOAT },
908 /* e0 */
909 { "loopneFH", { Jb, XX, loop_jcxz_flag } },
910 { "loopeFH", { Jb, XX, loop_jcxz_flag } },
911 { "loopFH", { Jb, XX, loop_jcxz_flag } },
912 { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
913 { "inB", { AL, Ib } },
914 { "inG", { zAX, Ib } },
915 { "outB", { Ib, AL } },
916 { "outG", { Ib, zAX } },
917 /* e8 */
918 { "callT", { Jv } },
919 { "jmpT", { Jv } },
920 { "Jjmp{T|}", { Ap } },
921 { "jmp", { Jb } },
922 { "inB", { AL, indirDX } },
923 { "inG", { zAX, indirDX } },
924 { "outB", { indirDX, AL } },
925 { "outG", { indirDX, zAX } },
926 /* f0 */
927 { "(bad)", { XX } }, /* lock prefix */
928 { "icebp", { XX } },
929 { "(bad)", { XX } }, /* repne */
930 { "(bad)", { XX } }, /* repz */
931 { "hlt", { XX } },
932 { "cmc", { XX } },
933 { GRP3b },
934 { GRP3S },
935 /* f8 */
936 { "clc", { XX } },
937 { "stc", { XX } },
938 { "cli", { XX } },
939 { "sti", { XX } },
940 { "cld", { XX } },
941 { "std", { XX } },
942 { GRP4 },
943 { GRP5 },
944 };
945
946 static const struct dis386 dis386_twobyte[] = {
947 /* 00 */
948 { GRP6 },
949 { GRP7 },
950 { "larS", { Gv, Ew } },
951 { "lslS", { Gv, Ew } },
952 { "(bad)", { XX } },
953 { "syscall", { XX } },
954 { "clts", { XX } },
955 { "sysretP", { XX } },
956 /* 08 */
957 { "invd", { XX } },
958 { "wbinvd", { XX } },
959 { "(bad)", { XX } },
960 { "ud2a", { XX } },
961 { "(bad)", { XX } },
962 { GRPAMD },
963 { "femms", { XX } },
964 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
965 /* 10 */
966 { PREGRP8 },
967 { PREGRP9 },
968 { PREGRP30 },
969 { "movlpX", { EXq, XM, { SIMD_Fixup, 'h' } } },
970 { "unpcklpX", { XM, EXq } },
971 { "unpckhpX", { XM, EXq } },
972 { PREGRP31 },
973 { "movhpX", { EXq, XM, { SIMD_Fixup, 'l' } } },
974 /* 18 */
975 { GRP16 },
976 { "(bad)", { XX } },
977 { "(bad)", { XX } },
978 { "(bad)", { XX } },
979 { "(bad)", { XX } },
980 { "(bad)", { XX } },
981 { "(bad)", { XX } },
982 { "nopQ", { Ev } },
983 /* 20 */
984 { "movZ", { Rm, Cm } },
985 { "movZ", { Rm, Dm } },
986 { "movZ", { Cm, Rm } },
987 { "movZ", { Dm, Rm } },
988 { "movL", { Rd, Td } },
989 { "(bad)", { XX } },
990 { "movL", { Td, Rd } },
991 { "(bad)", { XX } },
992 /* 28 */
993 { "movapX", { XM, EXx } },
994 { "movapX", { EXx, XM } },
995 { PREGRP2 },
996 { PREGRP33 },
997 { PREGRP4 },
998 { PREGRP3 },
999 { PREGRP93 },
1000 { PREGRP94 },
1001 /* 30 */
1002 { "wrmsr", { XX } },
1003 { "rdtsc", { XX } },
1004 { "rdmsr", { XX } },
1005 { "rdpmc", { XX } },
1006 { "sysenter", { XX } },
1007 { "sysexit", { XX } },
1008 { "(bad)", { XX } },
1009 { "(bad)", { XX } },
1010 /* 38 */
1011 { THREE_BYTE_0 },
1012 { "(bad)", { XX } },
1013 { THREE_BYTE_1 },
1014 { "(bad)", { XX } },
1015 { "(bad)", { XX } },
1016 { "(bad)", { XX } },
1017 { "(bad)", { XX } },
1018 { "(bad)", { XX } },
1019 /* 40 */
1020 { "cmovo", { Gv, Ev } },
1021 { "cmovno", { Gv, Ev } },
1022 { "cmovb", { Gv, Ev } },
1023 { "cmovae", { Gv, Ev } },
1024 { "cmove", { Gv, Ev } },
1025 { "cmovne", { Gv, Ev } },
1026 { "cmovbe", { Gv, Ev } },
1027 { "cmova", { Gv, Ev } },
1028 /* 48 */
1029 { "cmovs", { Gv, Ev } },
1030 { "cmovns", { Gv, Ev } },
1031 { "cmovp", { Gv, Ev } },
1032 { "cmovnp", { Gv, Ev } },
1033 { "cmovl", { Gv, Ev } },
1034 { "cmovge", { Gv, Ev } },
1035 { "cmovle", { Gv, Ev } },
1036 { "cmovg", { Gv, Ev } },
1037 /* 50 */
1038 { "movmskpX", { Gdq, XS } },
1039 { PREGRP13 },
1040 { PREGRP12 },
1041 { PREGRP11 },
1042 { "andpX", { XM, EXx } },
1043 { "andnpX", { XM, EXx } },
1044 { "orpX", { XM, EXx } },
1045 { "xorpX", { XM, EXx } },
1046 /* 58 */
1047 { PREGRP0 },
1048 { PREGRP10 },
1049 { PREGRP17 },
1050 { PREGRP16 },
1051 { PREGRP14 },
1052 { PREGRP7 },
1053 { PREGRP5 },
1054 { PREGRP6 },
1055 /* 60 */
1056 { PREGRP95 },
1057 { PREGRP96 },
1058 { PREGRP97 },
1059 { "packsswb", { MX, EM } },
1060 { "pcmpgtb", { MX, EM } },
1061 { "pcmpgtw", { MX, EM } },
1062 { "pcmpgtd", { MX, EM } },
1063 { "packuswb", { MX, EM } },
1064 /* 68 */
1065 { "punpckhbw", { MX, EM } },
1066 { "punpckhwd", { MX, EM } },
1067 { "punpckhdq", { MX, EM } },
1068 { "packssdw", { MX, EM } },
1069 { PREGRP26 },
1070 { PREGRP24 },
1071 { "movK", { MX, Edq } },
1072 { PREGRP19 },
1073 /* 70 */
1074 { PREGRP22 },
1075 { GRP12 },
1076 { GRP13 },
1077 { GRP14 },
1078 { "pcmpeqb", { MX, EM } },
1079 { "pcmpeqw", { MX, EM } },
1080 { "pcmpeqd", { MX, EM } },
1081 { "emms", { XX } },
1082 /* 78 */
1083 { PREGRP34 },
1084 { PREGRP35 },
1085 { "(bad)", { XX } },
1086 { "(bad)", { XX } },
1087 { PREGRP28 },
1088 { PREGRP29 },
1089 { PREGRP23 },
1090 { PREGRP20 },
1091 /* 80 */
1092 { "joH", { Jv, XX, cond_jump_flag } },
1093 { "jnoH", { Jv, XX, cond_jump_flag } },
1094 { "jbH", { Jv, XX, cond_jump_flag } },
1095 { "jaeH", { Jv, XX, cond_jump_flag } },
1096 { "jeH", { Jv, XX, cond_jump_flag } },
1097 { "jneH", { Jv, XX, cond_jump_flag } },
1098 { "jbeH", { Jv, XX, cond_jump_flag } },
1099 { "jaH", { Jv, XX, cond_jump_flag } },
1100 /* 88 */
1101 { "jsH", { Jv, XX, cond_jump_flag } },
1102 { "jnsH", { Jv, XX, cond_jump_flag } },
1103 { "jpH", { Jv, XX, cond_jump_flag } },
1104 { "jnpH", { Jv, XX, cond_jump_flag } },
1105 { "jlH", { Jv, XX, cond_jump_flag } },
1106 { "jgeH", { Jv, XX, cond_jump_flag } },
1107 { "jleH", { Jv, XX, cond_jump_flag } },
1108 { "jgH", { Jv, XX, cond_jump_flag } },
1109 /* 90 */
1110 { "seto", { Eb } },
1111 { "setno", { Eb } },
1112 { "setb", { Eb } },
1113 { "setae", { Eb } },
1114 { "sete", { Eb } },
1115 { "setne", { Eb } },
1116 { "setbe", { Eb } },
1117 { "seta", { Eb } },
1118 /* 98 */
1119 { "sets", { Eb } },
1120 { "setns", { Eb } },
1121 { "setp", { Eb } },
1122 { "setnp", { Eb } },
1123 { "setl", { Eb } },
1124 { "setge", { Eb } },
1125 { "setle", { Eb } },
1126 { "setg", { Eb } },
1127 /* a0 */
1128 { "pushT", { fs } },
1129 { "popT", { fs } },
1130 { "cpuid", { XX } },
1131 { "btS", { Ev, Gv } },
1132 { "shldS", { Ev, Gv, Ib } },
1133 { "shldS", { Ev, Gv, CL } },
1134 { GRPPADLCK2 },
1135 { GRPPADLCK1 },
1136 /* a8 */
1137 { "pushT", { gs } },
1138 { "popT", { gs } },
1139 { "rsm", { XX } },
1140 { "btsS", { Ev, Gv } },
1141 { "shrdS", { Ev, Gv, Ib } },
1142 { "shrdS", { Ev, Gv, CL } },
1143 { GRP15 },
1144 { "imulS", { Gv, Ev } },
1145 /* b0 */
1146 { "cmpxchgB", { Eb, Gb } },
1147 { "cmpxchgS", { Ev, Gv } },
1148 { OPC_EXT_3 },
1149 { "btrS", { Ev, Gv } },
1150 { OPC_EXT_4 },
1151 { OPC_EXT_5 },
1152 { "movz{bR|x|bR|x}", { Gv, Eb } },
1153 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
1154 /* b8 */
1155 { PREGRP37 },
1156 { "ud2b", { XX } },
1157 { GRP8 },
1158 { "btcS", { Ev, Gv } },
1159 { "bsfS", { Gv, Ev } },
1160 { PREGRP36 },
1161 { "movs{bR|x|bR|x}", { Gv, Eb } },
1162 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
1163 /* c0 */
1164 { "xaddB", { Eb, Gb } },
1165 { "xaddS", { Ev, Gv } },
1166 { PREGRP1 },
1167 { "movntiS", { Ev, Gv } },
1168 { "pinsrw", { MX, Edqw, Ib } },
1169 { "pextrw", { Gdq, MS, Ib } },
1170 { "shufpX", { XM, EXx, Ib } },
1171 { GRP9 },
1172 /* c8 */
1173 { "bswap", { RMeAX } },
1174 { "bswap", { RMeCX } },
1175 { "bswap", { RMeDX } },
1176 { "bswap", { RMeBX } },
1177 { "bswap", { RMeSP } },
1178 { "bswap", { RMeBP } },
1179 { "bswap", { RMeSI } },
1180 { "bswap", { RMeDI } },
1181 /* d0 */
1182 { PREGRP27 },
1183 { "psrlw", { MX, EM } },
1184 { "psrld", { MX, EM } },
1185 { "psrlq", { MX, EM } },
1186 { "paddq", { MX, EM } },
1187 { "pmullw", { MX, EM } },
1188 { PREGRP21 },
1189 { "pmovmskb", { Gdq, MS } },
1190 /* d8 */
1191 { "psubusb", { MX, EM } },
1192 { "psubusw", { MX, EM } },
1193 { "pminub", { MX, EM } },
1194 { "pand", { MX, EM } },
1195 { "paddusb", { MX, EM } },
1196 { "paddusw", { MX, EM } },
1197 { "pmaxub", { MX, EM } },
1198 { "pandn", { MX, EM } },
1199 /* e0 */
1200 { "pavgb", { MX, EM } },
1201 { "psraw", { MX, EM } },
1202 { "psrad", { MX, EM } },
1203 { "pavgw", { MX, EM } },
1204 { "pmulhuw", { MX, EM } },
1205 { "pmulhw", { MX, EM } },
1206 { PREGRP15 },
1207 { PREGRP25 },
1208 /* e8 */
1209 { "psubsb", { MX, EM } },
1210 { "psubsw", { MX, EM } },
1211 { "pminsw", { MX, EM } },
1212 { "por", { MX, EM } },
1213 { "paddsb", { MX, EM } },
1214 { "paddsw", { MX, EM } },
1215 { "pmaxsw", { MX, EM } },
1216 { "pxor", { MX, EM } },
1217 /* f0 */
1218 { PREGRP32 },
1219 { "psllw", { MX, EM } },
1220 { "pslld", { MX, EM } },
1221 { "psllq", { MX, EM } },
1222 { "pmuludq", { MX, EM } },
1223 { "pmaddwd", { MX, EM } },
1224 { "psadbw", { MX, EM } },
1225 { PREGRP18 },
1226 /* f8 */
1227 { "psubb", { MX, EM } },
1228 { "psubw", { MX, EM } },
1229 { "psubd", { MX, EM } },
1230 { "psubq", { MX, EM } },
1231 { "paddb", { MX, EM } },
1232 { "paddw", { MX, EM } },
1233 { "paddd", { MX, EM } },
1234 { "(bad)", { XX } },
1235 };
1236
1237 static const unsigned char onebyte_has_modrm[256] = {
1238 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1239 /* ------------------------------- */
1240 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1241 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1242 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1243 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1244 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1245 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1246 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1247 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1248 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1249 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1250 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1251 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1252 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1253 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1254 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1255 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1256 /* ------------------------------- */
1257 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1258 };
1259
1260 static const unsigned char twobyte_has_modrm[256] = {
1261 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1262 /* ------------------------------- */
1263 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1264 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1265 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1266 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1267 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1268 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1269 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1270 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1271 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1272 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1273 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1274 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1275 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1276 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1277 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1278 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1279 /* ------------------------------- */
1280 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1281 };
1282
1283 static char obuf[100];
1284 static char *obufp;
1285 static char scratchbuf[100];
1286 static unsigned char *start_codep;
1287 static unsigned char *insn_codep;
1288 static unsigned char *codep;
1289 static const char *lock_prefix;
1290 static const char *data_prefix;
1291 static const char *addr_prefix;
1292 static const char *repz_prefix;
1293 static const char *repnz_prefix;
1294 static disassemble_info *the_info;
1295 static struct
1296 {
1297 int mod;
1298 int reg;
1299 int rm;
1300 }
1301 modrm;
1302 static unsigned char need_modrm;
1303
1304 /* If we are accessing mod/rm/reg without need_modrm set, then the
1305 values are stale. Hitting this abort likely indicates that you
1306 need to update onebyte_has_modrm or twobyte_has_modrm. */
1307 #define MODRM_CHECK if (!need_modrm) abort ()
1308
1309 static const char **names64;
1310 static const char **names32;
1311 static const char **names16;
1312 static const char **names8;
1313 static const char **names8rex;
1314 static const char **names_seg;
1315 static const char **index16;
1316
1317 static const char *intel_names64[] = {
1318 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1319 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1320 };
1321 static const char *intel_names32[] = {
1322 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1323 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1324 };
1325 static const char *intel_names16[] = {
1326 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1327 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1328 };
1329 static const char *intel_names8[] = {
1330 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1331 };
1332 static const char *intel_names8rex[] = {
1333 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1334 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1335 };
1336 static const char *intel_names_seg[] = {
1337 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1338 };
1339 static const char *intel_index16[] = {
1340 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1341 };
1342
1343 static const char *att_names64[] = {
1344 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1345 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1346 };
1347 static const char *att_names32[] = {
1348 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1349 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1350 };
1351 static const char *att_names16[] = {
1352 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1353 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1354 };
1355 static const char *att_names8[] = {
1356 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1357 };
1358 static const char *att_names8rex[] = {
1359 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1360 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1361 };
1362 static const char *att_names_seg[] = {
1363 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1364 };
1365 static const char *att_index16[] = {
1366 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1367 };
1368
1369 static const struct dis386 grps[][8] = {
1370 /* GRP1a */
1371 {
1372 { "popU", { stackEv } },
1373 { "(bad)", { XX } },
1374 { "(bad)", { XX } },
1375 { "(bad)", { XX } },
1376 { "(bad)", { XX } },
1377 { "(bad)", { XX } },
1378 { "(bad)", { XX } },
1379 { "(bad)", { XX } },
1380 },
1381 /* GRP1b */
1382 {
1383 { "addA", { Eb, Ib } },
1384 { "orA", { Eb, Ib } },
1385 { "adcA", { Eb, Ib } },
1386 { "sbbA", { Eb, Ib } },
1387 { "andA", { Eb, Ib } },
1388 { "subA", { Eb, Ib } },
1389 { "xorA", { Eb, Ib } },
1390 { "cmpA", { Eb, Ib } },
1391 },
1392 /* GRP1S */
1393 {
1394 { "addQ", { Ev, Iv } },
1395 { "orQ", { Ev, Iv } },
1396 { "adcQ", { Ev, Iv } },
1397 { "sbbQ", { Ev, Iv } },
1398 { "andQ", { Ev, Iv } },
1399 { "subQ", { Ev, Iv } },
1400 { "xorQ", { Ev, Iv } },
1401 { "cmpQ", { Ev, Iv } },
1402 },
1403 /* GRP1Ss */
1404 {
1405 { "addQ", { Ev, sIb } },
1406 { "orQ", { Ev, sIb } },
1407 { "adcQ", { Ev, sIb } },
1408 { "sbbQ", { Ev, sIb } },
1409 { "andQ", { Ev, sIb } },
1410 { "subQ", { Ev, sIb } },
1411 { "xorQ", { Ev, sIb } },
1412 { "cmpQ", { Ev, sIb } },
1413 },
1414 /* GRP2b */
1415 {
1416 { "rolA", { Eb, Ib } },
1417 { "rorA", { Eb, Ib } },
1418 { "rclA", { Eb, Ib } },
1419 { "rcrA", { Eb, Ib } },
1420 { "shlA", { Eb, Ib } },
1421 { "shrA", { Eb, Ib } },
1422 { "(bad)", { XX } },
1423 { "sarA", { Eb, Ib } },
1424 },
1425 /* GRP2S */
1426 {
1427 { "rolQ", { Ev, Ib } },
1428 { "rorQ", { Ev, Ib } },
1429 { "rclQ", { Ev, Ib } },
1430 { "rcrQ", { Ev, Ib } },
1431 { "shlQ", { Ev, Ib } },
1432 { "shrQ", { Ev, Ib } },
1433 { "(bad)", { XX } },
1434 { "sarQ", { Ev, Ib } },
1435 },
1436 /* GRP2b_one */
1437 {
1438 { "rolA", { Eb, I1 } },
1439 { "rorA", { Eb, I1 } },
1440 { "rclA", { Eb, I1 } },
1441 { "rcrA", { Eb, I1 } },
1442 { "shlA", { Eb, I1 } },
1443 { "shrA", { Eb, I1 } },
1444 { "(bad)", { XX } },
1445 { "sarA", { Eb, I1 } },
1446 },
1447 /* GRP2S_one */
1448 {
1449 { "rolQ", { Ev, I1 } },
1450 { "rorQ", { Ev, I1 } },
1451 { "rclQ", { Ev, I1 } },
1452 { "rcrQ", { Ev, I1 } },
1453 { "shlQ", { Ev, I1 } },
1454 { "shrQ", { Ev, I1 } },
1455 { "(bad)", { XX } },
1456 { "sarQ", { Ev, I1 } },
1457 },
1458 /* GRP2b_cl */
1459 {
1460 { "rolA", { Eb, CL } },
1461 { "rorA", { Eb, CL } },
1462 { "rclA", { Eb, CL } },
1463 { "rcrA", { Eb, CL } },
1464 { "shlA", { Eb, CL } },
1465 { "shrA", { Eb, CL } },
1466 { "(bad)", { XX } },
1467 { "sarA", { Eb, CL } },
1468 },
1469 /* GRP2S_cl */
1470 {
1471 { "rolQ", { Ev, CL } },
1472 { "rorQ", { Ev, CL } },
1473 { "rclQ", { Ev, CL } },
1474 { "rcrQ", { Ev, CL } },
1475 { "shlQ", { Ev, CL } },
1476 { "shrQ", { Ev, CL } },
1477 { "(bad)", { XX } },
1478 { "sarQ", { Ev, CL } },
1479 },
1480 /* GRP3b */
1481 {
1482 { "testA", { Eb, Ib } },
1483 { "(bad)", { Eb } },
1484 { "notA", { Eb } },
1485 { "negA", { Eb } },
1486 { "mulA", { Eb } }, /* Don't print the implicit %al register, */
1487 { "imulA", { Eb } }, /* to distinguish these opcodes from other */
1488 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
1489 { "idivA", { Eb } }, /* and idiv for consistency. */
1490 },
1491 /* GRP3S */
1492 {
1493 { "testQ", { Ev, Iv } },
1494 { "(bad)", { XX } },
1495 { "notQ", { Ev } },
1496 { "negQ", { Ev } },
1497 { "mulQ", { Ev } }, /* Don't print the implicit register. */
1498 { "imulQ", { Ev } },
1499 { "divQ", { Ev } },
1500 { "idivQ", { Ev } },
1501 },
1502 /* GRP4 */
1503 {
1504 { "incA", { Eb } },
1505 { "decA", { Eb } },
1506 { "(bad)", { XX } },
1507 { "(bad)", { XX } },
1508 { "(bad)", { XX } },
1509 { "(bad)", { XX } },
1510 { "(bad)", { XX } },
1511 { "(bad)", { XX } },
1512 },
1513 /* GRP5 */
1514 {
1515 { "incQ", { Ev } },
1516 { "decQ", { Ev } },
1517 { "callT", { indirEv } },
1518 { "JcallT", { indirEp } },
1519 { "jmpT", { indirEv } },
1520 { "JjmpT", { indirEp } },
1521 { "pushU", { stackEv } },
1522 { "(bad)", { XX } },
1523 },
1524 /* GRP6 */
1525 {
1526 { "sldtD", { Sv } },
1527 { "strD", { Sv } },
1528 { "lldt", { Ew } },
1529 { "ltr", { Ew } },
1530 { "verr", { Ew } },
1531 { "verw", { Ew } },
1532 { "(bad)", { XX } },
1533 { "(bad)", { XX } },
1534 },
1535 /* GRP7 */
1536 {
1537 { OPC_EXT_6 },
1538 { OPC_EXT_7 },
1539 { OPC_EXT_8 },
1540 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } },
1541 { "smswD", { Sv } },
1542 { "(bad)", { XX } },
1543 { "lmsw", { Ew } },
1544 { "invlpg", { { INVLPG_Fixup, 0 } } },
1545 },
1546 /* GRP8 */
1547 {
1548 { "(bad)", { XX } },
1549 { "(bad)", { XX } },
1550 { "(bad)", { XX } },
1551 { "(bad)", { XX } },
1552 { "btQ", { Ev, Ib } },
1553 { "btsQ", { Ev, Ib } },
1554 { "btrQ", { Ev, Ib } },
1555 { "btcQ", { Ev, Ib } },
1556 },
1557 /* GRP9 */
1558 {
1559 { "(bad)", { XX } },
1560 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1561 { "(bad)", { XX } },
1562 { "(bad)", { XX } },
1563 { "(bad)", { XX } },
1564 { "(bad)", { XX } },
1565 { OPC_EXT_9 },
1566 { OPC_EXT_10 },
1567 },
1568 /* GRP11_C6 */
1569 {
1570 { "movA", { Eb, Ib } },
1571 { "(bad)", { XX } },
1572 { "(bad)", { XX } },
1573 { "(bad)", { XX } },
1574 { "(bad)", { XX } },
1575 { "(bad)", { XX } },
1576 { "(bad)", { XX } },
1577 { "(bad)", { XX } },
1578 },
1579 /* GRP11_C7 */
1580 {
1581 { "movQ", { Ev, Iv } },
1582 { "(bad)", { XX } },
1583 { "(bad)", { XX } },
1584 { "(bad)", { XX } },
1585 { "(bad)", { XX } },
1586 { "(bad)", { XX } },
1587 { "(bad)", { XX } },
1588 { "(bad)", { XX } },
1589 },
1590 /* GRP12 */
1591 {
1592 { "(bad)", { XX } },
1593 { "(bad)", { XX } },
1594 { OPC_EXT_11 },
1595 { "(bad)", { XX } },
1596 { OPC_EXT_12 },
1597 { "(bad)", { XX } },
1598 { OPC_EXT_13 },
1599 { "(bad)", { XX } },
1600 },
1601 /* GRP13 */
1602 {
1603 { "(bad)", { XX } },
1604 { "(bad)", { XX } },
1605 { OPC_EXT_14 },
1606 { "(bad)", { XX } },
1607 { OPC_EXT_15 },
1608 { "(bad)", { XX } },
1609 { OPC_EXT_16 },
1610 { "(bad)", { XX } },
1611 },
1612 /* GRP14 */
1613 {
1614 { "(bad)", { XX } },
1615 { "(bad)", { XX } },
1616 { OPC_EXT_17 },
1617 { OPC_EXT_18 },
1618 { "(bad)", { XX } },
1619 { "(bad)", { XX } },
1620 { OPC_EXT_19 },
1621 { OPC_EXT_20 },
1622 },
1623 /* GRP15 */
1624 {
1625 { OPC_EXT_21 },
1626 { OPC_EXT_22 },
1627 { OPC_EXT_23 },
1628 { OPC_EXT_24 },
1629 { "(bad)", { XX } },
1630 { OPC_EXT_25 },
1631 { OPC_EXT_26 },
1632 { OPC_EXT_27 },
1633 },
1634 /* GRP16 */
1635 {
1636 { OPC_EXT_28 },
1637 { OPC_EXT_29 },
1638 { OPC_EXT_30 },
1639 { OPC_EXT_31 },
1640 { "(bad)", { XX } },
1641 { "(bad)", { XX } },
1642 { "(bad)", { XX } },
1643 { "(bad)", { XX } },
1644 },
1645 /* GRPAMD */
1646 {
1647 { "prefetch", { Eb } },
1648 { "prefetchw", { Eb } },
1649 { "(bad)", { XX } },
1650 { "(bad)", { XX } },
1651 { "(bad)", { XX } },
1652 { "(bad)", { XX } },
1653 { "(bad)", { XX } },
1654 { "(bad)", { XX } },
1655 },
1656 /* GRPPADLCK1 */
1657 {
1658 { "xstore-rng", { { OP_0f07, 0 } } },
1659 { "xcrypt-ecb", { { OP_0f07, 0 } } },
1660 { "xcrypt-cbc", { { OP_0f07, 0 } } },
1661 { "xcrypt-ctr", { { OP_0f07, 0 } } },
1662 { "xcrypt-cfb", { { OP_0f07, 0 } } },
1663 { "xcrypt-ofb", { { OP_0f07, 0 } } },
1664 { "(bad)", { { OP_0f07, 0 } } },
1665 { "(bad)", { { OP_0f07, 0 } } },
1666 },
1667 /* GRPPADLCK2 */
1668 {
1669 { "montmul", { { OP_0f07, 0 } } },
1670 { "xsha1", { { OP_0f07, 0 } } },
1671 { "xsha256", { { OP_0f07, 0 } } },
1672 { "(bad)", { { OP_0f07, 0 } } },
1673 { "(bad)", { { OP_0f07, 0 } } },
1674 { "(bad)", { { OP_0f07, 0 } } },
1675 { "(bad)", { { OP_0f07, 0 } } },
1676 { "(bad)", { { OP_0f07, 0 } } },
1677 }
1678 };
1679
1680 static const struct dis386 prefix_user_table[][4] = {
1681 /* PREGRP0 */
1682 {
1683 { "addps", { XM, EXx } },
1684 { "addss", { XM, EXd } },
1685 { "addpd", { XM, EXx } },
1686 { "addsd", { XM, EXq } },
1687 },
1688 /* PREGRP1 */
1689 {
1690 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
1691 { "", { XM, EXd, OPSIMD } },
1692 { "", { XM, EXx, OPSIMD } },
1693 { "", { XM, EXq, OPSIMD } },
1694 },
1695 /* PREGRP2 */
1696 {
1697 { "cvtpi2ps", { XM, EMCq } },
1698 { "cvtsi2ssY", { XM, Ev } },
1699 { "cvtpi2pd", { XM, EMCq } },
1700 { "cvtsi2sdY", { XM, Ev } },
1701 },
1702 /* PREGRP3 */
1703 {
1704 { "cvtps2pi", { MXC, EXq } },
1705 { "cvtss2siY", { Gv, EXd } },
1706 { "cvtpd2pi", { MXC, EXx } },
1707 { "cvtsd2siY", { Gv, EXq } },
1708 },
1709 /* PREGRP4 */
1710 {
1711 { "cvttps2pi", { MXC, EXq } },
1712 { "cvttss2siY", { Gv, EXd } },
1713 { "cvttpd2pi", { MXC, EXx } },
1714 { "cvttsd2siY", { Gv, EXq } },
1715 },
1716 /* PREGRP5 */
1717 {
1718 { "divps", { XM, EXx } },
1719 { "divss", { XM, EXd } },
1720 { "divpd", { XM, EXx } },
1721 { "divsd", { XM, EXq } },
1722 },
1723 /* PREGRP6 */
1724 {
1725 { "maxps", { XM, EXx } },
1726 { "maxss", { XM, EXd } },
1727 { "maxpd", { XM, EXx } },
1728 { "maxsd", { XM, EXq } },
1729 },
1730 /* PREGRP7 */
1731 {
1732 { "minps", { XM, EXx } },
1733 { "minss", { XM, EXd } },
1734 { "minpd", { XM, EXx } },
1735 { "minsd", { XM, EXq } },
1736 },
1737 /* PREGRP8 */
1738 {
1739 { "movups", { XM, EXx } },
1740 { "movss", { XM, EXd } },
1741 { "movupd", { XM, EXx } },
1742 { "movsd", { XM, EXq } },
1743 },
1744 /* PREGRP9 */
1745 {
1746 { "movups", { EXx, XM } },
1747 { "movss", { EXd, XM } },
1748 { "movupd", { EXx, XM } },
1749 { "movsd", { EXq, XM } },
1750 },
1751 /* PREGRP10 */
1752 {
1753 { "mulps", { XM, EXx } },
1754 { "mulss", { XM, EXd } },
1755 { "mulpd", { XM, EXx } },
1756 { "mulsd", { XM, EXq } },
1757 },
1758 /* PREGRP11 */
1759 {
1760 { "rcpps", { XM, EXx } },
1761 { "rcpss", { XM, EXd } },
1762 { "(bad)", { XM, EXx } },
1763 { "(bad)", { XM, EXx } },
1764 },
1765 /* PREGRP12 */
1766 {
1767 { "rsqrtps",{ XM, EXx } },
1768 { "rsqrtss",{ XM, EXd } },
1769 { "(bad)", { XM, EXx } },
1770 { "(bad)", { XM, EXx } },
1771 },
1772 /* PREGRP13 */
1773 {
1774 { "sqrtps", { XM, EXx } },
1775 { "sqrtss", { XM, EXd } },
1776 { "sqrtpd", { XM, EXx } },
1777 { "sqrtsd", { XM, EXq } },
1778 },
1779 /* PREGRP14 */
1780 {
1781 { "subps", { XM, EXx } },
1782 { "subss", { XM, EXd } },
1783 { "subpd", { XM, EXx } },
1784 { "subsd", { XM, EXq } },
1785 },
1786 /* PREGRP15 */
1787 {
1788 { "(bad)", { XM, EXx } },
1789 { "cvtdq2pd", { XM, EXq } },
1790 { "cvttpd2dq", { XM, EXx } },
1791 { "cvtpd2dq", { XM, EXx } },
1792 },
1793 /* PREGRP16 */
1794 {
1795 { "cvtdq2ps", { XM, EXx } },
1796 { "cvttps2dq", { XM, EXx } },
1797 { "cvtps2dq", { XM, EXx } },
1798 { "(bad)", { XM, EXx } },
1799 },
1800 /* PREGRP17 */
1801 {
1802 { "cvtps2pd", { XM, EXq } },
1803 { "cvtss2sd", { XM, EXd } },
1804 { "cvtpd2ps", { XM, EXx } },
1805 { "cvtsd2ss", { XM, EXq } },
1806 },
1807 /* PREGRP18 */
1808 {
1809 { "maskmovq", { MX, MS } },
1810 { "(bad)", { XM, EXx } },
1811 { "maskmovdqu", { XM, XS } },
1812 { "(bad)", { XM, EXx } },
1813 },
1814 /* PREGRP19 */
1815 {
1816 { "movq", { MX, EM } },
1817 { "movdqu", { XM, EXx } },
1818 { "movdqa", { XM, EXx } },
1819 { "(bad)", { XM, EXx } },
1820 },
1821 /* PREGRP20 */
1822 {
1823 { "movq", { EM, MX } },
1824 { "movdqu", { EXx, XM } },
1825 { "movdqa", { EXx, XM } },
1826 { "(bad)", { EXx, XM } },
1827 },
1828 /* PREGRP21 */
1829 {
1830 { "(bad)", { EXx, XM } },
1831 { "movq2dq",{ XM, MS } },
1832 { "movq", { EXq, XM } },
1833 { "movdq2q",{ MX, XS } },
1834 },
1835 /* PREGRP22 */
1836 {
1837 { "pshufw", { MX, EM, Ib } },
1838 { "pshufhw",{ XM, EXx, Ib } },
1839 { "pshufd", { XM, EXx, Ib } },
1840 { "pshuflw",{ XM, EXx, Ib } },
1841 },
1842 /* PREGRP23 */
1843 {
1844 { "movK", { Edq, MX } },
1845 { "movq", { XM, EXq } },
1846 { "movK", { Edq, XM } },
1847 { "(bad)", { Ed, XM } },
1848 },
1849 /* PREGRP24 */
1850 {
1851 { "(bad)", { MX, EXx } },
1852 { "(bad)", { XM, EXx } },
1853 { "punpckhqdq", { XM, EXx } },
1854 { "(bad)", { XM, EXx } },
1855 },
1856 /* PREGRP25 */
1857 {
1858 { "movntq", { EM, MX } },
1859 { "(bad)", { EM, XM } },
1860 { "movntdq",{ EM, XM } },
1861 { "(bad)", { EM, XM } },
1862 },
1863 /* PREGRP26 */
1864 {
1865 { "(bad)", { MX, EXx } },
1866 { "(bad)", { XM, EXx } },
1867 { "punpcklqdq", { XM, EXx } },
1868 { "(bad)", { XM, EXx } },
1869 },
1870 /* PREGRP27 */
1871 {
1872 { "(bad)", { MX, EXx } },
1873 { "(bad)", { XM, EXx } },
1874 { "addsubpd", { XM, EXx } },
1875 { "addsubps", { XM, EXx } },
1876 },
1877 /* PREGRP28 */
1878 {
1879 { "(bad)", { MX, EXx } },
1880 { "(bad)", { XM, EXx } },
1881 { "haddpd", { XM, EXx } },
1882 { "haddps", { XM, EXx } },
1883 },
1884 /* PREGRP29 */
1885 {
1886 { "(bad)", { MX, EXx } },
1887 { "(bad)", { XM, EXx } },
1888 { "hsubpd", { XM, EXx } },
1889 { "hsubps", { XM, EXx } },
1890 },
1891 /* PREGRP30 */
1892 {
1893 { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */
1894 { "movsldup", { XM, EXx } },
1895 { "movlpd", { XM, EXq } },
1896 { "movddup", { XM, EXq } },
1897 },
1898 /* PREGRP31 */
1899 {
1900 { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } },
1901 { "movshdup", { XM, EXx } },
1902 { "movhpd", { XM, EXq } },
1903 { "(bad)", { XM, EXq } },
1904 },
1905 /* PREGRP32 */
1906 {
1907 { "(bad)", { XM, EXx } },
1908 { "(bad)", { XM, EXx } },
1909 { "(bad)", { XM, EXx } },
1910 { OPC_EXT_32 },
1911 },
1912 /* PREGRP33 */
1913 {
1914 {"movntps", { Ev, XM } },
1915 {"movntss", { Ed, XM } },
1916 {"movntpd", { Ev, XM } },
1917 {"movntsd", { Eq, XM } },
1918 },
1919
1920 /* PREGRP34 */
1921 {
1922 {"vmread", { Em, Gm } },
1923 {"(bad)", { XX } },
1924 {"extrq", { XS, Ib, Ib } },
1925 {"insertq", { XM, XS, Ib, Ib } },
1926 },
1927
1928 /* PREGRP35 */
1929 {
1930 {"vmwrite", { Gm, Em } },
1931 {"(bad)", { XX } },
1932 {"extrq", { XM, XS } },
1933 {"insertq", { XM, XS } },
1934 },
1935
1936 /* PREGRP36 */
1937 {
1938 { "bsrS", { Gv, Ev } },
1939 { "lzcntS", { Gv, Ev } },
1940 { "bsrS", { Gv, Ev } },
1941 { "(bad)", { XX } },
1942 },
1943
1944 /* PREGRP37 */
1945 {
1946 { "(bad)", { XX } },
1947 { "popcntS", { Gv, Ev } },
1948 { "(bad)", { XX } },
1949 { "(bad)", { XX } },
1950 },
1951
1952 /* PREGRP38 */
1953 {
1954 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1955 { "pause", { XX } },
1956 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1957 { "(bad)", { XX } },
1958 },
1959
1960 /* PREGRP39 */
1961 {
1962 { "(bad)", { XX } },
1963 { "(bad)", { XX } },
1964 { "pblendvb", {XM, EXx, XMM0 } },
1965 { "(bad)", { XX } },
1966 },
1967
1968 /* PREGRP40 */
1969 {
1970 { "(bad)", { XX } },
1971 { "(bad)", { XX } },
1972 { "blendvps", {XM, EXx, XMM0 } },
1973 { "(bad)", { XX } },
1974 },
1975
1976 /* PREGRP41 */
1977 {
1978 { "(bad)", { XX } },
1979 { "(bad)", { XX } },
1980 { "blendvpd", { XM, EXx, XMM0 } },
1981 { "(bad)", { XX } },
1982 },
1983
1984 /* PREGRP42 */
1985 {
1986 { "(bad)", { XX } },
1987 { "(bad)", { XX } },
1988 { "ptest", { XM, EXx } },
1989 { "(bad)", { XX } },
1990 },
1991
1992 /* PREGRP43 */
1993 {
1994 { "(bad)", { XX } },
1995 { "(bad)", { XX } },
1996 { "pmovsxbw", { XM, EXq } },
1997 { "(bad)", { XX } },
1998 },
1999
2000 /* PREGRP44 */
2001 {
2002 { "(bad)", { XX } },
2003 { "(bad)", { XX } },
2004 { "pmovsxbd", { XM, EXd } },
2005 { "(bad)", { XX } },
2006 },
2007
2008 /* PREGRP45 */
2009 {
2010 { "(bad)", { XX } },
2011 { "(bad)", { XX } },
2012 { "pmovsxbq", { XM, EXw } },
2013 { "(bad)", { XX } },
2014 },
2015
2016 /* PREGRP46 */
2017 {
2018 { "(bad)", { XX } },
2019 { "(bad)", { XX } },
2020 { "pmovsxwd", { XM, EXq } },
2021 { "(bad)", { XX } },
2022 },
2023
2024 /* PREGRP47 */
2025 {
2026 { "(bad)", { XX } },
2027 { "(bad)", { XX } },
2028 { "pmovsxwq", { XM, EXd } },
2029 { "(bad)", { XX } },
2030 },
2031
2032 /* PREGRP48 */
2033 {
2034 { "(bad)", { XX } },
2035 { "(bad)", { XX } },
2036 { "pmovsxdq", { XM, EXq } },
2037 { "(bad)", { XX } },
2038 },
2039
2040 /* PREGRP49 */
2041 {
2042 { "(bad)", { XX } },
2043 { "(bad)", { XX } },
2044 { "pmuldq", { XM, EXx } },
2045 { "(bad)", { XX } },
2046 },
2047
2048 /* PREGRP50 */
2049 {
2050 { "(bad)", { XX } },
2051 { "(bad)", { XX } },
2052 { "pcmpeqq", { XM, EXx } },
2053 { "(bad)", { XX } },
2054 },
2055
2056 /* PREGRP51 */
2057 {
2058 { "(bad)", { XX } },
2059 { "(bad)", { XX } },
2060 { "movntdqa", { XM, EM } },
2061 { "(bad)", { XX } },
2062 },
2063
2064 /* PREGRP52 */
2065 {
2066 { "(bad)", { XX } },
2067 { "(bad)", { XX } },
2068 { "packusdw", { XM, EXx } },
2069 { "(bad)", { XX } },
2070 },
2071
2072 /* PREGRP53 */
2073 {
2074 { "(bad)", { XX } },
2075 { "(bad)", { XX } },
2076 { "pmovzxbw", { XM, EXq } },
2077 { "(bad)", { XX } },
2078 },
2079
2080 /* PREGRP54 */
2081 {
2082 { "(bad)", { XX } },
2083 { "(bad)", { XX } },
2084 { "pmovzxbd", { XM, EXd } },
2085 { "(bad)", { XX } },
2086 },
2087
2088 /* PREGRP55 */
2089 {
2090 { "(bad)", { XX } },
2091 { "(bad)", { XX } },
2092 { "pmovzxbq", { XM, EXw } },
2093 { "(bad)", { XX } },
2094 },
2095
2096 /* PREGRP56 */
2097 {
2098 { "(bad)", { XX } },
2099 { "(bad)", { XX } },
2100 { "pmovzxwd", { XM, EXq } },
2101 { "(bad)", { XX } },
2102 },
2103
2104 /* PREGRP57 */
2105 {
2106 { "(bad)", { XX } },
2107 { "(bad)", { XX } },
2108 { "pmovzxwq", { XM, EXd } },
2109 { "(bad)", { XX } },
2110 },
2111
2112 /* PREGRP58 */
2113 {
2114 { "(bad)", { XX } },
2115 { "(bad)", { XX } },
2116 { "pmovzxdq", { XM, EXq } },
2117 { "(bad)", { XX } },
2118 },
2119
2120 /* PREGRP59 */
2121 {
2122 { "(bad)", { XX } },
2123 { "(bad)", { XX } },
2124 { "pminsb", { XM, EXx } },
2125 { "(bad)", { XX } },
2126 },
2127
2128 /* PREGRP60 */
2129 {
2130 { "(bad)", { XX } },
2131 { "(bad)", { XX } },
2132 { "pminsd", { XM, EXx } },
2133 { "(bad)", { XX } },
2134 },
2135
2136 /* PREGRP61 */
2137 {
2138 { "(bad)", { XX } },
2139 { "(bad)", { XX } },
2140 { "pminuw", { XM, EXx } },
2141 { "(bad)", { XX } },
2142 },
2143
2144 /* PREGRP62 */
2145 {
2146 { "(bad)", { XX } },
2147 { "(bad)", { XX } },
2148 { "pminud", { XM, EXx } },
2149 { "(bad)", { XX } },
2150 },
2151
2152 /* PREGRP63 */
2153 {
2154 { "(bad)", { XX } },
2155 { "(bad)", { XX } },
2156 { "pmaxsb", { XM, EXx } },
2157 { "(bad)", { XX } },
2158 },
2159
2160 /* PREGRP64 */
2161 {
2162 { "(bad)", { XX } },
2163 { "(bad)", { XX } },
2164 { "pmaxsd", { XM, EXx } },
2165 { "(bad)", { XX } },
2166 },
2167
2168 /* PREGRP65 */
2169 {
2170 { "(bad)", { XX } },
2171 { "(bad)", { XX } },
2172 { "pmaxuw", { XM, EXx } },
2173 { "(bad)", { XX } },
2174 },
2175
2176 /* PREGRP66 */
2177 {
2178 { "(bad)", { XX } },
2179 { "(bad)", { XX } },
2180 { "pmaxud", { XM, EXx } },
2181 { "(bad)", { XX } },
2182 },
2183
2184 /* PREGRP67 */
2185 {
2186 { "(bad)", { XX } },
2187 { "(bad)", { XX } },
2188 { "pmulld", { XM, EXx } },
2189 { "(bad)", { XX } },
2190 },
2191
2192 /* PREGRP68 */
2193 {
2194 { "(bad)", { XX } },
2195 { "(bad)", { XX } },
2196 { "phminposuw", { XM, EXx } },
2197 { "(bad)", { XX } },
2198 },
2199
2200 /* PREGRP69 */
2201 {
2202 { "(bad)", { XX } },
2203 { "(bad)", { XX } },
2204 { "roundps", { XM, EXx, Ib } },
2205 { "(bad)", { XX } },
2206 },
2207
2208 /* PREGRP70 */
2209 {
2210 { "(bad)", { XX } },
2211 { "(bad)", { XX } },
2212 { "roundpd", { XM, EXx, Ib } },
2213 { "(bad)", { XX } },
2214 },
2215
2216 /* PREGRP71 */
2217 {
2218 { "(bad)", { XX } },
2219 { "(bad)", { XX } },
2220 { "roundss", { XM, EXd, Ib } },
2221 { "(bad)", { XX } },
2222 },
2223
2224 /* PREGRP72 */
2225 {
2226 { "(bad)", { XX } },
2227 { "(bad)", { XX } },
2228 { "roundsd", { XM, EXq, Ib } },
2229 { "(bad)", { XX } },
2230 },
2231
2232 /* PREGRP73 */
2233 {
2234 { "(bad)", { XX } },
2235 { "(bad)", { XX } },
2236 { "blendps", { XM, EXx, Ib } },
2237 { "(bad)", { XX } },
2238 },
2239
2240 /* PREGRP74 */
2241 {
2242 { "(bad)", { XX } },
2243 { "(bad)", { XX } },
2244 { "blendpd", { XM, EXx, Ib } },
2245 { "(bad)", { XX } },
2246 },
2247
2248 /* PREGRP75 */
2249 {
2250 { "(bad)", { XX } },
2251 { "(bad)", { XX } },
2252 { "pblendw", { XM, EXx, Ib } },
2253 { "(bad)", { XX } },
2254 },
2255
2256 /* PREGRP76 */
2257 {
2258 { "(bad)", { XX } },
2259 { "(bad)", { XX } },
2260 { "pextrb", { Edqb, XM, Ib } },
2261 { "(bad)", { XX } },
2262 },
2263
2264 /* PREGRP77 */
2265 {
2266 { "(bad)", { XX } },
2267 { "(bad)", { XX } },
2268 { "pextrw", { Edqw, XM, Ib } },
2269 { "(bad)", { XX } },
2270 },
2271
2272 /* PREGRP78 */
2273 {
2274 { "(bad)", { XX } },
2275 { "(bad)", { XX } },
2276 { "pextrK", { Edq, XM, Ib } },
2277 { "(bad)", { XX } },
2278 },
2279
2280 /* PREGRP79 */
2281 {
2282 { "(bad)", { XX } },
2283 { "(bad)", { XX } },
2284 { "extractps", { Edqd, XM, Ib } },
2285 { "(bad)", { XX } },
2286 },
2287
2288 /* PREGRP80 */
2289 {
2290 { "(bad)", { XX } },
2291 { "(bad)", { XX } },
2292 { "pinsrb", { XM, Edqb, Ib } },
2293 { "(bad)", { XX } },
2294 },
2295
2296 /* PREGRP81 */
2297 {
2298 { "(bad)", { XX } },
2299 { "(bad)", { XX } },
2300 { "insertps", { XM, EXd, Ib } },
2301 { "(bad)", { XX } },
2302 },
2303
2304 /* PREGRP82 */
2305 {
2306 { "(bad)", { XX } },
2307 { "(bad)", { XX } },
2308 { "pinsrK", { XM, Edq, Ib } },
2309 { "(bad)", { XX } },
2310 },
2311
2312 /* PREGRP83 */
2313 {
2314 { "(bad)", { XX } },
2315 { "(bad)", { XX } },
2316 { "dpps", { XM, EXx, Ib } },
2317 { "(bad)", { XX } },
2318 },
2319
2320 /* PREGRP84 */
2321 {
2322 { "(bad)", { XX } },
2323 { "(bad)", { XX } },
2324 { "dppd", { XM, EXx, Ib } },
2325 { "(bad)", { XX } },
2326 },
2327
2328 /* PREGRP85 */
2329 {
2330 { "(bad)", { XX } },
2331 { "(bad)", { XX } },
2332 { "mpsadbw", { XM, EXx, Ib } },
2333 { "(bad)", { XX } },
2334 },
2335
2336 /* PREGRP86 */
2337 {
2338 { "(bad)", { XX } },
2339 { "(bad)", { XX } },
2340 { "pcmpgtq", { XM, EXx } },
2341 { "(bad)", { XX } },
2342 },
2343
2344 /* PREGRP87 */
2345 {
2346 { "(bad)", { XX } },
2347 { "(bad)", { XX } },
2348 { "(bad)", { XX } },
2349 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
2350 },
2351
2352 /* PREGRP88 */
2353 {
2354 { "(bad)", { XX } },
2355 { "(bad)", { XX } },
2356 { "(bad)", { XX } },
2357 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
2358 },
2359
2360 /* PREGRP89 */
2361 {
2362 { "(bad)", { XX } },
2363 { "(bad)", { XX } },
2364 { "pcmpestrm", { XM, EXx, Ib } },
2365 { "(bad)", { XX } },
2366 },
2367
2368 /* PREGRP90 */
2369 {
2370 { "(bad)", { XX } },
2371 { "(bad)", { XX } },
2372 { "pcmpestri", { XM, EXx, Ib } },
2373 { "(bad)", { XX } },
2374 },
2375
2376 /* PREGRP91 */
2377 {
2378 { "(bad)", { XX } },
2379 { "(bad)", { XX } },
2380 { "pcmpistrm", { XM, EXx, Ib } },
2381 { "(bad)", { XX } },
2382 },
2383
2384 /* PREGRP92 */
2385 {
2386 { "(bad)", { XX } },
2387 { "(bad)", { XX } },
2388 { "pcmpistri", { XM, EXx, Ib } },
2389 { "(bad)", { XX } },
2390 },
2391
2392 /* PREGRP93 */
2393 {
2394 { "ucomiss",{ XM, EXd } },
2395 { "(bad)", { XX } },
2396 { "ucomisd",{ XM, EXq } },
2397 { "(bad)", { XX } },
2398 },
2399
2400 /* PREGRP94 */
2401 {
2402 { "comiss", { XM, EXd } },
2403 { "(bad)", { XX } },
2404 { "comisd", { XM, EXq } },
2405 { "(bad)", { XX } },
2406 },
2407
2408 /* PREGRP95 */
2409 {
2410 { "punpcklbw",{ MX, EMd } },
2411 { "(bad)", { XX } },
2412 { "punpcklbw",{ MX, EMx } },
2413 { "(bad)", { XX } },
2414 },
2415
2416 /* PREGRP96 */
2417 {
2418 { "punpcklwd",{ MX, EMd } },
2419 { "(bad)", { XX } },
2420 { "punpcklwd",{ MX, EMx } },
2421 { "(bad)", { XX } },
2422 },
2423
2424 /* PREGRP97 */
2425 {
2426 { "punpckldq",{ MX, EMd } },
2427 { "(bad)", { XX } },
2428 { "punpckldq",{ MX, EMx } },
2429 { "(bad)", { XX } },
2430 },
2431
2432 /* PREGRP98 */
2433 {
2434 { "vmptrld",{ Mq } },
2435 { "vmxon", { Mq } },
2436 { "vmclear",{ Mq } },
2437 { "(bad)", { XX } },
2438 },
2439
2440 /* PREGRP99 */
2441 {
2442 { "(bad)", { XX } },
2443 { "(bad)", { XX } },
2444 { "psrldq", { MS, Ib } },
2445 { "(bad)", { XX } },
2446 },
2447
2448 /* PREGRP100 */
2449 {
2450 { "(bad)", { XX } },
2451 { "(bad)", { XX } },
2452 { "pslldq", { MS, Ib } },
2453 { "(bad)", { XX } },
2454 },
2455 };
2456
2457 static const struct dis386 x86_64_table[][2] = {
2458 {
2459 { "pusha{P|}", { XX } },
2460 { "(bad)", { XX } },
2461 },
2462 {
2463 { "popa{P|}", { XX } },
2464 { "(bad)", { XX } },
2465 },
2466 {
2467 { OPC_EXT_33 },
2468 { "(bad)", { XX } },
2469 },
2470 {
2471 { "arpl", { Ew, Gw } },
2472 { "movs{||lq|xd}", { Gv, Ed } },
2473 },
2474 };
2475
2476 static const struct dis386 three_byte_table[][256] = {
2477 /* THREE_BYTE_0 */
2478 {
2479 /* 00 */
2480 { "pshufb", { MX, EM } },
2481 { "phaddw", { MX, EM } },
2482 { "phaddd", { MX, EM } },
2483 { "phaddsw", { MX, EM } },
2484 { "pmaddubsw", { MX, EM } },
2485 { "phsubw", { MX, EM } },
2486 { "phsubd", { MX, EM } },
2487 { "phsubsw", { MX, EM } },
2488 /* 08 */
2489 { "psignb", { MX, EM } },
2490 { "psignw", { MX, EM } },
2491 { "psignd", { MX, EM } },
2492 { "pmulhrsw", { MX, EM } },
2493 { "(bad)", { XX } },
2494 { "(bad)", { XX } },
2495 { "(bad)", { XX } },
2496 { "(bad)", { XX } },
2497 /* 10 */
2498 { PREGRP39 },
2499 { "(bad)", { XX } },
2500 { "(bad)", { XX } },
2501 { "(bad)", { XX } },
2502 { PREGRP40 },
2503 { PREGRP41 },
2504 { "(bad)", { XX } },
2505 { PREGRP42 },
2506 /* 18 */
2507 { "(bad)", { XX } },
2508 { "(bad)", { XX } },
2509 { "(bad)", { XX } },
2510 { "(bad)", { XX } },
2511 { "pabsb", { MX, EM } },
2512 { "pabsw", { MX, EM } },
2513 { "pabsd", { MX, EM } },
2514 { "(bad)", { XX } },
2515 /* 20 */
2516 { PREGRP43 },
2517 { PREGRP44 },
2518 { PREGRP45 },
2519 { PREGRP46 },
2520 { PREGRP47 },
2521 { PREGRP48 },
2522 { "(bad)", { XX } },
2523 { "(bad)", { XX } },
2524 /* 28 */
2525 { PREGRP49 },
2526 { PREGRP50 },
2527 { PREGRP51 },
2528 { PREGRP52 },
2529 { "(bad)", { XX } },
2530 { "(bad)", { XX } },
2531 { "(bad)", { XX } },
2532 { "(bad)", { XX } },
2533 /* 30 */
2534 { PREGRP53 },
2535 { PREGRP54 },
2536 { PREGRP55 },
2537 { PREGRP56 },
2538 { PREGRP57 },
2539 { PREGRP58 },
2540 { "(bad)", { XX } },
2541 { PREGRP86 },
2542 /* 38 */
2543 { PREGRP59 },
2544 { PREGRP60 },
2545 { PREGRP61 },
2546 { PREGRP62 },
2547 { PREGRP63 },
2548 { PREGRP64 },
2549 { PREGRP65 },
2550 { PREGRP66 },
2551 /* 40 */
2552 { PREGRP67 },
2553 { PREGRP68 },
2554 { "(bad)", { XX } },
2555 { "(bad)", { XX } },
2556 { "(bad)", { XX } },
2557 { "(bad)", { XX } },
2558 { "(bad)", { XX } },
2559 { "(bad)", { XX } },
2560 /* 48 */
2561 { "(bad)", { XX } },
2562 { "(bad)", { XX } },
2563 { "(bad)", { XX } },
2564 { "(bad)", { XX } },
2565 { "(bad)", { XX } },
2566 { "(bad)", { XX } },
2567 { "(bad)", { XX } },
2568 { "(bad)", { XX } },
2569 /* 50 */
2570 { "(bad)", { XX } },
2571 { "(bad)", { XX } },
2572 { "(bad)", { XX } },
2573 { "(bad)", { XX } },
2574 { "(bad)", { XX } },
2575 { "(bad)", { XX } },
2576 { "(bad)", { XX } },
2577 { "(bad)", { XX } },
2578 /* 58 */
2579 { "(bad)", { XX } },
2580 { "(bad)", { XX } },
2581 { "(bad)", { XX } },
2582 { "(bad)", { XX } },
2583 { "(bad)", { XX } },
2584 { "(bad)", { XX } },
2585 { "(bad)", { XX } },
2586 { "(bad)", { XX } },
2587 /* 60 */
2588 { "(bad)", { XX } },
2589 { "(bad)", { XX } },
2590 { "(bad)", { XX } },
2591 { "(bad)", { XX } },
2592 { "(bad)", { XX } },
2593 { "(bad)", { XX } },
2594 { "(bad)", { XX } },
2595 { "(bad)", { XX } },
2596 /* 68 */
2597 { "(bad)", { XX } },
2598 { "(bad)", { XX } },
2599 { "(bad)", { XX } },
2600 { "(bad)", { XX } },
2601 { "(bad)", { XX } },
2602 { "(bad)", { XX } },
2603 { "(bad)", { XX } },
2604 { "(bad)", { XX } },
2605 /* 70 */
2606 { "(bad)", { XX } },
2607 { "(bad)", { XX } },
2608 { "(bad)", { XX } },
2609 { "(bad)", { XX } },
2610 { "(bad)", { XX } },
2611 { "(bad)", { XX } },
2612 { "(bad)", { XX } },
2613 { "(bad)", { XX } },
2614 /* 78 */
2615 { "(bad)", { XX } },
2616 { "(bad)", { XX } },
2617 { "(bad)", { XX } },
2618 { "(bad)", { XX } },
2619 { "(bad)", { XX } },
2620 { "(bad)", { XX } },
2621 { "(bad)", { XX } },
2622 { "(bad)", { XX } },
2623 /* 80 */
2624 { "(bad)", { XX } },
2625 { "(bad)", { XX } },
2626 { "(bad)", { XX } },
2627 { "(bad)", { XX } },
2628 { "(bad)", { XX } },
2629 { "(bad)", { XX } },
2630 { "(bad)", { XX } },
2631 { "(bad)", { XX } },
2632 /* 88 */
2633 { "(bad)", { XX } },
2634 { "(bad)", { XX } },
2635 { "(bad)", { XX } },
2636 { "(bad)", { XX } },
2637 { "(bad)", { XX } },
2638 { "(bad)", { XX } },
2639 { "(bad)", { XX } },
2640 { "(bad)", { XX } },
2641 /* 90 */
2642 { "(bad)", { XX } },
2643 { "(bad)", { XX } },
2644 { "(bad)", { XX } },
2645 { "(bad)", { XX } },
2646 { "(bad)", { XX } },
2647 { "(bad)", { XX } },
2648 { "(bad)", { XX } },
2649 { "(bad)", { XX } },
2650 /* 98 */
2651 { "(bad)", { XX } },
2652 { "(bad)", { XX } },
2653 { "(bad)", { XX } },
2654 { "(bad)", { XX } },
2655 { "(bad)", { XX } },
2656 { "(bad)", { XX } },
2657 { "(bad)", { XX } },
2658 { "(bad)", { XX } },
2659 /* a0 */
2660 { "(bad)", { XX } },
2661 { "(bad)", { XX } },
2662 { "(bad)", { XX } },
2663 { "(bad)", { XX } },
2664 { "(bad)", { XX } },
2665 { "(bad)", { XX } },
2666 { "(bad)", { XX } },
2667 { "(bad)", { XX } },
2668 /* a8 */
2669 { "(bad)", { XX } },
2670 { "(bad)", { XX } },
2671 { "(bad)", { XX } },
2672 { "(bad)", { XX } },
2673 { "(bad)", { XX } },
2674 { "(bad)", { XX } },
2675 { "(bad)", { XX } },
2676 { "(bad)", { XX } },
2677 /* b0 */
2678 { "(bad)", { XX } },
2679 { "(bad)", { XX } },
2680 { "(bad)", { XX } },
2681 { "(bad)", { XX } },
2682 { "(bad)", { XX } },
2683 { "(bad)", { XX } },
2684 { "(bad)", { XX } },
2685 { "(bad)", { XX } },
2686 /* b8 */
2687 { "(bad)", { XX } },
2688 { "(bad)", { XX } },
2689 { "(bad)", { XX } },
2690 { "(bad)", { XX } },
2691 { "(bad)", { XX } },
2692 { "(bad)", { XX } },
2693 { "(bad)", { XX } },
2694 { "(bad)", { XX } },
2695 /* c0 */
2696 { "(bad)", { XX } },
2697 { "(bad)", { XX } },
2698 { "(bad)", { XX } },
2699 { "(bad)", { XX } },
2700 { "(bad)", { XX } },
2701 { "(bad)", { XX } },
2702 { "(bad)", { XX } },
2703 { "(bad)", { XX } },
2704 /* c8 */
2705 { "(bad)", { XX } },
2706 { "(bad)", { XX } },
2707 { "(bad)", { XX } },
2708 { "(bad)", { XX } },
2709 { "(bad)", { XX } },
2710 { "(bad)", { XX } },
2711 { "(bad)", { XX } },
2712 { "(bad)", { XX } },
2713 /* d0 */
2714 { "(bad)", { XX } },
2715 { "(bad)", { XX } },
2716 { "(bad)", { XX } },
2717 { "(bad)", { XX } },
2718 { "(bad)", { XX } },
2719 { "(bad)", { XX } },
2720 { "(bad)", { XX } },
2721 { "(bad)", { XX } },
2722 /* d8 */
2723 { "(bad)", { XX } },
2724 { "(bad)", { XX } },
2725 { "(bad)", { XX } },
2726 { "(bad)", { XX } },
2727 { "(bad)", { XX } },
2728 { "(bad)", { XX } },
2729 { "(bad)", { XX } },
2730 { "(bad)", { XX } },
2731 /* e0 */
2732 { "(bad)", { XX } },
2733 { "(bad)", { XX } },
2734 { "(bad)", { XX } },
2735 { "(bad)", { XX } },
2736 { "(bad)", { XX } },
2737 { "(bad)", { XX } },
2738 { "(bad)", { XX } },
2739 { "(bad)", { XX } },
2740 /* e8 */
2741 { "(bad)", { XX } },
2742 { "(bad)", { XX } },
2743 { "(bad)", { XX } },
2744 { "(bad)", { XX } },
2745 { "(bad)", { XX } },
2746 { "(bad)", { XX } },
2747 { "(bad)", { XX } },
2748 { "(bad)", { XX } },
2749 /* f0 */
2750 { PREGRP87 },
2751 { PREGRP88 },
2752 { "(bad)", { XX } },
2753 { "(bad)", { XX } },
2754 { "(bad)", { XX } },
2755 { "(bad)", { XX } },
2756 { "(bad)", { XX } },
2757 { "(bad)", { XX } },
2758 /* f8 */
2759 { "(bad)", { XX } },
2760 { "(bad)", { XX } },
2761 { "(bad)", { XX } },
2762 { "(bad)", { XX } },
2763 { "(bad)", { XX } },
2764 { "(bad)", { XX } },
2765 { "(bad)", { XX } },
2766 { "(bad)", { XX } },
2767 },
2768 /* THREE_BYTE_1 */
2769 {
2770 /* 00 */
2771 { "(bad)", { XX } },
2772 { "(bad)", { XX } },
2773 { "(bad)", { XX } },
2774 { "(bad)", { XX } },
2775 { "(bad)", { XX } },
2776 { "(bad)", { XX } },
2777 { "(bad)", { XX } },
2778 { "(bad)", { XX } },
2779 /* 08 */
2780 { PREGRP69 },
2781 { PREGRP70 },
2782 { PREGRP71 },
2783 { PREGRP72 },
2784 { PREGRP73 },
2785 { PREGRP74 },
2786 { PREGRP75 },
2787 { "palignr", { MX, EM, Ib } },
2788 /* 10 */
2789 { "(bad)", { XX } },
2790 { "(bad)", { XX } },
2791 { "(bad)", { XX } },
2792 { "(bad)", { XX } },
2793 { PREGRP76 },
2794 { PREGRP77 },
2795 { PREGRP78 },
2796 { PREGRP79 },
2797 /* 18 */
2798 { "(bad)", { XX } },
2799 { "(bad)", { XX } },
2800 { "(bad)", { XX } },
2801 { "(bad)", { XX } },
2802 { "(bad)", { XX } },
2803 { "(bad)", { XX } },
2804 { "(bad)", { XX } },
2805 { "(bad)", { XX } },
2806 /* 20 */
2807 { PREGRP80 },
2808 { PREGRP81 },
2809 { PREGRP82 },
2810 { "(bad)", { XX } },
2811 { "(bad)", { XX } },
2812 { "(bad)", { XX } },
2813 { "(bad)", { XX } },
2814 { "(bad)", { XX } },
2815 /* 28 */
2816 { "(bad)", { XX } },
2817 { "(bad)", { XX } },
2818 { "(bad)", { XX } },
2819 { "(bad)", { XX } },
2820 { "(bad)", { XX } },
2821 { "(bad)", { XX } },
2822 { "(bad)", { XX } },
2823 { "(bad)", { XX } },
2824 /* 30 */
2825 { "(bad)", { XX } },
2826 { "(bad)", { XX } },
2827 { "(bad)", { XX } },
2828 { "(bad)", { XX } },
2829 { "(bad)", { XX } },
2830 { "(bad)", { XX } },
2831 { "(bad)", { XX } },
2832 { "(bad)", { XX } },
2833 /* 38 */
2834 { "(bad)", { XX } },
2835 { "(bad)", { XX } },
2836 { "(bad)", { XX } },
2837 { "(bad)", { XX } },
2838 { "(bad)", { XX } },
2839 { "(bad)", { XX } },
2840 { "(bad)", { XX } },
2841 { "(bad)", { XX } },
2842 /* 40 */
2843 { PREGRP83 },
2844 { PREGRP84 },
2845 { PREGRP85 },
2846 { "(bad)", { XX } },
2847 { "(bad)", { XX } },
2848 { "(bad)", { XX } },
2849 { "(bad)", { XX } },
2850 { "(bad)", { XX } },
2851 /* 48 */
2852 { "(bad)", { XX } },
2853 { "(bad)", { XX } },
2854 { "(bad)", { XX } },
2855 { "(bad)", { XX } },
2856 { "(bad)", { XX } },
2857 { "(bad)", { XX } },
2858 { "(bad)", { XX } },
2859 { "(bad)", { XX } },
2860 /* 50 */
2861 { "(bad)", { XX } },
2862 { "(bad)", { XX } },
2863 { "(bad)", { XX } },
2864 { "(bad)", { XX } },
2865 { "(bad)", { XX } },
2866 { "(bad)", { XX } },
2867 { "(bad)", { XX } },
2868 { "(bad)", { XX } },
2869 /* 58 */
2870 { "(bad)", { XX } },
2871 { "(bad)", { XX } },
2872 { "(bad)", { XX } },
2873 { "(bad)", { XX } },
2874 { "(bad)", { XX } },
2875 { "(bad)", { XX } },
2876 { "(bad)", { XX } },
2877 { "(bad)", { XX } },
2878 /* 60 */
2879 { PREGRP89 },
2880 { PREGRP90 },
2881 { PREGRP91 },
2882 { PREGRP92 },
2883 { "(bad)", { XX } },
2884 { "(bad)", { XX } },
2885 { "(bad)", { XX } },
2886 { "(bad)", { XX } },
2887 /* 68 */
2888 { "(bad)", { XX } },
2889 { "(bad)", { XX } },
2890 { "(bad)", { XX } },
2891 { "(bad)", { XX } },
2892 { "(bad)", { XX } },
2893 { "(bad)", { XX } },
2894 { "(bad)", { XX } },
2895 { "(bad)", { XX } },
2896 /* 70 */
2897 { "(bad)", { XX } },
2898 { "(bad)", { XX } },
2899 { "(bad)", { XX } },
2900 { "(bad)", { XX } },
2901 { "(bad)", { XX } },
2902 { "(bad)", { XX } },
2903 { "(bad)", { XX } },
2904 { "(bad)", { XX } },
2905 /* 78 */
2906 { "(bad)", { XX } },
2907 { "(bad)", { XX } },
2908 { "(bad)", { XX } },
2909 { "(bad)", { XX } },
2910 { "(bad)", { XX } },
2911 { "(bad)", { XX } },
2912 { "(bad)", { XX } },
2913 { "(bad)", { XX } },
2914 /* 80 */
2915 { "(bad)", { XX } },
2916 { "(bad)", { XX } },
2917 { "(bad)", { XX } },
2918 { "(bad)", { XX } },
2919 { "(bad)", { XX } },
2920 { "(bad)", { XX } },
2921 { "(bad)", { XX } },
2922 { "(bad)", { XX } },
2923 /* 88 */
2924 { "(bad)", { XX } },
2925 { "(bad)", { XX } },
2926 { "(bad)", { XX } },
2927 { "(bad)", { XX } },
2928 { "(bad)", { XX } },
2929 { "(bad)", { XX } },
2930 { "(bad)", { XX } },
2931 { "(bad)", { XX } },
2932 /* 90 */
2933 { "(bad)", { XX } },
2934 { "(bad)", { XX } },
2935 { "(bad)", { XX } },
2936 { "(bad)", { XX } },
2937 { "(bad)", { XX } },
2938 { "(bad)", { XX } },
2939 { "(bad)", { XX } },
2940 { "(bad)", { XX } },
2941 /* 98 */
2942 { "(bad)", { XX } },
2943 { "(bad)", { XX } },
2944 { "(bad)", { XX } },
2945 { "(bad)", { XX } },
2946 { "(bad)", { XX } },
2947 { "(bad)", { XX } },
2948 { "(bad)", { XX } },
2949 { "(bad)", { XX } },
2950 /* a0 */
2951 { "(bad)", { XX } },
2952 { "(bad)", { XX } },
2953 { "(bad)", { XX } },
2954 { "(bad)", { XX } },
2955 { "(bad)", { XX } },
2956 { "(bad)", { XX } },
2957 { "(bad)", { XX } },
2958 { "(bad)", { XX } },
2959 /* a8 */
2960 { "(bad)", { XX } },
2961 { "(bad)", { XX } },
2962 { "(bad)", { XX } },
2963 { "(bad)", { XX } },
2964 { "(bad)", { XX } },
2965 { "(bad)", { XX } },
2966 { "(bad)", { XX } },
2967 { "(bad)", { XX } },
2968 /* b0 */
2969 { "(bad)", { XX } },
2970 { "(bad)", { XX } },
2971 { "(bad)", { XX } },
2972 { "(bad)", { XX } },
2973 { "(bad)", { XX } },
2974 { "(bad)", { XX } },
2975 { "(bad)", { XX } },
2976 { "(bad)", { XX } },
2977 /* b8 */
2978 { "(bad)", { XX } },
2979 { "(bad)", { XX } },
2980 { "(bad)", { XX } },
2981 { "(bad)", { XX } },
2982 { "(bad)", { XX } },
2983 { "(bad)", { XX } },
2984 { "(bad)", { XX } },
2985 { "(bad)", { XX } },
2986 /* c0 */
2987 { "(bad)", { XX } },
2988 { "(bad)", { XX } },
2989 { "(bad)", { XX } },
2990 { "(bad)", { XX } },
2991 { "(bad)", { XX } },
2992 { "(bad)", { XX } },
2993 { "(bad)", { XX } },
2994 { "(bad)", { XX } },
2995 /* c8 */
2996 { "(bad)", { XX } },
2997 { "(bad)", { XX } },
2998 { "(bad)", { XX } },
2999 { "(bad)", { XX } },
3000 { "(bad)", { XX } },
3001 { "(bad)", { XX } },
3002 { "(bad)", { XX } },
3003 { "(bad)", { XX } },
3004 /* d0 */
3005 { "(bad)", { XX } },
3006 { "(bad)", { XX } },
3007 { "(bad)", { XX } },
3008 { "(bad)", { XX } },
3009 { "(bad)", { XX } },
3010 { "(bad)", { XX } },
3011 { "(bad)", { XX } },
3012 { "(bad)", { XX } },
3013 /* d8 */
3014 { "(bad)", { XX } },
3015 { "(bad)", { XX } },
3016 { "(bad)", { XX } },
3017 { "(bad)", { XX } },
3018 { "(bad)", { XX } },
3019 { "(bad)", { XX } },
3020 { "(bad)", { XX } },
3021 { "(bad)", { XX } },
3022 /* e0 */
3023 { "(bad)", { XX } },
3024 { "(bad)", { XX } },
3025 { "(bad)", { XX } },
3026 { "(bad)", { XX } },
3027 { "(bad)", { XX } },
3028 { "(bad)", { XX } },
3029 { "(bad)", { XX } },
3030 { "(bad)", { XX } },
3031 /* e8 */
3032 { "(bad)", { XX } },
3033 { "(bad)", { XX } },
3034 { "(bad)", { XX } },
3035 { "(bad)", { XX } },
3036 { "(bad)", { XX } },
3037 { "(bad)", { XX } },
3038 { "(bad)", { XX } },
3039 { "(bad)", { XX } },
3040 /* f0 */
3041 { "(bad)", { XX } },
3042 { "(bad)", { XX } },
3043 { "(bad)", { XX } },
3044 { "(bad)", { XX } },
3045 { "(bad)", { XX } },
3046 { "(bad)", { XX } },
3047 { "(bad)", { XX } },
3048 { "(bad)", { XX } },
3049 /* f8 */
3050 { "(bad)", { XX } },
3051 { "(bad)", { XX } },
3052 { "(bad)", { XX } },
3053 { "(bad)", { XX } },
3054 { "(bad)", { XX } },
3055 { "(bad)", { XX } },
3056 { "(bad)", { XX } },
3057 { "(bad)", { XX } },
3058 }
3059 };
3060
3061 static const struct dis386 opc_ext_table[][2] = {
3062 {
3063 /* OPC_EXT_0 */
3064 { "leaS", { Gv, M } },
3065 { "(bad)", { XX } },
3066 },
3067 {
3068 /* OPC_EXT_1 */
3069 { "les{S|}", { Gv, Mp } },
3070 { "(bad)", { XX } },
3071 },
3072 {
3073 /* OPC_EXT_2 */
3074 { "ldsS", { Gv, Mp } },
3075 { "(bad)", { XX } },
3076 },
3077 {
3078 /* OPC_EXT_3 */
3079 { "lssS", { Gv, Mp } },
3080 { "(bad)", { XX } },
3081 },
3082 {
3083 /* OPC_EXT_4 */
3084 { "lfsS", { Gv, Mp } },
3085 { "(bad)", { XX } },
3086 },
3087 {
3088 /* OPC_EXT_5 */
3089 { "lgsS", { Gv, Mp } },
3090 { "(bad)", { XX } },
3091 },
3092 {
3093 /* OPC_EXT_6 */
3094 { "sgdt{Q|IQ||}", { M } },
3095 { OPC_EXT_RM_0 },
3096 },
3097 {
3098 /* OPC_EXT_7 */
3099 { "sidt{Q|IQ||}", { M } },
3100 { OPC_EXT_RM_1 },
3101 },
3102 {
3103 /* OPC_EXT_8 */
3104 { "lgdt{Q|Q||}", { M } },
3105 { "(bad)", { XX } },
3106 },
3107 {
3108 /* OPC_EXT_9 */
3109 { PREGRP98 },
3110 { "(bad)", { XX } },
3111 },
3112 {
3113 /* OPC_EXT_10 */
3114 { "vmptrst", { Mq } },
3115 { "(bad)", { XX } },
3116 },
3117 {
3118 /* OPC_EXT_11 */
3119 { "(bad)", { XX } },
3120 { "psrlw", { MS, Ib } },
3121 },
3122 {
3123 /* OPC_EXT_12 */
3124 { "(bad)", { XX } },
3125 { "psraw", { MS, Ib } },
3126 },
3127 {
3128 /* OPC_EXT_13 */
3129 { "(bad)", { XX } },
3130 { "psllw", { MS, Ib } },
3131 },
3132 {
3133 /* OPC_EXT_14 */
3134 { "(bad)", { XX } },
3135 { "psrld", { MS, Ib } },
3136 },
3137 {
3138 /* OPC_EXT_15 */
3139 { "(bad)", { XX } },
3140 { "psrad", { MS, Ib } },
3141 },
3142 {
3143 /* OPC_EXT_16 */
3144 { "(bad)", { XX } },
3145 { "pslld", { MS, Ib } },
3146 },
3147 {
3148 /* OPC_EXT_17 */
3149 { "(bad)", { XX } },
3150 { "psrlq", { MS, Ib } },
3151 },
3152 {
3153 /* OPC_EXT_18 */
3154 { "(bad)", { XX } },
3155 { PREGRP99 },
3156 },
3157 {
3158 /* OPC_EXT_19 */
3159 { "(bad)", { XX } },
3160 { "psllq", { MS, Ib } },
3161 },
3162 {
3163 /* OPC_EXT_20 */
3164 { "(bad)", { XX } },
3165 { PREGRP100 },
3166 },
3167 {
3168 /* OPC_EXT_21 */
3169 { "fxsave", { M } },
3170 { "(bad)", { XX } },
3171 },
3172 {
3173 /* OPC_EXT_22 */
3174 { "fxrstor", { M } },
3175 { "(bad)", { XX } },
3176 },
3177 {
3178 /* OPC_EXT_23 */
3179 { "ldmxcsr", { Md } },
3180 { "(bad)", { XX } },
3181 },
3182 {
3183 /* OPC_EXT_24 */
3184 { "stmxcsr", { Md } },
3185 { "(bad)", { XX } },
3186 },
3187 {
3188 /* OPC_EXT_25 */
3189 { "(bad)", { XX } },
3190 { OPC_EXT_RM_2 },
3191 },
3192 {
3193 /* OPC_EXT_26 */
3194 { "(bad)", { XX } },
3195 { OPC_EXT_RM_3 },
3196 },
3197 {
3198 /* OPC_EXT_27 */
3199 { "clflush", { Mb } },
3200 { OPC_EXT_RM_4 },
3201 },
3202 {
3203 /* OPC_EXT_28 */
3204 { "prefetchnta", { Mb } },
3205 { "(bad)", { XX } },
3206 },
3207 {
3208 /* OPC_EXT_29 */
3209 { "prefetcht0", { Mb } },
3210 { "(bad)", { XX } },
3211 },
3212 {
3213 /* OPC_EXT_30 */
3214 { "prefetcht1", { Mb } },
3215 { "(bad)", { XX } },
3216 },
3217 {
3218 /* OPC_EXT_31 */
3219 { "prefetcht2", { Mb } },
3220 { "(bad)", { XX } },
3221 },
3222 {
3223 /* OPC_EXT_32 */
3224 { "lddqu", { XM, M } },
3225 { "(bad)", { XX } },
3226 },
3227 {
3228 /* OPC_EXT_33 */
3229 { "bound{S|}", { Gv, Ma } },
3230 { "(bad)", { XX } },
3231 },
3232 };
3233
3234 static const struct dis386 opc_ext_rm_table[][8] = {
3235 {
3236 /* OPC_EXT_RM_0 */
3237 { "(bad)", { XX } },
3238 { "vmcall", { Skip_MODRM } },
3239 { "vmlaunch", { Skip_MODRM } },
3240 { "vmresume", { Skip_MODRM } },
3241 { "vmxoff", { Skip_MODRM } },
3242 { "(bad)", { XX } },
3243 { "(bad)", { XX } },
3244 { "(bad)", { XX } },
3245 },
3246 {
3247 /* OPC_EXT_RM_1 */
3248 { "monitor", { { OP_Monitor, 0 } } },
3249 { "mwait", { { OP_Mwait, 0 } } },
3250 { "(bad)", { XX } },
3251 { "(bad)", { XX } },
3252 { "(bad)", { XX } },
3253 { "(bad)", { XX } },
3254 { "(bad)", { XX } },
3255 { "(bad)", { XX } },
3256 },
3257 {
3258 /* OPC_EXT_RM_2 */
3259 { "lfence", { Skip_MODRM } },
3260 { "(bad)", { XX } },
3261 { "(bad)", { XX } },
3262 { "(bad)", { XX } },
3263 { "(bad)", { XX } },
3264 { "(bad)", { XX } },
3265 { "(bad)", { XX } },
3266 { "(bad)", { XX } },
3267 },
3268 {
3269 /* OPC_EXT_RM_3 */
3270 { "mfence", { Skip_MODRM } },
3271 { "(bad)", { XX } },
3272 { "(bad)", { XX } },
3273 { "(bad)", { XX } },
3274 { "(bad)", { XX } },
3275 { "(bad)", { XX } },
3276 { "(bad)", { XX } },
3277 { "(bad)", { XX } },
3278 },
3279 {
3280 /* OPC_EXT_RM_4 */
3281 { "sfence", { Skip_MODRM } },
3282 { "(bad)", { XX } },
3283 { "(bad)", { XX } },
3284 { "(bad)", { XX } },
3285 { "(bad)", { XX } },
3286 { "(bad)", { XX } },
3287 { "(bad)", { XX } },
3288 { "(bad)", { XX } },
3289 },
3290 };
3291
3292 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3293
3294 static void
3295 ckprefix (void)
3296 {
3297 int newrex;
3298 rex = 0;
3299 prefixes = 0;
3300 used_prefixes = 0;
3301 rex_used = 0;
3302 while (1)
3303 {
3304 FETCH_DATA (the_info, codep + 1);
3305 newrex = 0;
3306 switch (*codep)
3307 {
3308 /* REX prefixes family. */
3309 case 0x40:
3310 case 0x41:
3311 case 0x42:
3312 case 0x43:
3313 case 0x44:
3314 case 0x45:
3315 case 0x46:
3316 case 0x47:
3317 case 0x48:
3318 case 0x49:
3319 case 0x4a:
3320 case 0x4b:
3321 case 0x4c:
3322 case 0x4d:
3323 case 0x4e:
3324 case 0x4f:
3325 if (address_mode == mode_64bit)
3326 newrex = *codep;
3327 else
3328 return;
3329 break;
3330 case 0xf3:
3331 prefixes |= PREFIX_REPZ;
3332 break;
3333 case 0xf2:
3334 prefixes |= PREFIX_REPNZ;
3335 break;
3336 case 0xf0:
3337 prefixes |= PREFIX_LOCK;
3338 break;
3339 case 0x2e:
3340 prefixes |= PREFIX_CS;
3341 break;
3342 case 0x36:
3343 prefixes |= PREFIX_SS;
3344 break;
3345 case 0x3e:
3346 prefixes |= PREFIX_DS;
3347 break;
3348 case 0x26:
3349 prefixes |= PREFIX_ES;
3350 break;
3351 case 0x64:
3352 prefixes |= PREFIX_FS;
3353 break;
3354 case 0x65:
3355 prefixes |= PREFIX_GS;
3356 break;
3357 case 0x66:
3358 prefixes |= PREFIX_DATA;
3359 break;
3360 case 0x67:
3361 prefixes |= PREFIX_ADDR;
3362 break;
3363 case FWAIT_OPCODE:
3364 /* fwait is really an instruction. If there are prefixes
3365 before the fwait, they belong to the fwait, *not* to the
3366 following instruction. */
3367 if (prefixes || rex)
3368 {
3369 prefixes |= PREFIX_FWAIT;
3370 codep++;
3371 return;
3372 }
3373 prefixes = PREFIX_FWAIT;
3374 break;
3375 default:
3376 return;
3377 }
3378 /* Rex is ignored when followed by another prefix. */
3379 if (rex)
3380 {
3381 rex_used = rex;
3382 return;
3383 }
3384 rex = newrex;
3385 codep++;
3386 }
3387 }
3388
3389 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3390 prefix byte. */
3391
3392 static const char *
3393 prefix_name (int pref, int sizeflag)
3394 {
3395 static const char *rexes [16] =
3396 {
3397 "rex", /* 0x40 */
3398 "rex.B", /* 0x41 */
3399 "rex.X", /* 0x42 */
3400 "rex.XB", /* 0x43 */
3401 "rex.R", /* 0x44 */
3402 "rex.RB", /* 0x45 */
3403 "rex.RX", /* 0x46 */
3404 "rex.RXB", /* 0x47 */
3405 "rex.W", /* 0x48 */
3406 "rex.WB", /* 0x49 */
3407 "rex.WX", /* 0x4a */
3408 "rex.WXB", /* 0x4b */
3409 "rex.WR", /* 0x4c */
3410 "rex.WRB", /* 0x4d */
3411 "rex.WRX", /* 0x4e */
3412 "rex.WRXB", /* 0x4f */
3413 };
3414
3415 switch (pref)
3416 {
3417 /* REX prefixes family. */
3418 case 0x40:
3419 case 0x41:
3420 case 0x42:
3421 case 0x43:
3422 case 0x44:
3423 case 0x45:
3424 case 0x46:
3425 case 0x47:
3426 case 0x48:
3427 case 0x49:
3428 case 0x4a:
3429 case 0x4b:
3430 case 0x4c:
3431 case 0x4d:
3432 case 0x4e:
3433 case 0x4f:
3434 return rexes [pref - 0x40];
3435 case 0xf3:
3436 return "repz";
3437 case 0xf2:
3438 return "repnz";
3439 case 0xf0:
3440 return "lock";
3441 case 0x2e:
3442 return "cs";
3443 case 0x36:
3444 return "ss";
3445 case 0x3e:
3446 return "ds";
3447 case 0x26:
3448 return "es";
3449 case 0x64:
3450 return "fs";
3451 case 0x65:
3452 return "gs";
3453 case 0x66:
3454 return (sizeflag & DFLAG) ? "data16" : "data32";
3455 case 0x67:
3456 if (address_mode == mode_64bit)
3457 return (sizeflag & AFLAG) ? "addr32" : "addr64";
3458 else
3459 return (sizeflag & AFLAG) ? "addr16" : "addr32";
3460 case FWAIT_OPCODE:
3461 return "fwait";
3462 default:
3463 return NULL;
3464 }
3465 }
3466
3467 static char op_out[MAX_OPERANDS][100];
3468 static int op_ad, op_index[MAX_OPERANDS];
3469 static int two_source_ops;
3470 static bfd_vma op_address[MAX_OPERANDS];
3471 static bfd_vma op_riprel[MAX_OPERANDS];
3472 static bfd_vma start_pc;
3473
3474 /*
3475 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3476 * (see topic "Redundant prefixes" in the "Differences from 8086"
3477 * section of the "Virtual 8086 Mode" chapter.)
3478 * 'pc' should be the address of this instruction, it will
3479 * be used to print the target address if this is a relative jump or call
3480 * The function returns the length of this instruction in bytes.
3481 */
3482
3483 static char intel_syntax;
3484 static char open_char;
3485 static char close_char;
3486 static char separator_char;
3487 static char scale_char;
3488
3489 /* Here for backwards compatibility. When gdb stops using
3490 print_insn_i386_att and print_insn_i386_intel these functions can
3491 disappear, and print_insn_i386 be merged into print_insn. */
3492 int
3493 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
3494 {
3495 intel_syntax = 0;
3496
3497 return print_insn (pc, info);
3498 }
3499
3500 int
3501 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
3502 {
3503 intel_syntax = 1;
3504
3505 return print_insn (pc, info);
3506 }
3507
3508 int
3509 print_insn_i386 (bfd_vma pc, disassemble_info *info)
3510 {
3511 intel_syntax = -1;
3512
3513 return print_insn (pc, info);
3514 }
3515
3516 void
3517 print_i386_disassembler_options (FILE *stream)
3518 {
3519 fprintf (stream, _("\n\
3520 The following i386/x86-64 specific disassembler options are supported for use\n\
3521 with the -M switch (multiple options should be separated by commas):\n"));
3522
3523 fprintf (stream, _(" x86-64 Disassemble in 64bit mode\n"));
3524 fprintf (stream, _(" i386 Disassemble in 32bit mode\n"));
3525 fprintf (stream, _(" i8086 Disassemble in 16bit mode\n"));
3526 fprintf (stream, _(" att Display instruction in AT&T syntax\n"));
3527 fprintf (stream, _(" intel Display instruction in Intel syntax\n"));
3528 fprintf (stream, _(" addr64 Assume 64bit address size\n"));
3529 fprintf (stream, _(" addr32 Assume 32bit address size\n"));
3530 fprintf (stream, _(" addr16 Assume 16bit address size\n"));
3531 fprintf (stream, _(" data32 Assume 32bit data size\n"));
3532 fprintf (stream, _(" data16 Assume 16bit data size\n"));
3533 fprintf (stream, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3534 }
3535
3536 /* Get a pointer to struct dis386 with a valid name. */
3537
3538 static const struct dis386 *
3539 get_valid_dis386 (const struct dis386 *dp)
3540 {
3541 int index;
3542
3543 if (dp->name != NULL)
3544 return dp;
3545
3546 switch (dp->op[0].bytemode)
3547 {
3548 case USE_GROUPS:
3549 dp = &grps[dp->op[1].bytemode][modrm.reg];
3550 break;
3551
3552 case USE_PREFIX_USER_TABLE:
3553 index = 0;
3554 used_prefixes |= (prefixes & PREFIX_REPZ);
3555 if (prefixes & PREFIX_REPZ)
3556 {
3557 index = 1;
3558 repz_prefix = NULL;
3559 }
3560 else
3561 {
3562 /* We should check PREFIX_REPNZ and PREFIX_REPZ before
3563 PREFIX_DATA. */
3564 used_prefixes |= (prefixes & PREFIX_REPNZ);
3565 if (prefixes & PREFIX_REPNZ)
3566 {
3567 index = 3;
3568 repnz_prefix = NULL;
3569 }
3570 else
3571 {
3572 used_prefixes |= (prefixes & PREFIX_DATA);
3573 if (prefixes & PREFIX_DATA)
3574 {
3575 index = 2;
3576 data_prefix = NULL;
3577 }
3578 }
3579 }
3580 dp = &prefix_user_table[dp->op[1].bytemode][index];
3581 break;
3582
3583 case X86_64_SPECIAL:
3584 index = address_mode == mode_64bit ? 1 : 0;
3585 dp = &x86_64_table[dp->op[1].bytemode][index];
3586 break;
3587
3588 case USE_OPC_EXT_TABLE:
3589 index = modrm.mod == 0x3 ? 1 : 0;
3590 dp = &opc_ext_table[dp->op[1].bytemode][index];
3591 break;
3592
3593 case USE_OPC_EXT_RM_TABLE:
3594 index = modrm.rm;
3595 dp = &opc_ext_rm_table[dp->op[1].bytemode][index];
3596 break;
3597
3598 default:
3599 oappend (INTERNAL_DISASSEMBLER_ERROR);
3600 return NULL;
3601 }
3602
3603 if (dp->name != NULL)
3604 return dp;
3605 else
3606 return get_valid_dis386 (dp);
3607 }
3608
3609 static int
3610 print_insn (bfd_vma pc, disassemble_info *info)
3611 {
3612 const struct dis386 *dp;
3613 int i;
3614 char *op_txt[MAX_OPERANDS];
3615 int needcomma;
3616 int sizeflag;
3617 const char *p;
3618 struct dis_private priv;
3619 unsigned char op;
3620 char prefix_obuf[32];
3621 char *prefix_obufp;
3622
3623 if (info->mach == bfd_mach_x86_64_intel_syntax
3624 || info->mach == bfd_mach_x86_64)
3625 address_mode = mode_64bit;
3626 else
3627 address_mode = mode_32bit;
3628
3629 if (intel_syntax == (char) -1)
3630 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3631 || info->mach == bfd_mach_x86_64_intel_syntax);
3632
3633 if (info->mach == bfd_mach_i386_i386
3634 || info->mach == bfd_mach_x86_64
3635 || info->mach == bfd_mach_i386_i386_intel_syntax
3636 || info->mach == bfd_mach_x86_64_intel_syntax)
3637 priv.orig_sizeflag = AFLAG | DFLAG;
3638 else if (info->mach == bfd_mach_i386_i8086)
3639 priv.orig_sizeflag = 0;
3640 else
3641 abort ();
3642
3643 for (p = info->disassembler_options; p != NULL; )
3644 {
3645 if (CONST_STRNEQ (p, "x86-64"))
3646 {
3647 address_mode = mode_64bit;
3648 priv.orig_sizeflag = AFLAG | DFLAG;
3649 }
3650 else if (CONST_STRNEQ (p, "i386"))
3651 {
3652 address_mode = mode_32bit;
3653 priv.orig_sizeflag = AFLAG | DFLAG;
3654 }
3655 else if (CONST_STRNEQ (p, "i8086"))
3656 {
3657 address_mode = mode_16bit;
3658 priv.orig_sizeflag = 0;
3659 }
3660 else if (CONST_STRNEQ (p, "intel"))
3661 {
3662 intel_syntax = 1;
3663 }
3664 else if (CONST_STRNEQ (p, "att"))
3665 {
3666 intel_syntax = 0;
3667 }
3668 else if (CONST_STRNEQ (p, "addr"))
3669 {
3670 if (address_mode == mode_64bit)
3671 {
3672 if (p[4] == '3' && p[5] == '2')
3673 priv.orig_sizeflag &= ~AFLAG;
3674 else if (p[4] == '6' && p[5] == '4')
3675 priv.orig_sizeflag |= AFLAG;
3676 }
3677 else
3678 {
3679 if (p[4] == '1' && p[5] == '6')
3680 priv.orig_sizeflag &= ~AFLAG;
3681 else if (p[4] == '3' && p[5] == '2')
3682 priv.orig_sizeflag |= AFLAG;
3683 }
3684 }
3685 else if (CONST_STRNEQ (p, "data"))
3686 {
3687 if (p[4] == '1' && p[5] == '6')
3688 priv.orig_sizeflag &= ~DFLAG;
3689 else if (p[4] == '3' && p[5] == '2')
3690 priv.orig_sizeflag |= DFLAG;
3691 }
3692 else if (CONST_STRNEQ (p, "suffix"))
3693 priv.orig_sizeflag |= SUFFIX_ALWAYS;
3694
3695 p = strchr (p, ',');
3696 if (p != NULL)
3697 p++;
3698 }
3699
3700 if (intel_syntax)
3701 {
3702 names64 = intel_names64;
3703 names32 = intel_names32;
3704 names16 = intel_names16;
3705 names8 = intel_names8;
3706 names8rex = intel_names8rex;
3707 names_seg = intel_names_seg;
3708 index16 = intel_index16;
3709 open_char = '[';
3710 close_char = ']';
3711 separator_char = '+';
3712 scale_char = '*';
3713 }
3714 else
3715 {
3716 names64 = att_names64;
3717 names32 = att_names32;
3718 names16 = att_names16;
3719 names8 = att_names8;
3720 names8rex = att_names8rex;
3721 names_seg = att_names_seg;
3722 index16 = att_index16;
3723 open_char = '(';
3724 close_char = ')';
3725 separator_char = ',';
3726 scale_char = ',';
3727 }
3728
3729 /* The output looks better if we put 7 bytes on a line, since that
3730 puts most long word instructions on a single line. */
3731 info->bytes_per_line = 7;
3732
3733 info->private_data = &priv;
3734 priv.max_fetched = priv.the_buffer;
3735 priv.insn_start = pc;
3736
3737 obuf[0] = 0;
3738 for (i = 0; i < MAX_OPERANDS; ++i)
3739 {
3740 op_out[i][0] = 0;
3741 op_index[i] = -1;
3742 }
3743
3744 the_info = info;
3745 start_pc = pc;
3746 start_codep = priv.the_buffer;
3747 codep = priv.the_buffer;
3748
3749 if (setjmp (priv.bailout) != 0)
3750 {
3751 const char *name;
3752
3753 /* Getting here means we tried for data but didn't get it. That
3754 means we have an incomplete instruction of some sort. Just
3755 print the first byte as a prefix or a .byte pseudo-op. */
3756 if (codep > priv.the_buffer)
3757 {
3758 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3759 if (name != NULL)
3760 (*info->fprintf_func) (info->stream, "%s", name);
3761 else
3762 {
3763 /* Just print the first byte as a .byte instruction. */
3764 (*info->fprintf_func) (info->stream, ".byte 0x%x",
3765 (unsigned int) priv.the_buffer[0]);
3766 }
3767
3768 return 1;
3769 }
3770
3771 return -1;
3772 }
3773
3774 obufp = obuf;
3775 ckprefix ();
3776
3777 insn_codep = codep;
3778 sizeflag = priv.orig_sizeflag;
3779
3780 FETCH_DATA (info, codep + 1);
3781 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3782
3783 if (((prefixes & PREFIX_FWAIT)
3784 && ((*codep < 0xd8) || (*codep > 0xdf)))
3785 || (rex && rex_used))
3786 {
3787 const char *name;
3788
3789 /* fwait not followed by floating point instruction, or rex followed
3790 by other prefixes. Print the first prefix. */
3791 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3792 if (name == NULL)
3793 name = INTERNAL_DISASSEMBLER_ERROR;
3794 (*info->fprintf_func) (info->stream, "%s", name);
3795 return 1;
3796 }
3797
3798 op = 0;
3799 if (*codep == 0x0f)
3800 {
3801 unsigned char threebyte;
3802 FETCH_DATA (info, codep + 2);
3803 threebyte = *++codep;
3804 dp = &dis386_twobyte[threebyte];
3805 need_modrm = twobyte_has_modrm[*codep];
3806 codep++;
3807 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3808 {
3809 FETCH_DATA (info, codep + 2);
3810 op = *codep++;
3811 }
3812 }
3813 else
3814 {
3815 dp = &dis386[*codep];
3816 need_modrm = onebyte_has_modrm[*codep];
3817 codep++;
3818 }
3819
3820 if ((prefixes & PREFIX_REPZ))
3821 {
3822 repz_prefix = "repz ";
3823 used_prefixes |= PREFIX_REPZ;
3824 }
3825 else
3826 repz_prefix = NULL;
3827
3828 if ((prefixes & PREFIX_REPNZ))
3829 {
3830 repnz_prefix = "repnz ";
3831 used_prefixes |= PREFIX_REPNZ;
3832 }
3833 else
3834 repnz_prefix = NULL;
3835
3836 if ((prefixes & PREFIX_LOCK))
3837 {
3838 lock_prefix = "lock ";
3839 used_prefixes |= PREFIX_LOCK;
3840 }
3841 else
3842 lock_prefix = NULL;
3843
3844 addr_prefix = NULL;
3845 if (prefixes & PREFIX_ADDR)
3846 {
3847 sizeflag ^= AFLAG;
3848 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
3849 {
3850 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3851 addr_prefix = "addr32 ";
3852 else
3853 addr_prefix = "addr16 ";
3854 used_prefixes |= PREFIX_ADDR;
3855 }
3856 }
3857
3858 data_prefix = NULL;
3859 if ((prefixes & PREFIX_DATA))
3860 {
3861 sizeflag ^= DFLAG;
3862 if (dp->op[2].bytemode == cond_jump_mode
3863 && dp->op[0].bytemode == v_mode
3864 && !intel_syntax)
3865 {
3866 if (sizeflag & DFLAG)
3867 data_prefix = "data32 ";
3868 else
3869 data_prefix = "data16 ";
3870 used_prefixes |= PREFIX_DATA;
3871 }
3872 }
3873
3874 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3875 {
3876 dp = &three_byte_table[dp->op[1].bytemode][op];
3877 modrm.mod = (*codep >> 6) & 3;
3878 modrm.reg = (*codep >> 3) & 7;
3879 modrm.rm = *codep & 7;
3880 }
3881 else if (need_modrm)
3882 {
3883 FETCH_DATA (info, codep + 1);
3884 modrm.mod = (*codep >> 6) & 3;
3885 modrm.reg = (*codep >> 3) & 7;
3886 modrm.rm = *codep & 7;
3887 }
3888
3889 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
3890 {
3891 dofloat (sizeflag);
3892 }
3893 else
3894 {
3895 dp = get_valid_dis386 (dp);
3896 if (dp != NULL && putop (dp->name, sizeflag) == 0)
3897 {
3898 for (i = 0; i < MAX_OPERANDS; ++i)
3899 {
3900 obufp = op_out[i];
3901 op_ad = MAX_OPERANDS - 1 - i;
3902 if (dp->op[i].rtn)
3903 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
3904 }
3905 }
3906 }
3907
3908 /* See if any prefixes were not used. If so, print the first one
3909 separately. If we don't do this, we'll wind up printing an
3910 instruction stream which does not precisely correspond to the
3911 bytes we are disassembling. */
3912 if ((prefixes & ~used_prefixes) != 0)
3913 {
3914 const char *name;
3915
3916 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3917 if (name == NULL)
3918 name = INTERNAL_DISASSEMBLER_ERROR;
3919 (*info->fprintf_func) (info->stream, "%s", name);
3920 return 1;
3921 }
3922 if (rex & ~rex_used)
3923 {
3924 const char *name;
3925 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
3926 if (name == NULL)
3927 name = INTERNAL_DISASSEMBLER_ERROR;
3928 (*info->fprintf_func) (info->stream, "%s ", name);
3929 }
3930
3931 prefix_obuf[0] = 0;
3932 prefix_obufp = prefix_obuf;
3933 if (lock_prefix)
3934 prefix_obufp = stpcpy (prefix_obufp, lock_prefix);
3935 if (repz_prefix)
3936 prefix_obufp = stpcpy (prefix_obufp, repz_prefix);
3937 if (repnz_prefix)
3938 prefix_obufp = stpcpy (prefix_obufp, repnz_prefix);
3939 if (addr_prefix)
3940 prefix_obufp = stpcpy (prefix_obufp, addr_prefix);
3941 if (data_prefix)
3942 prefix_obufp = stpcpy (prefix_obufp, data_prefix);
3943
3944 if (prefix_obuf[0] != 0)
3945 (*info->fprintf_func) (info->stream, "%s", prefix_obuf);
3946
3947 obufp = obuf + strlen (obuf);
3948 for (i = strlen (obuf) + strlen (prefix_obuf); i < 6; i++)
3949 oappend (" ");
3950 oappend (" ");
3951 (*info->fprintf_func) (info->stream, "%s", obuf);
3952
3953 /* The enter and bound instructions are printed with operands in the same
3954 order as the intel book; everything else is printed in reverse order. */
3955 if (intel_syntax || two_source_ops)
3956 {
3957 bfd_vma riprel;
3958
3959 for (i = 0; i < MAX_OPERANDS; ++i)
3960 op_txt[i] = op_out[i];
3961
3962 for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
3963 {
3964 op_ad = op_index[i];
3965 op_index[i] = op_index[MAX_OPERANDS - 1 - i];
3966 op_index[MAX_OPERANDS - 1 - i] = op_ad;
3967 riprel = op_riprel[i];
3968 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
3969 op_riprel[MAX_OPERANDS - 1 - i] = riprel;
3970 }
3971 }
3972 else
3973 {
3974 for (i = 0; i < MAX_OPERANDS; ++i)
3975 op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
3976 }
3977
3978 needcomma = 0;
3979 for (i = 0; i < MAX_OPERANDS; ++i)
3980 if (*op_txt[i])
3981 {
3982 if (needcomma)
3983 (*info->fprintf_func) (info->stream, ",");
3984 if (op_index[i] != -1 && !op_riprel[i])
3985 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
3986 else
3987 (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
3988 needcomma = 1;
3989 }
3990
3991 for (i = 0; i < MAX_OPERANDS; i++)
3992 if (op_index[i] != -1 && op_riprel[i])
3993 {
3994 (*info->fprintf_func) (info->stream, " # ");
3995 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3996 + op_address[op_index[i]]), info);
3997 break;
3998 }
3999 return codep - priv.the_buffer;
4000 }
4001
4002 static const char *float_mem[] = {
4003 /* d8 */
4004 "fadd{s||s|}",
4005 "fmul{s||s|}",
4006 "fcom{s||s|}",
4007 "fcomp{s||s|}",
4008 "fsub{s||s|}",
4009 "fsubr{s||s|}",
4010 "fdiv{s||s|}",
4011 "fdivr{s||s|}",
4012 /* d9 */
4013 "fld{s||s|}",
4014 "(bad)",
4015 "fst{s||s|}",
4016 "fstp{s||s|}",
4017 "fldenvIC",
4018 "fldcw",
4019 "fNstenvIC",
4020 "fNstcw",
4021 /* da */
4022 "fiadd{l||l|}",
4023 "fimul{l||l|}",
4024 "ficom{l||l|}",
4025 "ficomp{l||l|}",
4026 "fisub{l||l|}",
4027 "fisubr{l||l|}",
4028 "fidiv{l||l|}",
4029 "fidivr{l||l|}",
4030 /* db */
4031 "fild{l||l|}",
4032 "fisttp{l||l|}",
4033 "fist{l||l|}",
4034 "fistp{l||l|}",
4035 "(bad)",
4036 "fld{t||t|}",
4037 "(bad)",
4038 "fstp{t||t|}",
4039 /* dc */
4040 "fadd{l||l|}",
4041 "fmul{l||l|}",
4042 "fcom{l||l|}",
4043 "fcomp{l||l|}",
4044 "fsub{l||l|}",
4045 "fsubr{l||l|}",
4046 "fdiv{l||l|}",
4047 "fdivr{l||l|}",
4048 /* dd */
4049 "fld{l||l|}",
4050 "fisttp{ll||ll|}",
4051 "fst{l||l|}",
4052 "fstp{l||l|}",
4053 "frstorIC",
4054 "(bad)",
4055 "fNsaveIC",
4056 "fNstsw",
4057 /* de */
4058 "fiadd",
4059 "fimul",
4060 "ficom",
4061 "ficomp",
4062 "fisub",
4063 "fisubr",
4064 "fidiv",
4065 "fidivr",
4066 /* df */
4067 "fild",
4068 "fisttp",
4069 "fist",
4070 "fistp",
4071 "fbld",
4072 "fild{ll||ll|}",
4073 "fbstp",
4074 "fistp{ll||ll|}",
4075 };
4076
4077 static const unsigned char float_mem_mode[] = {
4078 /* d8 */
4079 d_mode,
4080 d_mode,
4081 d_mode,
4082 d_mode,
4083 d_mode,
4084 d_mode,
4085 d_mode,
4086 d_mode,
4087 /* d9 */
4088 d_mode,
4089 0,
4090 d_mode,
4091 d_mode,
4092 0,
4093 w_mode,
4094 0,
4095 w_mode,
4096 /* da */
4097 d_mode,
4098 d_mode,
4099 d_mode,
4100 d_mode,
4101 d_mode,
4102 d_mode,
4103 d_mode,
4104 d_mode,
4105 /* db */
4106 d_mode,
4107 d_mode,
4108 d_mode,
4109 d_mode,
4110 0,
4111 t_mode,
4112 0,
4113 t_mode,
4114 /* dc */
4115 q_mode,
4116 q_mode,
4117 q_mode,
4118 q_mode,
4119 q_mode,
4120 q_mode,
4121 q_mode,
4122 q_mode,
4123 /* dd */
4124 q_mode,
4125 q_mode,
4126 q_mode,
4127 q_mode,
4128 0,
4129 0,
4130 0,
4131 w_mode,
4132 /* de */
4133 w_mode,
4134 w_mode,
4135 w_mode,
4136 w_mode,
4137 w_mode,
4138 w_mode,
4139 w_mode,
4140 w_mode,
4141 /* df */
4142 w_mode,
4143 w_mode,
4144 w_mode,
4145 w_mode,
4146 t_mode,
4147 q_mode,
4148 t_mode,
4149 q_mode
4150 };
4151
4152 #define ST { OP_ST, 0 }
4153 #define STi { OP_STi, 0 }
4154
4155 #define FGRPd9_2 NULL, { { NULL, 0 } }
4156 #define FGRPd9_4 NULL, { { NULL, 1 } }
4157 #define FGRPd9_5 NULL, { { NULL, 2 } }
4158 #define FGRPd9_6 NULL, { { NULL, 3 } }
4159 #define FGRPd9_7 NULL, { { NULL, 4 } }
4160 #define FGRPda_5 NULL, { { NULL, 5 } }
4161 #define FGRPdb_4 NULL, { { NULL, 6 } }
4162 #define FGRPde_3 NULL, { { NULL, 7 } }
4163 #define FGRPdf_4 NULL, { { NULL, 8 } }
4164
4165 static const struct dis386 float_reg[][8] = {
4166 /* d8 */
4167 {
4168 { "fadd", { ST, STi } },
4169 { "fmul", { ST, STi } },
4170 { "fcom", { STi } },
4171 { "fcomp", { STi } },
4172 { "fsub", { ST, STi } },
4173 { "fsubr", { ST, STi } },
4174 { "fdiv", { ST, STi } },
4175 { "fdivr", { ST, STi } },
4176 },
4177 /* d9 */
4178 {
4179 { "fld", { STi } },
4180 { "fxch", { STi } },
4181 { FGRPd9_2 },
4182 { "(bad)", { XX } },
4183 { FGRPd9_4 },
4184 { FGRPd9_5 },
4185 { FGRPd9_6 },
4186 { FGRPd9_7 },
4187 },
4188 /* da */
4189 {
4190 { "fcmovb", { ST, STi } },
4191 { "fcmove", { ST, STi } },
4192 { "fcmovbe",{ ST, STi } },
4193 { "fcmovu", { ST, STi } },
4194 { "(bad)", { XX } },
4195 { FGRPda_5 },
4196 { "(bad)", { XX } },
4197 { "(bad)", { XX } },
4198 },
4199 /* db */
4200 {
4201 { "fcmovnb",{ ST, STi } },
4202 { "fcmovne",{ ST, STi } },
4203 { "fcmovnbe",{ ST, STi } },
4204 { "fcmovnu",{ ST, STi } },
4205 { FGRPdb_4 },
4206 { "fucomi", { ST, STi } },
4207 { "fcomi", { ST, STi } },
4208 { "(bad)", { XX } },
4209 },
4210 /* dc */
4211 {
4212 { "fadd", { STi, ST } },
4213 { "fmul", { STi, ST } },
4214 { "(bad)", { XX } },
4215 { "(bad)", { XX } },
4216 #if SYSV386_COMPAT
4217 { "fsub", { STi, ST } },
4218 { "fsubr", { STi, ST } },
4219 { "fdiv", { STi, ST } },
4220 { "fdivr", { STi, ST } },
4221 #else
4222 { "fsubr", { STi, ST } },
4223 { "fsub", { STi, ST } },
4224 { "fdivr", { STi, ST } },
4225 { "fdiv", { STi, ST } },
4226 #endif
4227 },
4228 /* dd */
4229 {
4230 { "ffree", { STi } },
4231 { "(bad)", { XX } },
4232 { "fst", { STi } },
4233 { "fstp", { STi } },
4234 { "fucom", { STi } },
4235 { "fucomp", { STi } },
4236 { "(bad)", { XX } },
4237 { "(bad)", { XX } },
4238 },
4239 /* de */
4240 {
4241 { "faddp", { STi, ST } },
4242 { "fmulp", { STi, ST } },
4243 { "(bad)", { XX } },
4244 { FGRPde_3 },
4245 #if SYSV386_COMPAT
4246 { "fsubp", { STi, ST } },
4247 { "fsubrp", { STi, ST } },
4248 { "fdivp", { STi, ST } },
4249 { "fdivrp", { STi, ST } },
4250 #else
4251 { "fsubrp", { STi, ST } },
4252 { "fsubp", { STi, ST } },
4253 { "fdivrp", { STi, ST } },
4254 { "fdivp", { STi, ST } },
4255 #endif
4256 },
4257 /* df */
4258 {
4259 { "ffreep", { STi } },
4260 { "(bad)", { XX } },
4261 { "(bad)", { XX } },
4262 { "(bad)", { XX } },
4263 { FGRPdf_4 },
4264 { "fucomip", { ST, STi } },
4265 { "fcomip", { ST, STi } },
4266 { "(bad)", { XX } },
4267 },
4268 };
4269
4270 static char *fgrps[][8] = {
4271 /* d9_2 0 */
4272 {
4273 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4274 },
4275
4276 /* d9_4 1 */
4277 {
4278 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4279 },
4280
4281 /* d9_5 2 */
4282 {
4283 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4284 },
4285
4286 /* d9_6 3 */
4287 {
4288 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4289 },
4290
4291 /* d9_7 4 */
4292 {
4293 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4294 },
4295
4296 /* da_5 5 */
4297 {
4298 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4299 },
4300
4301 /* db_4 6 */
4302 {
4303 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4304 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4305 },
4306
4307 /* de_3 7 */
4308 {
4309 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4310 },
4311
4312 /* df_4 8 */
4313 {
4314 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4315 },
4316 };
4317
4318 static void
4319 OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED,
4320 int sizeflag ATTRIBUTE_UNUSED)
4321 {
4322 /* Skip mod/rm byte. */
4323 MODRM_CHECK;
4324 codep++;
4325 }
4326
4327 static void
4328 dofloat (int sizeflag)
4329 {
4330 const struct dis386 *dp;
4331 unsigned char floatop;
4332
4333 floatop = codep[-1];
4334
4335 if (modrm.mod != 3)
4336 {
4337 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
4338
4339 putop (float_mem[fp_indx], sizeflag);
4340 obufp = op_out[0];
4341 op_ad = 2;
4342 OP_E (float_mem_mode[fp_indx], sizeflag);
4343 return;
4344 }
4345 /* Skip mod/rm byte. */
4346 MODRM_CHECK;
4347 codep++;
4348
4349 dp = &float_reg[floatop - 0xd8][modrm.reg];
4350 if (dp->name == NULL)
4351 {
4352 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
4353
4354 /* Instruction fnstsw is only one with strange arg. */
4355 if (floatop == 0xdf && codep[-1] == 0xe0)
4356 strcpy (op_out[0], names16[0]);
4357 }
4358 else
4359 {
4360 putop (dp->name, sizeflag);
4361
4362 obufp = op_out[0];
4363 op_ad = 2;
4364 if (dp->op[0].rtn)
4365 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
4366
4367 obufp = op_out[1];
4368 op_ad = 1;
4369 if (dp->op[1].rtn)
4370 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
4371 }
4372 }
4373
4374 static void
4375 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4376 {
4377 oappend ("%st" + intel_syntax);
4378 }
4379
4380 static void
4381 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4382 {
4383 sprintf (scratchbuf, "%%st(%d)", modrm.rm);
4384 oappend (scratchbuf + intel_syntax);
4385 }
4386
4387 /* Capital letters in template are macros. */
4388 static int
4389 putop (const char *template, int sizeflag)
4390 {
4391 const char *p;
4392 int alt = 0;
4393
4394 for (p = template; *p; p++)
4395 {
4396 switch (*p)
4397 {
4398 default:
4399 *obufp++ = *p;
4400 break;
4401 case '{':
4402 alt = 0;
4403 if (intel_syntax)
4404 alt += 1;
4405 if (address_mode == mode_64bit)
4406 alt += 2;
4407 while (alt != 0)
4408 {
4409 while (*++p != '|')
4410 {
4411 if (*p == '}')
4412 {
4413 /* Alternative not valid. */
4414 strcpy (obuf, "(bad)");
4415 obufp = obuf + 5;
4416 return 1;
4417 }
4418 else if (*p == '\0')
4419 abort ();
4420 }
4421 alt--;
4422 }
4423 /* Fall through. */
4424 case 'I':
4425 alt = 1;
4426 continue;
4427 case '|':
4428 while (*++p != '}')
4429 {
4430 if (*p == '\0')
4431 abort ();
4432 }
4433 break;
4434 case '}':
4435 break;
4436 case 'A':
4437 if (intel_syntax)
4438 break;
4439 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4440 *obufp++ = 'b';
4441 break;
4442 case 'B':
4443 if (intel_syntax)
4444 break;
4445 if (sizeflag & SUFFIX_ALWAYS)
4446 *obufp++ = 'b';
4447 break;
4448 case 'C':
4449 if (intel_syntax && !alt)
4450 break;
4451 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4452 {
4453 if (sizeflag & DFLAG)
4454 *obufp++ = intel_syntax ? 'd' : 'l';
4455 else
4456 *obufp++ = intel_syntax ? 'w' : 's';
4457 used_prefixes |= (prefixes & PREFIX_DATA);
4458 }
4459 break;
4460 case 'D':
4461 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4462 break;
4463 USED_REX (REX_W);
4464 if (modrm.mod == 3)
4465 {
4466 if (rex & REX_W)
4467 *obufp++ = 'q';
4468 else if (sizeflag & DFLAG)
4469 *obufp++ = intel_syntax ? 'd' : 'l';
4470 else
4471 *obufp++ = 'w';
4472 used_prefixes |= (prefixes & PREFIX_DATA);
4473 }
4474 else
4475 *obufp++ = 'w';
4476 break;
4477 case 'E': /* For jcxz/jecxz */
4478 if (address_mode == mode_64bit)
4479 {
4480 if (sizeflag & AFLAG)
4481 *obufp++ = 'r';
4482 else
4483 *obufp++ = 'e';
4484 }
4485 else
4486 if (sizeflag & AFLAG)
4487 *obufp++ = 'e';
4488 used_prefixes |= (prefixes & PREFIX_ADDR);
4489 break;
4490 case 'F':
4491 if (intel_syntax)
4492 break;
4493 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
4494 {
4495 if (sizeflag & AFLAG)
4496 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
4497 else
4498 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
4499 used_prefixes |= (prefixes & PREFIX_ADDR);
4500 }
4501 break;
4502 case 'G':
4503 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4504 break;
4505 if ((rex & REX_W) || (sizeflag & DFLAG))
4506 *obufp++ = 'l';
4507 else
4508 *obufp++ = 'w';
4509 if (!(rex & REX_W))
4510 used_prefixes |= (prefixes & PREFIX_DATA);
4511 break;
4512 case 'H':
4513 if (intel_syntax)
4514 break;
4515 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4516 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4517 {
4518 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4519 *obufp++ = ',';
4520 *obufp++ = 'p';
4521 if (prefixes & PREFIX_DS)
4522 *obufp++ = 't';
4523 else
4524 *obufp++ = 'n';
4525 }
4526 break;
4527 case 'J':
4528 if (intel_syntax)
4529 break;
4530 *obufp++ = 'l';
4531 break;
4532 case 'K':
4533 USED_REX (REX_W);
4534 if (rex & REX_W)
4535 *obufp++ = 'q';
4536 else
4537 *obufp++ = 'd';
4538 break;
4539 case 'Z':
4540 if (intel_syntax)
4541 break;
4542 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4543 {
4544 *obufp++ = 'q';
4545 break;
4546 }
4547 /* Fall through. */
4548 case 'L':
4549 if (intel_syntax)
4550 break;
4551 if (sizeflag & SUFFIX_ALWAYS)
4552 *obufp++ = 'l';
4553 break;
4554 case 'N':
4555 if ((prefixes & PREFIX_FWAIT) == 0)
4556 *obufp++ = 'n';
4557 else
4558 used_prefixes |= PREFIX_FWAIT;
4559 break;
4560 case 'O':
4561 USED_REX (REX_W);
4562 if (rex & REX_W)
4563 *obufp++ = 'o';
4564 else if (intel_syntax && (sizeflag & DFLAG))
4565 *obufp++ = 'q';
4566 else
4567 *obufp++ = 'd';
4568 if (!(rex & REX_W))
4569 used_prefixes |= (prefixes & PREFIX_DATA);
4570 break;
4571 case 'T':
4572 if (intel_syntax)
4573 break;
4574 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4575 {
4576 *obufp++ = 'q';
4577 break;
4578 }
4579 /* Fall through. */
4580 case 'P':
4581 if (intel_syntax)
4582 break;
4583 if ((prefixes & PREFIX_DATA)
4584 || (rex & REX_W)
4585 || (sizeflag & SUFFIX_ALWAYS))
4586 {
4587 USED_REX (REX_W);
4588 if (rex & REX_W)
4589 *obufp++ = 'q';
4590 else
4591 {
4592 if (sizeflag & DFLAG)
4593 *obufp++ = 'l';
4594 else
4595 *obufp++ = 'w';
4596 }
4597 used_prefixes |= (prefixes & PREFIX_DATA);
4598 }
4599 break;
4600 case 'U':
4601 if (intel_syntax)
4602 break;
4603 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4604 {
4605 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4606 *obufp++ = 'q';
4607 break;
4608 }
4609 /* Fall through. */
4610 case 'Q':
4611 if (intel_syntax && !alt)
4612 break;
4613 USED_REX (REX_W);
4614 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4615 {
4616 if (rex & REX_W)
4617 *obufp++ = 'q';
4618 else
4619 {
4620 if (sizeflag & DFLAG)
4621 *obufp++ = intel_syntax ? 'd' : 'l';
4622 else
4623 *obufp++ = 'w';
4624 }
4625 used_prefixes |= (prefixes & PREFIX_DATA);
4626 }
4627 break;
4628 case 'R':
4629 USED_REX (REX_W);
4630 if (rex & REX_W)
4631 *obufp++ = 'q';
4632 else if (sizeflag & DFLAG)
4633 {
4634 if (intel_syntax)
4635 *obufp++ = 'd';
4636 else
4637 *obufp++ = 'l';
4638 }
4639 else
4640 *obufp++ = 'w';
4641 if (intel_syntax && !p[1]
4642 && ((rex & REX_W) || (sizeflag & DFLAG)))
4643 *obufp++ = 'e';
4644 if (!(rex & REX_W))
4645 used_prefixes |= (prefixes & PREFIX_DATA);
4646 break;
4647 case 'V':
4648 if (intel_syntax)
4649 break;
4650 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4651 {
4652 if (sizeflag & SUFFIX_ALWAYS)
4653 *obufp++ = 'q';
4654 break;
4655 }
4656 /* Fall through. */
4657 case 'S':
4658 if (intel_syntax)
4659 break;
4660 if (sizeflag & SUFFIX_ALWAYS)
4661 {
4662 if (rex & REX_W)
4663 *obufp++ = 'q';
4664 else
4665 {
4666 if (sizeflag & DFLAG)
4667 *obufp++ = 'l';
4668 else
4669 *obufp++ = 'w';
4670 used_prefixes |= (prefixes & PREFIX_DATA);
4671 }
4672 }
4673 break;
4674 case 'X':
4675 if (prefixes & PREFIX_DATA)
4676 *obufp++ = 'd';
4677 else
4678 *obufp++ = 's';
4679 used_prefixes |= (prefixes & PREFIX_DATA);
4680 break;
4681 case 'Y':
4682 if (intel_syntax)
4683 break;
4684 if (rex & REX_W)
4685 {
4686 USED_REX (REX_W);
4687 *obufp++ = 'q';
4688 }
4689 break;
4690 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4691 case 'W':
4692 /* operand size flag for cwtl, cbtw */
4693 USED_REX (REX_W);
4694 if (rex & REX_W)
4695 {
4696 if (intel_syntax)
4697 *obufp++ = 'd';
4698 else
4699 *obufp++ = 'l';
4700 }
4701 else if (sizeflag & DFLAG)
4702 *obufp++ = 'w';
4703 else
4704 *obufp++ = 'b';
4705 if (!(rex & REX_W))
4706 used_prefixes |= (prefixes & PREFIX_DATA);
4707 break;
4708 }
4709 alt = 0;
4710 }
4711 *obufp = 0;
4712 return 0;
4713 }
4714
4715 static void
4716 oappend (const char *s)
4717 {
4718 strcpy (obufp, s);
4719 obufp += strlen (s);
4720 }
4721
4722 static void
4723 append_seg (void)
4724 {
4725 if (prefixes & PREFIX_CS)
4726 {
4727 used_prefixes |= PREFIX_CS;
4728 oappend ("%cs:" + intel_syntax);
4729 }
4730 if (prefixes & PREFIX_DS)
4731 {
4732 used_prefixes |= PREFIX_DS;
4733 oappend ("%ds:" + intel_syntax);
4734 }
4735 if (prefixes & PREFIX_SS)
4736 {
4737 used_prefixes |= PREFIX_SS;
4738 oappend ("%ss:" + intel_syntax);
4739 }
4740 if (prefixes & PREFIX_ES)
4741 {
4742 used_prefixes |= PREFIX_ES;
4743 oappend ("%es:" + intel_syntax);
4744 }
4745 if (prefixes & PREFIX_FS)
4746 {
4747 used_prefixes |= PREFIX_FS;
4748 oappend ("%fs:" + intel_syntax);
4749 }
4750 if (prefixes & PREFIX_GS)
4751 {
4752 used_prefixes |= PREFIX_GS;
4753 oappend ("%gs:" + intel_syntax);
4754 }
4755 }
4756
4757 static void
4758 OP_indirE (int bytemode, int sizeflag)
4759 {
4760 if (!intel_syntax)
4761 oappend ("*");
4762 OP_E (bytemode, sizeflag);
4763 }
4764
4765 static void
4766 print_operand_value (char *buf, int hex, bfd_vma disp)
4767 {
4768 if (address_mode == mode_64bit)
4769 {
4770 if (hex)
4771 {
4772 char tmp[30];
4773 int i;
4774 buf[0] = '0';
4775 buf[1] = 'x';
4776 sprintf_vma (tmp, disp);
4777 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
4778 strcpy (buf + 2, tmp + i);
4779 }
4780 else
4781 {
4782 bfd_signed_vma v = disp;
4783 char tmp[30];
4784 int i;
4785 if (v < 0)
4786 {
4787 *(buf++) = '-';
4788 v = -disp;
4789 /* Check for possible overflow on 0x8000000000000000. */
4790 if (v < 0)
4791 {
4792 strcpy (buf, "9223372036854775808");
4793 return;
4794 }
4795 }
4796 if (!v)
4797 {
4798 strcpy (buf, "0");
4799 return;
4800 }
4801
4802 i = 0;
4803 tmp[29] = 0;
4804 while (v)
4805 {
4806 tmp[28 - i] = (v % 10) + '0';
4807 v /= 10;
4808 i++;
4809 }
4810 strcpy (buf, tmp + 29 - i);
4811 }
4812 }
4813 else
4814 {
4815 if (hex)
4816 sprintf (buf, "0x%x", (unsigned int) disp);
4817 else
4818 sprintf (buf, "%d", (int) disp);
4819 }
4820 }
4821
4822 /* Put DISP in BUF as signed hex number. */
4823
4824 static void
4825 print_displacement (char *buf, bfd_vma disp)
4826 {
4827 bfd_signed_vma val = disp;
4828 char tmp[30];
4829 int i, j = 0;
4830
4831 if (val < 0)
4832 {
4833 buf[j++] = '-';
4834 val = -disp;
4835
4836 /* Check for possible overflow. */
4837 if (val < 0)
4838 {
4839 switch (address_mode)
4840 {
4841 case mode_64bit:
4842 strcpy (buf + j, "0x8000000000000000");
4843 break;
4844 case mode_32bit:
4845 strcpy (buf + j, "0x80000000");
4846 break;
4847 case mode_16bit:
4848 strcpy (buf + j, "0x8000");
4849 break;
4850 }
4851 return;
4852 }
4853 }
4854
4855 buf[j++] = '0';
4856 buf[j++] = 'x';
4857
4858 sprintf_vma (tmp, val);
4859 for (i = 0; tmp[i] == '0'; i++)
4860 continue;
4861 if (tmp[i] == '\0')
4862 i--;
4863 strcpy (buf + j, tmp + i);
4864 }
4865
4866 static void
4867 intel_operand_size (int bytemode, int sizeflag)
4868 {
4869 switch (bytemode)
4870 {
4871 case b_mode:
4872 case dqb_mode:
4873 oappend ("BYTE PTR ");
4874 break;
4875 case w_mode:
4876 case dqw_mode:
4877 oappend ("WORD PTR ");
4878 break;
4879 case stack_v_mode:
4880 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4881 {
4882 oappend ("QWORD PTR ");
4883 used_prefixes |= (prefixes & PREFIX_DATA);
4884 break;
4885 }
4886 /* FALLTHRU */
4887 case v_mode:
4888 case dq_mode:
4889 USED_REX (REX_W);
4890 if (rex & REX_W)
4891 oappend ("QWORD PTR ");
4892 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4893 oappend ("DWORD PTR ");
4894 else
4895 oappend ("WORD PTR ");
4896 used_prefixes |= (prefixes & PREFIX_DATA);
4897 break;
4898 case z_mode:
4899 if ((rex & REX_W) || (sizeflag & DFLAG))
4900 *obufp++ = 'D';
4901 oappend ("WORD PTR ");
4902 if (!(rex & REX_W))
4903 used_prefixes |= (prefixes & PREFIX_DATA);
4904 break;
4905 case d_mode:
4906 case dqd_mode:
4907 oappend ("DWORD PTR ");
4908 break;
4909 case q_mode:
4910 oappend ("QWORD PTR ");
4911 break;
4912 case m_mode:
4913 if (address_mode == mode_64bit)
4914 oappend ("QWORD PTR ");
4915 else
4916 oappend ("DWORD PTR ");
4917 break;
4918 case f_mode:
4919 if (sizeflag & DFLAG)
4920 oappend ("FWORD PTR ");
4921 else
4922 oappend ("DWORD PTR ");
4923 used_prefixes |= (prefixes & PREFIX_DATA);
4924 break;
4925 case t_mode:
4926 oappend ("TBYTE PTR ");
4927 break;
4928 case x_mode:
4929 oappend ("XMMWORD PTR ");
4930 break;
4931 case o_mode:
4932 oappend ("OWORD PTR ");
4933 break;
4934 default:
4935 break;
4936 }
4937 }
4938
4939 static void
4940 OP_E (int bytemode, int sizeflag)
4941 {
4942 bfd_vma disp;
4943 int add = 0;
4944 int riprel = 0;
4945 USED_REX (REX_B);
4946 if (rex & REX_B)
4947 add += 8;
4948
4949 /* Skip mod/rm byte. */
4950 MODRM_CHECK;
4951 codep++;
4952
4953 if (modrm.mod == 3)
4954 {
4955 switch (bytemode)
4956 {
4957 case b_mode:
4958 USED_REX (0);
4959 if (rex)
4960 oappend (names8rex[modrm.rm + add]);
4961 else
4962 oappend (names8[modrm.rm + add]);
4963 break;
4964 case w_mode:
4965 oappend (names16[modrm.rm + add]);
4966 break;
4967 case d_mode:
4968 oappend (names32[modrm.rm + add]);
4969 break;
4970 case q_mode:
4971 oappend (names64[modrm.rm + add]);
4972 break;
4973 case m_mode:
4974 if (address_mode == mode_64bit)
4975 oappend (names64[modrm.rm + add]);
4976 else
4977 oappend (names32[modrm.rm + add]);
4978 break;
4979 case stack_v_mode:
4980 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4981 {
4982 oappend (names64[modrm.rm + add]);
4983 used_prefixes |= (prefixes & PREFIX_DATA);
4984 break;
4985 }
4986 bytemode = v_mode;
4987 /* FALLTHRU */
4988 case v_mode:
4989 case dq_mode:
4990 case dqb_mode:
4991 case dqd_mode:
4992 case dqw_mode:
4993 USED_REX (REX_W);
4994 if (rex & REX_W)
4995 oappend (names64[modrm.rm + add]);
4996 else if ((sizeflag & DFLAG) || bytemode != v_mode)
4997 oappend (names32[modrm.rm + add]);
4998 else
4999 oappend (names16[modrm.rm + add]);
5000 used_prefixes |= (prefixes & PREFIX_DATA);
5001 break;
5002 case 0:
5003 break;
5004 default:
5005 oappend (INTERNAL_DISASSEMBLER_ERROR);
5006 break;
5007 }
5008 return;
5009 }
5010
5011 disp = 0;
5012 if (intel_syntax)
5013 intel_operand_size (bytemode, sizeflag);
5014 append_seg ();
5015
5016 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5017 {
5018 /* 32/64 bit address mode */
5019 int havedisp;
5020 int havesib;
5021 int havebase;
5022 int base;
5023 int index = 0;
5024 int scale = 0;
5025
5026 havesib = 0;
5027 havebase = 1;
5028 base = modrm.rm;
5029
5030 if (base == 4)
5031 {
5032 havesib = 1;
5033 FETCH_DATA (the_info, codep + 1);
5034 index = (*codep >> 3) & 7;
5035 if (address_mode == mode_64bit || index != 0x4)
5036 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
5037 scale = (*codep >> 6) & 3;
5038 base = *codep & 7;
5039 USED_REX (REX_X);
5040 if (rex & REX_X)
5041 index += 8;
5042 codep++;
5043 }
5044 base += add;
5045
5046 switch (modrm.mod)
5047 {
5048 case 0:
5049 if ((base & 7) == 5)
5050 {
5051 havebase = 0;
5052 if (address_mode == mode_64bit && !havesib)
5053 riprel = 1;
5054 disp = get32s ();
5055 }
5056 break;
5057 case 1:
5058 FETCH_DATA (the_info, codep + 1);
5059 disp = *codep++;
5060 if ((disp & 0x80) != 0)
5061 disp -= 0x100;
5062 break;
5063 case 2:
5064 disp = get32s ();
5065 break;
5066 }
5067
5068 havedisp = havebase || (havesib && (index != 4 || scale != 0));
5069
5070 if (!intel_syntax)
5071 if (modrm.mod != 0 || (base & 7) == 5)
5072 {
5073 if (havedisp || riprel)
5074 print_displacement (scratchbuf, disp);
5075 else
5076 print_operand_value (scratchbuf, 1, disp);
5077 oappend (scratchbuf);
5078 if (riprel)
5079 {
5080 set_op (disp, 1);
5081 oappend ("(%rip)");
5082 }
5083 }
5084
5085 if (havedisp || (intel_syntax && riprel))
5086 {
5087 *obufp++ = open_char;
5088 if (intel_syntax && riprel)
5089 {
5090 set_op (disp, 1);
5091 oappend ("rip");
5092 }
5093 *obufp = '\0';
5094 if (havebase)
5095 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5096 ? names64[base] : names32[base]);
5097 if (havesib)
5098 {
5099 if (index != 4)
5100 {
5101 if (!intel_syntax || havebase)
5102 {
5103 *obufp++ = separator_char;
5104 *obufp = '\0';
5105 }
5106 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5107 ? names64[index] : names32[index]);
5108 }
5109 if (scale != 0 || (!intel_syntax && index != 4))
5110 {
5111 *obufp++ = scale_char;
5112 *obufp = '\0';
5113 sprintf (scratchbuf, "%d", 1 << scale);
5114 oappend (scratchbuf);
5115 }
5116 }
5117 if (intel_syntax
5118 && (disp || modrm.mod != 0 || (base & 7) == 5))
5119 {
5120 if ((bfd_signed_vma) disp >= 0)
5121 {
5122 *obufp++ = '+';
5123 *obufp = '\0';
5124 }
5125 else if (modrm.mod != 1)
5126 {
5127 *obufp++ = '-';
5128 *obufp = '\0';
5129 disp = - (bfd_signed_vma) disp;
5130 }
5131
5132 print_displacement (scratchbuf, disp);
5133 oappend (scratchbuf);
5134 }
5135
5136 *obufp++ = close_char;
5137 *obufp = '\0';
5138 }
5139 else if (intel_syntax)
5140 {
5141 if (modrm.mod != 0 || (base & 7) == 5)
5142 {
5143 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5144 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5145 ;
5146 else
5147 {
5148 oappend (names_seg[ds_reg - es_reg]);
5149 oappend (":");
5150 }
5151 print_operand_value (scratchbuf, 1, disp);
5152 oappend (scratchbuf);
5153 }
5154 }
5155 }
5156 else
5157 { /* 16 bit address mode */
5158 switch (modrm.mod)
5159 {
5160 case 0:
5161 if (modrm.rm == 6)
5162 {
5163 disp = get16 ();
5164 if ((disp & 0x8000) != 0)
5165 disp -= 0x10000;
5166 }
5167 break;
5168 case 1:
5169 FETCH_DATA (the_info, codep + 1);
5170 disp = *codep++;
5171 if ((disp & 0x80) != 0)
5172 disp -= 0x100;
5173 break;
5174 case 2:
5175 disp = get16 ();
5176 if ((disp & 0x8000) != 0)
5177 disp -= 0x10000;
5178 break;
5179 }
5180
5181 if (!intel_syntax)
5182 if (modrm.mod != 0 || modrm.rm == 6)
5183 {
5184 print_displacement (scratchbuf, disp);
5185 oappend (scratchbuf);
5186 }
5187
5188 if (modrm.mod != 0 || modrm.rm != 6)
5189 {
5190 *obufp++ = open_char;
5191 *obufp = '\0';
5192 oappend (index16[modrm.rm]);
5193 if (intel_syntax
5194 && (disp || modrm.mod != 0 || modrm.rm == 6))
5195 {
5196 if ((bfd_signed_vma) disp >= 0)
5197 {
5198 *obufp++ = '+';
5199 *obufp = '\0';
5200 }
5201 else if (modrm.mod != 1)
5202 {
5203 *obufp++ = '-';
5204 *obufp = '\0';
5205 disp = - (bfd_signed_vma) disp;
5206 }
5207
5208 print_displacement (scratchbuf, disp);
5209 oappend (scratchbuf);
5210 }
5211
5212 *obufp++ = close_char;
5213 *obufp = '\0';
5214 }
5215 else if (intel_syntax)
5216 {
5217 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5218 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5219 ;
5220 else
5221 {
5222 oappend (names_seg[ds_reg - es_reg]);
5223 oappend (":");
5224 }
5225 print_operand_value (scratchbuf, 1, disp & 0xffff);
5226 oappend (scratchbuf);
5227 }
5228 }
5229 }
5230
5231 static void
5232 OP_G (int bytemode, int sizeflag)
5233 {
5234 int add = 0;
5235 USED_REX (REX_R);
5236 if (rex & REX_R)
5237 add += 8;
5238 switch (bytemode)
5239 {
5240 case b_mode:
5241 USED_REX (0);
5242 if (rex)
5243 oappend (names8rex[modrm.reg + add]);
5244 else
5245 oappend (names8[modrm.reg + add]);
5246 break;
5247 case w_mode:
5248 oappend (names16[modrm.reg + add]);
5249 break;
5250 case d_mode:
5251 oappend (names32[modrm.reg + add]);
5252 break;
5253 case q_mode:
5254 oappend (names64[modrm.reg + add]);
5255 break;
5256 case v_mode:
5257 case dq_mode:
5258 case dqb_mode:
5259 case dqd_mode:
5260 case dqw_mode:
5261 USED_REX (REX_W);
5262 if (rex & REX_W)
5263 oappend (names64[modrm.reg + add]);
5264 else if ((sizeflag & DFLAG) || bytemode != v_mode)
5265 oappend (names32[modrm.reg + add]);
5266 else
5267 oappend (names16[modrm.reg + add]);
5268 used_prefixes |= (prefixes & PREFIX_DATA);
5269 break;
5270 case m_mode:
5271 if (address_mode == mode_64bit)
5272 oappend (names64[modrm.reg + add]);
5273 else
5274 oappend (names32[modrm.reg + add]);
5275 break;
5276 default:
5277 oappend (INTERNAL_DISASSEMBLER_ERROR);
5278 break;
5279 }
5280 }
5281
5282 static bfd_vma
5283 get64 (void)
5284 {
5285 bfd_vma x;
5286 #ifdef BFD64
5287 unsigned int a;
5288 unsigned int b;
5289
5290 FETCH_DATA (the_info, codep + 8);
5291 a = *codep++ & 0xff;
5292 a |= (*codep++ & 0xff) << 8;
5293 a |= (*codep++ & 0xff) << 16;
5294 a |= (*codep++ & 0xff) << 24;
5295 b = *codep++ & 0xff;
5296 b |= (*codep++ & 0xff) << 8;
5297 b |= (*codep++ & 0xff) << 16;
5298 b |= (*codep++ & 0xff) << 24;
5299 x = a + ((bfd_vma) b << 32);
5300 #else
5301 abort ();
5302 x = 0;
5303 #endif
5304 return x;
5305 }
5306
5307 static bfd_signed_vma
5308 get32 (void)
5309 {
5310 bfd_signed_vma x = 0;
5311
5312 FETCH_DATA (the_info, codep + 4);
5313 x = *codep++ & (bfd_signed_vma) 0xff;
5314 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5315 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5316 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5317 return x;
5318 }
5319
5320 static bfd_signed_vma
5321 get32s (void)
5322 {
5323 bfd_signed_vma x = 0;
5324
5325 FETCH_DATA (the_info, codep + 4);
5326 x = *codep++ & (bfd_signed_vma) 0xff;
5327 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5328 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5329 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5330
5331 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5332
5333 return x;
5334 }
5335
5336 static int
5337 get16 (void)
5338 {
5339 int x = 0;
5340
5341 FETCH_DATA (the_info, codep + 2);
5342 x = *codep++ & 0xff;
5343 x |= (*codep++ & 0xff) << 8;
5344 return x;
5345 }
5346
5347 static void
5348 set_op (bfd_vma op, int riprel)
5349 {
5350 op_index[op_ad] = op_ad;
5351 if (address_mode == mode_64bit)
5352 {
5353 op_address[op_ad] = op;
5354 op_riprel[op_ad] = riprel;
5355 }
5356 else
5357 {
5358 /* Mask to get a 32-bit address. */
5359 op_address[op_ad] = op & 0xffffffff;
5360 op_riprel[op_ad] = riprel & 0xffffffff;
5361 }
5362 }
5363
5364 static void
5365 OP_REG (int code, int sizeflag)
5366 {
5367 const char *s;
5368 int add = 0;
5369 USED_REX (REX_B);
5370 if (rex & REX_B)
5371 add = 8;
5372
5373 switch (code)
5374 {
5375 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5376 case sp_reg: case bp_reg: case si_reg: case di_reg:
5377 s = names16[code - ax_reg + add];
5378 break;
5379 case es_reg: case ss_reg: case cs_reg:
5380 case ds_reg: case fs_reg: case gs_reg:
5381 s = names_seg[code - es_reg + add];
5382 break;
5383 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5384 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5385 USED_REX (0);
5386 if (rex)
5387 s = names8rex[code - al_reg + add];
5388 else
5389 s = names8[code - al_reg];
5390 break;
5391 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5392 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
5393 if (address_mode == mode_64bit && (sizeflag & DFLAG))
5394 {
5395 s = names64[code - rAX_reg + add];
5396 break;
5397 }
5398 code += eAX_reg - rAX_reg;
5399 /* Fall through. */
5400 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5401 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5402 USED_REX (REX_W);
5403 if (rex & REX_W)
5404 s = names64[code - eAX_reg + add];
5405 else if (sizeflag & DFLAG)
5406 s = names32[code - eAX_reg + add];
5407 else
5408 s = names16[code - eAX_reg + add];
5409 used_prefixes |= (prefixes & PREFIX_DATA);
5410 break;
5411 default:
5412 s = INTERNAL_DISASSEMBLER_ERROR;
5413 break;
5414 }
5415 oappend (s);
5416 }
5417
5418 static void
5419 OP_IMREG (int code, int sizeflag)
5420 {
5421 const char *s;
5422
5423 switch (code)
5424 {
5425 case indir_dx_reg:
5426 if (intel_syntax)
5427 s = "dx";
5428 else
5429 s = "(%dx)";
5430 break;
5431 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5432 case sp_reg: case bp_reg: case si_reg: case di_reg:
5433 s = names16[code - ax_reg];
5434 break;
5435 case es_reg: case ss_reg: case cs_reg:
5436 case ds_reg: case fs_reg: case gs_reg:
5437 s = names_seg[code - es_reg];
5438 break;
5439 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5440 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5441 USED_REX (0);
5442 if (rex)
5443 s = names8rex[code - al_reg];
5444 else
5445 s = names8[code - al_reg];
5446 break;
5447 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5448 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5449 USED_REX (REX_W);
5450 if (rex & REX_W)
5451 s = names64[code - eAX_reg];
5452 else if (sizeflag & DFLAG)
5453 s = names32[code - eAX_reg];
5454 else
5455 s = names16[code - eAX_reg];
5456 used_prefixes |= (prefixes & PREFIX_DATA);
5457 break;
5458 case z_mode_ax_reg:
5459 if ((rex & REX_W) || (sizeflag & DFLAG))
5460 s = *names32;
5461 else
5462 s = *names16;
5463 if (!(rex & REX_W))
5464 used_prefixes |= (prefixes & PREFIX_DATA);
5465 break;
5466 default:
5467 s = INTERNAL_DISASSEMBLER_ERROR;
5468 break;
5469 }
5470 oappend (s);
5471 }
5472
5473 static void
5474 OP_I (int bytemode, int sizeflag)
5475 {
5476 bfd_signed_vma op;
5477 bfd_signed_vma mask = -1;
5478
5479 switch (bytemode)
5480 {
5481 case b_mode:
5482 FETCH_DATA (the_info, codep + 1);
5483 op = *codep++;
5484 mask = 0xff;
5485 break;
5486 case q_mode:
5487 if (address_mode == mode_64bit)
5488 {
5489 op = get32s ();
5490 break;
5491 }
5492 /* Fall through. */
5493 case v_mode:
5494 USED_REX (REX_W);
5495 if (rex & REX_W)
5496 op = get32s ();
5497 else if (sizeflag & DFLAG)
5498 {
5499 op = get32 ();
5500 mask = 0xffffffff;
5501 }
5502 else
5503 {
5504 op = get16 ();
5505 mask = 0xfffff;
5506 }
5507 used_prefixes |= (prefixes & PREFIX_DATA);
5508 break;
5509 case w_mode:
5510 mask = 0xfffff;
5511 op = get16 ();
5512 break;
5513 case const_1_mode:
5514 if (intel_syntax)
5515 oappend ("1");
5516 return;
5517 default:
5518 oappend (INTERNAL_DISASSEMBLER_ERROR);
5519 return;
5520 }
5521
5522 op &= mask;
5523 scratchbuf[0] = '$';
5524 print_operand_value (scratchbuf + 1, 1, op);
5525 oappend (scratchbuf + intel_syntax);
5526 scratchbuf[0] = '\0';
5527 }
5528
5529 static void
5530 OP_I64 (int bytemode, int sizeflag)
5531 {
5532 bfd_signed_vma op;
5533 bfd_signed_vma mask = -1;
5534
5535 if (address_mode != mode_64bit)
5536 {
5537 OP_I (bytemode, sizeflag);
5538 return;
5539 }
5540
5541 switch (bytemode)
5542 {
5543 case b_mode:
5544 FETCH_DATA (the_info, codep + 1);
5545 op = *codep++;
5546 mask = 0xff;
5547 break;
5548 case v_mode:
5549 USED_REX (REX_W);
5550 if (rex & REX_W)
5551 op = get64 ();
5552 else if (sizeflag & DFLAG)
5553 {
5554 op = get32 ();
5555 mask = 0xffffffff;
5556 }
5557 else
5558 {
5559 op = get16 ();
5560 mask = 0xfffff;
5561 }
5562 used_prefixes |= (prefixes & PREFIX_DATA);
5563 break;
5564 case w_mode:
5565 mask = 0xfffff;
5566 op = get16 ();
5567 break;
5568 default:
5569 oappend (INTERNAL_DISASSEMBLER_ERROR);
5570 return;
5571 }
5572
5573 op &= mask;
5574 scratchbuf[0] = '$';
5575 print_operand_value (scratchbuf + 1, 1, op);
5576 oappend (scratchbuf + intel_syntax);
5577 scratchbuf[0] = '\0';
5578 }
5579
5580 static void
5581 OP_sI (int bytemode, int sizeflag)
5582 {
5583 bfd_signed_vma op;
5584 bfd_signed_vma mask = -1;
5585
5586 switch (bytemode)
5587 {
5588 case b_mode:
5589 FETCH_DATA (the_info, codep + 1);
5590 op = *codep++;
5591 if ((op & 0x80) != 0)
5592 op -= 0x100;
5593 mask = 0xffffffff;
5594 break;
5595 case v_mode:
5596 USED_REX (REX_W);
5597 if (rex & REX_W)
5598 op = get32s ();
5599 else if (sizeflag & DFLAG)
5600 {
5601 op = get32s ();
5602 mask = 0xffffffff;
5603 }
5604 else
5605 {
5606 mask = 0xffffffff;
5607 op = get16 ();
5608 if ((op & 0x8000) != 0)
5609 op -= 0x10000;
5610 }
5611 used_prefixes |= (prefixes & PREFIX_DATA);
5612 break;
5613 case w_mode:
5614 op = get16 ();
5615 mask = 0xffffffff;
5616 if ((op & 0x8000) != 0)
5617 op -= 0x10000;
5618 break;
5619 default:
5620 oappend (INTERNAL_DISASSEMBLER_ERROR);
5621 return;
5622 }
5623
5624 scratchbuf[0] = '$';
5625 print_operand_value (scratchbuf + 1, 1, op);
5626 oappend (scratchbuf + intel_syntax);
5627 }
5628
5629 static void
5630 OP_J (int bytemode, int sizeflag)
5631 {
5632 bfd_vma disp;
5633 bfd_vma mask = -1;
5634 bfd_vma segment = 0;
5635
5636 switch (bytemode)
5637 {
5638 case b_mode:
5639 FETCH_DATA (the_info, codep + 1);
5640 disp = *codep++;
5641 if ((disp & 0x80) != 0)
5642 disp -= 0x100;
5643 break;
5644 case v_mode:
5645 if ((sizeflag & DFLAG) || (rex & REX_W))
5646 disp = get32s ();
5647 else
5648 {
5649 disp = get16 ();
5650 if ((disp & 0x8000) != 0)
5651 disp -= 0x10000;
5652 /* In 16bit mode, address is wrapped around at 64k within
5653 the same segment. Otherwise, a data16 prefix on a jump
5654 instruction means that the pc is masked to 16 bits after
5655 the displacement is added! */
5656 mask = 0xffff;
5657 if ((prefixes & PREFIX_DATA) == 0)
5658 segment = ((start_pc + codep - start_codep)
5659 & ~((bfd_vma) 0xffff));
5660 }
5661 used_prefixes |= (prefixes & PREFIX_DATA);
5662 break;
5663 default:
5664 oappend (INTERNAL_DISASSEMBLER_ERROR);
5665 return;
5666 }
5667 disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
5668 set_op (disp, 0);
5669 print_operand_value (scratchbuf, 1, disp);
5670 oappend (scratchbuf);
5671 }
5672
5673 static void
5674 OP_SEG (int bytemode, int sizeflag)
5675 {
5676 if (bytemode == w_mode)
5677 oappend (names_seg[modrm.reg]);
5678 else
5679 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
5680 }
5681
5682 static void
5683 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
5684 {
5685 int seg, offset;
5686
5687 if (sizeflag & DFLAG)
5688 {
5689 offset = get32 ();
5690 seg = get16 ();
5691 }
5692 else
5693 {
5694 offset = get16 ();
5695 seg = get16 ();
5696 }
5697 used_prefixes |= (prefixes & PREFIX_DATA);
5698 if (intel_syntax)
5699 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
5700 else
5701 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
5702 oappend (scratchbuf);
5703 }
5704
5705 static void
5706 OP_OFF (int bytemode, int sizeflag)
5707 {
5708 bfd_vma off;
5709
5710 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5711 intel_operand_size (bytemode, sizeflag);
5712 append_seg ();
5713
5714 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5715 off = get32 ();
5716 else
5717 off = get16 ();
5718
5719 if (intel_syntax)
5720 {
5721 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5722 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5723 {
5724 oappend (names_seg[ds_reg - es_reg]);
5725 oappend (":");
5726 }
5727 }
5728 print_operand_value (scratchbuf, 1, off);
5729 oappend (scratchbuf);
5730 }
5731
5732 static void
5733 OP_OFF64 (int bytemode, int sizeflag)
5734 {
5735 bfd_vma off;
5736
5737 if (address_mode != mode_64bit
5738 || (prefixes & PREFIX_ADDR))
5739 {
5740 OP_OFF (bytemode, sizeflag);
5741 return;
5742 }
5743
5744 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5745 intel_operand_size (bytemode, sizeflag);
5746 append_seg ();
5747
5748 off = get64 ();
5749
5750 if (intel_syntax)
5751 {
5752 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5753 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5754 {
5755 oappend (names_seg[ds_reg - es_reg]);
5756 oappend (":");
5757 }
5758 }
5759 print_operand_value (scratchbuf, 1, off);
5760 oappend (scratchbuf);
5761 }
5762
5763 static void
5764 ptr_reg (int code, int sizeflag)
5765 {
5766 const char *s;
5767
5768 *obufp++ = open_char;
5769 used_prefixes |= (prefixes & PREFIX_ADDR);
5770 if (address_mode == mode_64bit)
5771 {
5772 if (!(sizeflag & AFLAG))
5773 s = names32[code - eAX_reg];
5774 else
5775 s = names64[code - eAX_reg];
5776 }
5777 else if (sizeflag & AFLAG)
5778 s = names32[code - eAX_reg];
5779 else
5780 s = names16[code - eAX_reg];
5781 oappend (s);
5782 *obufp++ = close_char;
5783 *obufp = 0;
5784 }
5785
5786 static void
5787 OP_ESreg (int code, int sizeflag)
5788 {
5789 if (intel_syntax)
5790 {
5791 switch (codep[-1])
5792 {
5793 case 0x6d: /* insw/insl */
5794 intel_operand_size (z_mode, sizeflag);
5795 break;
5796 case 0xa5: /* movsw/movsl/movsq */
5797 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5798 case 0xab: /* stosw/stosl */
5799 case 0xaf: /* scasw/scasl */
5800 intel_operand_size (v_mode, sizeflag);
5801 break;
5802 default:
5803 intel_operand_size (b_mode, sizeflag);
5804 }
5805 }
5806 oappend ("%es:" + intel_syntax);
5807 ptr_reg (code, sizeflag);
5808 }
5809
5810 static void
5811 OP_DSreg (int code, int sizeflag)
5812 {
5813 if (intel_syntax)
5814 {
5815 switch (codep[-1])
5816 {
5817 case 0x6f: /* outsw/outsl */
5818 intel_operand_size (z_mode, sizeflag);
5819 break;
5820 case 0xa5: /* movsw/movsl/movsq */
5821 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5822 case 0xad: /* lodsw/lodsl/lodsq */
5823 intel_operand_size (v_mode, sizeflag);
5824 break;
5825 default:
5826 intel_operand_size (b_mode, sizeflag);
5827 }
5828 }
5829 if ((prefixes
5830 & (PREFIX_CS
5831 | PREFIX_DS
5832 | PREFIX_SS
5833 | PREFIX_ES
5834 | PREFIX_FS
5835 | PREFIX_GS)) == 0)
5836 prefixes |= PREFIX_DS;
5837 append_seg ();
5838 ptr_reg (code, sizeflag);
5839 }
5840
5841 static void
5842 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5843 {
5844 int add = 0;
5845 if (rex & REX_R)
5846 {
5847 USED_REX (REX_R);
5848 add = 8;
5849 }
5850 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
5851 {
5852 lock_prefix = NULL;
5853 used_prefixes |= PREFIX_LOCK;
5854 add = 8;
5855 }
5856 sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
5857 oappend (scratchbuf + intel_syntax);
5858 }
5859
5860 static void
5861 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5862 {
5863 int add = 0;
5864 USED_REX (REX_R);
5865 if (rex & REX_R)
5866 add = 8;
5867 if (intel_syntax)
5868 sprintf (scratchbuf, "db%d", modrm.reg + add);
5869 else
5870 sprintf (scratchbuf, "%%db%d", modrm.reg + add);
5871 oappend (scratchbuf);
5872 }
5873
5874 static void
5875 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5876 {
5877 sprintf (scratchbuf, "%%tr%d", modrm.reg);
5878 oappend (scratchbuf + intel_syntax);
5879 }
5880
5881 static void
5882 OP_R (int bytemode, int sizeflag)
5883 {
5884 if (modrm.mod == 3)
5885 OP_E (bytemode, sizeflag);
5886 else
5887 BadOp ();
5888 }
5889
5890 static void
5891 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5892 {
5893 used_prefixes |= (prefixes & PREFIX_DATA);
5894 if (prefixes & PREFIX_DATA)
5895 {
5896 int add = 0;
5897 USED_REX (REX_R);
5898 if (rex & REX_R)
5899 add = 8;
5900 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
5901 }
5902 else
5903 sprintf (scratchbuf, "%%mm%d", modrm.reg);
5904 oappend (scratchbuf + intel_syntax);
5905 }
5906
5907 static void
5908 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5909 {
5910 int add = 0;
5911 USED_REX (REX_R);
5912 if (rex & REX_R)
5913 add = 8;
5914 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
5915 oappend (scratchbuf + intel_syntax);
5916 }
5917
5918 static void
5919 OP_EM (int bytemode, int sizeflag)
5920 {
5921 if (modrm.mod != 3)
5922 {
5923 if (intel_syntax && bytemode == v_mode)
5924 {
5925 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5926 used_prefixes |= (prefixes & PREFIX_DATA);
5927 }
5928 OP_E (bytemode, sizeflag);
5929 return;
5930 }
5931
5932 /* Skip mod/rm byte. */
5933 MODRM_CHECK;
5934 codep++;
5935 used_prefixes |= (prefixes & PREFIX_DATA);
5936 if (prefixes & PREFIX_DATA)
5937 {
5938 int add = 0;
5939
5940 USED_REX (REX_B);
5941 if (rex & REX_B)
5942 add = 8;
5943 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
5944 }
5945 else
5946 sprintf (scratchbuf, "%%mm%d", modrm.rm);
5947 oappend (scratchbuf + intel_syntax);
5948 }
5949
5950 /* cvt* are the only instructions in sse2 which have
5951 both SSE and MMX operands and also have 0x66 prefix
5952 in their opcode. 0x66 was originally used to differentiate
5953 between SSE and MMX instruction(operands). So we have to handle the
5954 cvt* separately using OP_EMC and OP_MXC */
5955 static void
5956 OP_EMC (int bytemode, int sizeflag)
5957 {
5958 if (modrm.mod != 3)
5959 {
5960 if (intel_syntax && bytemode == v_mode)
5961 {
5962 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5963 used_prefixes |= (prefixes & PREFIX_DATA);
5964 }
5965 OP_E (bytemode, sizeflag);
5966 return;
5967 }
5968
5969 /* Skip mod/rm byte. */
5970 MODRM_CHECK;
5971 codep++;
5972 used_prefixes |= (prefixes & PREFIX_DATA);
5973 sprintf (scratchbuf, "%%mm%d", modrm.rm);
5974 oappend (scratchbuf + intel_syntax);
5975 }
5976
5977 static void
5978 OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5979 {
5980 used_prefixes |= (prefixes & PREFIX_DATA);
5981 sprintf (scratchbuf, "%%mm%d", modrm.reg);
5982 oappend (scratchbuf + intel_syntax);
5983 }
5984
5985 static void
5986 OP_EX (int bytemode, int sizeflag)
5987 {
5988 int add = 0;
5989 if (modrm.mod != 3)
5990 {
5991 OP_E (bytemode, sizeflag);
5992 return;
5993 }
5994 USED_REX (REX_B);
5995 if (rex & REX_B)
5996 add = 8;
5997
5998 /* Skip mod/rm byte. */
5999 MODRM_CHECK;
6000 codep++;
6001 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
6002 oappend (scratchbuf + intel_syntax);
6003 }
6004
6005 static void
6006 OP_MS (int bytemode, int sizeflag)
6007 {
6008 if (modrm.mod == 3)
6009 OP_EM (bytemode, sizeflag);
6010 else
6011 BadOp ();
6012 }
6013
6014 static void
6015 OP_XS (int bytemode, int sizeflag)
6016 {
6017 if (modrm.mod == 3)
6018 OP_EX (bytemode, sizeflag);
6019 else
6020 BadOp ();
6021 }
6022
6023 static void
6024 OP_M (int bytemode, int sizeflag)
6025 {
6026 if (modrm.mod == 3)
6027 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
6028 BadOp ();
6029 else
6030 OP_E (bytemode, sizeflag);
6031 }
6032
6033 static void
6034 OP_0f07 (int bytemode, int sizeflag)
6035 {
6036 if (modrm.mod != 3 || modrm.rm != 0)
6037 BadOp ();
6038 else
6039 OP_E (bytemode, sizeflag);
6040 }
6041
6042 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6043 32bit mode and "xchg %rax,%rax" in 64bit mode. */
6044
6045 static void
6046 NOP_Fixup1 (int bytemode, int sizeflag)
6047 {
6048 if ((prefixes & PREFIX_DATA) != 0
6049 || (rex != 0
6050 && rex != 0x48
6051 && address_mode == mode_64bit))
6052 OP_REG (bytemode, sizeflag);
6053 else
6054 strcpy (obuf, "nop");
6055 }
6056
6057 static void
6058 NOP_Fixup2 (int bytemode, int sizeflag)
6059 {
6060 if ((prefixes & PREFIX_DATA) != 0
6061 || (rex != 0
6062 && rex != 0x48
6063 && address_mode == mode_64bit))
6064 OP_IMREG (bytemode, sizeflag);
6065 }
6066
6067 static const char *const Suffix3DNow[] = {
6068 /* 00 */ NULL, NULL, NULL, NULL,
6069 /* 04 */ NULL, NULL, NULL, NULL,
6070 /* 08 */ NULL, NULL, NULL, NULL,
6071 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
6072 /* 10 */ NULL, NULL, NULL, NULL,
6073 /* 14 */ NULL, NULL, NULL, NULL,
6074 /* 18 */ NULL, NULL, NULL, NULL,
6075 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
6076 /* 20 */ NULL, NULL, NULL, NULL,
6077 /* 24 */ NULL, NULL, NULL, NULL,
6078 /* 28 */ NULL, NULL, NULL, NULL,
6079 /* 2C */ NULL, NULL, NULL, NULL,
6080 /* 30 */ NULL, NULL, NULL, NULL,
6081 /* 34 */ NULL, NULL, NULL, NULL,
6082 /* 38 */ NULL, NULL, NULL, NULL,
6083 /* 3C */ NULL, NULL, NULL, NULL,
6084 /* 40 */ NULL, NULL, NULL, NULL,
6085 /* 44 */ NULL, NULL, NULL, NULL,
6086 /* 48 */ NULL, NULL, NULL, NULL,
6087 /* 4C */ NULL, NULL, NULL, NULL,
6088 /* 50 */ NULL, NULL, NULL, NULL,
6089 /* 54 */ NULL, NULL, NULL, NULL,
6090 /* 58 */ NULL, NULL, NULL, NULL,
6091 /* 5C */ NULL, NULL, NULL, NULL,
6092 /* 60 */ NULL, NULL, NULL, NULL,
6093 /* 64 */ NULL, NULL, NULL, NULL,
6094 /* 68 */ NULL, NULL, NULL, NULL,
6095 /* 6C */ NULL, NULL, NULL, NULL,
6096 /* 70 */ NULL, NULL, NULL, NULL,
6097 /* 74 */ NULL, NULL, NULL, NULL,
6098 /* 78 */ NULL, NULL, NULL, NULL,
6099 /* 7C */ NULL, NULL, NULL, NULL,
6100 /* 80 */ NULL, NULL, NULL, NULL,
6101 /* 84 */ NULL, NULL, NULL, NULL,
6102 /* 88 */ NULL, NULL, "pfnacc", NULL,
6103 /* 8C */ NULL, NULL, "pfpnacc", NULL,
6104 /* 90 */ "pfcmpge", NULL, NULL, NULL,
6105 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
6106 /* 98 */ NULL, NULL, "pfsub", NULL,
6107 /* 9C */ NULL, NULL, "pfadd", NULL,
6108 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
6109 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
6110 /* A8 */ NULL, NULL, "pfsubr", NULL,
6111 /* AC */ NULL, NULL, "pfacc", NULL,
6112 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
6113 /* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw",
6114 /* B8 */ NULL, NULL, NULL, "pswapd",
6115 /* BC */ NULL, NULL, NULL, "pavgusb",
6116 /* C0 */ NULL, NULL, NULL, NULL,
6117 /* C4 */ NULL, NULL, NULL, NULL,
6118 /* C8 */ NULL, NULL, NULL, NULL,
6119 /* CC */ NULL, NULL, NULL, NULL,
6120 /* D0 */ NULL, NULL, NULL, NULL,
6121 /* D4 */ NULL, NULL, NULL, NULL,
6122 /* D8 */ NULL, NULL, NULL, NULL,
6123 /* DC */ NULL, NULL, NULL, NULL,
6124 /* E0 */ NULL, NULL, NULL, NULL,
6125 /* E4 */ NULL, NULL, NULL, NULL,
6126 /* E8 */ NULL, NULL, NULL, NULL,
6127 /* EC */ NULL, NULL, NULL, NULL,
6128 /* F0 */ NULL, NULL, NULL, NULL,
6129 /* F4 */ NULL, NULL, NULL, NULL,
6130 /* F8 */ NULL, NULL, NULL, NULL,
6131 /* FC */ NULL, NULL, NULL, NULL,
6132 };
6133
6134 static void
6135 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6136 {
6137 const char *mnemonic;
6138
6139 FETCH_DATA (the_info, codep + 1);
6140 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6141 place where an 8-bit immediate would normally go. ie. the last
6142 byte of the instruction. */
6143 obufp = obuf + strlen (obuf);
6144 mnemonic = Suffix3DNow[*codep++ & 0xff];
6145 if (mnemonic)
6146 oappend (mnemonic);
6147 else
6148 {
6149 /* Since a variable sized modrm/sib chunk is between the start
6150 of the opcode (0x0f0f) and the opcode suffix, we need to do
6151 all the modrm processing first, and don't know until now that
6152 we have a bad opcode. This necessitates some cleaning up. */
6153 op_out[0][0] = '\0';
6154 op_out[1][0] = '\0';
6155 BadOp ();
6156 }
6157 }
6158
6159 static const char *simd_cmp_op[] = {
6160 "eq",
6161 "lt",
6162 "le",
6163 "unord",
6164 "neq",
6165 "nlt",
6166 "nle",
6167 "ord"
6168 };
6169
6170 static void
6171 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6172 {
6173 unsigned int cmp_type;
6174
6175 FETCH_DATA (the_info, codep + 1);
6176 obufp = obuf + strlen (obuf);
6177 cmp_type = *codep++ & 0xff;
6178 if (cmp_type < 8)
6179 {
6180 char suffix1 = 'p', suffix2 = 's';
6181 used_prefixes |= (prefixes & PREFIX_REPZ);
6182 if (prefixes & PREFIX_REPZ)
6183 suffix1 = 's';
6184 else
6185 {
6186 used_prefixes |= (prefixes & PREFIX_DATA);
6187 if (prefixes & PREFIX_DATA)
6188 suffix2 = 'd';
6189 else
6190 {
6191 used_prefixes |= (prefixes & PREFIX_REPNZ);
6192 if (prefixes & PREFIX_REPNZ)
6193 suffix1 = 's', suffix2 = 'd';
6194 }
6195 }
6196 sprintf (scratchbuf, "cmp%s%c%c",
6197 simd_cmp_op[cmp_type], suffix1, suffix2);
6198 used_prefixes |= (prefixes & PREFIX_REPZ);
6199 oappend (scratchbuf);
6200 }
6201 else
6202 {
6203 /* We have a bad extension byte. Clean up. */
6204 op_out[0][0] = '\0';
6205 op_out[1][0] = '\0';
6206 BadOp ();
6207 }
6208 }
6209
6210 static void
6211 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
6212 {
6213 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6214 forms of these instructions. */
6215 if (modrm.mod == 3)
6216 {
6217 char *p = obuf + strlen (obuf);
6218 *(p + 1) = '\0';
6219 *p = *(p - 1);
6220 *(p - 1) = *(p - 2);
6221 *(p - 2) = *(p - 3);
6222 *(p - 3) = extrachar;
6223 }
6224 }
6225
6226 static void
6227 OP_Mwait (int bytemode ATTRIBUTE_UNUSED,
6228 int sizeflag ATTRIBUTE_UNUSED)
6229 {
6230 /* mwait %eax,%ecx */
6231 if (!intel_syntax)
6232 {
6233 const char **names = (address_mode == mode_64bit
6234 ? names64 : names32);
6235 strcpy (op_out[0], names[0]);
6236 strcpy (op_out[1], names[1]);
6237 two_source_ops = 1;
6238 }
6239 /* Skip mod/rm byte. */
6240 MODRM_CHECK;
6241 codep++;
6242 }
6243
6244 static void
6245 OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
6246 int sizeflag ATTRIBUTE_UNUSED)
6247 {
6248 /* monitor %eax,%ecx,%edx" */
6249 if (!intel_syntax)
6250 {
6251 const char **op1_names;
6252 const char **names = (address_mode == mode_64bit
6253 ? names64 : names32);
6254
6255 if (!(prefixes & PREFIX_ADDR))
6256 op1_names = (address_mode == mode_16bit
6257 ? names16 : names);
6258 else
6259 {
6260 /* Remove "addr16/addr32". */
6261 addr_prefix = NULL;
6262 op1_names = (address_mode != mode_32bit
6263 ? names32 : names16);
6264 used_prefixes |= PREFIX_ADDR;
6265 }
6266 strcpy (op_out[0], op1_names[0]);
6267 strcpy (op_out[1], names[1]);
6268 strcpy (op_out[2], names[2]);
6269 two_source_ops = 1;
6270 }
6271 /* Skip mod/rm byte. */
6272 MODRM_CHECK;
6273 codep++;
6274 }
6275
6276 static void
6277 SVME_Fixup (int bytemode, int sizeflag)
6278 {
6279 const char *alt;
6280 char *p;
6281
6282 switch (*codep)
6283 {
6284 case 0xd8:
6285 alt = "vmrun";
6286 break;
6287 case 0xd9:
6288 alt = "vmmcall";
6289 break;
6290 case 0xda:
6291 alt = "vmload";
6292 break;
6293 case 0xdb:
6294 alt = "vmsave";
6295 break;
6296 case 0xdc:
6297 alt = "stgi";
6298 break;
6299 case 0xdd:
6300 alt = "clgi";
6301 break;
6302 case 0xde:
6303 alt = "skinit";
6304 break;
6305 case 0xdf:
6306 alt = "invlpga";
6307 break;
6308 default:
6309 OP_M (bytemode, sizeflag);
6310 return;
6311 }
6312 /* Override "lidt". */
6313 p = obuf + strlen (obuf) - 4;
6314 /* We might have a suffix. */
6315 if (*p == 'i')
6316 --p;
6317 strcpy (p, alt);
6318 if (!(prefixes & PREFIX_ADDR))
6319 {
6320 ++codep;
6321 return;
6322 }
6323 used_prefixes |= PREFIX_ADDR;
6324 switch (*codep++)
6325 {
6326 case 0xdf:
6327 strcpy (op_out[1], names32[1]);
6328 two_source_ops = 1;
6329 /* Fall through. */
6330 case 0xd8:
6331 case 0xda:
6332 case 0xdb:
6333 *obufp++ = open_char;
6334 if (address_mode == mode_64bit || (sizeflag & AFLAG))
6335 alt = names32[0];
6336 else
6337 alt = names16[0];
6338 strcpy (obufp, alt);
6339 obufp += strlen (alt);
6340 *obufp++ = close_char;
6341 *obufp = '\0';
6342 break;
6343 }
6344 }
6345
6346 static void
6347 INVLPG_Fixup (int bytemode, int sizeflag)
6348 {
6349 const char *alt;
6350
6351 switch (*codep)
6352 {
6353 case 0xf8:
6354 alt = "swapgs";
6355 break;
6356 case 0xf9:
6357 alt = "rdtscp";
6358 break;
6359 default:
6360 OP_M (bytemode, sizeflag);
6361 return;
6362 }
6363 /* Override "invlpg". */
6364 strcpy (obuf + strlen (obuf) - 6, alt);
6365 codep++;
6366 }
6367
6368 static void
6369 BadOp (void)
6370 {
6371 /* Throw away prefixes and 1st. opcode byte. */
6372 codep = insn_codep + 1;
6373 oappend ("(bad)");
6374 }
6375
6376 static void
6377 REP_Fixup (int bytemode, int sizeflag)
6378 {
6379 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6380 lods and stos. */
6381 if (prefixes & PREFIX_REPZ)
6382 repz_prefix = "rep ";
6383
6384 switch (bytemode)
6385 {
6386 case al_reg:
6387 case eAX_reg:
6388 case indir_dx_reg:
6389 OP_IMREG (bytemode, sizeflag);
6390 break;
6391 case eDI_reg:
6392 OP_ESreg (bytemode, sizeflag);
6393 break;
6394 case eSI_reg:
6395 OP_DSreg (bytemode, sizeflag);
6396 break;
6397 default:
6398 abort ();
6399 break;
6400 }
6401 }
6402
6403 static void
6404 CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6405 {
6406 USED_REX (REX_W);
6407 if (rex & REX_W)
6408 {
6409 /* Change cmpxchg8b to cmpxchg16b. */
6410 char *p = obuf + strlen (obuf) - 2;
6411 strcpy (p, "16b");
6412 bytemode = o_mode;
6413 }
6414 OP_M (bytemode, sizeflag);
6415 }
6416
6417 static void
6418 XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6419 {
6420 sprintf (scratchbuf, "%%xmm%d", reg);
6421 oappend (scratchbuf + intel_syntax);
6422 }
6423
6424 static void
6425 CRC32_Fixup (int bytemode, int sizeflag)
6426 {
6427 /* Add proper suffix to "crc32". */
6428 char *p = obuf + strlen (obuf);
6429
6430 switch (bytemode)
6431 {
6432 case b_mode:
6433 if (intel_syntax)
6434 break;
6435
6436 *p++ = 'b';
6437 break;
6438 case v_mode:
6439 if (intel_syntax)
6440 break;
6441
6442 USED_REX (REX_W);
6443 if (rex & REX_W)
6444 *p++ = 'q';
6445 else if (sizeflag & DFLAG)
6446 *p++ = 'l';
6447 else
6448 *p++ = 'w';
6449 used_prefixes |= (prefixes & PREFIX_DATA);
6450 break;
6451 default:
6452 oappend (INTERNAL_DISASSEMBLER_ERROR);
6453 break;
6454 }
6455 *p = '\0';
6456
6457 if (modrm.mod == 3)
6458 {
6459 int add;
6460
6461 /* Skip mod/rm byte. */
6462 MODRM_CHECK;
6463 codep++;
6464
6465 USED_REX (REX_B);
6466 add = (rex & REX_B) ? 8 : 0;
6467 if (bytemode == b_mode)
6468 {
6469 USED_REX (0);
6470 if (rex)
6471 oappend (names8rex[modrm.rm + add]);
6472 else
6473 oappend (names8[modrm.rm + add]);
6474 }
6475 else
6476 {
6477 USED_REX (REX_W);
6478 if (rex & REX_W)
6479 oappend (names64[modrm.rm + add]);
6480 else if ((prefixes & PREFIX_DATA))
6481 oappend (names16[modrm.rm + add]);
6482 else
6483 oappend (names32[modrm.rm + add]);
6484 }
6485 }
6486 else
6487 OP_E (bytemode, sizeflag);
6488 }