1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
23 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
25 modified by John Hassey (hassey@dg-rtp.dg.com)
26 x86-64 support added by Jan Hubicka (jh@suse.cz)
27 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
29 /* The main tables describing the instructions is essentially a copy
30 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
31 Programmers Manual. Usually, there is a capital letter, followed
32 by a small letter. The capital letter tell the addressing mode,
33 and the small letter tells about the operand size. Refer to
34 the Intel manual for details. */
39 #include "opcode/i386.h"
43 static int fetch_data (struct disassemble_info
*, bfd_byte
*);
44 static void ckprefix (void);
45 static const char *prefix_name (int, int);
46 static int print_insn (bfd_vma
, disassemble_info
*);
47 static void dofloat (int);
48 static void OP_ST (int, int);
49 static void OP_STi (int, int);
50 static int putop (const char *, int);
51 static void oappend (const char *);
52 static void append_seg (void);
53 static void OP_indirE (int, int);
54 static void print_operand_value (char *, int, bfd_vma
);
55 static void print_displacement (char *, bfd_vma
);
56 static void OP_E (int, int);
57 static void OP_G (int, int);
58 static bfd_vma
get64 (void);
59 static bfd_signed_vma
get32 (void);
60 static bfd_signed_vma
get32s (void);
61 static int get16 (void);
62 static void set_op (bfd_vma
, int);
63 static void OP_REG (int, int);
64 static void OP_IMREG (int, int);
65 static void OP_I (int, int);
66 static void OP_I64 (int, int);
67 static void OP_sI (int, int);
68 static void OP_J (int, int);
69 static void OP_SEG (int, int);
70 static void OP_DIR (int, int);
71 static void OP_OFF (int, int);
72 static void OP_OFF64 (int, int);
73 static void ptr_reg (int, int);
74 static void OP_ESreg (int, int);
75 static void OP_DSreg (int, int);
76 static void OP_C (int, int);
77 static void OP_D (int, int);
78 static void OP_T (int, int);
79 static void OP_R (int, int);
80 static void OP_MMX (int, int);
81 static void OP_XMM (int, int);
82 static void OP_EM (int, int);
83 static void OP_EX (int, int);
84 static void OP_EMC (int,int);
85 static void OP_MXC (int,int);
86 static void OP_MS (int, int);
87 static void OP_XS (int, int);
88 static void OP_M (int, int);
89 static void OP_VMX (int, int);
90 static void OP_0fae (int, int);
91 static void OP_0f07 (int, int);
92 static void NOP_Fixup1 (int, int);
93 static void NOP_Fixup2 (int, int);
94 static void OP_3DNowSuffix (int, int);
95 static void OP_SIMD_Suffix (int, int);
96 static void SIMD_Fixup (int, int);
97 static void PNI_Fixup (int, int);
98 static void SVME_Fixup (int, int);
99 static void INVLPG_Fixup (int, int);
100 static void BadOp (void);
101 static void VMX_Fixup (int, int);
102 static void REP_Fixup (int, int);
103 static void CMPXCHG8B_Fixup (int, int);
104 static void XMM_Fixup (int, int);
105 static void CRC32_Fixup (int, int);
108 /* Points to first byte not fetched. */
109 bfd_byte
*max_fetched
;
110 bfd_byte the_buffer
[MAX_MNEM_SIZE
];
123 enum address_mode address_mode
;
125 /* Flags for the prefixes for the current instruction. See below. */
128 /* REX prefix the current instruction. See below. */
130 /* Bits of REX we've already used. */
132 /* Mark parts used in the REX prefix. When we are testing for
133 empty prefix (for 8bit register REX extension), just mask it
134 out. Otherwise test for REX bit is excuse for existence of REX
135 only in case value is nonzero. */
136 #define USED_REX(value) \
141 rex_used |= (value) | REX_OPCODE; \
144 rex_used |= REX_OPCODE; \
147 /* Flags for prefixes which we somehow handled when printing the
148 current instruction. */
149 static int used_prefixes
;
151 /* Flags stored in PREFIXES. */
152 #define PREFIX_REPZ 1
153 #define PREFIX_REPNZ 2
154 #define PREFIX_LOCK 4
156 #define PREFIX_SS 0x10
157 #define PREFIX_DS 0x20
158 #define PREFIX_ES 0x40
159 #define PREFIX_FS 0x80
160 #define PREFIX_GS 0x100
161 #define PREFIX_DATA 0x200
162 #define PREFIX_ADDR 0x400
163 #define PREFIX_FWAIT 0x800
165 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
166 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
168 #define FETCH_DATA(info, addr) \
169 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
170 ? 1 : fetch_data ((info), (addr)))
173 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
176 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
177 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
179 if (addr
<= priv
->the_buffer
+ MAX_MNEM_SIZE
)
180 status
= (*info
->read_memory_func
) (start
,
182 addr
- priv
->max_fetched
,
188 /* If we did manage to read at least one byte, then
189 print_insn_i386 will do something sensible. Otherwise, print
190 an error. We do that here because this is where we know
192 if (priv
->max_fetched
== priv
->the_buffer
)
193 (*info
->memory_error_func
) (status
, start
, info
);
194 longjmp (priv
->bailout
, 1);
197 priv
->max_fetched
= addr
;
201 #define XX { NULL, 0 }
203 #define Eb { OP_E, b_mode }
204 #define Ev { OP_E, v_mode }
205 #define Ed { OP_E, d_mode }
206 #define Edq { OP_E, dq_mode }
207 #define Edqw { OP_E, dqw_mode }
208 #define Edqb { OP_E, dqb_mode }
209 #define Edqd { OP_E, dqd_mode }
210 #define Eq { OP_E, q_mode }
211 #define indirEv { OP_indirE, stack_v_mode }
212 #define indirEp { OP_indirE, f_mode }
213 #define stackEv { OP_E, stack_v_mode }
214 #define Em { OP_E, m_mode }
215 #define Ew { OP_E, w_mode }
216 #define M { OP_M, 0 } /* lea, lgdt, etc. */
217 #define Ma { OP_M, v_mode }
218 #define Md { OP_M, d_mode }
219 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
220 #define Mq { OP_M, q_mode }
221 #define Gb { OP_G, b_mode }
222 #define Gv { OP_G, v_mode }
223 #define Gd { OP_G, d_mode }
224 #define Gdq { OP_G, dq_mode }
225 #define Gm { OP_G, m_mode }
226 #define Gw { OP_G, w_mode }
227 #define Rd { OP_R, d_mode }
228 #define Rm { OP_R, m_mode }
229 #define Ib { OP_I, b_mode }
230 #define sIb { OP_sI, b_mode } /* sign extened byte */
231 #define Iv { OP_I, v_mode }
232 #define Iq { OP_I, q_mode }
233 #define Iv64 { OP_I64, v_mode }
234 #define Iw { OP_I, w_mode }
235 #define I1 { OP_I, const_1_mode }
236 #define Jb { OP_J, b_mode }
237 #define Jv { OP_J, v_mode }
238 #define Cm { OP_C, m_mode }
239 #define Dm { OP_D, m_mode }
240 #define Td { OP_T, d_mode }
242 #define RMeAX { OP_REG, eAX_reg }
243 #define RMeBX { OP_REG, eBX_reg }
244 #define RMeCX { OP_REG, eCX_reg }
245 #define RMeDX { OP_REG, eDX_reg }
246 #define RMeSP { OP_REG, eSP_reg }
247 #define RMeBP { OP_REG, eBP_reg }
248 #define RMeSI { OP_REG, eSI_reg }
249 #define RMeDI { OP_REG, eDI_reg }
250 #define RMrAX { OP_REG, rAX_reg }
251 #define RMrBX { OP_REG, rBX_reg }
252 #define RMrCX { OP_REG, rCX_reg }
253 #define RMrDX { OP_REG, rDX_reg }
254 #define RMrSP { OP_REG, rSP_reg }
255 #define RMrBP { OP_REG, rBP_reg }
256 #define RMrSI { OP_REG, rSI_reg }
257 #define RMrDI { OP_REG, rDI_reg }
258 #define RMAL { OP_REG, al_reg }
259 #define RMAL { OP_REG, al_reg }
260 #define RMCL { OP_REG, cl_reg }
261 #define RMDL { OP_REG, dl_reg }
262 #define RMBL { OP_REG, bl_reg }
263 #define RMAH { OP_REG, ah_reg }
264 #define RMCH { OP_REG, ch_reg }
265 #define RMDH { OP_REG, dh_reg }
266 #define RMBH { OP_REG, bh_reg }
267 #define RMAX { OP_REG, ax_reg }
268 #define RMDX { OP_REG, dx_reg }
270 #define eAX { OP_IMREG, eAX_reg }
271 #define eBX { OP_IMREG, eBX_reg }
272 #define eCX { OP_IMREG, eCX_reg }
273 #define eDX { OP_IMREG, eDX_reg }
274 #define eSP { OP_IMREG, eSP_reg }
275 #define eBP { OP_IMREG, eBP_reg }
276 #define eSI { OP_IMREG, eSI_reg }
277 #define eDI { OP_IMREG, eDI_reg }
278 #define AL { OP_IMREG, al_reg }
279 #define CL { OP_IMREG, cl_reg }
280 #define DL { OP_IMREG, dl_reg }
281 #define BL { OP_IMREG, bl_reg }
282 #define AH { OP_IMREG, ah_reg }
283 #define CH { OP_IMREG, ch_reg }
284 #define DH { OP_IMREG, dh_reg }
285 #define BH { OP_IMREG, bh_reg }
286 #define AX { OP_IMREG, ax_reg }
287 #define DX { OP_IMREG, dx_reg }
288 #define zAX { OP_IMREG, z_mode_ax_reg }
289 #define indirDX { OP_IMREG, indir_dx_reg }
291 #define Sw { OP_SEG, w_mode }
292 #define Sv { OP_SEG, v_mode }
293 #define Ap { OP_DIR, 0 }
294 #define Ob { OP_OFF64, b_mode }
295 #define Ov { OP_OFF64, v_mode }
296 #define Xb { OP_DSreg, eSI_reg }
297 #define Xv { OP_DSreg, eSI_reg }
298 #define Xz { OP_DSreg, eSI_reg }
299 #define Yb { OP_ESreg, eDI_reg }
300 #define Yv { OP_ESreg, eDI_reg }
301 #define DSBX { OP_DSreg, eBX_reg }
303 #define es { OP_REG, es_reg }
304 #define ss { OP_REG, ss_reg }
305 #define cs { OP_REG, cs_reg }
306 #define ds { OP_REG, ds_reg }
307 #define fs { OP_REG, fs_reg }
308 #define gs { OP_REG, gs_reg }
310 #define MX { OP_MMX, 0 }
311 #define XM { OP_XMM, 0 }
312 #define EM { OP_EM, v_mode }
313 #define EMd { OP_EM, d_mode }
314 #define EMx { OP_EM, x_mode }
315 #define EXw { OP_EX, w_mode }
316 #define EXd { OP_EX, d_mode }
317 #define EXq { OP_EX, q_mode }
318 #define EXx { OP_EX, x_mode }
319 #define MS { OP_MS, v_mode }
320 #define XS { OP_XS, v_mode }
321 #define EMCq { OP_EMC, q_mode }
322 #define MXC { OP_MXC, 0 }
323 #define VM { OP_VMX, q_mode }
324 #define OPSUF { OP_3DNowSuffix, 0 }
325 #define OPSIMD { OP_SIMD_Suffix, 0 }
326 #define XMM0 { XMM_Fixup, 0 }
328 /* Used handle "rep" prefix for string instructions. */
329 #define Xbr { REP_Fixup, eSI_reg }
330 #define Xvr { REP_Fixup, eSI_reg }
331 #define Ybr { REP_Fixup, eDI_reg }
332 #define Yvr { REP_Fixup, eDI_reg }
333 #define Yzr { REP_Fixup, eDI_reg }
334 #define indirDXr { REP_Fixup, indir_dx_reg }
335 #define ALr { REP_Fixup, al_reg }
336 #define eAXr { REP_Fixup, eAX_reg }
338 #define cond_jump_flag { NULL, cond_jump_mode }
339 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
341 /* bits in sizeflag */
342 #define SUFFIX_ALWAYS 4
346 #define b_mode 1 /* byte operand */
347 #define v_mode 2 /* operand size depends on prefixes */
348 #define w_mode 3 /* word operand */
349 #define d_mode 4 /* double word operand */
350 #define q_mode 5 /* quad word operand */
351 #define t_mode 6 /* ten-byte operand */
352 #define x_mode 7 /* 16-byte XMM operand */
353 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
354 #define cond_jump_mode 9
355 #define loop_jcxz_mode 10
356 #define dq_mode 11 /* operand size depends on REX prefixes. */
357 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
358 #define f_mode 13 /* 4- or 6-byte pointer operand */
359 #define const_1_mode 14
360 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
361 #define z_mode 16 /* non-quad operand size depends on prefixes */
362 #define o_mode 17 /* 16-byte operand */
363 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
364 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
409 #define z_mode_ax_reg 149
410 #define indir_dx_reg 150
414 #define USE_PREFIX_USER_TABLE 3
415 #define X86_64_SPECIAL 4
416 #define IS_3BYTE_OPCODE 5
418 #define FLOAT NULL, { { NULL, FLOATCODE } }
420 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
421 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
422 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
423 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
424 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
425 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
426 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
427 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
428 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
429 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
430 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
431 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
432 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
433 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
434 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
435 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
436 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
437 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
438 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
439 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
440 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
441 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
442 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
443 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
444 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
445 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
446 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
447 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
449 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
450 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
451 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
452 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
453 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
454 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
455 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
456 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
457 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
458 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
459 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
460 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
461 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
462 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
463 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
464 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
465 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
466 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
467 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
468 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
469 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
470 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
471 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
472 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
473 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
474 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
475 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
476 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
477 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
478 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
479 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
480 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
481 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
482 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
483 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
484 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
485 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
486 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
487 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
488 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
489 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
490 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
491 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
492 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
493 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
494 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
495 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
496 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
497 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
498 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
499 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
500 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
501 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
502 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
503 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
504 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
505 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
506 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
507 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
508 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
509 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
510 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
511 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
512 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
513 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
514 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
515 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
516 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
517 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
518 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
519 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
520 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
521 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
522 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
523 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
524 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
525 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
526 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
527 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
528 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
529 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
530 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
531 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
532 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
533 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
534 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
535 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
536 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
537 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
538 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
539 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
540 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
541 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
542 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
543 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
544 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
545 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
546 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
549 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
550 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
551 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
552 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
554 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
555 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
557 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
568 /* Upper case letters in the instruction names here are macros.
569 'A' => print 'b' if no register operands or suffix_always is true
570 'B' => print 'b' if suffix_always is true
571 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
573 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
574 . suffix_always is true
575 'E' => print 'e' if 32-bit form of jcxz
576 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
577 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
578 'H' => print ",pt" or ",pn" branch hint
579 'I' => honor following macro letter even in Intel mode (implemented only
580 . for some of the macro letters)
582 'K' => print 'd' or 'q' if rex prefix is present.
583 'L' => print 'l' if suffix_always is true
584 'N' => print 'n' if instruction has no wait "prefix"
585 'O' => print 'd' or 'o' (or 'q' in Intel mode)
586 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
587 . or suffix_always is true. print 'q' if rex prefix is present.
588 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
590 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
591 'S' => print 'w', 'l' or 'q' if suffix_always is true
592 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
593 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
594 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
595 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
596 'X' => print 's', 'd' depending on data16 prefix (for XMM)
597 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
598 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
600 Many of the above letters print nothing in Intel mode. See "putop"
603 Braces '{' and '}', and vertical bars '|', indicate alternative
604 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
605 modes. In cases where there are only two alternatives, the X86_64
606 instruction is reserved, and "(bad)" is printed.
609 static const struct dis386 dis386
[] = {
611 { "addB", { Eb
, Gb
} },
612 { "addS", { Ev
, Gv
} },
613 { "addB", { Gb
, Eb
} },
614 { "addS", { Gv
, Ev
} },
615 { "addB", { AL
, Ib
} },
616 { "addS", { eAX
, Iv
} },
617 { "push{T|}", { es
} },
618 { "pop{T|}", { es
} },
620 { "orB", { Eb
, Gb
} },
621 { "orS", { Ev
, Gv
} },
622 { "orB", { Gb
, Eb
} },
623 { "orS", { Gv
, Ev
} },
624 { "orB", { AL
, Ib
} },
625 { "orS", { eAX
, Iv
} },
626 { "push{T|}", { cs
} },
627 { "(bad)", { XX
} }, /* 0x0f extended opcode escape */
629 { "adcB", { Eb
, Gb
} },
630 { "adcS", { Ev
, Gv
} },
631 { "adcB", { Gb
, Eb
} },
632 { "adcS", { Gv
, Ev
} },
633 { "adcB", { AL
, Ib
} },
634 { "adcS", { eAX
, Iv
} },
635 { "push{T|}", { ss
} },
636 { "pop{T|}", { ss
} },
638 { "sbbB", { Eb
, Gb
} },
639 { "sbbS", { Ev
, Gv
} },
640 { "sbbB", { Gb
, Eb
} },
641 { "sbbS", { Gv
, Ev
} },
642 { "sbbB", { AL
, Ib
} },
643 { "sbbS", { eAX
, Iv
} },
644 { "push{T|}", { ds
} },
645 { "pop{T|}", { ds
} },
647 { "andB", { Eb
, Gb
} },
648 { "andS", { Ev
, Gv
} },
649 { "andB", { Gb
, Eb
} },
650 { "andS", { Gv
, Ev
} },
651 { "andB", { AL
, Ib
} },
652 { "andS", { eAX
, Iv
} },
653 { "(bad)", { XX
} }, /* SEG ES prefix */
654 { "daa{|}", { XX
} },
656 { "subB", { Eb
, Gb
} },
657 { "subS", { Ev
, Gv
} },
658 { "subB", { Gb
, Eb
} },
659 { "subS", { Gv
, Ev
} },
660 { "subB", { AL
, Ib
} },
661 { "subS", { eAX
, Iv
} },
662 { "(bad)", { XX
} }, /* SEG CS prefix */
663 { "das{|}", { XX
} },
665 { "xorB", { Eb
, Gb
} },
666 { "xorS", { Ev
, Gv
} },
667 { "xorB", { Gb
, Eb
} },
668 { "xorS", { Gv
, Ev
} },
669 { "xorB", { AL
, Ib
} },
670 { "xorS", { eAX
, Iv
} },
671 { "(bad)", { XX
} }, /* SEG SS prefix */
672 { "aaa{|}", { XX
} },
674 { "cmpB", { Eb
, Gb
} },
675 { "cmpS", { Ev
, Gv
} },
676 { "cmpB", { Gb
, Eb
} },
677 { "cmpS", { Gv
, Ev
} },
678 { "cmpB", { AL
, Ib
} },
679 { "cmpS", { eAX
, Iv
} },
680 { "(bad)", { XX
} }, /* SEG DS prefix */
681 { "aas{|}", { XX
} },
683 { "inc{S|}", { RMeAX
} },
684 { "inc{S|}", { RMeCX
} },
685 { "inc{S|}", { RMeDX
} },
686 { "inc{S|}", { RMeBX
} },
687 { "inc{S|}", { RMeSP
} },
688 { "inc{S|}", { RMeBP
} },
689 { "inc{S|}", { RMeSI
} },
690 { "inc{S|}", { RMeDI
} },
692 { "dec{S|}", { RMeAX
} },
693 { "dec{S|}", { RMeCX
} },
694 { "dec{S|}", { RMeDX
} },
695 { "dec{S|}", { RMeBX
} },
696 { "dec{S|}", { RMeSP
} },
697 { "dec{S|}", { RMeBP
} },
698 { "dec{S|}", { RMeSI
} },
699 { "dec{S|}", { RMeDI
} },
701 { "pushV", { RMrAX
} },
702 { "pushV", { RMrCX
} },
703 { "pushV", { RMrDX
} },
704 { "pushV", { RMrBX
} },
705 { "pushV", { RMrSP
} },
706 { "pushV", { RMrBP
} },
707 { "pushV", { RMrSI
} },
708 { "pushV", { RMrDI
} },
710 { "popV", { RMrAX
} },
711 { "popV", { RMrCX
} },
712 { "popV", { RMrDX
} },
713 { "popV", { RMrBX
} },
714 { "popV", { RMrSP
} },
715 { "popV", { RMrBP
} },
716 { "popV", { RMrSI
} },
717 { "popV", { RMrDI
} },
723 { "(bad)", { XX
} }, /* seg fs */
724 { "(bad)", { XX
} }, /* seg gs */
725 { "(bad)", { XX
} }, /* op size prefix */
726 { "(bad)", { XX
} }, /* adr size prefix */
729 { "imulS", { Gv
, Ev
, Iv
} },
730 { "pushT", { sIb
} },
731 { "imulS", { Gv
, Ev
, sIb
} },
732 { "ins{b||b|}", { Ybr
, indirDX
} },
733 { "ins{R||G|}", { Yzr
, indirDX
} },
734 { "outs{b||b|}", { indirDXr
, Xb
} },
735 { "outs{R||G|}", { indirDXr
, Xz
} },
737 { "joH", { Jb
, XX
, cond_jump_flag
} },
738 { "jnoH", { Jb
, XX
, cond_jump_flag
} },
739 { "jbH", { Jb
, XX
, cond_jump_flag
} },
740 { "jaeH", { Jb
, XX
, cond_jump_flag
} },
741 { "jeH", { Jb
, XX
, cond_jump_flag
} },
742 { "jneH", { Jb
, XX
, cond_jump_flag
} },
743 { "jbeH", { Jb
, XX
, cond_jump_flag
} },
744 { "jaH", { Jb
, XX
, cond_jump_flag
} },
746 { "jsH", { Jb
, XX
, cond_jump_flag
} },
747 { "jnsH", { Jb
, XX
, cond_jump_flag
} },
748 { "jpH", { Jb
, XX
, cond_jump_flag
} },
749 { "jnpH", { Jb
, XX
, cond_jump_flag
} },
750 { "jlH", { Jb
, XX
, cond_jump_flag
} },
751 { "jgeH", { Jb
, XX
, cond_jump_flag
} },
752 { "jleH", { Jb
, XX
, cond_jump_flag
} },
753 { "jgH", { Jb
, XX
, cond_jump_flag
} },
759 { "testB", { Eb
, Gb
} },
760 { "testS", { Ev
, Gv
} },
761 { "xchgB", { Eb
, Gb
} },
762 { "xchgS", { Ev
, Gv
} },
764 { "movB", { Eb
, Gb
} },
765 { "movS", { Ev
, Gv
} },
766 { "movB", { Gb
, Eb
} },
767 { "movS", { Gv
, Ev
} },
768 { "movD", { Sv
, Sw
} },
769 { "leaS", { Gv
, M
} },
770 { "movD", { Sw
, Sv
} },
774 { "xchgS", { RMeCX
, eAX
} },
775 { "xchgS", { RMeDX
, eAX
} },
776 { "xchgS", { RMeBX
, eAX
} },
777 { "xchgS", { RMeSP
, eAX
} },
778 { "xchgS", { RMeBP
, eAX
} },
779 { "xchgS", { RMeSI
, eAX
} },
780 { "xchgS", { RMeDI
, eAX
} },
782 { "cW{t||t|}R", { XX
} },
783 { "cR{t||t|}O", { XX
} },
784 { "Jcall{T|}", { Ap
} },
785 { "(bad)", { XX
} }, /* fwait */
786 { "pushfT", { XX
} },
788 { "sahf{|}", { XX
} },
789 { "lahf{|}", { XX
} },
791 { "movB", { AL
, Ob
} },
792 { "movS", { eAX
, Ov
} },
793 { "movB", { Ob
, AL
} },
794 { "movS", { Ov
, eAX
} },
795 { "movs{b||b|}", { Ybr
, Xb
} },
796 { "movs{R||R|}", { Yvr
, Xv
} },
797 { "cmps{b||b|}", { Xb
, Yb
} },
798 { "cmps{R||R|}", { Xv
, Yv
} },
800 { "testB", { AL
, Ib
} },
801 { "testS", { eAX
, Iv
} },
802 { "stosB", { Ybr
, AL
} },
803 { "stosS", { Yvr
, eAX
} },
804 { "lodsB", { ALr
, Xb
} },
805 { "lodsS", { eAXr
, Xv
} },
806 { "scasB", { AL
, Yb
} },
807 { "scasS", { eAX
, Yv
} },
809 { "movB", { RMAL
, Ib
} },
810 { "movB", { RMCL
, Ib
} },
811 { "movB", { RMDL
, Ib
} },
812 { "movB", { RMBL
, Ib
} },
813 { "movB", { RMAH
, Ib
} },
814 { "movB", { RMCH
, Ib
} },
815 { "movB", { RMDH
, Ib
} },
816 { "movB", { RMBH
, Ib
} },
818 { "movS", { RMeAX
, Iv64
} },
819 { "movS", { RMeCX
, Iv64
} },
820 { "movS", { RMeDX
, Iv64
} },
821 { "movS", { RMeBX
, Iv64
} },
822 { "movS", { RMeSP
, Iv64
} },
823 { "movS", { RMeBP
, Iv64
} },
824 { "movS", { RMeSI
, Iv64
} },
825 { "movS", { RMeDI
, Iv64
} },
831 { "les{S|}", { Gv
, Mp
} },
832 { "ldsS", { Gv
, Mp
} },
836 { "enterT", { Iw
, Ib
} },
837 { "leaveT", { XX
} },
842 { "into{|}", { XX
} },
849 { "aam{|}", { sIb
} },
850 { "aad{|}", { sIb
} },
852 { "xlat", { DSBX
} },
863 { "loopneFH", { Jb
, XX
, loop_jcxz_flag
} },
864 { "loopeFH", { Jb
, XX
, loop_jcxz_flag
} },
865 { "loopFH", { Jb
, XX
, loop_jcxz_flag
} },
866 { "jEcxzH", { Jb
, XX
, loop_jcxz_flag
} },
867 { "inB", { AL
, Ib
} },
868 { "inG", { zAX
, Ib
} },
869 { "outB", { Ib
, AL
} },
870 { "outG", { Ib
, zAX
} },
874 { "Jjmp{T|}", { Ap
} },
876 { "inB", { AL
, indirDX
} },
877 { "inG", { zAX
, indirDX
} },
878 { "outB", { indirDX
, AL
} },
879 { "outG", { indirDX
, zAX
} },
881 { "(bad)", { XX
} }, /* lock prefix */
883 { "(bad)", { XX
} }, /* repne */
884 { "(bad)", { XX
} }, /* repz */
900 static const struct dis386 dis386_twobyte
[] = {
904 { "larS", { Gv
, Ew
} },
905 { "lslS", { Gv
, Ew
} },
907 { "syscall", { XX
} },
909 { "sysretP", { XX
} },
912 { "wbinvd", { XX
} },
918 { "", { MX
, EM
, OPSUF
} }, /* See OP_3DNowSuffix. */
923 { "movlpX", { EXq
, XM
, { SIMD_Fixup
, 'h' } } },
924 { "unpcklpX", { XM
, EXq
} },
925 { "unpckhpX", { XM
, EXq
} },
927 { "movhpX", { EXq
, XM
, { SIMD_Fixup
, 'l' } } },
938 { "movZ", { Rm
, Cm
} },
939 { "movZ", { Rm
, Dm
} },
940 { "movZ", { Cm
, Rm
} },
941 { "movZ", { Dm
, Rm
} },
942 { "movL", { Rd
, Td
} },
944 { "movL", { Td
, Rd
} },
947 { "movapX", { XM
, EXx
} },
948 { "movapX", { EXx
, XM
} },
960 { "sysenter", { XX
} },
961 { "sysexit", { XX
} },
974 { "cmovo", { Gv
, Ev
} },
975 { "cmovno", { Gv
, Ev
} },
976 { "cmovb", { Gv
, Ev
} },
977 { "cmovae", { Gv
, Ev
} },
978 { "cmove", { Gv
, Ev
} },
979 { "cmovne", { Gv
, Ev
} },
980 { "cmovbe", { Gv
, Ev
} },
981 { "cmova", { Gv
, Ev
} },
983 { "cmovs", { Gv
, Ev
} },
984 { "cmovns", { Gv
, Ev
} },
985 { "cmovp", { Gv
, Ev
} },
986 { "cmovnp", { Gv
, Ev
} },
987 { "cmovl", { Gv
, Ev
} },
988 { "cmovge", { Gv
, Ev
} },
989 { "cmovle", { Gv
, Ev
} },
990 { "cmovg", { Gv
, Ev
} },
992 { "movmskpX", { Gdq
, XS
} },
996 { "andpX", { XM
, EXx
} },
997 { "andnpX", { XM
, EXx
} },
998 { "orpX", { XM
, EXx
} },
999 { "xorpX", { XM
, EXx
} },
1013 { "packsswb", { MX
, EM
} },
1014 { "pcmpgtb", { MX
, EM
} },
1015 { "pcmpgtw", { MX
, EM
} },
1016 { "pcmpgtd", { MX
, EM
} },
1017 { "packuswb", { MX
, EM
} },
1019 { "punpckhbw", { MX
, EM
} },
1020 { "punpckhwd", { MX
, EM
} },
1021 { "punpckhdq", { MX
, EM
} },
1022 { "packssdw", { MX
, EM
} },
1025 { "movK", { MX
, Edq
} },
1032 { "pcmpeqb", { MX
, EM
} },
1033 { "pcmpeqw", { MX
, EM
} },
1034 { "pcmpeqd", { MX
, EM
} },
1039 { "(bad)", { XX
} },
1040 { "(bad)", { XX
} },
1046 { "joH", { Jv
, XX
, cond_jump_flag
} },
1047 { "jnoH", { Jv
, XX
, cond_jump_flag
} },
1048 { "jbH", { Jv
, XX
, cond_jump_flag
} },
1049 { "jaeH", { Jv
, XX
, cond_jump_flag
} },
1050 { "jeH", { Jv
, XX
, cond_jump_flag
} },
1051 { "jneH", { Jv
, XX
, cond_jump_flag
} },
1052 { "jbeH", { Jv
, XX
, cond_jump_flag
} },
1053 { "jaH", { Jv
, XX
, cond_jump_flag
} },
1055 { "jsH", { Jv
, XX
, cond_jump_flag
} },
1056 { "jnsH", { Jv
, XX
, cond_jump_flag
} },
1057 { "jpH", { Jv
, XX
, cond_jump_flag
} },
1058 { "jnpH", { Jv
, XX
, cond_jump_flag
} },
1059 { "jlH", { Jv
, XX
, cond_jump_flag
} },
1060 { "jgeH", { Jv
, XX
, cond_jump_flag
} },
1061 { "jleH", { Jv
, XX
, cond_jump_flag
} },
1062 { "jgH", { Jv
, XX
, cond_jump_flag
} },
1065 { "setno", { Eb
} },
1067 { "setae", { Eb
} },
1069 { "setne", { Eb
} },
1070 { "setbe", { Eb
} },
1074 { "setns", { Eb
} },
1076 { "setnp", { Eb
} },
1078 { "setge", { Eb
} },
1079 { "setle", { Eb
} },
1082 { "pushT", { fs
} },
1084 { "cpuid", { XX
} },
1085 { "btS", { Ev
, Gv
} },
1086 { "shldS", { Ev
, Gv
, Ib
} },
1087 { "shldS", { Ev
, Gv
, CL
} },
1091 { "pushT", { gs
} },
1094 { "btsS", { Ev
, Gv
} },
1095 { "shrdS", { Ev
, Gv
, Ib
} },
1096 { "shrdS", { Ev
, Gv
, CL
} },
1098 { "imulS", { Gv
, Ev
} },
1100 { "cmpxchgB", { Eb
, Gb
} },
1101 { "cmpxchgS", { Ev
, Gv
} },
1102 { "lssS", { Gv
, Mp
} },
1103 { "btrS", { Ev
, Gv
} },
1104 { "lfsS", { Gv
, Mp
} },
1105 { "lgsS", { Gv
, Mp
} },
1106 { "movz{bR|x|bR|x}", { Gv
, Eb
} },
1107 { "movz{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movzww ! */
1112 { "btcS", { Ev
, Gv
} },
1113 { "bsfS", { Gv
, Ev
} },
1115 { "movs{bR|x|bR|x}", { Gv
, Eb
} },
1116 { "movs{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movsww ! */
1118 { "xaddB", { Eb
, Gb
} },
1119 { "xaddS", { Ev
, Gv
} },
1121 { "movntiS", { Ev
, Gv
} },
1122 { "pinsrw", { MX
, Edqw
, Ib
} },
1123 { "pextrw", { Gdq
, MS
, Ib
} },
1124 { "shufpX", { XM
, EXx
, Ib
} },
1127 { "bswap", { RMeAX
} },
1128 { "bswap", { RMeCX
} },
1129 { "bswap", { RMeDX
} },
1130 { "bswap", { RMeBX
} },
1131 { "bswap", { RMeSP
} },
1132 { "bswap", { RMeBP
} },
1133 { "bswap", { RMeSI
} },
1134 { "bswap", { RMeDI
} },
1137 { "psrlw", { MX
, EM
} },
1138 { "psrld", { MX
, EM
} },
1139 { "psrlq", { MX
, EM
} },
1140 { "paddq", { MX
, EM
} },
1141 { "pmullw", { MX
, EM
} },
1143 { "pmovmskb", { Gdq
, MS
} },
1145 { "psubusb", { MX
, EM
} },
1146 { "psubusw", { MX
, EM
} },
1147 { "pminub", { MX
, EM
} },
1148 { "pand", { MX
, EM
} },
1149 { "paddusb", { MX
, EM
} },
1150 { "paddusw", { MX
, EM
} },
1151 { "pmaxub", { MX
, EM
} },
1152 { "pandn", { MX
, EM
} },
1154 { "pavgb", { MX
, EM
} },
1155 { "psraw", { MX
, EM
} },
1156 { "psrad", { MX
, EM
} },
1157 { "pavgw", { MX
, EM
} },
1158 { "pmulhuw", { MX
, EM
} },
1159 { "pmulhw", { MX
, EM
} },
1163 { "psubsb", { MX
, EM
} },
1164 { "psubsw", { MX
, EM
} },
1165 { "pminsw", { MX
, EM
} },
1166 { "por", { MX
, EM
} },
1167 { "paddsb", { MX
, EM
} },
1168 { "paddsw", { MX
, EM
} },
1169 { "pmaxsw", { MX
, EM
} },
1170 { "pxor", { MX
, EM
} },
1173 { "psllw", { MX
, EM
} },
1174 { "pslld", { MX
, EM
} },
1175 { "psllq", { MX
, EM
} },
1176 { "pmuludq", { MX
, EM
} },
1177 { "pmaddwd", { MX
, EM
} },
1178 { "psadbw", { MX
, EM
} },
1181 { "psubb", { MX
, EM
} },
1182 { "psubw", { MX
, EM
} },
1183 { "psubd", { MX
, EM
} },
1184 { "psubq", { MX
, EM
} },
1185 { "paddb", { MX
, EM
} },
1186 { "paddw", { MX
, EM
} },
1187 { "paddd", { MX
, EM
} },
1188 { "(bad)", { XX
} },
1191 static const unsigned char onebyte_has_modrm
[256] = {
1192 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1193 /* ------------------------------- */
1194 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1195 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1196 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1197 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1198 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1199 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1200 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1201 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1202 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1203 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1204 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1205 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1206 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1207 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1208 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1209 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1210 /* ------------------------------- */
1211 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1214 static const unsigned char twobyte_has_modrm
[256] = {
1215 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1216 /* ------------------------------- */
1217 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1218 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1219 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1220 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1221 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1222 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1223 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1224 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1225 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1226 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1227 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1228 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1229 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1230 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1231 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1232 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1233 /* ------------------------------- */
1234 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1237 static const unsigned char twobyte_uses_DATA_prefix
[256] = {
1238 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1239 /* ------------------------------- */
1240 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1241 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1242 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1243 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1244 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1245 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1246 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1247 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1248 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1249 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1250 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1251 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1252 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1253 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1254 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1255 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1256 /* ------------------------------- */
1257 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1260 static const unsigned char twobyte_uses_REPNZ_prefix
[256] = {
1261 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1262 /* ------------------------------- */
1263 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1264 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1265 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1266 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1267 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1268 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1269 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1270 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1271 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1272 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1273 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1274 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1275 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1276 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1277 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1278 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1279 /* ------------------------------- */
1280 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1283 static const unsigned char twobyte_uses_REPZ_prefix
[256] = {
1284 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1285 /* ------------------------------- */
1286 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1287 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1288 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1289 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1290 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1291 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1292 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1293 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1294 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1295 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1296 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1297 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1298 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1299 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1300 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1301 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1302 /* ------------------------------- */
1303 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1306 /* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1307 static const unsigned char threebyte_0x38_uses_DATA_prefix
[256] = {
1308 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1309 /* ------------------------------- */
1310 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1311 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1312 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1313 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1314 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1315 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1316 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1317 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1318 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1319 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1320 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1321 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1322 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1323 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1324 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1325 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1326 /* ------------------------------- */
1327 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1330 /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1331 static const unsigned char threebyte_0x38_uses_REPNZ_prefix
[256] = {
1332 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1333 /* ------------------------------- */
1334 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1335 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1336 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1337 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1338 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1339 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1340 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1341 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1342 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1343 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1344 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1345 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1346 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1347 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1348 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1349 /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1350 /* ------------------------------- */
1351 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1354 /* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1355 static const unsigned char threebyte_0x38_uses_REPZ_prefix
[256] = {
1356 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1357 /* ------------------------------- */
1358 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1359 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1360 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1361 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1362 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1363 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1364 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1365 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1366 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1367 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1368 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1369 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1370 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1371 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1372 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1373 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1374 /* ------------------------------- */
1375 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1378 /* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1379 static const unsigned char threebyte_0x3a_uses_DATA_prefix
[256] = {
1380 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1381 /* ------------------------------- */
1382 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1383 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1384 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1385 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1386 /* 40 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1387 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1388 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1389 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1390 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1391 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1392 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1393 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1394 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1395 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1396 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1397 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1398 /* ------------------------------- */
1399 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1402 /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1403 static const unsigned char threebyte_0x3a_uses_REPNZ_prefix
[256] = {
1404 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1405 /* ------------------------------- */
1406 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1407 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1408 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1409 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1410 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1411 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1412 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1413 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1414 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1415 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1416 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1417 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1418 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1419 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1420 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1421 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1422 /* ------------------------------- */
1423 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1426 /* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1427 static const unsigned char threebyte_0x3a_uses_REPZ_prefix
[256] = {
1428 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1429 /* ------------------------------- */
1430 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1431 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1432 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1433 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1434 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1435 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1436 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1437 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1438 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1439 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1440 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1441 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1442 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1443 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1444 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1445 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1446 /* ------------------------------- */
1447 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1450 static char obuf
[100];
1452 static char scratchbuf
[100];
1453 static unsigned char *start_codep
;
1454 static unsigned char *insn_codep
;
1455 static unsigned char *codep
;
1456 static disassemble_info
*the_info
;
1464 static unsigned char need_modrm
;
1466 /* If we are accessing mod/rm/reg without need_modrm set, then the
1467 values are stale. Hitting this abort likely indicates that you
1468 need to update onebyte_has_modrm or twobyte_has_modrm. */
1469 #define MODRM_CHECK if (!need_modrm) abort ()
1471 static const char **names64
;
1472 static const char **names32
;
1473 static const char **names16
;
1474 static const char **names8
;
1475 static const char **names8rex
;
1476 static const char **names_seg
;
1477 static const char **index16
;
1479 static const char *intel_names64
[] = {
1480 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1481 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1483 static const char *intel_names32
[] = {
1484 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1485 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1487 static const char *intel_names16
[] = {
1488 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1489 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1491 static const char *intel_names8
[] = {
1492 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1494 static const char *intel_names8rex
[] = {
1495 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1496 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1498 static const char *intel_names_seg
[] = {
1499 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1501 static const char *intel_index16
[] = {
1502 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1505 static const char *att_names64
[] = {
1506 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1507 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1509 static const char *att_names32
[] = {
1510 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1511 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1513 static const char *att_names16
[] = {
1514 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1515 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1517 static const char *att_names8
[] = {
1518 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1520 static const char *att_names8rex
[] = {
1521 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1522 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1524 static const char *att_names_seg
[] = {
1525 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1527 static const char *att_index16
[] = {
1528 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1531 static const struct dis386 grps
[][8] = {
1534 { "popU", { stackEv
} },
1535 { "(bad)", { XX
} },
1536 { "(bad)", { XX
} },
1537 { "(bad)", { XX
} },
1538 { "(bad)", { XX
} },
1539 { "(bad)", { XX
} },
1540 { "(bad)", { XX
} },
1541 { "(bad)", { XX
} },
1545 { "addA", { Eb
, Ib
} },
1546 { "orA", { Eb
, Ib
} },
1547 { "adcA", { Eb
, Ib
} },
1548 { "sbbA", { Eb
, Ib
} },
1549 { "andA", { Eb
, Ib
} },
1550 { "subA", { Eb
, Ib
} },
1551 { "xorA", { Eb
, Ib
} },
1552 { "cmpA", { Eb
, Ib
} },
1556 { "addQ", { Ev
, Iv
} },
1557 { "orQ", { Ev
, Iv
} },
1558 { "adcQ", { Ev
, Iv
} },
1559 { "sbbQ", { Ev
, Iv
} },
1560 { "andQ", { Ev
, Iv
} },
1561 { "subQ", { Ev
, Iv
} },
1562 { "xorQ", { Ev
, Iv
} },
1563 { "cmpQ", { Ev
, Iv
} },
1567 { "addQ", { Ev
, sIb
} },
1568 { "orQ", { Ev
, sIb
} },
1569 { "adcQ", { Ev
, sIb
} },
1570 { "sbbQ", { Ev
, sIb
} },
1571 { "andQ", { Ev
, sIb
} },
1572 { "subQ", { Ev
, sIb
} },
1573 { "xorQ", { Ev
, sIb
} },
1574 { "cmpQ", { Ev
, sIb
} },
1578 { "rolA", { Eb
, Ib
} },
1579 { "rorA", { Eb
, Ib
} },
1580 { "rclA", { Eb
, Ib
} },
1581 { "rcrA", { Eb
, Ib
} },
1582 { "shlA", { Eb
, Ib
} },
1583 { "shrA", { Eb
, Ib
} },
1584 { "(bad)", { XX
} },
1585 { "sarA", { Eb
, Ib
} },
1589 { "rolQ", { Ev
, Ib
} },
1590 { "rorQ", { Ev
, Ib
} },
1591 { "rclQ", { Ev
, Ib
} },
1592 { "rcrQ", { Ev
, Ib
} },
1593 { "shlQ", { Ev
, Ib
} },
1594 { "shrQ", { Ev
, Ib
} },
1595 { "(bad)", { XX
} },
1596 { "sarQ", { Ev
, Ib
} },
1600 { "rolA", { Eb
, I1
} },
1601 { "rorA", { Eb
, I1
} },
1602 { "rclA", { Eb
, I1
} },
1603 { "rcrA", { Eb
, I1
} },
1604 { "shlA", { Eb
, I1
} },
1605 { "shrA", { Eb
, I1
} },
1606 { "(bad)", { XX
} },
1607 { "sarA", { Eb
, I1
} },
1611 { "rolQ", { Ev
, I1
} },
1612 { "rorQ", { Ev
, I1
} },
1613 { "rclQ", { Ev
, I1
} },
1614 { "rcrQ", { Ev
, I1
} },
1615 { "shlQ", { Ev
, I1
} },
1616 { "shrQ", { Ev
, I1
} },
1617 { "(bad)", { XX
} },
1618 { "sarQ", { Ev
, I1
} },
1622 { "rolA", { Eb
, CL
} },
1623 { "rorA", { Eb
, CL
} },
1624 { "rclA", { Eb
, CL
} },
1625 { "rcrA", { Eb
, CL
} },
1626 { "shlA", { Eb
, CL
} },
1627 { "shrA", { Eb
, CL
} },
1628 { "(bad)", { XX
} },
1629 { "sarA", { Eb
, CL
} },
1633 { "rolQ", { Ev
, CL
} },
1634 { "rorQ", { Ev
, CL
} },
1635 { "rclQ", { Ev
, CL
} },
1636 { "rcrQ", { Ev
, CL
} },
1637 { "shlQ", { Ev
, CL
} },
1638 { "shrQ", { Ev
, CL
} },
1639 { "(bad)", { XX
} },
1640 { "sarQ", { Ev
, CL
} },
1644 { "testA", { Eb
, Ib
} },
1645 { "(bad)", { Eb
} },
1648 { "mulA", { Eb
} }, /* Don't print the implicit %al register, */
1649 { "imulA", { Eb
} }, /* to distinguish these opcodes from other */
1650 { "divA", { Eb
} }, /* mul/imul opcodes. Do the same for div */
1651 { "idivA", { Eb
} }, /* and idiv for consistency. */
1655 { "testQ", { Ev
, Iv
} },
1656 { "(bad)", { XX
} },
1659 { "mulQ", { Ev
} }, /* Don't print the implicit register. */
1660 { "imulQ", { Ev
} },
1662 { "idivQ", { Ev
} },
1668 { "(bad)", { XX
} },
1669 { "(bad)", { XX
} },
1670 { "(bad)", { XX
} },
1671 { "(bad)", { XX
} },
1672 { "(bad)", { XX
} },
1673 { "(bad)", { XX
} },
1679 { "callT", { indirEv
} },
1680 { "JcallT", { indirEp
} },
1681 { "jmpT", { indirEv
} },
1682 { "JjmpT", { indirEp
} },
1683 { "pushU", { stackEv
} },
1684 { "(bad)", { XX
} },
1688 { "sldtD", { Sv
} },
1694 { "(bad)", { XX
} },
1695 { "(bad)", { XX
} },
1699 { "sgdt{Q|IQ||}", { { VMX_Fixup
, 0 } } },
1700 { "sidt{Q|IQ||}", { { PNI_Fixup
, 0 } } },
1701 { "lgdt{Q|Q||}", { M
} },
1702 { "lidt{Q|Q||}", { { SVME_Fixup
, 0 } } },
1703 { "smswD", { Sv
} },
1704 { "(bad)", { XX
} },
1706 { "invlpg", { { INVLPG_Fixup
, 0 } } },
1710 { "(bad)", { XX
} },
1711 { "(bad)", { XX
} },
1712 { "(bad)", { XX
} },
1713 { "(bad)", { XX
} },
1714 { "btQ", { Ev
, Ib
} },
1715 { "btsQ", { Ev
, Ib
} },
1716 { "btrQ", { Ev
, Ib
} },
1717 { "btcQ", { Ev
, Ib
} },
1721 { "(bad)", { XX
} },
1722 { "cmpxchg8b", { { CMPXCHG8B_Fixup
, q_mode
} } },
1723 { "(bad)", { XX
} },
1724 { "(bad)", { XX
} },
1725 { "(bad)", { XX
} },
1726 { "(bad)", { XX
} },
1727 { "", { VM
} }, /* See OP_VMX. */
1728 { "vmptrst", { Mq
} },
1732 { "movA", { Eb
, Ib
} },
1733 { "(bad)", { XX
} },
1734 { "(bad)", { XX
} },
1735 { "(bad)", { XX
} },
1736 { "(bad)", { XX
} },
1737 { "(bad)", { XX
} },
1738 { "(bad)", { XX
} },
1739 { "(bad)", { XX
} },
1743 { "movQ", { Ev
, Iv
} },
1744 { "(bad)", { XX
} },
1745 { "(bad)", { XX
} },
1746 { "(bad)", { XX
} },
1747 { "(bad)", { XX
} },
1748 { "(bad)", { XX
} },
1749 { "(bad)", { XX
} },
1750 { "(bad)", { XX
} },
1754 { "(bad)", { XX
} },
1755 { "(bad)", { XX
} },
1756 { "psrlw", { MS
, Ib
} },
1757 { "(bad)", { XX
} },
1758 { "psraw", { MS
, Ib
} },
1759 { "(bad)", { XX
} },
1760 { "psllw", { MS
, Ib
} },
1761 { "(bad)", { XX
} },
1765 { "(bad)", { XX
} },
1766 { "(bad)", { XX
} },
1767 { "psrld", { MS
, Ib
} },
1768 { "(bad)", { XX
} },
1769 { "psrad", { MS
, Ib
} },
1770 { "(bad)", { XX
} },
1771 { "pslld", { MS
, Ib
} },
1772 { "(bad)", { XX
} },
1776 { "(bad)", { XX
} },
1777 { "(bad)", { XX
} },
1778 { "psrlq", { MS
, Ib
} },
1779 { "psrldq", { MS
, Ib
} },
1780 { "(bad)", { XX
} },
1781 { "(bad)", { XX
} },
1782 { "psllq", { MS
, Ib
} },
1783 { "pslldq", { MS
, Ib
} },
1787 { "fxsave", { M
} },
1788 { "fxrstor", { M
} },
1789 { "ldmxcsr", { Md
} },
1790 { "stmxcsr", { Md
} },
1791 { "(bad)", { XX
} },
1792 { "lfence", { { OP_0fae
, 0 } } },
1793 { "mfence", { { OP_0fae
, 0 } } },
1794 { "clflush", { { OP_0fae
, b_mode
} } },
1798 { "prefetchnta", { Ev
} },
1799 { "prefetcht0", { Ev
} },
1800 { "prefetcht1", { Ev
} },
1801 { "prefetcht2", { Ev
} },
1802 { "(bad)", { XX
} },
1803 { "(bad)", { XX
} },
1804 { "(bad)", { XX
} },
1805 { "(bad)", { XX
} },
1809 { "prefetch", { Eb
} },
1810 { "prefetchw", { Eb
} },
1811 { "(bad)", { XX
} },
1812 { "(bad)", { XX
} },
1813 { "(bad)", { XX
} },
1814 { "(bad)", { XX
} },
1815 { "(bad)", { XX
} },
1816 { "(bad)", { XX
} },
1820 { "xstore-rng", { { OP_0f07
, 0 } } },
1821 { "xcrypt-ecb", { { OP_0f07
, 0 } } },
1822 { "xcrypt-cbc", { { OP_0f07
, 0 } } },
1823 { "xcrypt-ctr", { { OP_0f07
, 0 } } },
1824 { "xcrypt-cfb", { { OP_0f07
, 0 } } },
1825 { "xcrypt-ofb", { { OP_0f07
, 0 } } },
1826 { "(bad)", { { OP_0f07
, 0 } } },
1827 { "(bad)", { { OP_0f07
, 0 } } },
1831 { "montmul", { { OP_0f07
, 0 } } },
1832 { "xsha1", { { OP_0f07
, 0 } } },
1833 { "xsha256", { { OP_0f07
, 0 } } },
1834 { "(bad)", { { OP_0f07
, 0 } } },
1835 { "(bad)", { { OP_0f07
, 0 } } },
1836 { "(bad)", { { OP_0f07
, 0 } } },
1837 { "(bad)", { { OP_0f07
, 0 } } },
1838 { "(bad)", { { OP_0f07
, 0 } } },
1842 static const struct dis386 prefix_user_table
[][4] = {
1845 { "addps", { XM
, EXx
} },
1846 { "addss", { XM
, EXd
} },
1847 { "addpd", { XM
, EXx
} },
1848 { "addsd", { XM
, EXq
} },
1852 { "", { XM
, EXx
, OPSIMD
} }, /* See OP_SIMD_SUFFIX. */
1853 { "", { XM
, EXd
, OPSIMD
} },
1854 { "", { XM
, EXx
, OPSIMD
} },
1855 { "", { XM
, EXq
, OPSIMD
} },
1859 { "cvtpi2ps", { XM
, EMCq
} },
1860 { "cvtsi2ssY", { XM
, Ev
} },
1861 { "cvtpi2pd", { XM
, EMCq
} },
1862 { "cvtsi2sdY", { XM
, Ev
} },
1866 { "cvtps2pi", { MXC
, EXq
} },
1867 { "cvtss2siY", { Gv
, EXd
} },
1868 { "cvtpd2pi", { MXC
, EXx
} },
1869 { "cvtsd2siY", { Gv
, EXq
} },
1873 { "cvttps2pi", { MXC
, EXq
} },
1874 { "cvttss2siY", { Gv
, EXd
} },
1875 { "cvttpd2pi", { MXC
, EXx
} },
1876 { "cvttsd2siY", { Gv
, EXq
} },
1880 { "divps", { XM
, EXx
} },
1881 { "divss", { XM
, EXd
} },
1882 { "divpd", { XM
, EXx
} },
1883 { "divsd", { XM
, EXq
} },
1887 { "maxps", { XM
, EXx
} },
1888 { "maxss", { XM
, EXd
} },
1889 { "maxpd", { XM
, EXx
} },
1890 { "maxsd", { XM
, EXq
} },
1894 { "minps", { XM
, EXx
} },
1895 { "minss", { XM
, EXd
} },
1896 { "minpd", { XM
, EXx
} },
1897 { "minsd", { XM
, EXq
} },
1901 { "movups", { XM
, EXx
} },
1902 { "movss", { XM
, EXd
} },
1903 { "movupd", { XM
, EXx
} },
1904 { "movsd", { XM
, EXq
} },
1908 { "movups", { EXx
, XM
} },
1909 { "movss", { EXd
, XM
} },
1910 { "movupd", { EXx
, XM
} },
1911 { "movsd", { EXq
, XM
} },
1915 { "mulps", { XM
, EXx
} },
1916 { "mulss", { XM
, EXd
} },
1917 { "mulpd", { XM
, EXx
} },
1918 { "mulsd", { XM
, EXq
} },
1922 { "rcpps", { XM
, EXx
} },
1923 { "rcpss", { XM
, EXd
} },
1924 { "(bad)", { XM
, EXx
} },
1925 { "(bad)", { XM
, EXx
} },
1929 { "rsqrtps",{ XM
, EXx
} },
1930 { "rsqrtss",{ XM
, EXd
} },
1931 { "(bad)", { XM
, EXx
} },
1932 { "(bad)", { XM
, EXx
} },
1936 { "sqrtps", { XM
, EXx
} },
1937 { "sqrtss", { XM
, EXd
} },
1938 { "sqrtpd", { XM
, EXx
} },
1939 { "sqrtsd", { XM
, EXq
} },
1943 { "subps", { XM
, EXx
} },
1944 { "subss", { XM
, EXd
} },
1945 { "subpd", { XM
, EXx
} },
1946 { "subsd", { XM
, EXq
} },
1950 { "(bad)", { XM
, EXx
} },
1951 { "cvtdq2pd", { XM
, EXq
} },
1952 { "cvttpd2dq", { XM
, EXx
} },
1953 { "cvtpd2dq", { XM
, EXx
} },
1957 { "cvtdq2ps", { XM
, EXx
} },
1958 { "cvttps2dq", { XM
, EXx
} },
1959 { "cvtps2dq", { XM
, EXx
} },
1960 { "(bad)", { XM
, EXx
} },
1964 { "cvtps2pd", { XM
, EXq
} },
1965 { "cvtss2sd", { XM
, EXd
} },
1966 { "cvtpd2ps", { XM
, EXx
} },
1967 { "cvtsd2ss", { XM
, EXq
} },
1971 { "maskmovq", { MX
, MS
} },
1972 { "(bad)", { XM
, EXx
} },
1973 { "maskmovdqu", { XM
, XS
} },
1974 { "(bad)", { XM
, EXx
} },
1978 { "movq", { MX
, EM
} },
1979 { "movdqu", { XM
, EXx
} },
1980 { "movdqa", { XM
, EXx
} },
1981 { "(bad)", { XM
, EXx
} },
1985 { "movq", { EM
, MX
} },
1986 { "movdqu", { EXx
, XM
} },
1987 { "movdqa", { EXx
, XM
} },
1988 { "(bad)", { EXx
, XM
} },
1992 { "(bad)", { EXx
, XM
} },
1993 { "movq2dq",{ XM
, MS
} },
1994 { "movq", { EXq
, XM
} },
1995 { "movdq2q",{ MX
, XS
} },
1999 { "pshufw", { MX
, EM
, Ib
} },
2000 { "pshufhw",{ XM
, EXx
, Ib
} },
2001 { "pshufd", { XM
, EXx
, Ib
} },
2002 { "pshuflw",{ XM
, EXx
, Ib
} },
2006 { "movK", { Edq
, MX
} },
2007 { "movq", { XM
, EXq
} },
2008 { "movK", { Edq
, XM
} },
2009 { "(bad)", { Ed
, XM
} },
2013 { "(bad)", { MX
, EXx
} },
2014 { "(bad)", { XM
, EXx
} },
2015 { "punpckhqdq", { XM
, EXx
} },
2016 { "(bad)", { XM
, EXx
} },
2020 { "movntq", { EM
, MX
} },
2021 { "(bad)", { EM
, XM
} },
2022 { "movntdq",{ EM
, XM
} },
2023 { "(bad)", { EM
, XM
} },
2027 { "(bad)", { MX
, EXx
} },
2028 { "(bad)", { XM
, EXx
} },
2029 { "punpcklqdq", { XM
, EXx
} },
2030 { "(bad)", { XM
, EXx
} },
2034 { "(bad)", { MX
, EXx
} },
2035 { "(bad)", { XM
, EXx
} },
2036 { "addsubpd", { XM
, EXx
} },
2037 { "addsubps", { XM
, EXx
} },
2041 { "(bad)", { MX
, EXx
} },
2042 { "(bad)", { XM
, EXx
} },
2043 { "haddpd", { XM
, EXx
} },
2044 { "haddps", { XM
, EXx
} },
2048 { "(bad)", { MX
, EXx
} },
2049 { "(bad)", { XM
, EXx
} },
2050 { "hsubpd", { XM
, EXx
} },
2051 { "hsubps", { XM
, EXx
} },
2055 { "movlpX", { XM
, EXq
, { SIMD_Fixup
, 'h' } } }, /* really only 2 operands */
2056 { "movsldup", { XM
, EXx
} },
2057 { "movlpd", { XM
, EXq
} },
2058 { "movddup", { XM
, EXq
} },
2062 { "movhpX", { XM
, EXq
, { SIMD_Fixup
, 'l' } } },
2063 { "movshdup", { XM
, EXx
} },
2064 { "movhpd", { XM
, EXq
} },
2065 { "(bad)", { XM
, EXq
} },
2069 { "(bad)", { XM
, EXx
} },
2070 { "(bad)", { XM
, EXx
} },
2071 { "(bad)", { XM
, EXx
} },
2072 { "lddqu", { XM
, M
} },
2076 {"movntps", { Ev
, XM
} },
2077 {"movntss", { Ed
, XM
} },
2078 {"movntpd", { Ev
, XM
} },
2079 {"movntsd", { Eq
, XM
} },
2084 {"vmread", { Em
, Gm
} },
2086 {"extrq", { XS
, Ib
, Ib
} },
2087 {"insertq", { XM
, XS
, Ib
, Ib
} },
2092 {"vmwrite", { Gm
, Em
} },
2094 {"extrq", { XM
, XS
} },
2095 {"insertq", { XM
, XS
} },
2100 { "bsrS", { Gv
, Ev
} },
2101 { "lzcntS", { Gv
, Ev
} },
2102 { "bsrS", { Gv
, Ev
} },
2103 { "(bad)", { XX
} },
2108 { "(bad)", { XX
} },
2109 { "popcntS", { Gv
, Ev
} },
2110 { "(bad)", { XX
} },
2111 { "(bad)", { XX
} },
2116 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2117 { "pause", { XX
} },
2118 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2119 { "(bad)", { XX
} },
2124 { "(bad)", { XX
} },
2125 { "(bad)", { XX
} },
2126 { "pblendvb", {XM
, EXx
, XMM0
} },
2127 { "(bad)", { XX
} },
2132 { "(bad)", { XX
} },
2133 { "(bad)", { XX
} },
2134 { "blendvps", {XM
, EXx
, XMM0
} },
2135 { "(bad)", { XX
} },
2140 { "(bad)", { XX
} },
2141 { "(bad)", { XX
} },
2142 { "blendvpd", { XM
, EXx
, XMM0
} },
2143 { "(bad)", { XX
} },
2148 { "(bad)", { XX
} },
2149 { "(bad)", { XX
} },
2150 { "ptest", { XM
, EXx
} },
2151 { "(bad)", { XX
} },
2156 { "(bad)", { XX
} },
2157 { "(bad)", { XX
} },
2158 { "pmovsxbw", { XM
, EXq
} },
2159 { "(bad)", { XX
} },
2164 { "(bad)", { XX
} },
2165 { "(bad)", { XX
} },
2166 { "pmovsxbd", { XM
, EXd
} },
2167 { "(bad)", { XX
} },
2172 { "(bad)", { XX
} },
2173 { "(bad)", { XX
} },
2174 { "pmovsxbq", { XM
, EXw
} },
2175 { "(bad)", { XX
} },
2180 { "(bad)", { XX
} },
2181 { "(bad)", { XX
} },
2182 { "pmovsxwd", { XM
, EXq
} },
2183 { "(bad)", { XX
} },
2188 { "(bad)", { XX
} },
2189 { "(bad)", { XX
} },
2190 { "pmovsxwq", { XM
, EXd
} },
2191 { "(bad)", { XX
} },
2196 { "(bad)", { XX
} },
2197 { "(bad)", { XX
} },
2198 { "pmovsxdq", { XM
, EXq
} },
2199 { "(bad)", { XX
} },
2204 { "(bad)", { XX
} },
2205 { "(bad)", { XX
} },
2206 { "pmuldq", { XM
, EXx
} },
2207 { "(bad)", { XX
} },
2212 { "(bad)", { XX
} },
2213 { "(bad)", { XX
} },
2214 { "pcmpeqq", { XM
, EXx
} },
2215 { "(bad)", { XX
} },
2220 { "(bad)", { XX
} },
2221 { "(bad)", { XX
} },
2222 { "movntdqa", { XM
, EM
} },
2223 { "(bad)", { XX
} },
2228 { "(bad)", { XX
} },
2229 { "(bad)", { XX
} },
2230 { "packusdw", { XM
, EXx
} },
2231 { "(bad)", { XX
} },
2236 { "(bad)", { XX
} },
2237 { "(bad)", { XX
} },
2238 { "pmovzxbw", { XM
, EXq
} },
2239 { "(bad)", { XX
} },
2244 { "(bad)", { XX
} },
2245 { "(bad)", { XX
} },
2246 { "pmovzxbd", { XM
, EXd
} },
2247 { "(bad)", { XX
} },
2252 { "(bad)", { XX
} },
2253 { "(bad)", { XX
} },
2254 { "pmovzxbq", { XM
, EXw
} },
2255 { "(bad)", { XX
} },
2260 { "(bad)", { XX
} },
2261 { "(bad)", { XX
} },
2262 { "pmovzxwd", { XM
, EXq
} },
2263 { "(bad)", { XX
} },
2268 { "(bad)", { XX
} },
2269 { "(bad)", { XX
} },
2270 { "pmovzxwq", { XM
, EXd
} },
2271 { "(bad)", { XX
} },
2276 { "(bad)", { XX
} },
2277 { "(bad)", { XX
} },
2278 { "pmovzxdq", { XM
, EXq
} },
2279 { "(bad)", { XX
} },
2284 { "(bad)", { XX
} },
2285 { "(bad)", { XX
} },
2286 { "pminsb", { XM
, EXx
} },
2287 { "(bad)", { XX
} },
2292 { "(bad)", { XX
} },
2293 { "(bad)", { XX
} },
2294 { "pminsd", { XM
, EXx
} },
2295 { "(bad)", { XX
} },
2300 { "(bad)", { XX
} },
2301 { "(bad)", { XX
} },
2302 { "pminuw", { XM
, EXx
} },
2303 { "(bad)", { XX
} },
2308 { "(bad)", { XX
} },
2309 { "(bad)", { XX
} },
2310 { "pminud", { XM
, EXx
} },
2311 { "(bad)", { XX
} },
2316 { "(bad)", { XX
} },
2317 { "(bad)", { XX
} },
2318 { "pmaxsb", { XM
, EXx
} },
2319 { "(bad)", { XX
} },
2324 { "(bad)", { XX
} },
2325 { "(bad)", { XX
} },
2326 { "pmaxsd", { XM
, EXx
} },
2327 { "(bad)", { XX
} },
2332 { "(bad)", { XX
} },
2333 { "(bad)", { XX
} },
2334 { "pmaxuw", { XM
, EXx
} },
2335 { "(bad)", { XX
} },
2340 { "(bad)", { XX
} },
2341 { "(bad)", { XX
} },
2342 { "pmaxud", { XM
, EXx
} },
2343 { "(bad)", { XX
} },
2348 { "(bad)", { XX
} },
2349 { "(bad)", { XX
} },
2350 { "pmulld", { XM
, EXx
} },
2351 { "(bad)", { XX
} },
2356 { "(bad)", { XX
} },
2357 { "(bad)", { XX
} },
2358 { "phminposuw", { XM
, EXx
} },
2359 { "(bad)", { XX
} },
2364 { "(bad)", { XX
} },
2365 { "(bad)", { XX
} },
2366 { "roundps", { XM
, EXx
, Ib
} },
2367 { "(bad)", { XX
} },
2372 { "(bad)", { XX
} },
2373 { "(bad)", { XX
} },
2374 { "roundpd", { XM
, EXx
, Ib
} },
2375 { "(bad)", { XX
} },
2380 { "(bad)", { XX
} },
2381 { "(bad)", { XX
} },
2382 { "roundss", { XM
, EXd
, Ib
} },
2383 { "(bad)", { XX
} },
2388 { "(bad)", { XX
} },
2389 { "(bad)", { XX
} },
2390 { "roundsd", { XM
, EXq
, Ib
} },
2391 { "(bad)", { XX
} },
2396 { "(bad)", { XX
} },
2397 { "(bad)", { XX
} },
2398 { "blendps", { XM
, EXx
, Ib
} },
2399 { "(bad)", { XX
} },
2404 { "(bad)", { XX
} },
2405 { "(bad)", { XX
} },
2406 { "blendpd", { XM
, EXx
, Ib
} },
2407 { "(bad)", { XX
} },
2412 { "(bad)", { XX
} },
2413 { "(bad)", { XX
} },
2414 { "pblendw", { XM
, EXx
, Ib
} },
2415 { "(bad)", { XX
} },
2420 { "(bad)", { XX
} },
2421 { "(bad)", { XX
} },
2422 { "pextrb", { Edqb
, XM
, Ib
} },
2423 { "(bad)", { XX
} },
2428 { "(bad)", { XX
} },
2429 { "(bad)", { XX
} },
2430 { "pextrw", { Edqw
, XM
, Ib
} },
2431 { "(bad)", { XX
} },
2436 { "(bad)", { XX
} },
2437 { "(bad)", { XX
} },
2438 { "pextrK", { Edq
, XM
, Ib
} },
2439 { "(bad)", { XX
} },
2444 { "(bad)", { XX
} },
2445 { "(bad)", { XX
} },
2446 { "extractps", { Edqd
, XM
, Ib
} },
2447 { "(bad)", { XX
} },
2452 { "(bad)", { XX
} },
2453 { "(bad)", { XX
} },
2454 { "pinsrb", { XM
, Edqb
, Ib
} },
2455 { "(bad)", { XX
} },
2460 { "(bad)", { XX
} },
2461 { "(bad)", { XX
} },
2462 { "insertps", { XM
, EXd
, Ib
} },
2463 { "(bad)", { XX
} },
2468 { "(bad)", { XX
} },
2469 { "(bad)", { XX
} },
2470 { "pinsrK", { XM
, Edq
, Ib
} },
2471 { "(bad)", { XX
} },
2476 { "(bad)", { XX
} },
2477 { "(bad)", { XX
} },
2478 { "dpps", { XM
, EXx
, Ib
} },
2479 { "(bad)", { XX
} },
2484 { "(bad)", { XX
} },
2485 { "(bad)", { XX
} },
2486 { "dppd", { XM
, EXx
, Ib
} },
2487 { "(bad)", { XX
} },
2492 { "(bad)", { XX
} },
2493 { "(bad)", { XX
} },
2494 { "mpsadbw", { XM
, EXx
, Ib
} },
2495 { "(bad)", { XX
} },
2500 { "(bad)", { XX
} },
2501 { "(bad)", { XX
} },
2502 { "pcmpgtq", { XM
, EXx
} },
2503 { "(bad)", { XX
} },
2508 { "(bad)", { XX
} },
2509 { "(bad)", { XX
} },
2510 { "(bad)", { XX
} },
2511 { "crc32", { Gdq
, { CRC32_Fixup
, b_mode
} } },
2516 { "(bad)", { XX
} },
2517 { "(bad)", { XX
} },
2518 { "(bad)", { XX
} },
2519 { "crc32", { Gdq
, { CRC32_Fixup
, v_mode
} } },
2524 { "(bad)", { XX
} },
2525 { "(bad)", { XX
} },
2526 { "pcmpestrm", { XM
, EXx
, Ib
} },
2527 { "(bad)", { XX
} },
2532 { "(bad)", { XX
} },
2533 { "(bad)", { XX
} },
2534 { "pcmpestri", { XM
, EXx
, Ib
} },
2535 { "(bad)", { XX
} },
2540 { "(bad)", { XX
} },
2541 { "(bad)", { XX
} },
2542 { "pcmpistrm", { XM
, EXx
, Ib
} },
2543 { "(bad)", { XX
} },
2548 { "(bad)", { XX
} },
2549 { "(bad)", { XX
} },
2550 { "pcmpistri", { XM
, EXx
, Ib
} },
2551 { "(bad)", { XX
} },
2556 { "ucomiss",{ XM
, EXd
} },
2557 { "(bad)", { XX
} },
2558 { "ucomisd",{ XM
, EXq
} },
2559 { "(bad)", { XX
} },
2564 { "comiss", { XM
, EXd
} },
2565 { "(bad)", { XX
} },
2566 { "comisd", { XM
, EXq
} },
2567 { "(bad)", { XX
} },
2572 { "punpcklbw",{ MX
, EMd
} },
2573 { "(bad)", { XX
} },
2574 { "punpcklbw",{ MX
, EMx
} },
2575 { "(bad)", { XX
} },
2580 { "punpcklwd",{ MX
, EMd
} },
2581 { "(bad)", { XX
} },
2582 { "punpcklwd",{ MX
, EMx
} },
2583 { "(bad)", { XX
} },
2588 { "punpckldq",{ MX
, EMd
} },
2589 { "(bad)", { XX
} },
2590 { "punpckldq",{ MX
, EMx
} },
2591 { "(bad)", { XX
} },
2595 static const struct dis386 x86_64_table
[][2] = {
2597 { "pusha{P|}", { XX
} },
2598 { "(bad)", { XX
} },
2601 { "popa{P|}", { XX
} },
2602 { "(bad)", { XX
} },
2605 { "bound{S|}", { Gv
, Ma
} },
2606 { "(bad)", { XX
} },
2609 { "arpl", { Ew
, Gw
} },
2610 { "movs{||lq|xd}", { Gv
, Ed
} },
2614 static const struct dis386 three_byte_table
[][256] = {
2618 { "pshufb", { MX
, EM
} },
2619 { "phaddw", { MX
, EM
} },
2620 { "phaddd", { MX
, EM
} },
2621 { "phaddsw", { MX
, EM
} },
2622 { "pmaddubsw", { MX
, EM
} },
2623 { "phsubw", { MX
, EM
} },
2624 { "phsubd", { MX
, EM
} },
2625 { "phsubsw", { MX
, EM
} },
2627 { "psignb", { MX
, EM
} },
2628 { "psignw", { MX
, EM
} },
2629 { "psignd", { MX
, EM
} },
2630 { "pmulhrsw", { MX
, EM
} },
2631 { "(bad)", { XX
} },
2632 { "(bad)", { XX
} },
2633 { "(bad)", { XX
} },
2634 { "(bad)", { XX
} },
2637 { "(bad)", { XX
} },
2638 { "(bad)", { XX
} },
2639 { "(bad)", { XX
} },
2642 { "(bad)", { XX
} },
2645 { "(bad)", { XX
} },
2646 { "(bad)", { XX
} },
2647 { "(bad)", { XX
} },
2648 { "(bad)", { XX
} },
2649 { "pabsb", { MX
, EM
} },
2650 { "pabsw", { MX
, EM
} },
2651 { "pabsd", { MX
, EM
} },
2652 { "(bad)", { XX
} },
2660 { "(bad)", { XX
} },
2661 { "(bad)", { XX
} },
2667 { "(bad)", { XX
} },
2668 { "(bad)", { XX
} },
2669 { "(bad)", { XX
} },
2670 { "(bad)", { XX
} },
2678 { "(bad)", { XX
} },
2692 { "(bad)", { XX
} },
2693 { "(bad)", { XX
} },
2694 { "(bad)", { XX
} },
2695 { "(bad)", { XX
} },
2696 { "(bad)", { XX
} },
2697 { "(bad)", { XX
} },
2699 { "(bad)", { XX
} },
2700 { "(bad)", { XX
} },
2701 { "(bad)", { XX
} },
2702 { "(bad)", { XX
} },
2703 { "(bad)", { XX
} },
2704 { "(bad)", { XX
} },
2705 { "(bad)", { XX
} },
2706 { "(bad)", { XX
} },
2708 { "(bad)", { XX
} },
2709 { "(bad)", { XX
} },
2710 { "(bad)", { XX
} },
2711 { "(bad)", { XX
} },
2712 { "(bad)", { XX
} },
2713 { "(bad)", { XX
} },
2714 { "(bad)", { XX
} },
2715 { "(bad)", { XX
} },
2717 { "(bad)", { XX
} },
2718 { "(bad)", { XX
} },
2719 { "(bad)", { XX
} },
2720 { "(bad)", { XX
} },
2721 { "(bad)", { XX
} },
2722 { "(bad)", { XX
} },
2723 { "(bad)", { XX
} },
2724 { "(bad)", { XX
} },
2726 { "(bad)", { XX
} },
2727 { "(bad)", { XX
} },
2728 { "(bad)", { XX
} },
2729 { "(bad)", { XX
} },
2730 { "(bad)", { XX
} },
2731 { "(bad)", { XX
} },
2732 { "(bad)", { XX
} },
2733 { "(bad)", { XX
} },
2735 { "(bad)", { XX
} },
2736 { "(bad)", { XX
} },
2737 { "(bad)", { XX
} },
2738 { "(bad)", { XX
} },
2739 { "(bad)", { XX
} },
2740 { "(bad)", { XX
} },
2741 { "(bad)", { XX
} },
2742 { "(bad)", { XX
} },
2744 { "(bad)", { XX
} },
2745 { "(bad)", { XX
} },
2746 { "(bad)", { XX
} },
2747 { "(bad)", { XX
} },
2748 { "(bad)", { XX
} },
2749 { "(bad)", { XX
} },
2750 { "(bad)", { XX
} },
2751 { "(bad)", { XX
} },
2753 { "(bad)", { XX
} },
2754 { "(bad)", { XX
} },
2755 { "(bad)", { XX
} },
2756 { "(bad)", { XX
} },
2757 { "(bad)", { XX
} },
2758 { "(bad)", { XX
} },
2759 { "(bad)", { XX
} },
2760 { "(bad)", { XX
} },
2762 { "(bad)", { XX
} },
2763 { "(bad)", { XX
} },
2764 { "(bad)", { XX
} },
2765 { "(bad)", { XX
} },
2766 { "(bad)", { XX
} },
2767 { "(bad)", { XX
} },
2768 { "(bad)", { XX
} },
2769 { "(bad)", { XX
} },
2771 { "(bad)", { XX
} },
2772 { "(bad)", { XX
} },
2773 { "(bad)", { XX
} },
2774 { "(bad)", { XX
} },
2775 { "(bad)", { XX
} },
2776 { "(bad)", { XX
} },
2777 { "(bad)", { XX
} },
2778 { "(bad)", { XX
} },
2780 { "(bad)", { XX
} },
2781 { "(bad)", { XX
} },
2782 { "(bad)", { XX
} },
2783 { "(bad)", { XX
} },
2784 { "(bad)", { XX
} },
2785 { "(bad)", { XX
} },
2786 { "(bad)", { XX
} },
2787 { "(bad)", { XX
} },
2789 { "(bad)", { XX
} },
2790 { "(bad)", { XX
} },
2791 { "(bad)", { XX
} },
2792 { "(bad)", { XX
} },
2793 { "(bad)", { XX
} },
2794 { "(bad)", { XX
} },
2795 { "(bad)", { XX
} },
2796 { "(bad)", { XX
} },
2798 { "(bad)", { XX
} },
2799 { "(bad)", { XX
} },
2800 { "(bad)", { XX
} },
2801 { "(bad)", { XX
} },
2802 { "(bad)", { XX
} },
2803 { "(bad)", { XX
} },
2804 { "(bad)", { XX
} },
2805 { "(bad)", { XX
} },
2807 { "(bad)", { XX
} },
2808 { "(bad)", { XX
} },
2809 { "(bad)", { XX
} },
2810 { "(bad)", { XX
} },
2811 { "(bad)", { XX
} },
2812 { "(bad)", { XX
} },
2813 { "(bad)", { XX
} },
2814 { "(bad)", { XX
} },
2816 { "(bad)", { XX
} },
2817 { "(bad)", { XX
} },
2818 { "(bad)", { XX
} },
2819 { "(bad)", { XX
} },
2820 { "(bad)", { XX
} },
2821 { "(bad)", { XX
} },
2822 { "(bad)", { XX
} },
2823 { "(bad)", { XX
} },
2825 { "(bad)", { XX
} },
2826 { "(bad)", { XX
} },
2827 { "(bad)", { XX
} },
2828 { "(bad)", { XX
} },
2829 { "(bad)", { XX
} },
2830 { "(bad)", { XX
} },
2831 { "(bad)", { XX
} },
2832 { "(bad)", { XX
} },
2834 { "(bad)", { XX
} },
2835 { "(bad)", { XX
} },
2836 { "(bad)", { XX
} },
2837 { "(bad)", { XX
} },
2838 { "(bad)", { XX
} },
2839 { "(bad)", { XX
} },
2840 { "(bad)", { XX
} },
2841 { "(bad)", { XX
} },
2843 { "(bad)", { XX
} },
2844 { "(bad)", { XX
} },
2845 { "(bad)", { XX
} },
2846 { "(bad)", { XX
} },
2847 { "(bad)", { XX
} },
2848 { "(bad)", { XX
} },
2849 { "(bad)", { XX
} },
2850 { "(bad)", { XX
} },
2852 { "(bad)", { XX
} },
2853 { "(bad)", { XX
} },
2854 { "(bad)", { XX
} },
2855 { "(bad)", { XX
} },
2856 { "(bad)", { XX
} },
2857 { "(bad)", { XX
} },
2858 { "(bad)", { XX
} },
2859 { "(bad)", { XX
} },
2861 { "(bad)", { XX
} },
2862 { "(bad)", { XX
} },
2863 { "(bad)", { XX
} },
2864 { "(bad)", { XX
} },
2865 { "(bad)", { XX
} },
2866 { "(bad)", { XX
} },
2867 { "(bad)", { XX
} },
2868 { "(bad)", { XX
} },
2870 { "(bad)", { XX
} },
2871 { "(bad)", { XX
} },
2872 { "(bad)", { XX
} },
2873 { "(bad)", { XX
} },
2874 { "(bad)", { XX
} },
2875 { "(bad)", { XX
} },
2876 { "(bad)", { XX
} },
2877 { "(bad)", { XX
} },
2879 { "(bad)", { XX
} },
2880 { "(bad)", { XX
} },
2881 { "(bad)", { XX
} },
2882 { "(bad)", { XX
} },
2883 { "(bad)", { XX
} },
2884 { "(bad)", { XX
} },
2885 { "(bad)", { XX
} },
2886 { "(bad)", { XX
} },
2890 { "(bad)", { XX
} },
2891 { "(bad)", { XX
} },
2892 { "(bad)", { XX
} },
2893 { "(bad)", { XX
} },
2894 { "(bad)", { XX
} },
2895 { "(bad)", { XX
} },
2897 { "(bad)", { XX
} },
2898 { "(bad)", { XX
} },
2899 { "(bad)", { XX
} },
2900 { "(bad)", { XX
} },
2901 { "(bad)", { XX
} },
2902 { "(bad)", { XX
} },
2903 { "(bad)", { XX
} },
2904 { "(bad)", { XX
} },
2909 { "(bad)", { XX
} },
2910 { "(bad)", { XX
} },
2911 { "(bad)", { XX
} },
2912 { "(bad)", { XX
} },
2913 { "(bad)", { XX
} },
2914 { "(bad)", { XX
} },
2915 { "(bad)", { XX
} },
2916 { "(bad)", { XX
} },
2925 { "palignr", { MX
, EM
, Ib
} },
2927 { "(bad)", { XX
} },
2928 { "(bad)", { XX
} },
2929 { "(bad)", { XX
} },
2930 { "(bad)", { XX
} },
2936 { "(bad)", { XX
} },
2937 { "(bad)", { XX
} },
2938 { "(bad)", { XX
} },
2939 { "(bad)", { XX
} },
2940 { "(bad)", { XX
} },
2941 { "(bad)", { XX
} },
2942 { "(bad)", { XX
} },
2943 { "(bad)", { XX
} },
2948 { "(bad)", { XX
} },
2949 { "(bad)", { XX
} },
2950 { "(bad)", { XX
} },
2951 { "(bad)", { XX
} },
2952 { "(bad)", { XX
} },
2954 { "(bad)", { XX
} },
2955 { "(bad)", { XX
} },
2956 { "(bad)", { XX
} },
2957 { "(bad)", { XX
} },
2958 { "(bad)", { XX
} },
2959 { "(bad)", { XX
} },
2960 { "(bad)", { XX
} },
2961 { "(bad)", { XX
} },
2963 { "(bad)", { XX
} },
2964 { "(bad)", { XX
} },
2965 { "(bad)", { XX
} },
2966 { "(bad)", { XX
} },
2967 { "(bad)", { XX
} },
2968 { "(bad)", { XX
} },
2969 { "(bad)", { XX
} },
2970 { "(bad)", { XX
} },
2972 { "(bad)", { XX
} },
2973 { "(bad)", { XX
} },
2974 { "(bad)", { XX
} },
2975 { "(bad)", { XX
} },
2976 { "(bad)", { XX
} },
2977 { "(bad)", { XX
} },
2978 { "(bad)", { XX
} },
2979 { "(bad)", { XX
} },
2984 { "(bad)", { XX
} },
2985 { "(bad)", { XX
} },
2986 { "(bad)", { XX
} },
2987 { "(bad)", { XX
} },
2988 { "(bad)", { XX
} },
2990 { "(bad)", { XX
} },
2991 { "(bad)", { XX
} },
2992 { "(bad)", { XX
} },
2993 { "(bad)", { XX
} },
2994 { "(bad)", { XX
} },
2995 { "(bad)", { XX
} },
2996 { "(bad)", { XX
} },
2997 { "(bad)", { XX
} },
2999 { "(bad)", { XX
} },
3000 { "(bad)", { XX
} },
3001 { "(bad)", { XX
} },
3002 { "(bad)", { XX
} },
3003 { "(bad)", { XX
} },
3004 { "(bad)", { XX
} },
3005 { "(bad)", { XX
} },
3006 { "(bad)", { XX
} },
3008 { "(bad)", { XX
} },
3009 { "(bad)", { XX
} },
3010 { "(bad)", { XX
} },
3011 { "(bad)", { XX
} },
3012 { "(bad)", { XX
} },
3013 { "(bad)", { XX
} },
3014 { "(bad)", { XX
} },
3015 { "(bad)", { XX
} },
3021 { "(bad)", { XX
} },
3022 { "(bad)", { XX
} },
3023 { "(bad)", { XX
} },
3024 { "(bad)", { XX
} },
3026 { "(bad)", { XX
} },
3027 { "(bad)", { XX
} },
3028 { "(bad)", { XX
} },
3029 { "(bad)", { XX
} },
3030 { "(bad)", { XX
} },
3031 { "(bad)", { XX
} },
3032 { "(bad)", { XX
} },
3033 { "(bad)", { XX
} },
3035 { "(bad)", { XX
} },
3036 { "(bad)", { XX
} },
3037 { "(bad)", { XX
} },
3038 { "(bad)", { XX
} },
3039 { "(bad)", { XX
} },
3040 { "(bad)", { XX
} },
3041 { "(bad)", { XX
} },
3042 { "(bad)", { XX
} },
3044 { "(bad)", { XX
} },
3045 { "(bad)", { XX
} },
3046 { "(bad)", { XX
} },
3047 { "(bad)", { XX
} },
3048 { "(bad)", { XX
} },
3049 { "(bad)", { XX
} },
3050 { "(bad)", { XX
} },
3051 { "(bad)", { XX
} },
3053 { "(bad)", { XX
} },
3054 { "(bad)", { XX
} },
3055 { "(bad)", { XX
} },
3056 { "(bad)", { XX
} },
3057 { "(bad)", { XX
} },
3058 { "(bad)", { XX
} },
3059 { "(bad)", { XX
} },
3060 { "(bad)", { XX
} },
3062 { "(bad)", { XX
} },
3063 { "(bad)", { XX
} },
3064 { "(bad)", { XX
} },
3065 { "(bad)", { XX
} },
3066 { "(bad)", { XX
} },
3067 { "(bad)", { XX
} },
3068 { "(bad)", { XX
} },
3069 { "(bad)", { XX
} },
3071 { "(bad)", { XX
} },
3072 { "(bad)", { XX
} },
3073 { "(bad)", { XX
} },
3074 { "(bad)", { XX
} },
3075 { "(bad)", { XX
} },
3076 { "(bad)", { XX
} },
3077 { "(bad)", { XX
} },
3078 { "(bad)", { XX
} },
3080 { "(bad)", { XX
} },
3081 { "(bad)", { XX
} },
3082 { "(bad)", { XX
} },
3083 { "(bad)", { XX
} },
3084 { "(bad)", { XX
} },
3085 { "(bad)", { XX
} },
3086 { "(bad)", { XX
} },
3087 { "(bad)", { XX
} },
3089 { "(bad)", { XX
} },
3090 { "(bad)", { XX
} },
3091 { "(bad)", { XX
} },
3092 { "(bad)", { XX
} },
3093 { "(bad)", { XX
} },
3094 { "(bad)", { XX
} },
3095 { "(bad)", { XX
} },
3096 { "(bad)", { XX
} },
3098 { "(bad)", { XX
} },
3099 { "(bad)", { XX
} },
3100 { "(bad)", { XX
} },
3101 { "(bad)", { XX
} },
3102 { "(bad)", { XX
} },
3103 { "(bad)", { XX
} },
3104 { "(bad)", { XX
} },
3105 { "(bad)", { XX
} },
3107 { "(bad)", { XX
} },
3108 { "(bad)", { XX
} },
3109 { "(bad)", { XX
} },
3110 { "(bad)", { XX
} },
3111 { "(bad)", { XX
} },
3112 { "(bad)", { XX
} },
3113 { "(bad)", { XX
} },
3114 { "(bad)", { XX
} },
3116 { "(bad)", { XX
} },
3117 { "(bad)", { XX
} },
3118 { "(bad)", { XX
} },
3119 { "(bad)", { XX
} },
3120 { "(bad)", { XX
} },
3121 { "(bad)", { XX
} },
3122 { "(bad)", { XX
} },
3123 { "(bad)", { XX
} },
3125 { "(bad)", { XX
} },
3126 { "(bad)", { XX
} },
3127 { "(bad)", { XX
} },
3128 { "(bad)", { XX
} },
3129 { "(bad)", { XX
} },
3130 { "(bad)", { XX
} },
3131 { "(bad)", { XX
} },
3132 { "(bad)", { XX
} },
3134 { "(bad)", { XX
} },
3135 { "(bad)", { XX
} },
3136 { "(bad)", { XX
} },
3137 { "(bad)", { XX
} },
3138 { "(bad)", { XX
} },
3139 { "(bad)", { XX
} },
3140 { "(bad)", { XX
} },
3141 { "(bad)", { XX
} },
3143 { "(bad)", { XX
} },
3144 { "(bad)", { XX
} },
3145 { "(bad)", { XX
} },
3146 { "(bad)", { XX
} },
3147 { "(bad)", { XX
} },
3148 { "(bad)", { XX
} },
3149 { "(bad)", { XX
} },
3150 { "(bad)", { XX
} },
3152 { "(bad)", { XX
} },
3153 { "(bad)", { XX
} },
3154 { "(bad)", { XX
} },
3155 { "(bad)", { XX
} },
3156 { "(bad)", { XX
} },
3157 { "(bad)", { XX
} },
3158 { "(bad)", { XX
} },
3159 { "(bad)", { XX
} },
3161 { "(bad)", { XX
} },
3162 { "(bad)", { XX
} },
3163 { "(bad)", { XX
} },
3164 { "(bad)", { XX
} },
3165 { "(bad)", { XX
} },
3166 { "(bad)", { XX
} },
3167 { "(bad)", { XX
} },
3168 { "(bad)", { XX
} },
3170 { "(bad)", { XX
} },
3171 { "(bad)", { XX
} },
3172 { "(bad)", { XX
} },
3173 { "(bad)", { XX
} },
3174 { "(bad)", { XX
} },
3175 { "(bad)", { XX
} },
3176 { "(bad)", { XX
} },
3177 { "(bad)", { XX
} },
3179 { "(bad)", { XX
} },
3180 { "(bad)", { XX
} },
3181 { "(bad)", { XX
} },
3182 { "(bad)", { XX
} },
3183 { "(bad)", { XX
} },
3184 { "(bad)", { XX
} },
3185 { "(bad)", { XX
} },
3186 { "(bad)", { XX
} },
3188 { "(bad)", { XX
} },
3189 { "(bad)", { XX
} },
3190 { "(bad)", { XX
} },
3191 { "(bad)", { XX
} },
3192 { "(bad)", { XX
} },
3193 { "(bad)", { XX
} },
3194 { "(bad)", { XX
} },
3195 { "(bad)", { XX
} },
3199 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3211 FETCH_DATA (the_info
, codep
+ 1);
3215 /* REX prefixes family. */
3232 if (address_mode
== mode_64bit
)
3238 prefixes
|= PREFIX_REPZ
;
3241 prefixes
|= PREFIX_REPNZ
;
3244 prefixes
|= PREFIX_LOCK
;
3247 prefixes
|= PREFIX_CS
;
3250 prefixes
|= PREFIX_SS
;
3253 prefixes
|= PREFIX_DS
;
3256 prefixes
|= PREFIX_ES
;
3259 prefixes
|= PREFIX_FS
;
3262 prefixes
|= PREFIX_GS
;
3265 prefixes
|= PREFIX_DATA
;
3268 prefixes
|= PREFIX_ADDR
;
3271 /* fwait is really an instruction. If there are prefixes
3272 before the fwait, they belong to the fwait, *not* to the
3273 following instruction. */
3274 if (prefixes
|| rex
)
3276 prefixes
|= PREFIX_FWAIT
;
3280 prefixes
= PREFIX_FWAIT
;
3285 /* Rex is ignored when followed by another prefix. */
3296 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3300 prefix_name (int pref
, int sizeflag
)
3302 static const char *rexes
[16] =
3307 "rex.XB", /* 0x43 */
3309 "rex.RB", /* 0x45 */
3310 "rex.RX", /* 0x46 */
3311 "rex.RXB", /* 0x47 */
3313 "rex.WB", /* 0x49 */
3314 "rex.WX", /* 0x4a */
3315 "rex.WXB", /* 0x4b */
3316 "rex.WR", /* 0x4c */
3317 "rex.WRB", /* 0x4d */
3318 "rex.WRX", /* 0x4e */
3319 "rex.WRXB", /* 0x4f */
3324 /* REX prefixes family. */
3341 return rexes
[pref
- 0x40];
3361 return (sizeflag
& DFLAG
) ? "data16" : "data32";
3363 if (address_mode
== mode_64bit
)
3364 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
3366 return (sizeflag
& AFLAG
) ? "addr16" : "addr32";
3374 static char op_out
[MAX_OPERANDS
][100];
3375 static int op_ad
, op_index
[MAX_OPERANDS
];
3376 static int two_source_ops
;
3377 static bfd_vma op_address
[MAX_OPERANDS
];
3378 static bfd_vma op_riprel
[MAX_OPERANDS
];
3379 static bfd_vma start_pc
;
3382 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3383 * (see topic "Redundant prefixes" in the "Differences from 8086"
3384 * section of the "Virtual 8086 Mode" chapter.)
3385 * 'pc' should be the address of this instruction, it will
3386 * be used to print the target address if this is a relative jump or call
3387 * The function returns the length of this instruction in bytes.
3390 static char intel_syntax
;
3391 static char open_char
;
3392 static char close_char
;
3393 static char separator_char
;
3394 static char scale_char
;
3396 /* Here for backwards compatibility. When gdb stops using
3397 print_insn_i386_att and print_insn_i386_intel these functions can
3398 disappear, and print_insn_i386 be merged into print_insn. */
3400 print_insn_i386_att (bfd_vma pc
, disassemble_info
*info
)
3404 return print_insn (pc
, info
);
3408 print_insn_i386_intel (bfd_vma pc
, disassemble_info
*info
)
3412 return print_insn (pc
, info
);
3416 print_insn_i386 (bfd_vma pc
, disassemble_info
*info
)
3420 return print_insn (pc
, info
);
3424 print_i386_disassembler_options (FILE *stream
)
3426 fprintf (stream
, _("\n\
3427 The following i386/x86-64 specific disassembler options are supported for use\n\
3428 with the -M switch (multiple options should be separated by commas):\n"));
3430 fprintf (stream
, _(" x86-64 Disassemble in 64bit mode\n"));
3431 fprintf (stream
, _(" i386 Disassemble in 32bit mode\n"));
3432 fprintf (stream
, _(" i8086 Disassemble in 16bit mode\n"));
3433 fprintf (stream
, _(" att Display instruction in AT&T syntax\n"));
3434 fprintf (stream
, _(" intel Display instruction in Intel syntax\n"));
3435 fprintf (stream
, _(" addr64 Assume 64bit address size\n"));
3436 fprintf (stream
, _(" addr32 Assume 32bit address size\n"));
3437 fprintf (stream
, _(" addr16 Assume 16bit address size\n"));
3438 fprintf (stream
, _(" data32 Assume 32bit data size\n"));
3439 fprintf (stream
, _(" data16 Assume 16bit data size\n"));
3440 fprintf (stream
, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3444 print_insn (bfd_vma pc
, disassemble_info
*info
)
3446 const struct dis386
*dp
;
3448 char *op_txt
[MAX_OPERANDS
];
3450 unsigned char uses_DATA_prefix
, uses_LOCK_prefix
;
3451 unsigned char uses_REPNZ_prefix
, uses_REPZ_prefix
;
3454 struct dis_private priv
;
3457 if (info
->mach
== bfd_mach_x86_64_intel_syntax
3458 || info
->mach
== bfd_mach_x86_64
)
3459 address_mode
= mode_64bit
;
3461 address_mode
= mode_32bit
;
3463 if (intel_syntax
== (char) -1)
3464 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
3465 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
3467 if (info
->mach
== bfd_mach_i386_i386
3468 || info
->mach
== bfd_mach_x86_64
3469 || info
->mach
== bfd_mach_i386_i386_intel_syntax
3470 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
3471 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3472 else if (info
->mach
== bfd_mach_i386_i8086
)
3473 priv
.orig_sizeflag
= 0;
3477 for (p
= info
->disassembler_options
; p
!= NULL
; )
3479 if (CONST_STRNEQ (p
, "x86-64"))
3481 address_mode
= mode_64bit
;
3482 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3484 else if (CONST_STRNEQ (p
, "i386"))
3486 address_mode
= mode_32bit
;
3487 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3489 else if (CONST_STRNEQ (p
, "i8086"))
3491 address_mode
= mode_16bit
;
3492 priv
.orig_sizeflag
= 0;
3494 else if (CONST_STRNEQ (p
, "intel"))
3498 else if (CONST_STRNEQ (p
, "att"))
3502 else if (CONST_STRNEQ (p
, "addr"))
3504 if (address_mode
== mode_64bit
)
3506 if (p
[4] == '3' && p
[5] == '2')
3507 priv
.orig_sizeflag
&= ~AFLAG
;
3508 else if (p
[4] == '6' && p
[5] == '4')
3509 priv
.orig_sizeflag
|= AFLAG
;
3513 if (p
[4] == '1' && p
[5] == '6')
3514 priv
.orig_sizeflag
&= ~AFLAG
;
3515 else if (p
[4] == '3' && p
[5] == '2')
3516 priv
.orig_sizeflag
|= AFLAG
;
3519 else if (CONST_STRNEQ (p
, "data"))
3521 if (p
[4] == '1' && p
[5] == '6')
3522 priv
.orig_sizeflag
&= ~DFLAG
;
3523 else if (p
[4] == '3' && p
[5] == '2')
3524 priv
.orig_sizeflag
|= DFLAG
;
3526 else if (CONST_STRNEQ (p
, "suffix"))
3527 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
3529 p
= strchr (p
, ',');
3536 names64
= intel_names64
;
3537 names32
= intel_names32
;
3538 names16
= intel_names16
;
3539 names8
= intel_names8
;
3540 names8rex
= intel_names8rex
;
3541 names_seg
= intel_names_seg
;
3542 index16
= intel_index16
;
3545 separator_char
= '+';
3550 names64
= att_names64
;
3551 names32
= att_names32
;
3552 names16
= att_names16
;
3553 names8
= att_names8
;
3554 names8rex
= att_names8rex
;
3555 names_seg
= att_names_seg
;
3556 index16
= att_index16
;
3559 separator_char
= ',';
3563 /* The output looks better if we put 7 bytes on a line, since that
3564 puts most long word instructions on a single line. */
3565 info
->bytes_per_line
= 7;
3567 info
->private_data
= &priv
;
3568 priv
.max_fetched
= priv
.the_buffer
;
3569 priv
.insn_start
= pc
;
3572 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3580 start_codep
= priv
.the_buffer
;
3581 codep
= priv
.the_buffer
;
3583 if (setjmp (priv
.bailout
) != 0)
3587 /* Getting here means we tried for data but didn't get it. That
3588 means we have an incomplete instruction of some sort. Just
3589 print the first byte as a prefix or a .byte pseudo-op. */
3590 if (codep
> priv
.the_buffer
)
3592 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3594 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3597 /* Just print the first byte as a .byte instruction. */
3598 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
3599 (unsigned int) priv
.the_buffer
[0]);
3612 sizeflag
= priv
.orig_sizeflag
;
3614 FETCH_DATA (info
, codep
+ 1);
3615 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
3617 if (((prefixes
& PREFIX_FWAIT
)
3618 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
3619 || (rex
&& rex_used
))
3623 /* fwait not followed by floating point instruction, or rex followed
3624 by other prefixes. Print the first prefix. */
3625 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3627 name
= INTERNAL_DISASSEMBLER_ERROR
;
3628 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3635 unsigned char threebyte
;
3636 FETCH_DATA (info
, codep
+ 2);
3637 threebyte
= *++codep
;
3638 dp
= &dis386_twobyte
[threebyte
];
3639 need_modrm
= twobyte_has_modrm
[*codep
];
3640 uses_DATA_prefix
= twobyte_uses_DATA_prefix
[*codep
];
3641 uses_REPNZ_prefix
= twobyte_uses_REPNZ_prefix
[*codep
];
3642 uses_REPZ_prefix
= twobyte_uses_REPZ_prefix
[*codep
];
3643 uses_LOCK_prefix
= (*codep
& ~0x02) == 0x20;
3645 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3647 FETCH_DATA (info
, codep
+ 2);
3652 uses_DATA_prefix
= threebyte_0x38_uses_DATA_prefix
[op
];
3653 uses_REPNZ_prefix
= threebyte_0x38_uses_REPNZ_prefix
[op
];
3654 uses_REPZ_prefix
= threebyte_0x38_uses_REPZ_prefix
[op
];
3657 uses_DATA_prefix
= threebyte_0x3a_uses_DATA_prefix
[op
];
3658 uses_REPNZ_prefix
= threebyte_0x3a_uses_REPNZ_prefix
[op
];
3659 uses_REPZ_prefix
= threebyte_0x3a_uses_REPZ_prefix
[op
];
3668 dp
= &dis386
[*codep
];
3669 need_modrm
= onebyte_has_modrm
[*codep
];
3670 uses_DATA_prefix
= 0;
3671 uses_REPNZ_prefix
= 0;
3672 /* pause is 0xf3 0x90. */
3673 uses_REPZ_prefix
= *codep
== 0x90;
3674 uses_LOCK_prefix
= 0;
3678 if (!uses_REPZ_prefix
&& (prefixes
& PREFIX_REPZ
))
3681 used_prefixes
|= PREFIX_REPZ
;
3683 if (!uses_REPNZ_prefix
&& (prefixes
& PREFIX_REPNZ
))
3686 used_prefixes
|= PREFIX_REPNZ
;
3689 if (!uses_LOCK_prefix
&& (prefixes
& PREFIX_LOCK
))
3692 used_prefixes
|= PREFIX_LOCK
;
3695 if (prefixes
& PREFIX_ADDR
)
3698 if (dp
->op
[2].bytemode
!= loop_jcxz_mode
|| intel_syntax
)
3700 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
3701 oappend ("addr32 ");
3703 oappend ("addr16 ");
3704 used_prefixes
|= PREFIX_ADDR
;
3708 if (!uses_DATA_prefix
&& (prefixes
& PREFIX_DATA
))
3711 if (dp
->op
[2].bytemode
== cond_jump_mode
3712 && dp
->op
[0].bytemode
== v_mode
3715 if (sizeflag
& DFLAG
)
3716 oappend ("data32 ");
3718 oappend ("data16 ");
3719 used_prefixes
|= PREFIX_DATA
;
3723 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3725 dp
= &three_byte_table
[dp
->op
[1].bytemode
][op
];
3726 modrm
.mod
= (*codep
>> 6) & 3;
3727 modrm
.reg
= (*codep
>> 3) & 7;
3728 modrm
.rm
= *codep
& 7;
3730 else if (need_modrm
)
3732 FETCH_DATA (info
, codep
+ 1);
3733 modrm
.mod
= (*codep
>> 6) & 3;
3734 modrm
.reg
= (*codep
>> 3) & 7;
3735 modrm
.rm
= *codep
& 7;
3738 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== FLOATCODE
)
3745 if (dp
->name
== NULL
)
3747 switch (dp
->op
[0].bytemode
)
3750 dp
= &grps
[dp
->op
[1].bytemode
][modrm
.reg
];
3753 case USE_PREFIX_USER_TABLE
:
3755 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
3756 if (prefixes
& PREFIX_REPZ
)
3760 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3761 before PREFIX_DATA. */
3762 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
3763 if (prefixes
& PREFIX_REPNZ
)
3767 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3768 if (prefixes
& PREFIX_DATA
)
3772 dp
= &prefix_user_table
[dp
->op
[1].bytemode
][index
];
3775 case X86_64_SPECIAL
:
3776 index
= address_mode
== mode_64bit
? 1 : 0;
3777 dp
= &x86_64_table
[dp
->op
[1].bytemode
][index
];
3781 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3786 if (dp
->name
!= NULL
&& putop (dp
->name
, sizeflag
) == 0)
3788 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3791 op_ad
= MAX_OPERANDS
- 1 - i
;
3793 (*dp
->op
[i
].rtn
) (dp
->op
[i
].bytemode
, sizeflag
);
3798 /* See if any prefixes were not used. If so, print the first one
3799 separately. If we don't do this, we'll wind up printing an
3800 instruction stream which does not precisely correspond to the
3801 bytes we are disassembling. */
3802 if ((prefixes
& ~used_prefixes
) != 0)
3806 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3808 name
= INTERNAL_DISASSEMBLER_ERROR
;
3809 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3812 if (rex
& ~rex_used
)
3815 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
3817 name
= INTERNAL_DISASSEMBLER_ERROR
;
3818 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
3821 obufp
= obuf
+ strlen (obuf
);
3822 for (i
= strlen (obuf
); i
< 6; i
++)
3825 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
3827 /* The enter and bound instructions are printed with operands in the same
3828 order as the intel book; everything else is printed in reverse order. */
3829 if (intel_syntax
|| two_source_ops
)
3833 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3834 op_txt
[i
] = op_out
[i
];
3836 for (i
= 0; i
< (MAX_OPERANDS
>> 1); ++i
)
3838 op_ad
= op_index
[i
];
3839 op_index
[i
] = op_index
[MAX_OPERANDS
- 1 - i
];
3840 op_index
[MAX_OPERANDS
- 1 - i
] = op_ad
;
3841 riprel
= op_riprel
[i
];
3842 op_riprel
[i
] = op_riprel
[MAX_OPERANDS
- 1 - i
];
3843 op_riprel
[MAX_OPERANDS
- 1 - i
] = riprel
;
3848 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3849 op_txt
[MAX_OPERANDS
- 1 - i
] = op_out
[i
];
3853 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3857 (*info
->fprintf_func
) (info
->stream
, ",");
3858 if (op_index
[i
] != -1 && !op_riprel
[i
])
3859 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[i
]], info
);
3861 (*info
->fprintf_func
) (info
->stream
, "%s", op_txt
[i
]);
3865 for (i
= 0; i
< MAX_OPERANDS
; i
++)
3866 if (op_index
[i
] != -1 && op_riprel
[i
])
3868 (*info
->fprintf_func
) (info
->stream
, " # ");
3869 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
3870 + op_address
[op_index
[i
]]), info
);
3873 return codep
- priv
.the_buffer
;
3876 static const char *float_mem
[] = {
3951 static const unsigned char float_mem_mode
[] = {
4026 #define ST { OP_ST, 0 }
4027 #define STi { OP_STi, 0 }
4029 #define FGRPd9_2 NULL, { { NULL, 0 } }
4030 #define FGRPd9_4 NULL, { { NULL, 1 } }
4031 #define FGRPd9_5 NULL, { { NULL, 2 } }
4032 #define FGRPd9_6 NULL, { { NULL, 3 } }
4033 #define FGRPd9_7 NULL, { { NULL, 4 } }
4034 #define FGRPda_5 NULL, { { NULL, 5 } }
4035 #define FGRPdb_4 NULL, { { NULL, 6 } }
4036 #define FGRPde_3 NULL, { { NULL, 7 } }
4037 #define FGRPdf_4 NULL, { { NULL, 8 } }
4039 static const struct dis386 float_reg
[][8] = {
4042 { "fadd", { ST
, STi
} },
4043 { "fmul", { ST
, STi
} },
4044 { "fcom", { STi
} },
4045 { "fcomp", { STi
} },
4046 { "fsub", { ST
, STi
} },
4047 { "fsubr", { ST
, STi
} },
4048 { "fdiv", { ST
, STi
} },
4049 { "fdivr", { ST
, STi
} },
4054 { "fxch", { STi
} },
4056 { "(bad)", { XX
} },
4064 { "fcmovb", { ST
, STi
} },
4065 { "fcmove", { ST
, STi
} },
4066 { "fcmovbe",{ ST
, STi
} },
4067 { "fcmovu", { ST
, STi
} },
4068 { "(bad)", { XX
} },
4070 { "(bad)", { XX
} },
4071 { "(bad)", { XX
} },
4075 { "fcmovnb",{ ST
, STi
} },
4076 { "fcmovne",{ ST
, STi
} },
4077 { "fcmovnbe",{ ST
, STi
} },
4078 { "fcmovnu",{ ST
, STi
} },
4080 { "fucomi", { ST
, STi
} },
4081 { "fcomi", { ST
, STi
} },
4082 { "(bad)", { XX
} },
4086 { "fadd", { STi
, ST
} },
4087 { "fmul", { STi
, ST
} },
4088 { "(bad)", { XX
} },
4089 { "(bad)", { XX
} },
4091 { "fsub", { STi
, ST
} },
4092 { "fsubr", { STi
, ST
} },
4093 { "fdiv", { STi
, ST
} },
4094 { "fdivr", { STi
, ST
} },
4096 { "fsubr", { STi
, ST
} },
4097 { "fsub", { STi
, ST
} },
4098 { "fdivr", { STi
, ST
} },
4099 { "fdiv", { STi
, ST
} },
4104 { "ffree", { STi
} },
4105 { "(bad)", { XX
} },
4107 { "fstp", { STi
} },
4108 { "fucom", { STi
} },
4109 { "fucomp", { STi
} },
4110 { "(bad)", { XX
} },
4111 { "(bad)", { XX
} },
4115 { "faddp", { STi
, ST
} },
4116 { "fmulp", { STi
, ST
} },
4117 { "(bad)", { XX
} },
4120 { "fsubp", { STi
, ST
} },
4121 { "fsubrp", { STi
, ST
} },
4122 { "fdivp", { STi
, ST
} },
4123 { "fdivrp", { STi
, ST
} },
4125 { "fsubrp", { STi
, ST
} },
4126 { "fsubp", { STi
, ST
} },
4127 { "fdivrp", { STi
, ST
} },
4128 { "fdivp", { STi
, ST
} },
4133 { "ffreep", { STi
} },
4134 { "(bad)", { XX
} },
4135 { "(bad)", { XX
} },
4136 { "(bad)", { XX
} },
4138 { "fucomip", { ST
, STi
} },
4139 { "fcomip", { ST
, STi
} },
4140 { "(bad)", { XX
} },
4144 static char *fgrps
[][8] = {
4147 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4152 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4157 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4162 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4167 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4172 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4177 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4178 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4183 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4188 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4193 dofloat (int sizeflag
)
4195 const struct dis386
*dp
;
4196 unsigned char floatop
;
4198 floatop
= codep
[-1];
4202 int fp_indx
= (floatop
- 0xd8) * 8 + modrm
.reg
;
4204 putop (float_mem
[fp_indx
], sizeflag
);
4207 OP_E (float_mem_mode
[fp_indx
], sizeflag
);
4210 /* Skip mod/rm byte. */
4214 dp
= &float_reg
[floatop
- 0xd8][modrm
.reg
];
4215 if (dp
->name
== NULL
)
4217 putop (fgrps
[dp
->op
[0].bytemode
][modrm
.rm
], sizeflag
);
4219 /* Instruction fnstsw is only one with strange arg. */
4220 if (floatop
== 0xdf && codep
[-1] == 0xe0)
4221 strcpy (op_out
[0], names16
[0]);
4225 putop (dp
->name
, sizeflag
);
4230 (*dp
->op
[0].rtn
) (dp
->op
[0].bytemode
, sizeflag
);
4235 (*dp
->op
[1].rtn
) (dp
->op
[1].bytemode
, sizeflag
);
4240 OP_ST (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4242 oappend ("%st" + intel_syntax
);
4246 OP_STi (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4248 sprintf (scratchbuf
, "%%st(%d)", modrm
.rm
);
4249 oappend (scratchbuf
+ intel_syntax
);
4252 /* Capital letters in template are macros. */
4254 putop (const char *template, int sizeflag
)
4259 for (p
= template; *p
; p
++)
4270 if (address_mode
== mode_64bit
)
4278 /* Alternative not valid. */
4279 strcpy (obuf
, "(bad)");
4283 else if (*p
== '\0')
4304 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4310 if (sizeflag
& SUFFIX_ALWAYS
)
4314 if (intel_syntax
&& !alt
)
4316 if ((prefixes
& PREFIX_DATA
) || (sizeflag
& SUFFIX_ALWAYS
))
4318 if (sizeflag
& DFLAG
)
4319 *obufp
++ = intel_syntax
? 'd' : 'l';
4321 *obufp
++ = intel_syntax
? 'w' : 's';
4322 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4326 if (intel_syntax
|| !(sizeflag
& SUFFIX_ALWAYS
))
4333 else if (sizeflag
& DFLAG
)
4334 *obufp
++ = intel_syntax
? 'd' : 'l';
4337 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4342 case 'E': /* For jcxz/jecxz */
4343 if (address_mode
== mode_64bit
)
4345 if (sizeflag
& AFLAG
)
4351 if (sizeflag
& AFLAG
)
4353 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4358 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
4360 if (sizeflag
& AFLAG
)
4361 *obufp
++ = address_mode
== mode_64bit
? 'q' : 'l';
4363 *obufp
++ = address_mode
== mode_64bit
? 'l' : 'w';
4364 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4368 if (intel_syntax
|| (obufp
[-1] != 's' && !(sizeflag
& SUFFIX_ALWAYS
)))
4370 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4375 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4380 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
4381 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
4383 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
4386 if (prefixes
& PREFIX_DS
)
4407 if (address_mode
== mode_64bit
&& (sizeflag
& SUFFIX_ALWAYS
))
4416 if (sizeflag
& SUFFIX_ALWAYS
)
4420 if ((prefixes
& PREFIX_FWAIT
) == 0)
4423 used_prefixes
|= PREFIX_FWAIT
;
4429 else if (intel_syntax
&& (sizeflag
& DFLAG
))
4434 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4439 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4448 if ((prefixes
& PREFIX_DATA
)
4450 || (sizeflag
& SUFFIX_ALWAYS
))
4457 if (sizeflag
& DFLAG
)
4462 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4468 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4470 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4476 if (intel_syntax
&& !alt
)
4479 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4485 if (sizeflag
& DFLAG
)
4486 *obufp
++ = intel_syntax
? 'd' : 'l';
4490 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4497 else if (sizeflag
& DFLAG
)
4506 if (intel_syntax
&& !p
[1]
4507 && ((rex
& REX_W
) || (sizeflag
& DFLAG
)))
4510 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4515 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4517 if (sizeflag
& SUFFIX_ALWAYS
)
4525 if (sizeflag
& SUFFIX_ALWAYS
)
4531 if (sizeflag
& DFLAG
)
4535 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4540 if (prefixes
& PREFIX_DATA
)
4544 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4555 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4557 /* operand size flag for cwtl, cbtw */
4566 else if (sizeflag
& DFLAG
)
4571 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4581 oappend (const char *s
)
4584 obufp
+= strlen (s
);
4590 if (prefixes
& PREFIX_CS
)
4592 used_prefixes
|= PREFIX_CS
;
4593 oappend ("%cs:" + intel_syntax
);
4595 if (prefixes
& PREFIX_DS
)
4597 used_prefixes
|= PREFIX_DS
;
4598 oappend ("%ds:" + intel_syntax
);
4600 if (prefixes
& PREFIX_SS
)
4602 used_prefixes
|= PREFIX_SS
;
4603 oappend ("%ss:" + intel_syntax
);
4605 if (prefixes
& PREFIX_ES
)
4607 used_prefixes
|= PREFIX_ES
;
4608 oappend ("%es:" + intel_syntax
);
4610 if (prefixes
& PREFIX_FS
)
4612 used_prefixes
|= PREFIX_FS
;
4613 oappend ("%fs:" + intel_syntax
);
4615 if (prefixes
& PREFIX_GS
)
4617 used_prefixes
|= PREFIX_GS
;
4618 oappend ("%gs:" + intel_syntax
);
4623 OP_indirE (int bytemode
, int sizeflag
)
4627 OP_E (bytemode
, sizeflag
);
4631 print_operand_value (char *buf
, int hex
, bfd_vma disp
)
4633 if (address_mode
== mode_64bit
)
4641 sprintf_vma (tmp
, disp
);
4642 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++);
4643 strcpy (buf
+ 2, tmp
+ i
);
4647 bfd_signed_vma v
= disp
;
4654 /* Check for possible overflow on 0x8000000000000000. */
4657 strcpy (buf
, "9223372036854775808");
4671 tmp
[28 - i
] = (v
% 10) + '0';
4675 strcpy (buf
, tmp
+ 29 - i
);
4681 sprintf (buf
, "0x%x", (unsigned int) disp
);
4683 sprintf (buf
, "%d", (int) disp
);
4687 /* Put DISP in BUF as signed hex number. */
4690 print_displacement (char *buf
, bfd_vma disp
)
4692 bfd_signed_vma val
= disp
;
4701 /* Check for possible overflow. */
4704 switch (address_mode
)
4707 strcpy (buf
+ j
, "0x8000000000000000");
4710 strcpy (buf
+ j
, "0x80000000");
4713 strcpy (buf
+ j
, "0x8000");
4723 sprintf_vma (tmp
, val
);
4724 for (i
= 0; tmp
[i
] == '0'; i
++)
4728 strcpy (buf
+ j
, tmp
+ i
);
4732 intel_operand_size (int bytemode
, int sizeflag
)
4738 oappend ("BYTE PTR ");
4742 oappend ("WORD PTR ");
4745 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4747 oappend ("QWORD PTR ");
4748 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4756 oappend ("QWORD PTR ");
4757 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
4758 oappend ("DWORD PTR ");
4760 oappend ("WORD PTR ");
4761 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4764 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4766 oappend ("WORD PTR ");
4768 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4772 oappend ("DWORD PTR ");
4775 oappend ("QWORD PTR ");
4778 if (address_mode
== mode_64bit
)
4779 oappend ("QWORD PTR ");
4781 oappend ("DWORD PTR ");
4784 if (sizeflag
& DFLAG
)
4785 oappend ("FWORD PTR ");
4787 oappend ("DWORD PTR ");
4788 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4791 oappend ("TBYTE PTR ");
4794 oappend ("XMMWORD PTR ");
4797 oappend ("OWORD PTR ");
4805 OP_E (int bytemode
, int sizeflag
)
4814 /* Skip mod/rm byte. */
4825 oappend (names8rex
[modrm
.rm
+ add
]);
4827 oappend (names8
[modrm
.rm
+ add
]);
4830 oappend (names16
[modrm
.rm
+ add
]);
4833 oappend (names32
[modrm
.rm
+ add
]);
4836 oappend (names64
[modrm
.rm
+ add
]);
4839 if (address_mode
== mode_64bit
)
4840 oappend (names64
[modrm
.rm
+ add
]);
4842 oappend (names32
[modrm
.rm
+ add
]);
4845 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4847 oappend (names64
[modrm
.rm
+ add
]);
4848 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4860 oappend (names64
[modrm
.rm
+ add
]);
4861 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
4862 oappend (names32
[modrm
.rm
+ add
]);
4864 oappend (names16
[modrm
.rm
+ add
]);
4865 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4870 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4878 intel_operand_size (bytemode
, sizeflag
);
4881 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
4883 /* 32/64 bit address mode */
4898 FETCH_DATA (the_info
, codep
+ 1);
4899 index
= (*codep
>> 3) & 7;
4900 if (address_mode
== mode_64bit
|| index
!= 0x4)
4901 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
4902 scale
= (*codep
>> 6) & 3;
4914 if ((base
& 7) == 5)
4917 if (address_mode
== mode_64bit
&& !havesib
)
4923 FETCH_DATA (the_info
, codep
+ 1);
4925 if ((disp
& 0x80) != 0)
4933 havedisp
= havebase
|| (havesib
&& (index
!= 4 || scale
!= 0));
4936 if (modrm
.mod
!= 0 || (base
& 7) == 5)
4938 if (havedisp
|| riprel
)
4939 print_displacement (scratchbuf
, disp
);
4941 print_operand_value (scratchbuf
, 1, disp
);
4942 oappend (scratchbuf
);
4950 if (havedisp
|| (intel_syntax
&& riprel
))
4952 *obufp
++ = open_char
;
4953 if (intel_syntax
&& riprel
)
4960 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
4961 ? names64
[base
] : names32
[base
]);
4966 if (!intel_syntax
|| havebase
)
4968 *obufp
++ = separator_char
;
4971 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
4972 ? names64
[index
] : names32
[index
]);
4974 if (scale
!= 0 || (!intel_syntax
&& index
!= 4))
4976 *obufp
++ = scale_char
;
4978 sprintf (scratchbuf
, "%d", 1 << scale
);
4979 oappend (scratchbuf
);
4983 && (disp
|| modrm
.mod
!= 0 || (base
& 7) == 5))
4985 if ((bfd_signed_vma
) disp
>= 0)
4990 else if (modrm
.mod
!= 1)
4994 disp
= - (bfd_signed_vma
) disp
;
4997 print_displacement (scratchbuf
, disp
);
4998 oappend (scratchbuf
);
5001 *obufp
++ = close_char
;
5004 else if (intel_syntax
)
5006 if (modrm
.mod
!= 0 || (base
& 7) == 5)
5008 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5009 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5013 oappend (names_seg
[ds_reg
- es_reg
]);
5016 print_operand_value (scratchbuf
, 1, disp
);
5017 oappend (scratchbuf
);
5022 { /* 16 bit address mode */
5029 if ((disp
& 0x8000) != 0)
5034 FETCH_DATA (the_info
, codep
+ 1);
5036 if ((disp
& 0x80) != 0)
5041 if ((disp
& 0x8000) != 0)
5047 if (modrm
.mod
!= 0 || modrm
.rm
== 6)
5049 print_displacement (scratchbuf
, disp
);
5050 oappend (scratchbuf
);
5053 if (modrm
.mod
!= 0 || modrm
.rm
!= 6)
5055 *obufp
++ = open_char
;
5057 oappend (index16
[modrm
.rm
]);
5059 && (disp
|| modrm
.mod
!= 0 || modrm
.rm
== 6))
5061 if ((bfd_signed_vma
) disp
>= 0)
5066 else if (modrm
.mod
!= 1)
5070 disp
= - (bfd_signed_vma
) disp
;
5073 print_displacement (scratchbuf
, disp
);
5074 oappend (scratchbuf
);
5077 *obufp
++ = close_char
;
5080 else if (intel_syntax
)
5082 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5083 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5087 oappend (names_seg
[ds_reg
- es_reg
]);
5090 print_operand_value (scratchbuf
, 1, disp
& 0xffff);
5091 oappend (scratchbuf
);
5097 OP_G (int bytemode
, int sizeflag
)
5108 oappend (names8rex
[modrm
.reg
+ add
]);
5110 oappend (names8
[modrm
.reg
+ add
]);
5113 oappend (names16
[modrm
.reg
+ add
]);
5116 oappend (names32
[modrm
.reg
+ add
]);
5119 oappend (names64
[modrm
.reg
+ add
]);
5128 oappend (names64
[modrm
.reg
+ add
]);
5129 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
5130 oappend (names32
[modrm
.reg
+ add
]);
5132 oappend (names16
[modrm
.reg
+ add
]);
5133 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5136 if (address_mode
== mode_64bit
)
5137 oappend (names64
[modrm
.reg
+ add
]);
5139 oappend (names32
[modrm
.reg
+ add
]);
5142 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5155 FETCH_DATA (the_info
, codep
+ 8);
5156 a
= *codep
++ & 0xff;
5157 a
|= (*codep
++ & 0xff) << 8;
5158 a
|= (*codep
++ & 0xff) << 16;
5159 a
|= (*codep
++ & 0xff) << 24;
5160 b
= *codep
++ & 0xff;
5161 b
|= (*codep
++ & 0xff) << 8;
5162 b
|= (*codep
++ & 0xff) << 16;
5163 b
|= (*codep
++ & 0xff) << 24;
5164 x
= a
+ ((bfd_vma
) b
<< 32);
5172 static bfd_signed_vma
5175 bfd_signed_vma x
= 0;
5177 FETCH_DATA (the_info
, codep
+ 4);
5178 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5179 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5180 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5181 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5185 static bfd_signed_vma
5188 bfd_signed_vma x
= 0;
5190 FETCH_DATA (the_info
, codep
+ 4);
5191 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5192 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5193 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5194 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5196 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
5206 FETCH_DATA (the_info
, codep
+ 2);
5207 x
= *codep
++ & 0xff;
5208 x
|= (*codep
++ & 0xff) << 8;
5213 set_op (bfd_vma op
, int riprel
)
5215 op_index
[op_ad
] = op_ad
;
5216 if (address_mode
== mode_64bit
)
5218 op_address
[op_ad
] = op
;
5219 op_riprel
[op_ad
] = riprel
;
5223 /* Mask to get a 32-bit address. */
5224 op_address
[op_ad
] = op
& 0xffffffff;
5225 op_riprel
[op_ad
] = riprel
& 0xffffffff;
5230 OP_REG (int code
, int sizeflag
)
5240 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5241 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5242 s
= names16
[code
- ax_reg
+ add
];
5244 case es_reg
: case ss_reg
: case cs_reg
:
5245 case ds_reg
: case fs_reg
: case gs_reg
:
5246 s
= names_seg
[code
- es_reg
+ add
];
5248 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5249 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5252 s
= names8rex
[code
- al_reg
+ add
];
5254 s
= names8
[code
- al_reg
];
5256 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
5257 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
5258 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
5260 s
= names64
[code
- rAX_reg
+ add
];
5263 code
+= eAX_reg
- rAX_reg
;
5265 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5266 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5269 s
= names64
[code
- eAX_reg
+ add
];
5270 else if (sizeflag
& DFLAG
)
5271 s
= names32
[code
- eAX_reg
+ add
];
5273 s
= names16
[code
- eAX_reg
+ add
];
5274 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5277 s
= INTERNAL_DISASSEMBLER_ERROR
;
5284 OP_IMREG (int code
, int sizeflag
)
5296 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5297 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5298 s
= names16
[code
- ax_reg
];
5300 case es_reg
: case ss_reg
: case cs_reg
:
5301 case ds_reg
: case fs_reg
: case gs_reg
:
5302 s
= names_seg
[code
- es_reg
];
5304 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5305 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5308 s
= names8rex
[code
- al_reg
];
5310 s
= names8
[code
- al_reg
];
5312 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5313 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5316 s
= names64
[code
- eAX_reg
];
5317 else if (sizeflag
& DFLAG
)
5318 s
= names32
[code
- eAX_reg
];
5320 s
= names16
[code
- eAX_reg
];
5321 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5324 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
5329 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5332 s
= INTERNAL_DISASSEMBLER_ERROR
;
5339 OP_I (int bytemode
, int sizeflag
)
5342 bfd_signed_vma mask
= -1;
5347 FETCH_DATA (the_info
, codep
+ 1);
5352 if (address_mode
== mode_64bit
)
5362 else if (sizeflag
& DFLAG
)
5372 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5383 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5388 scratchbuf
[0] = '$';
5389 print_operand_value (scratchbuf
+ 1, 1, op
);
5390 oappend (scratchbuf
+ intel_syntax
);
5391 scratchbuf
[0] = '\0';
5395 OP_I64 (int bytemode
, int sizeflag
)
5398 bfd_signed_vma mask
= -1;
5400 if (address_mode
!= mode_64bit
)
5402 OP_I (bytemode
, sizeflag
);
5409 FETCH_DATA (the_info
, codep
+ 1);
5417 else if (sizeflag
& DFLAG
)
5427 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5434 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5439 scratchbuf
[0] = '$';
5440 print_operand_value (scratchbuf
+ 1, 1, op
);
5441 oappend (scratchbuf
+ intel_syntax
);
5442 scratchbuf
[0] = '\0';
5446 OP_sI (int bytemode
, int sizeflag
)
5449 bfd_signed_vma mask
= -1;
5454 FETCH_DATA (the_info
, codep
+ 1);
5456 if ((op
& 0x80) != 0)
5464 else if (sizeflag
& DFLAG
)
5473 if ((op
& 0x8000) != 0)
5476 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5481 if ((op
& 0x8000) != 0)
5485 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5489 scratchbuf
[0] = '$';
5490 print_operand_value (scratchbuf
+ 1, 1, op
);
5491 oappend (scratchbuf
+ intel_syntax
);
5495 OP_J (int bytemode
, int sizeflag
)
5499 bfd_vma segment
= 0;
5504 FETCH_DATA (the_info
, codep
+ 1);
5506 if ((disp
& 0x80) != 0)
5510 if ((sizeflag
& DFLAG
) || (rex
& REX_W
))
5515 if ((disp
& 0x8000) != 0)
5517 /* In 16bit mode, address is wrapped around at 64k within
5518 the same segment. Otherwise, a data16 prefix on a jump
5519 instruction means that the pc is masked to 16 bits after
5520 the displacement is added! */
5522 if ((prefixes
& PREFIX_DATA
) == 0)
5523 segment
= ((start_pc
+ codep
- start_codep
)
5524 & ~((bfd_vma
) 0xffff));
5526 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5529 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5532 disp
= ((start_pc
+ codep
- start_codep
+ disp
) & mask
) | segment
;
5534 print_operand_value (scratchbuf
, 1, disp
);
5535 oappend (scratchbuf
);
5539 OP_SEG (int bytemode
, int sizeflag
)
5541 if (bytemode
== w_mode
)
5542 oappend (names_seg
[modrm
.reg
]);
5544 OP_E (modrm
.mod
== 3 ? bytemode
: w_mode
, sizeflag
);
5548 OP_DIR (int dummy ATTRIBUTE_UNUSED
, int sizeflag
)
5552 if (sizeflag
& DFLAG
)
5562 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5564 sprintf (scratchbuf
, "0x%x:0x%x", seg
, offset
);
5566 sprintf (scratchbuf
, "$0x%x,$0x%x", seg
, offset
);
5567 oappend (scratchbuf
);
5571 OP_OFF (int bytemode
, int sizeflag
)
5575 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5576 intel_operand_size (bytemode
, sizeflag
);
5579 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
5586 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5587 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5589 oappend (names_seg
[ds_reg
- es_reg
]);
5593 print_operand_value (scratchbuf
, 1, off
);
5594 oappend (scratchbuf
);
5598 OP_OFF64 (int bytemode
, int sizeflag
)
5602 if (address_mode
!= mode_64bit
5603 || (prefixes
& PREFIX_ADDR
))
5605 OP_OFF (bytemode
, sizeflag
);
5609 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5610 intel_operand_size (bytemode
, sizeflag
);
5617 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5618 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5620 oappend (names_seg
[ds_reg
- es_reg
]);
5624 print_operand_value (scratchbuf
, 1, off
);
5625 oappend (scratchbuf
);
5629 ptr_reg (int code
, int sizeflag
)
5633 *obufp
++ = open_char
;
5634 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
5635 if (address_mode
== mode_64bit
)
5637 if (!(sizeflag
& AFLAG
))
5638 s
= names32
[code
- eAX_reg
];
5640 s
= names64
[code
- eAX_reg
];
5642 else if (sizeflag
& AFLAG
)
5643 s
= names32
[code
- eAX_reg
];
5645 s
= names16
[code
- eAX_reg
];
5647 *obufp
++ = close_char
;
5652 OP_ESreg (int code
, int sizeflag
)
5658 case 0x6d: /* insw/insl */
5659 intel_operand_size (z_mode
, sizeflag
);
5661 case 0xa5: /* movsw/movsl/movsq */
5662 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5663 case 0xab: /* stosw/stosl */
5664 case 0xaf: /* scasw/scasl */
5665 intel_operand_size (v_mode
, sizeflag
);
5668 intel_operand_size (b_mode
, sizeflag
);
5671 oappend ("%es:" + intel_syntax
);
5672 ptr_reg (code
, sizeflag
);
5676 OP_DSreg (int code
, int sizeflag
)
5682 case 0x6f: /* outsw/outsl */
5683 intel_operand_size (z_mode
, sizeflag
);
5685 case 0xa5: /* movsw/movsl/movsq */
5686 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5687 case 0xad: /* lodsw/lodsl/lodsq */
5688 intel_operand_size (v_mode
, sizeflag
);
5691 intel_operand_size (b_mode
, sizeflag
);
5701 prefixes
|= PREFIX_DS
;
5703 ptr_reg (code
, sizeflag
);
5707 OP_C (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5715 else if (address_mode
!= mode_64bit
&& (prefixes
& PREFIX_LOCK
))
5717 used_prefixes
|= PREFIX_LOCK
;
5720 sprintf (scratchbuf
, "%%cr%d", modrm
.reg
+ add
);
5721 oappend (scratchbuf
+ intel_syntax
);
5725 OP_D (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5732 sprintf (scratchbuf
, "db%d", modrm
.reg
+ add
);
5734 sprintf (scratchbuf
, "%%db%d", modrm
.reg
+ add
);
5735 oappend (scratchbuf
);
5739 OP_T (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5741 sprintf (scratchbuf
, "%%tr%d", modrm
.reg
);
5742 oappend (scratchbuf
+ intel_syntax
);
5746 OP_R (int bytemode
, int sizeflag
)
5749 OP_E (bytemode
, sizeflag
);
5755 OP_MMX (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5757 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5758 if (prefixes
& PREFIX_DATA
)
5764 sprintf (scratchbuf
, "%%xmm%d", modrm
.reg
+ add
);
5767 sprintf (scratchbuf
, "%%mm%d", modrm
.reg
);
5768 oappend (scratchbuf
+ intel_syntax
);
5772 OP_XMM (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5778 sprintf (scratchbuf
, "%%xmm%d", modrm
.reg
+ add
);
5779 oappend (scratchbuf
+ intel_syntax
);
5783 OP_EM (int bytemode
, int sizeflag
)
5787 if (intel_syntax
&& bytemode
== v_mode
)
5789 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5790 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5792 OP_E (bytemode
, sizeflag
);
5796 /* Skip mod/rm byte. */
5799 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5800 if (prefixes
& PREFIX_DATA
)
5807 sprintf (scratchbuf
, "%%xmm%d", modrm
.rm
+ add
);
5810 sprintf (scratchbuf
, "%%mm%d", modrm
.rm
);
5811 oappend (scratchbuf
+ intel_syntax
);
5814 /* cvt* are the only instructions in sse2 which have
5815 both SSE and MMX operands and also have 0x66 prefix
5816 in their opcode. 0x66 was originally used to differentiate
5817 between SSE and MMX instruction(operands). So we have to handle the
5818 cvt* separately using OP_EMC and OP_MXC */
5820 OP_EMC (int bytemode
, int sizeflag
)
5824 if (intel_syntax
&& bytemode
== v_mode
)
5826 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5827 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5829 OP_E (bytemode
, sizeflag
);
5833 /* Skip mod/rm byte. */
5836 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5837 sprintf (scratchbuf
, "%%mm%d", modrm
.rm
);
5838 oappend (scratchbuf
+ intel_syntax
);
5842 OP_MXC (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5844 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5845 sprintf (scratchbuf
, "%%mm%d", modrm
.reg
);
5846 oappend (scratchbuf
+ intel_syntax
);
5850 OP_EX (int bytemode
, int sizeflag
)
5855 OP_E (bytemode
, sizeflag
);
5862 /* Skip mod/rm byte. */
5865 sprintf (scratchbuf
, "%%xmm%d", modrm
.rm
+ add
);
5866 oappend (scratchbuf
+ intel_syntax
);
5870 OP_MS (int bytemode
, int sizeflag
)
5873 OP_EM (bytemode
, sizeflag
);
5879 OP_XS (int bytemode
, int sizeflag
)
5882 OP_EX (bytemode
, sizeflag
);
5888 OP_M (int bytemode
, int sizeflag
)
5891 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
5894 OP_E (bytemode
, sizeflag
);
5898 OP_0f07 (int bytemode
, int sizeflag
)
5900 if (modrm
.mod
!= 3 || modrm
.rm
!= 0)
5903 OP_E (bytemode
, sizeflag
);
5907 OP_0fae (int bytemode
, int sizeflag
)
5914 strcpy (obuf
+ strlen (obuf
) - sizeof ("clflush") + 1,
5918 if (modrm
.reg
< 5 || modrm
.rm
!= 0)
5920 BadOp (); /* bad sfence, mfence, or lfence */
5924 else if (modrm
.reg
!= 7)
5926 BadOp (); /* bad clflush */
5930 OP_E (bytemode
, sizeflag
);
5933 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
5934 32bit mode and "xchg %rax,%rax" in 64bit mode. */
5937 NOP_Fixup1 (int bytemode
, int sizeflag
)
5939 if ((prefixes
& PREFIX_DATA
) != 0
5942 && address_mode
== mode_64bit
))
5943 OP_REG (bytemode
, sizeflag
);
5945 strcpy (obuf
, "nop");
5949 NOP_Fixup2 (int bytemode
, int sizeflag
)
5951 if ((prefixes
& PREFIX_DATA
) != 0
5954 && address_mode
== mode_64bit
))
5955 OP_IMREG (bytemode
, sizeflag
);
5958 static const char *const Suffix3DNow
[] = {
5959 /* 00 */ NULL
, NULL
, NULL
, NULL
,
5960 /* 04 */ NULL
, NULL
, NULL
, NULL
,
5961 /* 08 */ NULL
, NULL
, NULL
, NULL
,
5962 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
5963 /* 10 */ NULL
, NULL
, NULL
, NULL
,
5964 /* 14 */ NULL
, NULL
, NULL
, NULL
,
5965 /* 18 */ NULL
, NULL
, NULL
, NULL
,
5966 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
5967 /* 20 */ NULL
, NULL
, NULL
, NULL
,
5968 /* 24 */ NULL
, NULL
, NULL
, NULL
,
5969 /* 28 */ NULL
, NULL
, NULL
, NULL
,
5970 /* 2C */ NULL
, NULL
, NULL
, NULL
,
5971 /* 30 */ NULL
, NULL
, NULL
, NULL
,
5972 /* 34 */ NULL
, NULL
, NULL
, NULL
,
5973 /* 38 */ NULL
, NULL
, NULL
, NULL
,
5974 /* 3C */ NULL
, NULL
, NULL
, NULL
,
5975 /* 40 */ NULL
, NULL
, NULL
, NULL
,
5976 /* 44 */ NULL
, NULL
, NULL
, NULL
,
5977 /* 48 */ NULL
, NULL
, NULL
, NULL
,
5978 /* 4C */ NULL
, NULL
, NULL
, NULL
,
5979 /* 50 */ NULL
, NULL
, NULL
, NULL
,
5980 /* 54 */ NULL
, NULL
, NULL
, NULL
,
5981 /* 58 */ NULL
, NULL
, NULL
, NULL
,
5982 /* 5C */ NULL
, NULL
, NULL
, NULL
,
5983 /* 60 */ NULL
, NULL
, NULL
, NULL
,
5984 /* 64 */ NULL
, NULL
, NULL
, NULL
,
5985 /* 68 */ NULL
, NULL
, NULL
, NULL
,
5986 /* 6C */ NULL
, NULL
, NULL
, NULL
,
5987 /* 70 */ NULL
, NULL
, NULL
, NULL
,
5988 /* 74 */ NULL
, NULL
, NULL
, NULL
,
5989 /* 78 */ NULL
, NULL
, NULL
, NULL
,
5990 /* 7C */ NULL
, NULL
, NULL
, NULL
,
5991 /* 80 */ NULL
, NULL
, NULL
, NULL
,
5992 /* 84 */ NULL
, NULL
, NULL
, NULL
,
5993 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
5994 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
5995 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
5996 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
5997 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
5998 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
5999 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
6000 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
6001 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
6002 /* AC */ NULL
, NULL
, "pfacc", NULL
,
6003 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
6004 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pmulhrw",
6005 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
6006 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
6007 /* C0 */ NULL
, NULL
, NULL
, NULL
,
6008 /* C4 */ NULL
, NULL
, NULL
, NULL
,
6009 /* C8 */ NULL
, NULL
, NULL
, NULL
,
6010 /* CC */ NULL
, NULL
, NULL
, NULL
,
6011 /* D0 */ NULL
, NULL
, NULL
, NULL
,
6012 /* D4 */ NULL
, NULL
, NULL
, NULL
,
6013 /* D8 */ NULL
, NULL
, NULL
, NULL
,
6014 /* DC */ NULL
, NULL
, NULL
, NULL
,
6015 /* E0 */ NULL
, NULL
, NULL
, NULL
,
6016 /* E4 */ NULL
, NULL
, NULL
, NULL
,
6017 /* E8 */ NULL
, NULL
, NULL
, NULL
,
6018 /* EC */ NULL
, NULL
, NULL
, NULL
,
6019 /* F0 */ NULL
, NULL
, NULL
, NULL
,
6020 /* F4 */ NULL
, NULL
, NULL
, NULL
,
6021 /* F8 */ NULL
, NULL
, NULL
, NULL
,
6022 /* FC */ NULL
, NULL
, NULL
, NULL
,
6026 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6028 const char *mnemonic
;
6030 FETCH_DATA (the_info
, codep
+ 1);
6031 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6032 place where an 8-bit immediate would normally go. ie. the last
6033 byte of the instruction. */
6034 obufp
= obuf
+ strlen (obuf
);
6035 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
6040 /* Since a variable sized modrm/sib chunk is between the start
6041 of the opcode (0x0f0f) and the opcode suffix, we need to do
6042 all the modrm processing first, and don't know until now that
6043 we have a bad opcode. This necessitates some cleaning up. */
6044 op_out
[0][0] = '\0';
6045 op_out
[1][0] = '\0';
6050 static const char *simd_cmp_op
[] = {
6062 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6064 unsigned int cmp_type
;
6066 FETCH_DATA (the_info
, codep
+ 1);
6067 obufp
= obuf
+ strlen (obuf
);
6068 cmp_type
= *codep
++ & 0xff;
6071 char suffix1
= 'p', suffix2
= 's';
6072 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6073 if (prefixes
& PREFIX_REPZ
)
6077 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6078 if (prefixes
& PREFIX_DATA
)
6082 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
6083 if (prefixes
& PREFIX_REPNZ
)
6084 suffix1
= 's', suffix2
= 'd';
6087 sprintf (scratchbuf
, "cmp%s%c%c",
6088 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
6089 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6090 oappend (scratchbuf
);
6094 /* We have a bad extension byte. Clean up. */
6095 op_out
[0][0] = '\0';
6096 op_out
[1][0] = '\0';
6102 SIMD_Fixup (int extrachar
, int sizeflag ATTRIBUTE_UNUSED
)
6104 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6105 forms of these instructions. */
6108 char *p
= obuf
+ strlen (obuf
);
6111 *(p
- 1) = *(p
- 2);
6112 *(p
- 2) = *(p
- 3);
6113 *(p
- 3) = extrachar
;
6118 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
6120 if (modrm
.mod
== 3 && modrm
.reg
== 1 && modrm
.rm
<= 1)
6122 /* Override "sidt". */
6123 size_t olen
= strlen (obuf
);
6124 char *p
= obuf
+ olen
- 4;
6125 const char **names
= (address_mode
== mode_64bit
6126 ? names64
: names32
);
6128 /* We might have a suffix when disassembling with -Msuffix. */
6132 /* Remove "addr16/addr32" if we aren't in Intel mode. */
6134 && (prefixes
& PREFIX_ADDR
)
6137 && CONST_STRNEQ (p
- 7, "addr")
6138 && (CONST_STRNEQ (p
- 3, "16")
6139 || CONST_STRNEQ (p
- 3, "32")))
6144 /* mwait %eax,%ecx */
6145 strcpy (p
, "mwait");
6147 strcpy (op_out
[0], names
[0]);
6151 /* monitor %eax,%ecx,%edx" */
6152 strcpy (p
, "monitor");
6155 const char **op1_names
;
6156 if (!(prefixes
& PREFIX_ADDR
))
6157 op1_names
= (address_mode
== mode_16bit
6161 op1_names
= (address_mode
!= mode_32bit
6162 ? names32
: names16
);
6163 used_prefixes
|= PREFIX_ADDR
;
6165 strcpy (op_out
[0], op1_names
[0]);
6166 strcpy (op_out
[2], names
[2]);
6171 strcpy (op_out
[1], names
[1]);
6182 SVME_Fixup (int bytemode
, int sizeflag
)
6214 OP_M (bytemode
, sizeflag
);
6217 /* Override "lidt". */
6218 p
= obuf
+ strlen (obuf
) - 4;
6219 /* We might have a suffix. */
6223 if (!(prefixes
& PREFIX_ADDR
))
6228 used_prefixes
|= PREFIX_ADDR
;
6232 strcpy (op_out
[1], names32
[1]);
6238 *obufp
++ = open_char
;
6239 if (address_mode
== mode_64bit
|| (sizeflag
& AFLAG
))
6243 strcpy (obufp
, alt
);
6244 obufp
+= strlen (alt
);
6245 *obufp
++ = close_char
;
6252 INVLPG_Fixup (int bytemode
, int sizeflag
)
6265 OP_M (bytemode
, sizeflag
);
6268 /* Override "invlpg". */
6269 strcpy (obuf
+ strlen (obuf
) - 6, alt
);
6276 /* Throw away prefixes and 1st. opcode byte. */
6277 codep
= insn_codep
+ 1;
6282 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
6289 /* Override "sgdt". */
6290 char *p
= obuf
+ strlen (obuf
) - 4;
6292 /* We might have a suffix when disassembling with -Msuffix. */
6299 strcpy (p
, "vmcall");
6302 strcpy (p
, "vmlaunch");
6305 strcpy (p
, "vmresume");
6308 strcpy (p
, "vmxoff");
6319 OP_VMX (int bytemode
, int sizeflag
)
6321 used_prefixes
|= (prefixes
& (PREFIX_DATA
| PREFIX_REPZ
));
6322 if (prefixes
& PREFIX_DATA
)
6323 strcpy (obuf
, "vmclear");
6324 else if (prefixes
& PREFIX_REPZ
)
6325 strcpy (obuf
, "vmxon");
6327 strcpy (obuf
, "vmptrld");
6328 OP_E (bytemode
, sizeflag
);
6332 REP_Fixup (int bytemode
, int sizeflag
)
6334 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6338 if (prefixes
& PREFIX_REPZ
)
6339 switch (*insn_codep
)
6341 case 0x6e: /* outsb */
6342 case 0x6f: /* outsw/outsl */
6343 case 0xa4: /* movsb */
6344 case 0xa5: /* movsw/movsl/movsq */
6350 case 0xaa: /* stosb */
6351 case 0xab: /* stosw/stosl/stosq */
6352 case 0xac: /* lodsb */
6353 case 0xad: /* lodsw/lodsl/lodsq */
6354 if (!intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
6359 case 0x6c: /* insb */
6360 case 0x6d: /* insl/insw */
6376 olen
= strlen (obuf
);
6377 p
= obuf
+ olen
- ilen
- 1 - 4;
6378 /* Handle "repz [addr16|addr32]". */
6379 if ((prefixes
& PREFIX_ADDR
))
6382 memmove (p
+ 3, p
+ 4, olen
- (p
+ 3 - obuf
));
6390 OP_IMREG (bytemode
, sizeflag
);
6393 OP_ESreg (bytemode
, sizeflag
);
6396 OP_DSreg (bytemode
, sizeflag
);
6405 CMPXCHG8B_Fixup (int bytemode
, int sizeflag
)
6410 /* Change cmpxchg8b to cmpxchg16b. */
6411 char *p
= obuf
+ strlen (obuf
) - 2;
6415 OP_M (bytemode
, sizeflag
);
6419 XMM_Fixup (int reg
, int sizeflag ATTRIBUTE_UNUSED
)
6421 sprintf (scratchbuf
, "%%xmm%d", reg
);
6422 oappend (scratchbuf
+ intel_syntax
);
6426 CRC32_Fixup (int bytemode
, int sizeflag
)
6428 /* Add proper suffix to "crc32". */
6429 char *p
= obuf
+ strlen (obuf
);
6446 else if (sizeflag
& DFLAG
)
6450 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6453 oappend (INTERNAL_DISASSEMBLER_ERROR
);
6462 /* Skip mod/rm byte. */
6467 add
= (rex
& REX_B
) ? 8 : 0;
6468 if (bytemode
== b_mode
)
6472 oappend (names8rex
[modrm
.rm
+ add
]);
6474 oappend (names8
[modrm
.rm
+ add
]);
6480 oappend (names64
[modrm
.rm
+ add
]);
6481 else if ((prefixes
& PREFIX_DATA
))
6482 oappend (names16
[modrm
.rm
+ add
]);
6484 oappend (names32
[modrm
.rm
+ add
]);
6488 OP_E (bytemode
, sizeflag
);