1 /* mips.h. Mips opcode list for GDB, the GNU debugger.
2 Copyright 1993, 1994, 1995, 1996, 1997 Free Software Foundation, Inc.
3 Contributed by Ralph Campbell and OSF
4 Commented and modified by Ian Lance Taylor, Cygnus Support
6 This file is part of GDB, GAS, and the GNU binutils.
8 GDB, GAS, and the GNU binutils are free software; you can redistribute
9 them and/or modify them under the terms of the GNU General Public
10 License as published by the Free Software Foundation; either version
11 1, or (at your option) any later version.
13 GDB, GAS, and the GNU binutils are distributed in the hope that they
14 will be useful, but WITHOUT ANY WARRANTY; without even the implied
15 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16 the GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24 #include "opcode/mips.h"
26 /* Short hand so the lines aren't too long. */
28 #define LDD INSN_LOAD_MEMORY_DELAY
29 #define LCD INSN_LOAD_COPROC_DELAY
30 #define UBD INSN_UNCOND_BRANCH_DELAY
31 #define CBD INSN_COND_BRANCH_DELAY
32 #define COD INSN_COPROC_MOVE_DELAY
33 #define CLD INSN_COPROC_MEMORY_DELAY
34 #define CBL INSN_COND_BRANCH_LIKELY
35 #define TRAP INSN_TRAP
36 #define SM INSN_STORE_MEMORY
38 #define WR_d INSN_WRITE_GPR_D
39 #define WR_t INSN_WRITE_GPR_T
40 #define WR_31 INSN_WRITE_GPR_31
41 #define WR_D INSN_WRITE_FPR_D
42 #define WR_T INSN_WRITE_FPR_T
43 #define WR_S INSN_WRITE_FPR_S
44 #define RD_s INSN_READ_GPR_S
45 #define RD_b INSN_READ_GPR_S
46 #define RD_t INSN_READ_GPR_T
47 #define RD_S INSN_READ_FPR_S
48 #define RD_T INSN_READ_FPR_T
49 #define RD_R INSN_READ_FPR_R
50 #define WR_CC INSN_WRITE_COND_CODE
51 #define RD_CC INSN_READ_COND_CODE
52 #define RD_C0 INSN_COP
53 #define RD_C1 INSN_COP
54 #define RD_C2 INSN_COP
55 #define RD_C3 INSN_COP
56 #define WR_C0 INSN_COP
57 #define WR_C1 INSN_COP
58 #define WR_C2 INSN_COP
59 #define WR_C3 INSN_COP
60 #define WR_HI INSN_WRITE_HI
61 #define WR_LO INSN_WRITE_LO
62 #define RD_HI INSN_READ_HI
63 #define RD_LO INSN_READ_LO
65 /* start-sanitize-vr5400 */
66 #define WR_HILO WR_HI|WR_LO
67 #define RD_HILO RD_HI|RD_LO
68 #define MOD_HILO WR_HILO|RD_HILO
69 /* end-sanitize-vr5400 */
79 /* start-sanitize-tx49 */
81 /* end-sanitize-tx49 */
82 /* start-sanitize-vr5400 */
84 /* end-sanitize-vr5400 */
85 /* start-sanitize-r5900 */
87 /* end-sanitize-r5900 */
90 /* start-sanitize-tx49 */ \
92 /* end-sanitize-tx49 */ \
93 /* start-sanitize-r5900 */ \
95 /* end-sanitize-r5900 */ \
99 /* start-sanitize-tx49 */ \
101 /* end-sanitize-tx49 */ \
105 /* start-sanitize-tx49 */ \
107 /* end-sanitize-tx49 */ \
110 /* The order of overloaded instructions matters. Label arguments and
111 register arguments look the same. Instructions that can have either
112 for arguments must apear in the correct order in this table for the
113 assembler to pick the right one. In other words, entries with
114 immediate operands must apear after the same instruction with
117 Many instructions are short hand for other instructions (i.e., The
118 jal <register> instruction is short for jalr <register>). */
120 const struct mips_opcode mips_builtin_opcodes
[] = {
121 /* These instructions appear first so that the disassembler will find
122 them first. The assemblers uses a hash table based on the
123 instruction name anyhow. */
124 /* name, args, mask, match, pinfo */
125 {"nop", "", 0x00000000, 0xffffffff, 0, I1
},
126 {"li", "t,j", 0x24000000, 0xffe00000, WR_t
, I1
}, /* addiu */
127 {"li", "t,i", 0x34000000, 0xffe00000, WR_t
, I1
}, /* ori */
128 {"li", "t,I", 0, (int) M_LI
, INSN_MACRO
, I1
},
129 {"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d
|RD_s
, I3
},/* daddu */
130 {"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d
|RD_s
, I1
},/* addu */
131 {"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d
|RD_s
, I1
},/* or */
132 {"b", "p", 0x10000000, 0xffff0000, UBD
, I1
},/* beq 0,0 */
133 {"b", "p", 0x04010000, 0xffff0000, UBD
, I1
},/* bgez 0 */
134 {"bal", "p", 0x04110000, 0xffff0000, UBD
|WR_31
, I1
},/* bgezal 0*/
136 {"abs", "d,v", 0, (int) M_ABS
, INSN_MACRO
, I1
},
137 {"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D
|RD_S
|FP_S
, I1
},
138 {"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D
|RD_S
|FP_D
, I1
},
139 {"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
140 {"add", "t,r,I", 0, (int) M_ADD_I
, INSN_MACRO
, I1
},
141 {"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, I1
},
142 {"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I1
},
143 {"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t
|RD_s
, I1
},
144 {"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t
|RD_s
, I1
},
145 {"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
146 {"addu", "t,r,I", 0, (int) M_ADDU_I
, INSN_MACRO
, I1
},
147 {"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
148 {"and", "t,r,I", 0, (int) M_AND_I
, INSN_MACRO
, I1
},
149 {"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t
|RD_s
, I1
},
150 /* b is at the top of the table. */
151 /* bal is at the top of the table. */
152 {"bc0f", "p", 0x41000000, 0xffff0000, CBD
|RD_CC
, I1
},
153 {"bc0fl", "p", 0x41020000, 0xffff0000, CBL
|RD_CC
, I2
|T3
},
154 {"bc1f", "p", 0x45000000, 0xffff0000, CBD
|RD_CC
|FP_S
, I1
},
155 {"bc1f", "N,p", 0x45000000, 0xffe30000, CBD
|RD_CC
|FP_S
, I4
},
156 {"bc1fl", "p", 0x45020000, 0xffff0000, CBL
|RD_CC
|FP_S
, I2
|T3
},
157 {"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL
|RD_CC
|FP_S
, I4
},
158 {"bc2f", "p", 0x49000000, 0xffff0000, CBD
|RD_CC
, I1
},
159 {"bc2fl", "p", 0x49020000, 0xffff0000, CBL
|RD_CC
, I2
|T3
},
160 {"bc3f", "p", 0x4d000000, 0xffff0000, CBD
|RD_CC
, I1
},
161 {"bc3fl", "p", 0x4d020000, 0xffff0000, CBL
|RD_CC
, I2
|T3
},
162 {"bc0t", "p", 0x41010000, 0xffff0000, CBD
|RD_CC
, I1
},
163 {"bc0tl", "p", 0x41030000, 0xffff0000, CBL
|RD_CC
, I2
|T3
},
164 {"bc1t", "p", 0x45010000, 0xffff0000, CBD
|RD_CC
|FP_S
, I1
},
165 {"bc1t", "N,p", 0x45010000, 0xffe30000, CBD
|RD_CC
|FP_S
, I4
},
166 {"bc1tl", "p", 0x45030000, 0xffff0000, CBL
|RD_CC
|FP_S
, I2
|T3
},
167 {"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL
|RD_CC
|FP_S
, I4
},
168 {"bc2t", "p", 0x49010000, 0xffff0000, CBD
|RD_CC
, I1
},
169 {"bc2tl", "p", 0x49030000, 0xffff0000, CBL
|RD_CC
, I2
|T3
},
170 {"bc3t", "p", 0x4d010000, 0xffff0000, CBD
|RD_CC
, I1
},
171 {"bc3tl", "p", 0x4d030000, 0xffff0000, CBL
|RD_CC
, I2
|T3
},
172 {"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD
|RD_s
, I1
},
173 {"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
174 {"beq", "s,t,p", 0x10000000, 0xfc000000, CBD
|RD_s
|RD_t
, I1
},
175 {"beq", "s,I,p", 0, (int) M_BEQ_I
, INSN_MACRO
, I1
},
176 {"beql", "s,t,p", 0x50000000, 0xfc000000, CBL
|RD_s
|RD_t
, I2
|T3
},
177 {"beql", "s,I,p", 0, (int) M_BEQL_I
, INSN_MACRO
, I2
},
178 {"bge", "s,t,p", 0, (int) M_BGE
, INSN_MACRO
, I1
},
179 {"bge", "s,I,p", 0, (int) M_BGE_I
, INSN_MACRO
, I1
},
180 {"bgel", "s,t,p", 0, (int) M_BGEL
, INSN_MACRO
, I2
},
181 {"bgel", "s,I,p", 0, (int) M_BGEL_I
, INSN_MACRO
, I2
},
182 {"bgeu", "s,t,p", 0, (int) M_BGEU
, INSN_MACRO
, I1
},
183 {"bgeu", "s,I,p", 0, (int) M_BGEU_I
, INSN_MACRO
, I1
},
184 {"bgeul", "s,t,p", 0, (int) M_BGEUL
, INSN_MACRO
, I2
},
185 {"bgeul", "s,I,p", 0, (int) M_BGEUL_I
, INSN_MACRO
, I2
},
186 {"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD
|RD_s
, I1
},
187 {"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
188 {"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD
|RD_s
|WR_31
, I1
},
189 {"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
190 {"bgt", "s,t,p", 0, (int) M_BGT
, INSN_MACRO
, I1
},
191 {"bgt", "s,I,p", 0, (int) M_BGT_I
, INSN_MACRO
, I1
},
192 {"bgtl", "s,t,p", 0, (int) M_BGTL
, INSN_MACRO
, I2
},
193 {"bgtl", "s,I,p", 0, (int) M_BGTL_I
, INSN_MACRO
, I2
},
194 {"bgtu", "s,t,p", 0, (int) M_BGTU
, INSN_MACRO
, I1
},
195 {"bgtu", "s,I,p", 0, (int) M_BGTU_I
, INSN_MACRO
, I1
},
196 {"bgtul", "s,t,p", 0, (int) M_BGTUL
, INSN_MACRO
, I2
},
197 {"bgtul", "s,I,p", 0, (int) M_BGTUL_I
, INSN_MACRO
, I2
},
198 {"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD
|RD_s
, I1
},
199 {"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
200 {"ble", "s,t,p", 0, (int) M_BLE
, INSN_MACRO
, I1
},
201 {"ble", "s,I,p", 0, (int) M_BLE_I
, INSN_MACRO
, I1
},
202 {"blel", "s,t,p", 0, (int) M_BLEL
, INSN_MACRO
, I2
},
203 {"blel", "s,I,p", 0, (int) M_BLEL_I
, INSN_MACRO
, I2
},
204 {"bleu", "s,t,p", 0, (int) M_BLEU
, INSN_MACRO
, I1
},
205 {"bleu", "s,I,p", 0, (int) M_BLEU_I
, INSN_MACRO
, I1
},
206 {"bleul", "s,t,p", 0, (int) M_BLEUL
, INSN_MACRO
, I2
},
207 {"bleul", "s,I,p", 0, (int) M_BLEUL_I
, INSN_MACRO
, I2
},
208 {"blez", "s,p", 0x18000000, 0xfc1f0000, CBD
|RD_s
, I1
},
209 {"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
210 {"blt", "s,t,p", 0, (int) M_BLT
, INSN_MACRO
, I1
},
211 {"blt", "s,I,p", 0, (int) M_BLT_I
, INSN_MACRO
, I1
},
212 {"bltl", "s,t,p", 0, (int) M_BLTL
, INSN_MACRO
, I2
},
213 {"bltl", "s,I,p", 0, (int) M_BLTL_I
, INSN_MACRO
, I2
},
214 {"bltu", "s,t,p", 0, (int) M_BLTU
, INSN_MACRO
, I1
},
215 {"bltu", "s,I,p", 0, (int) M_BLTU_I
, INSN_MACRO
, I1
},
216 {"bltul", "s,t,p", 0, (int) M_BLTUL
, INSN_MACRO
, I2
},
217 {"bltul", "s,I,p", 0, (int) M_BLTUL_I
, INSN_MACRO
, I2
},
218 {"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD
|RD_s
, I1
},
219 {"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
220 {"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD
|RD_s
|WR_31
, I1
},
221 {"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
222 {"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD
|RD_s
, I1
},
223 {"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL
|RD_s
, I2
|T3
},
224 {"bne", "s,t,p", 0x14000000, 0xfc000000, CBD
|RD_s
|RD_t
, I1
},
225 {"bne", "s,I,p", 0, (int) M_BNE_I
, INSN_MACRO
, I1
},
226 {"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL
|RD_s
|RD_t
, I2
|T3
},
227 {"bnel", "s,I,p", 0, (int) M_BNEL_I
, INSN_MACRO
, I2
},
228 {"break", "", 0x0000000d, 0xffffffff, TRAP
, I1
},
229 {"break", "c", 0x0000000d, 0xfc00003f, TRAP
, I1
},
230 {"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
231 {"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
232 {"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
233 {"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
234 {"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
235 {"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
236 {"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
237 {"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
238 {"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
239 {"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
240 {"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
241 {"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
242 {"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
243 {"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
244 {"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
245 {"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
246 {"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
247 {"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
248 {"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
249 {"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
250 {"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
251 {"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
252 {"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
253 {"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
254 {"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
255 {"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
256 {"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
257 {"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
258 {"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
259 {"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
260 {"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
261 {"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
262 {"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
263 {"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
264 {"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
265 {"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
266 {"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
267 {"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
268 {"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
269 {"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
270 {"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
271 {"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
272 {"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
273 {"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
274 {"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
275 {"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
276 {"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
277 {"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
278 {"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
279 {"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
280 /* start-sanitize-r5900 */
281 {"c.lt.s", "S,T", 0x46000034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, T5
},
282 /* end-sanitize-r5900 */
283 {"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
284 {"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
285 {"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
286 {"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
287 {"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
288 {"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
289 {"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
290 {"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
291 /* start-sanitize-r5900 */
292 {"c.le.s", "S,T", 0x46000036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, T5
},
293 /* end-santiize-r5900 */
294 {"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
295 {"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
296 {"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, I1
},
297 {"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, I4
},
298 {"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, I1
},
299 {"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, I4
},
300 {"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b
, I3
|T3
},
301 {"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D
|RD_S
|FP_D
, I3
},
302 {"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D
|RD_S
|FP_S
, I3
},
303 {"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D
|RD_S
|FP_D
, I2
},
304 {"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D
|RD_S
|FP_S
, I2
},
305 {"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD
|WR_t
|RD_C0
, I1
},
306 {"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD
|WR_t
|RD_C1
|FP_S
, I1
},
307 {"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD
|WR_t
|RD_C1
|FP_S
, I1
},
308 {"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD
|WR_t
|RD_C2
, I1
},
309 {"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD
|WR_t
|RD_C3
, I1
},
310 {"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD
|RD_t
|WR_CC
, I1
},
311 {"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD
|RD_t
|WR_CC
|FP_S
, I1
},
312 {"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD
|RD_t
|WR_CC
|FP_S
, I1
},
313 {"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD
|RD_t
|WR_CC
, I1
},
314 {"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD
|RD_t
|WR_CC
, I1
},
315 {"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D
|RD_S
|FP_D
, I3
},
316 {"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D
|RD_S
|FP_D
|FP_S
, I1
},
317 {"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D
|RD_S
|FP_D
, I1
},
318 {"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D
|RD_S
|FP_D
, I3
},
319 {"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D
|RD_S
|FP_S
, I3
},
320 {"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D
|RD_S
|FP_S
, I3
},
321 {"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, I1
},
322 {"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D
|RD_S
|FP_S
, I1
},
323 {"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D
|RD_S
|FP_D
, I1
},
324 {"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D
|RD_S
|FP_S
, I1
},
325 {"dabs", "d,v", 0, (int) M_DABS
, INSN_MACRO
, I3
},
326 {"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I3
},
327 {"dadd", "t,r,I", 0, (int) M_DADD_I
, INSN_MACRO
, I3
},
328 {"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t
|RD_s
, I3
},
329 {"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t
|RD_s
, I3
},
330 {"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I3
},
331 {"daddu", "t,r,I", 0, (int) M_DADDU_I
, INSN_MACRO
, I3
},
332 /* start-sanitize-vr5400 */
333 {"dbreak", "", 0x7000003f, 0xffffffff, 0, N5
},
334 /* end-sanitize-vr5400 */
335 /* dctr and dctw are used on the r5000. */
336 {"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b
, I3
},
337 {"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b
, I3
},
338 {"deret", "", 0x4200001f, 0xffffffff, 0, G2
},
339 /* For ddiv, see the comments about div. */
340 {"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I3
},
341 {"ddiv", "d,v,t", 0, (int) M_DDIV_3
, INSN_MACRO
, I3
},
342 {"ddiv", "d,v,I", 0, (int) M_DDIV_3I
, INSN_MACRO
, I3
},
343 /* For ddivu, see the comments about div. */
344 {"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I3
},
345 {"ddivu", "d,v,t", 0, (int) M_DDIVU_3
, INSN_MACRO
, I3
},
346 {"ddivu", "d,v,I", 0, (int) M_DDIVU_3I
, INSN_MACRO
, I3
},
347 /* The MIPS assembler treats the div opcode with two operands as
348 though the first operand appeared twice (the first operand is both
349 a source and a destination). To get the div machine instruction,
350 you must use an explicit destination of $0. */
351 {"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I1
},
352 {"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I1
},
353 {"div", "d,v,t", 0, (int) M_DIV_3
, INSN_MACRO
, I1
},
354 {"div", "d,v,I", 0, (int) M_DIV_3I
, INSN_MACRO
, I1
},
355 /* start-sanitize-r5900 */
356 {"div1", "s,t", 0x7000001a, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
357 /* end-sanitize-r5900 */
358 {"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I1
},
359 {"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, I1
},
360 /* For divu, see the comments about div. */
361 {"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I1
},
362 {"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I1
},
363 {"divu", "d,v,t", 0, (int) M_DIVU_3
, INSN_MACRO
, I1
},
364 {"divu", "d,v,I", 0, (int) M_DIVU_3I
, INSN_MACRO
, I1
},
365 /* start-sanitize-r5900 */
366 {"divu1", "s,t", 0x7000001b, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
367 /* end-sanitize-r5900 */
368 {"dla", "t,A(b)", 0, (int) M_DLA_AB
, INSN_MACRO
, I3
},
369 {"dli", "t,j", 0x24000000, 0xffe00000, WR_t
, I3
}, /* addiu */
370 {"dli", "t,i", 0x34000000, 0xffe00000, WR_t
, I3
}, /* ori */
371 {"dli", "t,I", 0, (int) M_DLI
, INSN_MACRO
, I3
},
372 {"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s
|RD_t
|WR_LO
|RD_LO
, V1
},
373 {"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD
|WR_t
|RD_C0
, I3
},
374 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD
|RD_t
|WR_C0
|WR_CC
, I3
},
375 {"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_S
, I3
},
376 {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_S
, I3
},
377 {"dmul", "d,v,t", 0, (int) M_DMUL
, INSN_MACRO
, I3
},
378 {"dmul", "d,v,I", 0, (int) M_DMUL_I
, INSN_MACRO
, I3
},
379 {"dmulo", "d,v,t", 0, (int) M_DMULO
, INSN_MACRO
, I3
},
380 {"dmulo", "d,v,I", 0, (int) M_DMULO_I
, INSN_MACRO
, I3
},
381 {"dmulou", "d,v,t", 0, (int) M_DMULOU
, INSN_MACRO
, I3
},
382 {"dmulou", "d,v,I", 0, (int) M_DMULOU_I
, INSN_MACRO
, I3
},
383 {"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I3
},
384 /* start-sanitize-tx49 */
385 {"dmult", "d,s,t", 0x0000001c, 0xfc0007ff, RD_s
|RD_t
|WR_HI
|WR_LO
|WR_d
, T4
},
386 /* end-sanitize-tx49 */
387 {"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I3
},
388 /* start-sanitize-tx49 */
389 {"dmultu", "d,s,t", 0x0000001d, 0xfc0007ff, RD_s
|RD_t
|WR_HI
|WR_LO
|WR_d
, T4
},
390 /* end-sanitize-tx49 */
391 {"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d
|RD_t
, I3
}, /* dsub 0 */
392 {"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d
|RD_t
, I3
}, /* dsubu 0*/
393 {"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I3
},
394 {"drem", "d,v,t", 3, (int) M_DREM_3
, INSN_MACRO
, I3
},
395 {"drem", "d,v,I", 3, (int) M_DREM_3I
, INSN_MACRO
, I3
},
396 {"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I3
},
397 {"dremu", "d,v,t", 3, (int) M_DREMU_3
, INSN_MACRO
, I3
},
398 {"dremu", "d,v,I", 3, (int) M_DREMU_3I
, INSN_MACRO
, I3
},
399 /* start-sanitize-vr5400 */
400 {"dret", "", 0x7000003e, 0xffffffff, 0, N5
},
401 {"drorv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t
|RD_s
|WR_d
, N5
},
402 {"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d
|RD_t
, N5
},
403 {"dror", "d,w,>", 0x0020003e, 0xffe0003f, WR_d
|RD_t
, N5
},
404 {"dror", "d,w,<", 0x00200036, 0xffe0003f, WR_d
|RD_t
, N5
},
405 /* end-sanitize-vr5400 */
406 {"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I3
},
407 {"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d
|RD_t
, I3
},
408 {"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I3
}, /* dsllv */
409 {"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d
|RD_t
, I3
}, /* dsll32 */
410 {"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d
|RD_t
, I3
},
411 {"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I3
},
412 {"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d
|RD_t
, I3
},
413 {"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I3
}, /* dsrav */
414 {"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d
|RD_t
, I3
}, /* dsra32 */
415 {"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d
|RD_t
, I3
},
416 {"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I3
},
417 {"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d
|RD_t
, I3
},
418 {"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I3
}, /* dsrlv */
419 {"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d
|RD_t
, I3
}, /* dsrl32 */
420 {"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d
|RD_t
, I3
},
421 {"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I3
},
422 {"dsub", "d,v,I", 0, (int) M_DSUB_I
, INSN_MACRO
, I3
},
423 {"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I3
},
424 {"dsubu", "d,v,I", 0, (int) M_DSUBU_I
, INSN_MACRO
, I3
},
425 {"eret", "", 0x42000018, 0xffffffff, 0, I3
},
426 {"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D
|RD_S
|FP_D
, I3
},
427 {"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D
|RD_S
|FP_S
, I3
},
428 {"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D
|RD_S
|FP_D
, I2
},
429 {"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D
|RD_S
|FP_S
, I2
},
430 {"flushi", "", 0xbc010000, 0xffffffff, 0, L1
},
431 {"flushd", "", 0xbc020000, 0xffffffff, 0, L1
},
432 {"flushid", "", 0xbc030000, 0xffffffff, 0, L1
},
433 {"hibernate","", 0x42000023, 0xffffffff, 0, V1
},
434 {"jr", "s", 0x00000008, 0xfc1fffff, UBD
|RD_s
, I1
},
435 {"j", "s", 0x00000008, 0xfc1fffff, UBD
|RD_s
, I1
}, /* jr */
436 /* SVR4 PIC code requires special handling for j, so it must be a
438 {"j", "a", 0, (int) M_J_A
, INSN_MACRO
, I1
},
439 /* This form of j is used by the disassembler and internally by the
440 assembler, but will never match user input (because the line above
441 will match first). */
442 {"j", "a", 0x08000000, 0xfc000000, UBD
, I1
},
443 {"jalr", "s", 0x0000f809, 0xfc1fffff, UBD
|RD_s
|WR_d
, I1
},
444 {"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD
|RD_s
|WR_d
, I1
},
445 /* SVR4 PIC code requires special handling for jal, so it must be a
447 {"jal", "d,s", 0, (int) M_JAL_2
, INSN_MACRO
, I1
},
448 {"jal", "s", 0, (int) M_JAL_1
, INSN_MACRO
, I1
},
449 {"jal", "a", 0, (int) M_JAL_A
, INSN_MACRO
, I1
},
450 /* This form of jal is used by the disassembler and internally by the
451 assembler, but will never match user input (because the line above
452 will match first). */
453 {"jal", "a", 0x0c000000, 0xfc000000, UBD
|WR_31
, I1
},
454 /* jalx really should only be avaliable if mips16 is available,
455 but for now make it I1. */
456 {"jalx", "a", 0x74000000, 0xfc000000, UBD
|WR_31
, I1
},
457 {"la", "t,A(b)", 0, (int) M_LA_AB
, INSN_MACRO
, I1
},
458 {"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
459 {"lb", "t,A(b)", 0, (int) M_LB_AB
, INSN_MACRO
, I1
},
460 {"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
461 {"lbu", "t,A(b)", 0, (int) M_LBU_AB
, INSN_MACRO
, I1
},
462 {"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t
|RD_b
, I3
},
463 {"ld", "t,o(b)", 0, (int) M_LD_OB
, INSN_MACRO
, I1
},
464 {"ld", "t,A(b)", 0, (int) M_LD_AB
, INSN_MACRO
, I1
},
465 {"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_D
, I2
},
466 {"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_D
, I2
},
467 {"ldc1", "T,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, I2
},
468 {"ldc1", "E,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, I2
},
469 {"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_D
, I2
}, /* ldc1 */
470 {"l.d", "T,o(b)", 0, (int) M_L_DOB
, INSN_MACRO
, I1
},
471 {"l.d", "T,A(b)", 0, (int) M_L_DAB
, INSN_MACRO
, I1
},
472 {"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD
|RD_b
|WR_CC
, I2
},
473 {"ldc2", "E,A(b)", 0, (int) M_LDC2_AB
, INSN_MACRO
, I2
},
474 {"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD
|RD_b
|WR_CC
, I2
},
475 {"ldc3", "E,A(b)", 0, (int) M_LDC3_AB
, INSN_MACRO
, I2
},
476 {"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD
|WR_t
|RD_b
, I3
},
477 {"ldl", "t,A(b)", 0, (int) M_LDL_AB
, INSN_MACRO
, I3
},
478 {"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD
|WR_t
|RD_b
, I3
},
479 {"ldr", "t,A(b)", 0, (int) M_LDR_AB
, INSN_MACRO
, I3
},
480 {"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD
|WR_D
|RD_t
|RD_b
, I4
},
481 {"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
482 {"lh", "t,A(b)", 0, (int) M_LH_AB
, INSN_MACRO
, I1
},
483 {"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
484 {"lhu", "t,A(b)", 0, (int) M_LHU_AB
, INSN_MACRO
, I1
},
485 /* li is at the start of the table. */
486 {"li.d", "t,F", 0, (int) M_LI_D
, INSN_MACRO
, I1
},
487 {"li.d", "T,L", 0, (int) M_LI_DD
, INSN_MACRO
, I1
},
488 {"li.s", "t,f", 0, (int) M_LI_S
, INSN_MACRO
, I1
},
489 {"li.s", "T,l", 0, (int) M_LI_SS
, INSN_MACRO
, I1
},
490 {"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD
|RD_b
|WR_t
, I2
},
491 {"ll", "t,A(b)", 0, (int) M_LL_AB
, INSN_MACRO
, I2
},
492 {"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD
|RD_b
|WR_t
, I3
},
493 {"lld", "t,A(b)", 0, (int) M_LLD_AB
, INSN_MACRO
, I3
},
494 {"lui", "t,u", 0x3c000000, 0xffe00000, WR_t
, I1
},
495 /* start-sanitize-r5900 */
496 {"lq", "t,o(b)", 0x78000000, 0xfc000000, WR_t
|RD_b
, T5
},
497 /* end-sanitize-r5900 */
498 {"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
499 {"lw", "t,A(b)", 0, (int) M_LW_AB
, INSN_MACRO
, I1
},
500 {"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD
|RD_b
|WR_CC
, I1
},
501 {"lwc0", "E,A(b)", 0, (int) M_LWC0_AB
, INSN_MACRO
, I1
},
502 {"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_S
, I1
},
503 {"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_S
, I1
},
504 {"lwc1", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, I1
},
505 {"lwc1", "E,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, I1
},
506 {"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_S
, I1
}, /* lwc1 */
507 {"l.s", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, I1
},
508 {"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD
|RD_b
|WR_CC
, I1
},
509 {"lwc2", "E,A(b)", 0, (int) M_LWC2_AB
, INSN_MACRO
, I1
},
510 {"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD
|RD_b
|WR_CC
, I1
},
511 {"lwc3", "E,A(b)", 0, (int) M_LWC3_AB
, INSN_MACRO
, I1
},
512 {"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
513 {"lwl", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, I1
},
514 {"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD
|RD_b
|WR_t
, I2
}, /* same */
515 {"lcache", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, I2
}, /* as lwl */
516 {"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD
|RD_b
|WR_t
, I1
},
517 {"lwr", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, I1
},
518 {"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD
|RD_b
|WR_t
, I2
}, /* same */
519 {"flush", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, I2
}, /* as lwr */
520 {"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD
|RD_b
|WR_t
, I3
},
521 {"lwu", "t,A(b)", 0, (int) M_LWU_AB
, INSN_MACRO
, I3
},
522 {"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD
|WR_D
|RD_t
|RD_b
, I4
},
523 /* start-sanitize-vr5400 */
524 {"macc", "d,s,t", 0x00000158, 0xfc0007ff, RD_s
|RD_t
|MOD_HILO
|WR_d
, N5
},
525 {"maccu", "d,s,t", 0x00000159, 0xfc0007ff, RD_s
|RD_t
|MOD_HILO
|WR_d
, N5
},
526 {"macchi", "d,s,t", 0x00000358, 0xfc0007ff, RD_s
|RD_t
|MOD_HILO
|WR_d
, N5
},
527 {"macchiu", "d,s,t", 0x00000359, 0xfc0007ff, RD_s
|RD_t
|MOD_HILO
|WR_d
, N5
},
528 /* end-sanitize-vr5400 */
529 {"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
|RD_HI
|RD_LO
, P3
},
530 {"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
|RD_HI
|RD_LO
, P3
},
531 {"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, I4
},
532 {"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, I4
},
533 /* start-sanitize-r5900 */
534 {"madd.s", "D,S,T", 0x4600001c, 0xffe007ff, WR_D
|RD_S
|RD_T
|FP_S
, T5
},
535 /* end-sanitize-r5900 */
536 {"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, L1
},
537 {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, G1
},
538 {"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s
|RD_t
|WR_HI
|WR_LO
|WR_d
, G1
},
539 /* start-sanitize-r5900 */
540 {"madd1", "s,t", 0x70000020, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
541 {"madd1", "d,s,t", 0x70000020, 0xfc0007ff, RD_s
|RD_t
|WR_HI
|WR_LO
|WR_d
, T5
},
542 /* end-sanitize-r5900 */
543 {"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, L1
},
544 {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, G1
},
545 {"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s
|RD_t
|WR_HI
|WR_LO
|WR_d
, G1
},
546 /* start-sanitize-r5900 */
547 {"maddu1", "s,t", 0x70000021, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
548 {"maddu1", "d,s,t", 0x70000021, 0xfc0007ff, RD_s
|RD_t
|WR_HI
|WR_LO
|WR_d
, T5
},
549 {"adda.s", "S,T", 0x46000018, 0xffe007ff, RD_S
|RD_T
|FP_S
, T5
},
550 {"madda.s", "S,T", 0x4600001e, 0xffe007ff, RD_S
|RD_T
|FP_S
, T5
},
551 {"max.s", "D,S,T", 0x46000028, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, T5
},
552 {"min.s", "D,S,T", 0x46000029, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, T5
},
553 {"msuba.s", "S,T", 0x4600001f, 0xffe007ff, RD_S
|RD_T
|FP_S
, T5
},
554 {"mula.s", "S,T", 0x4600001a, 0xffe007ff, RD_S
|RD_T
|FP_S
, T5
},
555 {"suba.s", "S,T", 0x46000019, 0xffe007ff, RD_S
|RD_T
|FP_S
, T5
},
556 {"di", "", 0x42000039, 0xffffffff, WR_C0
, T5
},
557 {"ei", "", 0x42000038, 0xffffffff, WR_C0
, T5
},
558 {"mfbpc", "t", 0x4000c000, 0xffe0ffff, RD_C0
|WR_t
, T5
},
559 {"mfdab", "t", 0x4000c004, 0xffe0ffff, RD_C0
|WR_t
, T5
},
560 {"mfdabm", "t", 0x4000c005, 0xffe0ffff, RD_C0
|WR_t
, T5
},
561 {"mfdvb", "t", 0x4000c006, 0xffe0ffff, RD_C0
|WR_t
, T5
},
562 {"mfdvbm", "t", 0x4000c007, 0xffe0ffff, RD_C0
|WR_t
, T5
},
563 {"mfiab", "t", 0x4000c002, 0xffe0ffff, RD_C0
|WR_t
, T5
},
564 {"mfiabm", "t", 0x4000c003, 0xffe0ffff, RD_C0
|WR_t
, T5
},
565 {"mtbpc", "t", 0x4080c000, 0xffe0ffff, WR_C0
|RD_t
, T5
},
566 {"mtdab", "t", 0x4080c004, 0xffe0ffff, WR_C0
|RD_t
, T5
},
567 {"mtdabm", "t", 0x4080c005, 0xffe0ffff, WR_C0
|RD_t
, T5
},
568 {"mtdvb", "t", 0x4080c006, 0xffe0ffff, WR_C0
|RD_t
, T5
},
569 {"mtdvbm", "t", 0x4080c007, 0xffe0ffff, WR_C0
|RD_t
, T5
},
570 {"mtiab", "t", 0x4080c002, 0xffe0ffff, WR_C0
|RD_t
, T5
},
571 {"mtiabm", "t", 0x4080c003, 0xffe0ffff, WR_C0
|RD_t
, T5
},
572 /* end-sanitize-r5900 */
573 {"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
|RD_HI
|RD_LO
, V1
},
574 /* start-sanitize-vr5400 */
575 {"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, RD_C0
|WR_t
, N5
},
576 /* end-sanitize-vr5400 */
577 /* start-sanitize-r5900 */
578 {"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, RD_C0
|WR_t
, T5
},
579 /* end-sanitize-r5900 */
580 /* start-sanitize-vr5400 */
581 {"mfps", "t,P", 0x4000c800, 0xffe0ffc1, RD_C0
|WR_t
, N5
},
582 /* end-sanitize-vr5400 */
583 /* start-sanitize-r5900 */
584 {"mfps", "t,P", 0x4000c800, 0xffe0ffc1, RD_C0
|WR_t
, T5
},
585 /* end-sanitize-r5900 */
586 /* start-sanitize-vr5400 */
587 {"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, WR_C0
|RD_t
, N5
},
588 /* end-sanitize-vr5400 */
589 /* start-sanitize-r5900 */
590 {"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, WR_C0
|RD_t
, T5
},
591 /* end-sanitize-r5900 */
592 /* start-sanitize-vr5400 */
593 {"mtps", "t,P", 0x4080c800, 0xffe0ffc1, WR_C0
|RD_t
, N5
},
594 /* end-sanitize-vr5400 */
595 /* start-sanitize-r5900 */
596 {"mtps", "t,P", 0x4080c800, 0xffe0ffc1, WR_C0
|RD_t
, T5
},
597 /* end-sanitize-r5900 */
598 {"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD
|WR_t
|RD_C0
, I1
},
599 {"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_S
, I1
},
600 {"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_S
, I1
},
601 {"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD
|WR_t
|RD_C2
, I1
},
602 {"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD
|WR_t
|RD_C3
, I1
},
603 /* start-sanitize-vr5400 */
604 {"mfdr", "t,G", 0x7000003d, 0xffe007ff, LCD
|WR_t
|RD_C0
, N5
},
605 /* end-sanitize-vr5400 */
606 {"mfhi", "d", 0x00000010, 0xffff07ff, WR_d
|RD_HI
, I1
},
607 /* start-sanitize-r5900 */
608 {"mfhi1", "d", 0x70000010, 0xffff07ff, WR_d
|RD_HI
, T5
},
609 /* end-sanitize-r5900 */
610 {"mflo", "d", 0x00000012, 0xffff07ff, WR_d
|RD_LO
, I1
},
611 /* start-sanitize-r5900 */
612 {"mflo1", "d", 0x70000012, 0xffff07ff, WR_d
|RD_LO
, T5
},
613 {"mfsa", "d", 0x00000028, 0xffff07ff, WR_d
, T5
},
614 /* end-sanitize-r5900 */
615 {"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D
|RD_S
|FP_D
, I1
},
616 {"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D
|RD_S
|FP_S
, I1
},
617 {"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d
|RD_s
|RD_CC
|FP_D
|FP_S
, I4
},
618 {"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, I4
},
619 {"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_S
, I4
},
620 {"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I4
},
621 /* start-sanitize-r5900 */
622 {"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
623 /* end-sanitize-r5900 */
624 {"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d
|RD_s
,L1
},
625 {"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, I4
},
626 {"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_S
, I4
},
627 {"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d
|RD_s
|RD_CC
, I4
},
628 {"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, I4
},
629 {"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_S
, I4
},
630 {"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I4
},
631 /* start-sanitize-r5900 */
632 {"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
633 /* end-sanitize-r5900 */
634 {"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d
|RD_s
,L1
},
635 {"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, I4
},
636 {"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_S
, I4
},
637 /* start-sanitize-vr5400 */
638 {"msac", "d,s,t", 0x000001d8, 0xfc0007ff, RD_s
|RD_t
|MOD_HILO
|WR_d
, N5
},
639 {"msacu", "d,s,t", 0x000001d9, 0xfc0007ff, RD_s
|RD_t
|MOD_HILO
|WR_d
, N5
},
640 {"msachi", "d,s,t", 0x000003d8, 0xfc0007ff, RD_s
|RD_t
|MOD_HILO
|WR_d
, N5
},
641 {"msachiu", "d,s,t", 0x000003d9, 0xfc0007ff, RD_s
|RD_t
|MOD_HILO
|WR_d
, N5
},
642 /* end-sanitize-vr5400 */
643 /* move is at the top of the table. */
644 {"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, I4
},
645 {"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, I4
},
646 /* start-sanitize-r5900 */
647 {"msub.s", "D,S,T", 0x4600001d, 0xffe007ff, WR_D
|RD_S
|RD_T
|FP_S
, T5
},
648 /* end-sanitize-r5900 */
649 {"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
,L1
},
650 {"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
,L1
},
651 {"mtc0", "t,G", 0x40800000, 0xffe007ff, COD
|RD_t
|WR_C0
|WR_CC
, I1
},
652 {"mtc1", "t,S", 0x44800000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_S
, I1
},
653 {"mtc1", "t,G", 0x44800000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_S
, I1
},
654 {"mtc2", "t,G", 0x48800000, 0xffe007ff, COD
|RD_t
|WR_C2
|WR_CC
, I1
},
655 {"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD
|RD_t
|WR_C3
|WR_CC
, I1
},
656 /* start-sanitize-vr5400 */
657 {"mtdr", "t,G", 0x7080003d, 0xffe007ff, COD
|RD_t
|WR_C0
, N5
},
658 /* end-sanitize-vr5400 */
659 {"mthi", "s", 0x00000011, 0xfc1fffff, RD_s
|WR_HI
, I1
},
660 /* start-sanitize-r5900 */
661 {"mthi1", "s", 0x70000011, 0xfc1fffff, RD_s
|WR_HI
, T5
},
662 /* end-sanitize-r5900 */
663 {"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s
|WR_LO
, I1
},
664 /* start-sanitize-r5900 */
665 {"mtlo1", "s", 0x70000013, 0xfc1fffff, RD_s
|WR_LO
, T5
},
666 {"mtsa", "s", 0x00000029, 0xfc1fffff, RD_s
, T5
},
667 {"mtsab", "s,j", 0x04180000, 0xfc1f0000, RD_s
, T5
},
668 {"mtsah", "s,j", 0x04190000, 0xfc1f0000, RD_s
, T5
},
669 /* end-sanitize-r5900 */
670 {"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I1
},
671 {"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, I1
},
672 /* start-sanitize-vr5400 */
673 {"mulu", "d,s,t", 0x00000059, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, N5
},
674 {"mulhi", "d,s,t", 0x00000258, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, N5
},
675 {"mulhiu", "d,s,t", 0x00000259, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, N5
},
676 {"mul", "d,s,t", 0x00000058, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, N5
},
677 /* end-sanitize-vr5400 */
678 {"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HI
|WR_LO
,P3
},
679 {"mul", "d,v,t", 0, (int) M_MUL
, INSN_MACRO
, I1
},
680 {"mul", "d,v,I", 0, (int) M_MUL_I
, INSN_MACRO
, I1
},
681 {"mulo", "d,v,t", 0, (int) M_MULO
, INSN_MACRO
, I1
},
682 {"mulo", "d,v,I", 0, (int) M_MULO_I
, INSN_MACRO
, I1
},
683 {"mulou", "d,v,t", 0, (int) M_MULOU
, INSN_MACRO
, I1
},
684 {"mulou", "d,v,I", 0, (int) M_MULOU_I
, INSN_MACRO
, I1
},
685 /* start-sanitize-vr5400 */
686 {"muls", "d,s,t", 0x000000d8, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, N5
},
687 {"mulsu", "d,s,t", 0x000000d9, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, N5
},
688 {"mulshi", "d,s,t", 0x000002d8, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, N5
},
689 {"mulshiu", "d,s,t", 0x000002d9, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, N5
},
690 /* end-sanitize-vr5400 */
691 {"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I1
},
692 {"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s
|RD_t
|WR_HI
|WR_LO
|WR_d
, G1
},
693 /* start-sanitize-r5900 */
694 {"mult1", "d,s,t", 0x70000018, 0xfc0007ff, RD_s
|RD_t
|WR_HI
|WR_LO
|WR_d
, T5
},
695 /* end-sanitize-r5900 */
696 {"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I1
},
697 {"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s
|RD_t
|WR_HI
|WR_LO
|WR_d
, G1
},
698 /* start-sanitize-r5900 */
699 {"multu1", "d,s,t", 0x70000019, 0xfc0007ff, RD_s
|RD_t
|WR_HI
|WR_LO
|WR_d
, T5
},
700 /* end-sanitize-r5900 */
701 {"neg", "d,w", 0x00000022, 0xffe007ff, WR_d
|RD_t
, I1
}, /* sub 0 */
702 {"negu", "d,w", 0x00000023, 0xffe007ff, WR_d
|RD_t
, I1
}, /* subu 0 */
703 {"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D
|RD_S
|FP_D
, I1
},
704 {"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D
|RD_S
|FP_S
, I1
},
705 {"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, I4
},
706 {"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, I4
},
707 {"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, I4
},
708 {"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, I4
},
709 /* nop is at the start of the table. */
710 {"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
711 {"nor", "t,r,I", 0, (int) M_NOR_I
, INSN_MACRO
, I1
},
712 {"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d
|RD_s
|RD_t
, I1
},/*nor d,s,0*/
713 {"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
714 {"or", "t,r,I", 0, (int) M_OR_I
, INSN_MACRO
, I1
},
715 {"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t
|RD_s
, I1
},
717 /* start-sanitize-r5900 */
718 {"pabsh", "d,t", 0x70000168, 0xffe007ff, WR_d
|RD_t
, T5
},
719 {"pabsw", "d,t", 0x70000068, 0xffe007ff, WR_d
|RD_t
, T5
},
720 {"paddb", "d,v,t", 0x70000208, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
721 {"paddh", "d,v,t", 0x70000108, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
722 {"paddw", "d,v,t", 0x70000008, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
723 {"paddsb", "d,v,t", 0x70000608, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
724 {"paddsh", "d,v,t", 0x70000508, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
725 {"paddsw", "d,v,t", 0x70000408, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
726 {"paddub", "d,v,t", 0x70000628, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
727 {"padduh", "d,v,t", 0x70000528, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
728 {"padduw", "d,v,t", 0x70000428, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
729 {"padsbh", "d,v,t", 0x70000128, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
730 {"pand", "d,v,t", 0x70000489, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
731 {"pceqb", "d,v,t", 0x700002a8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
732 {"pceqh", "d,v,t", 0x700001a8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
733 {"pceqw", "d,v,t", 0x700000a8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
735 {"pcgtb", "d,v,t", 0x70000288, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
736 {"pcgth", "d,v,t", 0x70000188, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
737 {"pcgtw", "d,v,t", 0x70000088, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
739 {"pcpyh", "d,t", 0x700006e9, 0xffe007ff, WR_d
|RD_t
, T5
},
741 {"pcpyld", "d,v,t", 0x70000389, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
742 {"pcpyud", "d,v,t", 0x700003a9, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
744 {"pdivbw", "s,t", 0x70000749, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
745 {"pdivuw", "s,t", 0x70000369, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
746 {"pdivw", "s,t", 0x70000349, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
748 {"pexch", "d,t", 0x700006a9, 0xffe007ff, WR_d
|RD_t
, T5
},
749 {"pexcw", "d,t", 0x700007a9, 0xffe007ff, WR_d
|RD_t
, T5
},
750 {"pexeh", "d,t", 0x70000689, 0xffe007ff, WR_d
|RD_t
, T5
},
751 {"pexoh", "d,t", 0x70000689, 0xffe007ff, WR_d
|RD_t
, T5
},
752 {"pexew", "d,t", 0x70000789, 0xffe007ff, WR_d
|RD_t
, T5
},
753 {"pexow", "d,t", 0x70000789, 0xffe007ff, WR_d
|RD_t
, T5
},
755 {"pext5", "d,t", 0x70000788, 0xffe007ff, WR_d
|RD_t
, T5
},
757 {"pextlb", "d,v,t", 0x70000688, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
758 {"pextlh", "d,v,t", 0x70000588, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
759 {"pextlw", "d,v,t", 0x70000488, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
760 {"pextub", "d,v,t", 0x700006a8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
761 {"pextuh", "d,v,t", 0x700005a8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
762 {"pextuw", "d,v,t", 0x700004a8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
764 {"phmaddh", "d,v,t", 0x70000449, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
765 {"phmsubh", "d,v,t", 0x70000549, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
767 {"pinth", "d,v,t", 0x70000289, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
768 {"pinteh", "d,v,t", 0x700002a9, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
769 {"pintoh", "d,v,t", 0x700002a9, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
771 {"plzcw", "d,v", 0x70000004, 0xfc1f07ff, WR_d
|RD_s
, T5
},
773 {"pmaddh", "d,v,t", 0x70000409, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
774 {"pmadduw", "d,v,t", 0x70000029, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
775 {"pmaddw", "d,v,t", 0x70000009, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
777 {"pmaxh", "d,v,t", 0x700001c8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
778 {"pmaxw", "d,v,t", 0x700000c8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
780 {"pmfhi", "d", 0x70000209, 0xffff07ff, WR_d
|RD_HI
, T5
},
781 {"pmflo", "d", 0x70000249, 0xffff07ff, WR_d
|RD_LO
, T5
},
783 {"pmfhl.lw", "d", 0x70000030, 0xffff07ff, WR_d
|RD_LO
|RD_HI
, T5
},
784 {"pmfhl.uw", "d", 0x70000070, 0xffff07ff, WR_d
|RD_LO
|RD_HI
, T5
},
785 {"pmfhl.slw","d", 0x700000b0, 0xffff07ff, WR_d
|RD_LO
|RD_HI
, T5
},
786 {"pmfhl.lh", "d", 0x700000f0, 0xffff07ff, WR_d
|RD_LO
|RD_HI
, T5
},
787 {"pmfhl.sh", "d", 0x70000130, 0xffff07ff, WR_d
|RD_LO
|RD_HI
, T5
},
789 {"pminh", "d,v,t", 0x700001e8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
790 {"pminw", "d,v,t", 0x700000e8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
792 {"pmsubh", "d,v,t", 0x70000509, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
793 {"pmsubw", "d,v,t", 0x70000109, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
795 {"pmthi", "v", 0x70000229, 0xfc1fffff, WR_HI
|RD_s
, T5
},
796 {"pmtlo", "v", 0x70000269, 0xfc1fffff, WR_LO
|RD_s
, T5
},
798 {"pmthl.lw", "v", 0x70000031, 0xfc1fffff, WR_HI
|WR_LO
|RD_s
, T5
},
800 {"pmulth", "d,v,t", 0x70000709, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
801 {"pmultuw", "d,v,t", 0x70000329, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
802 {"pmultw", "d,v,t", 0x70000309, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HI
|WR_LO
, T5
},
804 {"pnor", "d,v,t", 0x700004e9, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
805 {"por", "d,v,t", 0x700004a9, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
807 {"ppac5", "d,t", 0x700007c8, 0xffe007ff, WR_d
|RD_t
, T5
},
809 {"ppacb", "d,v,t", 0x700006c8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
810 {"ppach", "d,v,t", 0x700005c8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
811 {"ppacw", "d,v,t", 0x700004c8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
813 {"prevh", "d,t", 0x700006c9, 0xffe007ff, WR_d
|RD_t
, T5
},
814 {"prot3w", "d,t", 0x700007c9, 0xffe007ff, WR_d
|RD_t
, T5
},
816 {"psllh", "d,t,<", 0x70000034, 0xffe0003f, WR_d
|RD_t
, T5
},
817 {"psllvw", "d,t,s", 0x70000089, 0xfc0007ff, WR_d
|RD_t
|RD_s
, T5
},
818 {"psllw", "d,t,<", 0x7000003c, 0xffe0003f, WR_d
|RD_t
, T5
},
820 {"psrah", "d,t,<", 0x70000037, 0xffe0003f, WR_d
|RD_t
, T5
},
821 {"psravw", "d,t,s", 0x700000e9, 0xfc0007ff, WR_d
|RD_t
|RD_s
, T5
},
822 {"psraw", "d,t,<", 0x7000003f, 0xffe0003f, WR_d
|RD_t
, T5
},
824 {"psrlh", "d,t,<", 0x70000036, 0xffe0003f, WR_d
|RD_t
, T5
},
825 {"psrlvw", "d,t,s", 0x700000c9, 0xfc0007ff, WR_d
|RD_t
|RD_s
, T5
},
826 {"psrlw", "d,t,<", 0x7000003e, 0xffe0003f, WR_d
|RD_t
, T5
},
828 {"psubb", "d,v,t", 0x70000248, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
829 {"psubh", "d,v,t", 0x70000148, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
830 {"psubsb", "d,v,t", 0x70000648, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
831 {"psubsh", "d,v,t", 0x70000548, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
832 {"psubsw", "d,v,t", 0x70000448, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
833 {"psubub", "d,v,t", 0x70000668, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
834 {"psubuh", "d,v,t", 0x70000568, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
835 {"psubuw", "d,v,t", 0x70000468, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
836 {"psubw", "d,v,t", 0x70000048, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
838 {"pxor", "d,v,t", 0x700004c9, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
839 /* end-sanitize-r5900 */
841 {"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b
, G3
},
842 {"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b
|RD_t
, I4
},
844 /* start-sanitize-r5900 */
845 {"qfsrv", "d,v,t", 0x700006e8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, T5
},
846 /* end-sanitize-r5900 */
848 {"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D
|RD_S
|FP_D
, I4
},
849 {"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D
|RD_S
|FP_S
, I4
},
850 {"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I1
},
851 {"rem", "d,v,t", 0, (int) M_REM_3
, INSN_MACRO
, I1
},
852 {"rem", "d,v,I", 0, (int) M_REM_3I
, INSN_MACRO
, I1
},
853 {"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s
|RD_t
|WR_HI
|WR_LO
, I1
},
854 {"remu", "d,v,t", 0, (int) M_REMU_3
, INSN_MACRO
, I1
},
855 {"remu", "d,v,I", 0, (int) M_REMU_3I
, INSN_MACRO
, I1
},
856 {"rfe", "", 0x42000010, 0xffffffff, 0, I1
|T3
},
857 {"rol", "d,v,t", 0, (int) M_ROL
, INSN_MACRO
, I1
},
858 {"rol", "d,v,I", 0, (int) M_ROL_I
, INSN_MACRO
, I1
},
859 /* start-sanitize-vr5400 */
860 {"ror", "d,t,<", 0x00200002, 0xffe0003f, WR_d
|RD_t
, N5
},
861 /* end-sanitize-vr5400 */
862 {"ror", "d,v,t", 0, (int) M_ROR
, INSN_MACRO
, I1
},
863 {"ror", "d,v,I", 0, (int) M_ROR_I
, INSN_MACRO
, I1
},
864 /* start-sanitize-vr5400 */
865 {"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t
|RD_s
|WR_d
, N5
},
866 /* end-sanitize-vr5400 */
867 {"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D
|RD_S
|FP_D
, I3
},
868 {"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D
|RD_S
|FP_S
, I3
},
869 {"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D
|RD_S
|FP_D
, I2
},
870 {"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D
|RD_S
|FP_S
, I2
},
871 {"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D
|RD_S
|FP_D
, I4
},
872 {"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D
|RD_S
|FP_S
, I4
},
873 /* start-sanitize-r5900 */
874 {"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D
|RD_S
|FP_S
, T5
},
875 /* end-sanitize-r5900 */
876 {"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM
|RD_t
|RD_b
, I1
},
877 {"sb", "t,A(b)", 0, (int) M_SB_AB
, INSN_MACRO
, I1
},
878 {"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM
|RD_t
|WR_t
|RD_b
, I2
},
879 {"sc", "t,A(b)", 0, (int) M_SC_AB
, INSN_MACRO
, I2
},
880 {"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM
|RD_t
|WR_t
|RD_b
, I3
},
881 {"scd", "t,A(b)", 0, (int) M_SCD_AB
, INSN_MACRO
, I3
},
882 {"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM
|RD_t
|RD_b
, I3
},
883 {"sd", "t,o(b)", 0, (int) M_SD_OB
, INSN_MACRO
, I1
},
884 {"sd", "t,A(b)", 0, (int) M_SD_AB
, INSN_MACRO
, I1
},
885 {"sdbbp", "", 0x0000000e, 0xffffffff, TRAP
, G2
},
886 {"sdbbp", "c", 0x0000000e, 0xfc00003f, TRAP
, G2
},
887 {"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, I2
},
888 {"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, I2
},
889 {"sdc1", "T,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, I2
},
890 {"sdc1", "E,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, I2
},
891 {"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM
|RD_C2
|RD_b
, I2
},
892 {"sdc2", "E,A(b)", 0, (int) M_SDC2_AB
, INSN_MACRO
, I2
},
893 {"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM
|RD_C3
|RD_b
, I2
},
894 {"sdc3", "E,A(b)", 0, (int) M_SDC3_AB
, INSN_MACRO
, I2
},
895 {"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, I2
},
896 {"s.d", "T,o(b)", 0, (int) M_S_DOB
, INSN_MACRO
, I1
},
897 {"s.d", "T,A(b)", 0, (int) M_S_DAB
, INSN_MACRO
, I1
},
898 {"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM
|RD_t
|RD_b
, I3
},
899 {"sdl", "t,A(b)", 0, (int) M_SDL_AB
, INSN_MACRO
, I3
},
900 {"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM
|RD_t
|RD_b
, I3
},
901 {"sdr", "t,A(b)", 0, (int) M_SDR_AB
, INSN_MACRO
, I3
},
902 {"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM
|RD_S
|RD_t
|RD_b
, I4
},
903 {"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d
|RD_s
|RD_t
,L1
},
904 {"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d
|RD_s
|RD_t
,L1
},
905 {"seq", "d,v,t", 0, (int) M_SEQ
, INSN_MACRO
, I1
},
906 {"seq", "d,v,I", 0, (int) M_SEQ_I
, INSN_MACRO
, I1
},
907 {"sge", "d,v,t", 0, (int) M_SGE
, INSN_MACRO
, I1
},
908 {"sge", "d,v,I", 0, (int) M_SGE_I
, INSN_MACRO
, I1
},
909 {"sgeu", "d,v,t", 0, (int) M_SGEU
, INSN_MACRO
, I1
},
910 {"sgeu", "d,v,I", 0, (int) M_SGEU_I
, INSN_MACRO
, I1
},
911 {"sgt", "d,v,t", 0, (int) M_SGT
, INSN_MACRO
, I1
},
912 {"sgt", "d,v,I", 0, (int) M_SGT_I
, INSN_MACRO
, I1
},
913 {"sgtu", "d,v,t", 0, (int) M_SGTU
, INSN_MACRO
, I1
},
914 {"sgtu", "d,v,I", 0, (int) M_SGTU_I
, INSN_MACRO
, I1
},
915 {"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM
|RD_t
|RD_b
, I1
},
916 {"sh", "t,A(b)", 0, (int) M_SH_AB
, INSN_MACRO
, I1
},
917 {"sle", "d,v,t", 0, (int) M_SLE
, INSN_MACRO
, I1
},
918 {"sle", "d,v,I", 0, (int) M_SLE_I
, INSN_MACRO
, I1
},
919 {"sleu", "d,v,t", 0, (int) M_SLEU
, INSN_MACRO
, I1
},
920 {"sleu", "d,v,I", 0, (int) M_SLEU_I
, INSN_MACRO
, I1
},
921 {"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I1
},
922 {"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I1
}, /* sllv */
923 {"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d
|RD_t
, I1
},
924 {"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
925 {"slt", "d,v,I", 0, (int) M_SLT_I
, INSN_MACRO
, I1
},
926 {"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t
|RD_s
, I1
},
927 {"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t
|RD_s
, I1
},
928 {"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
929 {"sltu", "d,v,I", 0, (int) M_SLTU_I
, INSN_MACRO
, I1
},
930 {"sne", "d,v,t", 0, (int) M_SNE
, INSN_MACRO
, I1
},
931 {"sne", "d,v,I", 0, (int) M_SNE_I
, INSN_MACRO
, I1
},
932 /* start-sanitize-r5900 */
933 {"sq", "t,o(b)", 0x7c000000, 0xfc000000, SM
|RD_t
|RD_b
, T5
},
934 /* end-sanitize-r5900 */
935 {"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D
|RD_S
|FP_D
, I2
},
936 {"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D
|RD_S
|FP_S
, I2
},
937 {"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I1
},
938 {"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I1
}, /* srav */
939 {"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d
|RD_t
, I1
},
940 {"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I1
},
941 {"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d
|RD_t
|RD_s
, I1
}, /* srlv */
942 {"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d
|RD_t
, I1
},
943 {"standby", "", 0x42000021, 0xffffffff, 0, V1
},
944 {"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
945 {"sub", "d,v,I", 0, (int) M_SUB_I
, INSN_MACRO
, I1
},
946 {"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, I1
},
947 {"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, I1
},
948 {"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
949 {"subu", "d,v,I", 0, (int) M_SUBU_I
, INSN_MACRO
, I1
},
950 {"suspend", "", 0x42000022, 0xffffffff, 0, V1
},
951 {"sw", "t,o(b)", 0xac000000, 0xfc000000, SM
|RD_t
|RD_b
, I1
},
952 {"sw", "t,A(b)", 0, (int) M_SW_AB
, INSN_MACRO
, I1
},
953 {"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM
|RD_C0
|RD_b
, I1
},
954 {"swc0", "E,A(b)", 0, (int) M_SWC0_AB
, INSN_MACRO
, I1
},
955 {"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, I1
},
956 {"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, I1
},
957 {"swc1", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, I1
},
958 {"swc1", "E,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, I1
},
959 {"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, I1
}, /* swc1 */
960 {"s.s", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, I1
},
961 {"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM
|RD_C2
|RD_b
, I1
},
962 {"swc2", "E,A(b)", 0, (int) M_SWC2_AB
, INSN_MACRO
, I1
},
963 {"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM
|RD_C3
|RD_b
, I1
},
964 {"swc3", "E,A(b)", 0, (int) M_SWC3_AB
, INSN_MACRO
, I1
},
965 {"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM
|RD_t
|RD_b
, I1
},
966 {"swl", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, I1
},
967 {"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t
|RD_b
, I2
}, /* same */
968 {"scache", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, I2
}, /* as swl */
969 {"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM
|RD_t
|RD_b
, I1
},
970 {"swr", "t,A(b)", 0, (int) M_SWR_AB
, INSN_MACRO
, I1
},
971 {"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t
|RD_b
, I2
}, /* same */
972 {"invalidate", "t,A(b)",0, (int) M_SWR_AB
, INSN_MACRO
, I2
}, /* as swr */
973 {"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM
|RD_S
|RD_t
|RD_b
, I4
},
974 {"sync", "", 0x0000000f, 0xffffffff, 0, I2
|T3
},
975 {"syscall", "", 0x0000000c, 0xffffffff, TRAP
, I1
},
976 {"syscall", "B", 0x0000000c, 0xfc00003f, TRAP
, I1
},
977 {"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s
|TRAP
, I2
},
978 {"teq", "s,t", 0x00000034, 0xfc00003f, RD_s
|RD_t
|TRAP
, I2
},
979 {"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s
|TRAP
, I2
}, /* teqi */
980 {"teq", "s,I", 0, (int) M_TEQ_I
, INSN_MACRO
, I2
},
981 {"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s
|TRAP
, I2
},
982 {"tge", "s,t", 0x00000030, 0xfc00003f, RD_s
|RD_t
|TRAP
, I2
},
983 {"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s
|TRAP
, I2
}, /* tgei */
984 {"tge", "s,I", 0, (int) M_TGE_I
, INSN_MACRO
, I2
},
985 {"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s
|TRAP
, I2
},
986 {"tgeu", "s,t", 0x00000031, 0xfc00003f, RD_s
|RD_t
|TRAP
, I2
},
987 {"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s
|TRAP
, I2
}, /* tgeiu */
988 {"tgeu", "s,I", 0, (int) M_TGEU_I
, INSN_MACRO
, I2
},
989 {"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB
, I1
},
990 {"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB
, I1
},
991 {"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB
, I1
},
992 {"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB
, I1
},
993 {"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s
|TRAP
, I2
},
994 {"tlt", "s,t", 0x00000032, 0xfc00003f, RD_s
|RD_t
|TRAP
, I2
},
995 {"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s
|TRAP
, I2
}, /* tlti */
996 {"tlt", "s,I", 0, (int) M_TLT_I
, INSN_MACRO
, I2
},
997 {"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s
|TRAP
, I2
},
998 {"tltu", "s,t", 0x00000033, 0xfc00003f, RD_s
|RD_t
|TRAP
, I2
},
999 {"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s
|TRAP
, I2
}, /* tltiu */
1000 {"tltu", "s,I", 0, (int) M_TLTU_I
, INSN_MACRO
, I2
},
1001 {"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s
|TRAP
, I2
},
1002 {"tne", "s,t", 0x00000036, 0xfc00003f, RD_s
|RD_t
|TRAP
, I2
},
1003 {"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s
|TRAP
, I2
}, /* tnei */
1004 {"tne", "s,I", 0, (int) M_TNE_I
, INSN_MACRO
, I2
},
1005 {"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D
|RD_S
|FP_D
, I3
},
1006 {"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D
|RD_S
|FP_S
, I3
},
1007 {"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D
|RD_S
|FP_D
, I2
},
1008 {"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D
|RD_S
|FP_D
, I2
},
1009 {"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD
, INSN_MACRO
, I1
},
1010 {"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D
|RD_S
|FP_S
, I2
},
1011 {"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D
|RD_S
|FP_S
, I2
},
1012 {"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS
, INSN_MACRO
, I1
},
1013 {"uld", "t,o(b)", 0, (int) M_ULD
, INSN_MACRO
, I3
},
1014 {"uld", "t,A(b)", 0, (int) M_ULD_A
, INSN_MACRO
, I3
},
1015 {"ulh", "t,o(b)", 0, (int) M_ULH
, INSN_MACRO
, I1
},
1016 {"ulh", "t,A(b)", 0, (int) M_ULH_A
, INSN_MACRO
, I1
},
1017 {"ulhu", "t,o(b)", 0, (int) M_ULHU
, INSN_MACRO
, I1
},
1018 {"ulhu", "t,A(b)", 0, (int) M_ULHU_A
, INSN_MACRO
, I1
},
1019 {"ulw", "t,o(b)", 0, (int) M_ULW
, INSN_MACRO
, I1
},
1020 {"ulw", "t,A(b)", 0, (int) M_ULW_A
, INSN_MACRO
, I1
},
1021 {"usd", "t,o(b)", 0, (int) M_USD
, INSN_MACRO
, I3
},
1022 {"usd", "t,A(b)", 0, (int) M_USD_A
, INSN_MACRO
, I3
},
1023 {"ush", "t,o(b)", 0, (int) M_USH
, INSN_MACRO
, I1
},
1024 {"ush", "t,A(b)", 0, (int) M_USH_A
, INSN_MACRO
, I1
},
1025 {"usw", "t,o(b)", 0, (int) M_USW
, INSN_MACRO
, I1
},
1026 {"usw", "t,A(b)", 0, (int) M_USW_A
, INSN_MACRO
, I1
},
1027 {"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d
|RD_s
|RD_t
, I1
},
1028 {"xor", "t,r,I", 0, (int) M_XOR_I
, INSN_MACRO
, I1
},
1029 {"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t
|RD_s
, I1
},
1030 {"wait", "", 0x42000020, 0xffffffff, TRAP
, I3
},
1031 {"waiti", "", 0x42000020, 0xffffffff, TRAP
, L1
},
1032 {"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM
|RD_b
, L1
},
1033 /* start-sanitize-vr5400 */
1034 {"add.ob", "D,S,T", 0x4ac0000b, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1035 {"add.ob", "D,S,T[e]", 0x4800000b, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1036 {"add.ob", "D,S,k", 0x4bc0000b, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1037 {"alni.ob", "D,S,T,%", 0x48000018, 0xff00003f, WR_D
|RD_S
|RD_T
, N5
},
1038 {"and.ob", "D,S,T", 0x4ac0000c, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1039 {"and.ob", "D,S,T[e]", 0x4800000c, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1040 {"and.ob", "D,S,k", 0x4bc0000c, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1041 {"c.eq.ob", "S,T", 0x4ac00001, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1042 {"c.eq.ob", "S,T[e]", 0x48000001, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, N5
},
1043 {"c.eq.ob", "S,k", 0x4bc00001, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1044 {"c.le.ob", "S,T", 0x4ac00005, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1045 {"c.le.ob", "S,T[e]", 0x48000005, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, N5
},
1046 {"c.le.ob", "S,k", 0x4bc00005, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1047 {"c.lt.ob", "S,T", 0x4ac00004, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1048 {"c.lt.ob", "S,T[e]", 0x48000004, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, N5
},
1049 {"c.lt.ob", "S,k", 0x4bc00004, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1050 {"max.ob", "D,S,T", 0x4ac00007, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1051 {"max.ob", "D,S,T[e]", 0x48000007, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1052 {"max.ob", "D,S,k", 0x4bc00007, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1053 {"min.ob", "D,S,T", 0x4ac00006, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1054 {"min.ob", "D,S,T[e]", 0x48000006, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1055 {"min.ob", "D,S,k", 0x4bc00006, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1056 {"mul.ob", "D,S,T", 0x4ac00030, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1057 {"mul.ob", "D,S,T[e]", 0x48000030, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1058 {"mul.ob", "D,S,k", 0x4bc00030, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1059 {"mula.ob", "S,T", 0x4ac00033, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1060 {"mula.ob", "S,T[e]", 0x48000033, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, N5
},
1061 {"mula.ob", "S,k", 0x4bc00033, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1062 {"mull.ob", "S,T", 0x4ac00433, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1063 {"mull.ob", "S,T[e]", 0x48000433, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, N5
},
1064 {"mull.ob", "S,k", 0x4bc00433, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1065 {"muls.ob", "S,T", 0x4ac00032, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1066 {"muls.ob", "S,T[e]", 0x48000032, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, N5
},
1067 {"muls.ob", "S,k", 0x4bc00032, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1068 {"mulsl.ob","S,T", 0x4ac00432, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1069 {"mulsl.ob","S,T[e]", 0x48000432, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, N5
},
1070 {"mulsl.ob","S,k", 0x4bc00432, 0xffe007ff, WR_CC
|RD_S
|RD_T
, N5
},
1071 {"nor.ob", "D,S,T", 0x4ac0000f, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1072 {"nor.ob", "D,S,T[e]", 0x4800000f, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1073 {"nor.ob", "D,S,k", 0x4bc0000f, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1074 {"or.ob", "D,S,T", 0x4ac0000e, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1075 {"or.ob", "D,S,T[e]", 0x4800000e, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1076 {"or.ob", "D,S,k", 0x4bc0000e, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1077 {"pickf.ob", "D,S,T", 0x4ac00002, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1078 {"pickf.ob", "D,S,T[e]", 0x48000002, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1079 {"pickf.ob", "D,S,k", 0x4bc00002, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1080 {"pickt.ob", "D,S,T", 0x4ac00003, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1081 {"pickt.ob", "D,S,T[e]", 0x48000003, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1082 {"pickt.ob", "D,S,k", 0x4bc00003, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1083 {"rach.ob", "D", 0x4a00003f, 0xfffff83f, WR_D
, N5
},
1084 {"racl.ob", "D", 0x4800003f, 0xfffff83f, WR_D
, N5
},
1085 {"racm.ob", "D", 0x4900003f, 0xfffff83f, WR_D
, N5
},
1086 {"rzu.ob", "D,k", 0x4bc00020, 0xffe0f83f, WR_D
|RD_S
|RD_T
, N5
},
1087 {"shfl.mixh.ob","D,S,T",0x4980001f, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1088 {"shfl.mixl.ob","D,S,T",0x49c0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1089 {"shfl.pach.ob","D,S,T",0x4900001f, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1090 {"shfl.pacl.ob","D,S,T",0x4940001f, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1091 {"sll.ob", "D,S,T[e]", 0x48000010, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1092 {"sll.ob", "D,S,k", 0x4bc00010, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1093 {"srl.ob", "D,S,T[e]", 0x48000012, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1094 {"srl.ob", "D,S,k", 0x4bc00012, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1095 {"sub.ob", "D,S,T", 0x4ac0000a, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1096 {"sub.ob", "D,S,T[e]", 0x4800000a, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1097 {"sub.ob", "D,S,k", 0x4bc0000a, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1098 {"wach.ob", "S", 0x4a00003e, 0xffff07ff, RD_S
, N5
},
1099 {"wacl.ob", "S,T", 0x4800003e, 0xffe007ff, RD_S
|RD_T
, N5
},
1100 {"xor.ob", "D,S,T", 0x4ac0000d, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1101 {"xor.ob", "D,S,T[e]", 0x4800000d, 0xfe20003f, WR_D
|RD_S
|RD_T
, N5
},
1102 {"xor.ob", "D,S,k", 0x4bc0000d, 0xffe0003f, WR_D
|RD_S
|RD_T
, N5
},
1103 /* end-sanitize-vr5400 */
1104 /* No hazard protection on coprocessor instructions--they shouldn't
1105 change the state of the processor and if they do it's up to the
1106 user to put in nops as necessary. These are at the end so that the
1107 disasembler recognizes more specific versions first. */
1108 {"c0", "C", 0x42000000, 0xfe000000, 0, I1
},
1109 {"c1", "C", 0x46000000, 0xfe000000, 0, I1
},
1110 {"c2", "C", 0x4a000000, 0xfe000000, 0, I1
},
1111 {"c3", "C", 0x4e000000, 0xfe000000, 0, I1
},
1112 {"cop0", "C", 0, (int) M_COP0
, INSN_MACRO
, I1
},
1113 {"cop1", "C", 0, (int) M_COP1
, INSN_MACRO
, I1
},
1114 {"cop2", "C", 0, (int) M_COP2
, INSN_MACRO
, I1
},
1115 {"cop3", "C", 0, (int) M_COP3
, INSN_MACRO
, I1
},
1117 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
1118 4010 any more, so move this insn out of the way. If the object
1119 format gave us more info, we could do this right. */
1120 {"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t
|RD_s
,L1
},
1123 #define MIPS_NUM_OPCODES \
1124 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
1125 const int bfd_mips_num_builtin_opcodes
= MIPS_NUM_OPCODES
;
1127 /* const removed from the following to allow for dynamic extensions to the
1128 * built-in instruction set. */
1129 struct mips_opcode
*mips_opcodes
=
1130 (struct mips_opcode
*) mips_builtin_opcodes
;
1131 int bfd_mips_num_opcodes
= MIPS_NUM_OPCODES
;
1132 #undef MIPS_NUM_OPCODES