2 Copyright (C) 2011-2021 Free Software Foundation, Inc.
4 Contributed by Andrew Waterman (andrew@sifive.com).
7 This file is part of the GNU opcodes library.
9 This library is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING3. If not,
21 see <http://www.gnu.org/licenses/>. */
24 #include "disassemble.h"
25 #include "libiberty.h"
26 #include "opcode/riscv.h"
29 #include "elf/riscv.h"
30 #include "elfxx-riscv.h"
35 static enum riscv_spec_class default_isa_spec
= ISA_SPEC_CLASS_DRAFT
- 1;
36 static enum riscv_spec_class default_priv_spec
= PRIV_SPEC_CLASS_NONE
;
40 static riscv_subset_list_t riscv_subsets
;
41 static riscv_parse_subset_t riscv_rps_dis
=
43 &riscv_subsets
, /* subset_list. */
44 opcodes_error_handler
,/* error_handler. */
46 &default_isa_spec
, /* isa_spec. */
47 false, /* check_unknown_prefixed_ext. */
50 struct riscv_private_data
54 bfd_vma hi_addr
[OP_MASK_RD
+ 1];
57 /* Used for mapping symbols. */
58 static int last_map_symbol
= -1;
59 static bfd_vma last_stop_offset
= 0;
60 enum riscv_seg_mstate last_map_state
;
62 static const char * const *riscv_gpr_names
;
63 static const char * const *riscv_fpr_names
;
65 /* If set, disassemble as most general instruction. */
66 static int no_aliases
;
69 set_default_riscv_dis_options (void)
71 riscv_gpr_names
= riscv_gpr_names_abi
;
72 riscv_fpr_names
= riscv_fpr_names_abi
;
77 parse_riscv_dis_option_without_args (const char *option
)
79 if (strcmp (option
, "no-aliases") == 0)
81 else if (strcmp (option
, "numeric") == 0)
83 riscv_gpr_names
= riscv_gpr_names_numeric
;
84 riscv_fpr_names
= riscv_fpr_names_numeric
;
92 parse_riscv_dis_option (const char *option
)
96 if (parse_riscv_dis_option_without_args (option
))
99 equal
= strchr (option
, '=');
102 /* The option without '=' should be defined above. */
103 opcodes_error_handler (_("unrecognized disassembler option: %s"), option
);
107 || *(equal
+ 1) == '\0')
109 /* Invalid options with '=', no option name before '=',
110 and no value after '='. */
111 opcodes_error_handler (_("unrecognized disassembler option with '=': %s"),
118 if (strcmp (option
, "priv-spec") == 0)
120 enum riscv_spec_class priv_spec
= PRIV_SPEC_CLASS_NONE
;
121 const char *name
= NULL
;
123 RISCV_GET_PRIV_SPEC_CLASS (value
, priv_spec
);
124 if (priv_spec
== PRIV_SPEC_CLASS_NONE
)
125 opcodes_error_handler (_("unknown privileged spec set by %s=%s"),
127 else if (default_priv_spec
== PRIV_SPEC_CLASS_NONE
)
128 default_priv_spec
= priv_spec
;
129 else if (default_priv_spec
!= priv_spec
)
131 RISCV_GET_PRIV_SPEC_NAME (name
, default_priv_spec
);
132 opcodes_error_handler (_("mis-matched privilege spec set by %s=%s, "
133 "the elf privilege attribute is %s"),
134 option
, value
, name
);
139 /* xgettext:c-format */
140 opcodes_error_handler (_("unrecognized disassembler option: %s"), option
);
145 parse_riscv_dis_options (const char *opts_in
)
147 char *opts
= xstrdup (opts_in
), *opt
= opts
, *opt_end
= opts
;
149 set_default_riscv_dis_options ();
151 for ( ; opt_end
!= NULL
; opt
= opt_end
+ 1)
153 if ((opt_end
= strchr (opt
, ',')) != NULL
)
155 parse_riscv_dis_option (opt
);
161 /* Print one argument from an array. */
164 arg_print (struct disassemble_info
*info
, unsigned long val
,
165 const char* const* array
, size_t size
)
167 const char *s
= val
>= size
|| array
[val
] == NULL
? "unknown" : array
[val
];
168 (*info
->fprintf_func
) (info
->stream
, "%s", s
);
172 maybe_print_address (struct riscv_private_data
*pd
, int base_reg
, int offset
,
175 if (pd
->hi_addr
[base_reg
] != (bfd_vma
)-1)
177 pd
->print_addr
= (base_reg
!= 0 ? pd
->hi_addr
[base_reg
] : 0) + offset
;
178 pd
->hi_addr
[base_reg
] = -1;
180 else if (base_reg
== X_GP
&& pd
->gp
!= (bfd_vma
)-1)
181 pd
->print_addr
= pd
->gp
+ offset
;
182 else if (base_reg
== X_TP
|| base_reg
== 0)
183 pd
->print_addr
= offset
;
185 /* Sign-extend a 32-bit value to a 64-bit value. */
187 pd
->print_addr
= (bfd_vma
)(int32_t) pd
->print_addr
;
190 /* Print insn arguments for 32/64-bit code. */
193 print_insn_args (const char *oparg
, insn_t l
, bfd_vma pc
, disassemble_info
*info
)
195 struct riscv_private_data
*pd
= info
->private_data
;
196 int rs1
= (l
>> OP_SH_RS1
) & OP_MASK_RS1
;
197 int rd
= (l
>> OP_SH_RD
) & OP_MASK_RD
;
198 fprintf_ftype print
= info
->fprintf_func
;
199 const char *opargStart
;
202 print (info
->stream
, "\t");
204 for (; *oparg
!= '\0'; oparg
++)
212 case 's': /* RS1 x8-x15. */
213 case 'w': /* RS1 x8-x15. */
214 print (info
->stream
, "%s",
215 riscv_gpr_names
[EXTRACT_OPERAND (CRS1S
, l
) + 8]);
217 case 't': /* RS2 x8-x15. */
218 case 'x': /* RS2 x8-x15. */
219 print (info
->stream
, "%s",
220 riscv_gpr_names
[EXTRACT_OPERAND (CRS2S
, l
) + 8]);
222 case 'U': /* RS1, constrained to equal RD. */
223 print (info
->stream
, "%s", riscv_gpr_names
[rd
]);
225 case 'c': /* RS1, constrained to equal sp. */
226 print (info
->stream
, "%s", riscv_gpr_names
[X_SP
]);
229 print (info
->stream
, "%s",
230 riscv_gpr_names
[EXTRACT_OPERAND (CRS2
, l
)]);
234 if (((l
& MASK_C_ADDI
) == MATCH_C_ADDI
) && rd
!= 0)
235 maybe_print_address (pd
, rd
, EXTRACT_CITYPE_IMM (l
), 0);
236 if (info
->mach
== bfd_mach_riscv64
237 && ((l
& MASK_C_ADDIW
) == MATCH_C_ADDIW
) && rd
!= 0)
238 maybe_print_address (pd
, rd
, EXTRACT_CITYPE_IMM (l
), 1);
239 print (info
->stream
, "%d", (int)EXTRACT_CITYPE_IMM (l
));
242 print (info
->stream
, "%d", (int)EXTRACT_CLTYPE_LW_IMM (l
));
245 print (info
->stream
, "%d", (int)EXTRACT_CLTYPE_LD_IMM (l
));
248 print (info
->stream
, "%d", (int)EXTRACT_CITYPE_LWSP_IMM (l
));
251 print (info
->stream
, "%d", (int)EXTRACT_CITYPE_LDSP_IMM (l
));
254 print (info
->stream
, "%d", (int)EXTRACT_CIWTYPE_ADDI4SPN_IMM (l
));
257 print (info
->stream
, "%d", (int)EXTRACT_CITYPE_ADDI16SP_IMM (l
));
260 print (info
->stream
, "%d", (int)EXTRACT_CSSTYPE_SWSP_IMM (l
));
263 print (info
->stream
, "%d", (int)EXTRACT_CSSTYPE_SDSP_IMM (l
));
266 info
->target
= EXTRACT_CBTYPE_IMM (l
) + pc
;
267 (*info
->print_address_func
) (info
->target
, info
);
270 info
->target
= EXTRACT_CJTYPE_IMM (l
) + pc
;
271 (*info
->print_address_func
) (info
->target
, info
);
274 print (info
->stream
, "0x%x",
275 (int)(EXTRACT_CITYPE_IMM (l
) & (RISCV_BIGIMM_REACH
-1)));
278 print (info
->stream
, "0x%x", (int)EXTRACT_CITYPE_IMM (l
) & 0x3f);
281 print (info
->stream
, "0x%x", (int)EXTRACT_CITYPE_IMM (l
) & 0x1f);
283 case 'T': /* Floating-point RS2. */
284 print (info
->stream
, "%s",
285 riscv_fpr_names
[EXTRACT_OPERAND (CRS2
, l
)]);
287 case 'D': /* Floating-point RS2 x8-x15. */
288 print (info
->stream
, "%s",
289 riscv_fpr_names
[EXTRACT_OPERAND (CRS2S
, l
) + 8]);
299 print (info
->stream
, "%s",
300 riscv_vecr_names_numeric
[EXTRACT_OPERAND (VD
, l
)]);
303 if (!EXTRACT_OPERAND (VWD
, l
))
304 print (info
->stream
, "%s", riscv_gpr_names
[0]);
306 print (info
->stream
, "%s",
307 riscv_vecr_names_numeric
[EXTRACT_OPERAND (VD
, l
)]);
310 print (info
->stream
, "%s",
311 riscv_vecr_names_numeric
[EXTRACT_OPERAND (VS1
, l
)]);
314 case 'u': /* VS1 == VS2 already verified at this point. */
315 case 'v': /* VD == VS1 == VS2 already verified at this point. */
316 print (info
->stream
, "%s",
317 riscv_vecr_names_numeric
[EXTRACT_OPERAND (VS2
, l
)]);
320 print (info
->stream
, "%s", riscv_vecr_names_numeric
[0]);
325 int imm
= (*oparg
== 'b') ? EXTRACT_RVV_VB_IMM (l
)
326 : EXTRACT_RVV_VC_IMM (l
);
327 unsigned int imm_vlmul
= EXTRACT_OPERAND (VLMUL
, imm
);
328 unsigned int imm_vsew
= EXTRACT_OPERAND (VSEW
, imm
);
329 unsigned int imm_vta
= EXTRACT_OPERAND (VTA
, imm
);
330 unsigned int imm_vma
= EXTRACT_OPERAND (VMA
, imm
);
331 unsigned int imm_vtype_res
= EXTRACT_OPERAND (VTYPE_RES
, imm
);
333 if (imm_vsew
< ARRAY_SIZE (riscv_vsew
)
334 && imm_vlmul
< ARRAY_SIZE (riscv_vlmul
)
335 && imm_vta
< ARRAY_SIZE (riscv_vta
)
336 && imm_vma
< ARRAY_SIZE (riscv_vma
)
338 print (info
->stream
, "%s,%s,%s,%s", riscv_vsew
[imm_vsew
],
339 riscv_vlmul
[imm_vlmul
], riscv_vta
[imm_vta
],
342 print (info
->stream
, "%d", imm
);
346 print (info
->stream
, "%d", (int)EXTRACT_RVV_VI_IMM (l
));
349 print (info
->stream
, "%d", (int)EXTRACT_RVV_VI_UIMM (l
));
352 print (info
->stream
, "%d", (int)EXTRACT_RVV_OFFSET (l
));
355 if (! EXTRACT_OPERAND (VMASK
, l
))
356 print (info
->stream
, ",%s", riscv_vecm_names_numeric
[0]);
366 print (info
->stream
, "%c", *oparg
);
370 /* Only print constant 0 if it is the last argument. */
372 print (info
->stream
, "0");
377 if ((l
& MASK_JALR
) == MATCH_JALR
)
378 maybe_print_address (pd
, rs1
, 0, 0);
379 print (info
->stream
, "%s", riscv_gpr_names
[rs1
]);
383 print (info
->stream
, "%s",
384 riscv_gpr_names
[EXTRACT_OPERAND (RS2
, l
)]);
388 print (info
->stream
, "0x%x",
389 (unsigned)EXTRACT_UTYPE_IMM (l
) >> RISCV_IMM_BITS
);
393 arg_print (info
, EXTRACT_OPERAND (RM
, l
),
394 riscv_rm
, ARRAY_SIZE (riscv_rm
));
398 arg_print (info
, EXTRACT_OPERAND (PRED
, l
),
399 riscv_pred_succ
, ARRAY_SIZE (riscv_pred_succ
));
403 arg_print (info
, EXTRACT_OPERAND (SUCC
, l
),
404 riscv_pred_succ
, ARRAY_SIZE (riscv_pred_succ
));
408 maybe_print_address (pd
, rs1
, EXTRACT_ITYPE_IMM (l
), 0);
411 if (((l
& MASK_ADDI
) == MATCH_ADDI
&& rs1
!= 0)
412 || (l
& MASK_JALR
) == MATCH_JALR
)
413 maybe_print_address (pd
, rs1
, EXTRACT_ITYPE_IMM (l
), 0);
414 if (info
->mach
== bfd_mach_riscv64
415 && ((l
& MASK_ADDIW
) == MATCH_ADDIW
) && rs1
!= 0)
416 maybe_print_address (pd
, rs1
, EXTRACT_ITYPE_IMM (l
), 1);
417 print (info
->stream
, "%d", (int)EXTRACT_ITYPE_IMM (l
));
421 maybe_print_address (pd
, rs1
, EXTRACT_STYPE_IMM (l
), 0);
422 print (info
->stream
, "%d", (int)EXTRACT_STYPE_IMM (l
));
426 info
->target
= EXTRACT_JTYPE_IMM (l
) + pc
;
427 (*info
->print_address_func
) (info
->target
, info
);
431 info
->target
= EXTRACT_BTYPE_IMM (l
) + pc
;
432 (*info
->print_address_func
) (info
->target
, info
);
436 if ((l
& MASK_AUIPC
) == MATCH_AUIPC
)
437 pd
->hi_addr
[rd
] = pc
+ EXTRACT_UTYPE_IMM (l
);
438 else if ((l
& MASK_LUI
) == MATCH_LUI
)
439 pd
->hi_addr
[rd
] = EXTRACT_UTYPE_IMM (l
);
440 else if ((l
& MASK_C_LUI
) == MATCH_C_LUI
)
441 pd
->hi_addr
[rd
] = EXTRACT_CITYPE_LUI_IMM (l
);
442 print (info
->stream
, "%s", riscv_gpr_names
[rd
]);
446 print (info
->stream
, "0x%x", (int)EXTRACT_OPERAND (BS
, l
));
450 print (info
->stream
, "%s", riscv_gpr_names
[0]);
454 print (info
->stream
, "0x%x", (int)EXTRACT_OPERAND (SHAMT
, l
));
458 print (info
->stream
, "0x%x", (int)EXTRACT_OPERAND (SHAMTW
, l
));
463 print (info
->stream
, "%s", riscv_fpr_names
[rs1
]);
467 print (info
->stream
, "%s", riscv_fpr_names
[EXTRACT_OPERAND (RS2
, l
)]);
471 print (info
->stream
, "%s", riscv_fpr_names
[rd
]);
475 print (info
->stream
, "%s", riscv_fpr_names
[EXTRACT_OPERAND (RS3
, l
)]);
480 static const char *riscv_csr_hash
[4096]; /* Total 2^12 CSRs. */
481 static bool init_csr
= false;
482 unsigned int csr
= EXTRACT_OPERAND (CSR
, l
);
487 for (i
= 0; i
< 4096; i
++)
488 riscv_csr_hash
[i
] = NULL
;
490 /* Set to the newest privileged version. */
491 if (default_priv_spec
== PRIV_SPEC_CLASS_NONE
)
492 default_priv_spec
= PRIV_SPEC_CLASS_DRAFT
- 1;
494 #define DECLARE_CSR(name, num, class, define_version, abort_version) \
495 if (riscv_csr_hash[num] == NULL \
496 && ((define_version == PRIV_SPEC_CLASS_NONE \
497 && abort_version == PRIV_SPEC_CLASS_NONE) \
498 || (default_priv_spec >= define_version \
499 && default_priv_spec < abort_version))) \
500 riscv_csr_hash[num] = #name;
501 #define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \
502 DECLARE_CSR (name, num, class, define_version, abort_version)
503 #include "opcode/riscv-opc.h"
507 if (riscv_csr_hash
[csr
] != NULL
)
508 print (info
->stream
, "%s", riscv_csr_hash
[csr
]);
510 print (info
->stream
, "0x%x", csr
);
515 print (info
->stream
, "0x%x", (int)EXTRACT_OPERAND (RNUM
, l
));
519 print (info
->stream
, "%d", rs1
);
523 /* xgettext:c-format */
524 print (info
->stream
, _("# internal error, undefined modifier (%c)"),
531 /* Print the RISC-V instruction at address MEMADDR in debugged memory,
532 on using INFO. Returns length of the instruction, in bytes.
533 BIGENDIAN must be 1 if this is big-endian code, 0 if
534 this is little-endian code. */
537 riscv_disassemble_insn (bfd_vma memaddr
, insn_t word
, disassemble_info
*info
)
539 const struct riscv_opcode
*op
;
540 static bool init
= 0;
541 static const struct riscv_opcode
*riscv_hash
[OP_MASK_OP
+ 1];
542 struct riscv_private_data
*pd
;
545 #define OP_HASH_IDX(i) ((i) & (riscv_insn_length (i) == 2 ? 0x3 : OP_MASK_OP))
547 /* Build a hash table to shorten the search time. */
550 for (op
= riscv_opcodes
; op
->name
; op
++)
551 if (!riscv_hash
[OP_HASH_IDX (op
->match
)])
552 riscv_hash
[OP_HASH_IDX (op
->match
)] = op
;
557 if (info
->private_data
== NULL
)
561 pd
= info
->private_data
= xcalloc (1, sizeof (struct riscv_private_data
));
564 for (i
= 0; i
< (int)ARRAY_SIZE (pd
->hi_addr
); i
++)
567 for (i
= 0; i
< info
->symtab_size
; i
++)
568 if (strcmp (bfd_asymbol_name (info
->symtab
[i
]), RISCV_GP_SYMBOL
) == 0)
569 pd
->gp
= bfd_asymbol_value (info
->symtab
[i
]);
572 pd
= info
->private_data
;
574 insnlen
= riscv_insn_length (word
);
576 /* RISC-V instructions are always little-endian. */
577 info
->endian_code
= BFD_ENDIAN_LITTLE
;
579 info
->bytes_per_chunk
= insnlen
% 4 == 0 ? 4 : 2;
580 info
->bytes_per_line
= 8;
581 /* We don't support constant pools, so this must be code. */
582 info
->display_endian
= info
->endian_code
;
583 info
->insn_info_valid
= 1;
584 info
->branch_delay_insns
= 0;
586 info
->insn_type
= dis_nonbranch
;
590 op
= riscv_hash
[OP_HASH_IDX (word
)];
593 /* If XLEN is not known, get its value from the ELF class. */
594 if (info
->mach
== bfd_mach_riscv64
)
596 else if (info
->mach
== bfd_mach_riscv32
)
598 else if (info
->section
!= NULL
)
600 Elf_Internal_Ehdr
*ehdr
= elf_elfheader (info
->section
->owner
);
601 xlen
= ehdr
->e_ident
[EI_CLASS
] == ELFCLASS64
? 64 : 32;
604 /* If arch has ZFINX flags, use gpr for disassemble. */
605 if(riscv_subset_supports (&riscv_rps_dis
, "zfinx"))
606 riscv_fpr_names
= riscv_gpr_names_abi
;
608 for (; op
->name
; op
++)
610 /* Does the opcode match? */
611 if (! (op
->match_func
) (op
, word
))
613 /* Is this a pseudo-instruction and may we print it as such? */
614 if (no_aliases
&& (op
->pinfo
& INSN_ALIAS
))
616 /* Is this instruction restricted to a certain value of XLEN? */
617 if ((op
->xlen_requirement
!= 0) && (op
->xlen_requirement
!= xlen
))
620 if (!riscv_multi_subset_supports (&riscv_rps_dis
, op
->insn_class
))
624 (*info
->fprintf_func
) (info
->stream
, "%s", op
->name
);
625 print_insn_args (op
->args
, word
, memaddr
, info
);
627 /* Try to disassemble multi-instruction addressing sequences. */
628 if (pd
->print_addr
!= (bfd_vma
)-1)
630 info
->target
= pd
->print_addr
;
631 (*info
->fprintf_func
) (info
->stream
, " # ");
632 (*info
->print_address_func
) (info
->target
, info
);
636 /* Finish filling out insn_info fields. */
637 switch (op
->pinfo
& INSN_TYPE
)
640 info
->insn_type
= dis_branch
;
642 case INSN_CONDBRANCH
:
643 info
->insn_type
= dis_condbranch
;
646 info
->insn_type
= dis_jsr
;
649 info
->insn_type
= dis_dref
;
655 if (op
->pinfo
& INSN_DATA_SIZE
)
657 int size
= ((op
->pinfo
& INSN_DATA_SIZE
)
658 >> INSN_DATA_SIZE_SHIFT
);
659 info
->data_size
= 1 << (size
- 1);
666 /* We did not find a match, so just print the instruction bits. */
667 info
->insn_type
= dis_noninsn
;
673 (*info
->fprintf_func
) (info
->stream
, ".%dbyte\t0x%llx",
674 insnlen
, (unsigned long long) word
);
679 (*info
->fprintf_func
) (info
->stream
, ".byte\t");
680 for (i
= 0; i
< insnlen
; ++i
)
683 (*info
->fprintf_func
) (info
->stream
, ", ");
684 (*info
->fprintf_func
) (info
->stream
, "0x%02x",
685 (unsigned int) (word
& 0xff));
694 /* Return true if we find the suitable mapping symbol,
695 and also update the STATE. Otherwise, return false. */
698 riscv_get_map_state (int n
,
699 enum riscv_seg_mstate
*state
,
700 struct disassemble_info
*info
)
704 /* If the symbol is in a different section, ignore it. */
705 if (info
->section
!= NULL
706 && info
->section
!= info
->symtab
[n
]->section
)
709 name
= bfd_asymbol_name(info
->symtab
[n
]);
710 if (strcmp (name
, "$x") == 0)
712 else if (strcmp (name
, "$d") == 0)
720 /* Check the sorted symbol table (sorted by the symbol value), find the
721 suitable mapping symbols. */
723 static enum riscv_seg_mstate
724 riscv_search_mapping_symbol (bfd_vma memaddr
,
725 struct disassemble_info
*info
)
727 enum riscv_seg_mstate mstate
;
728 bool from_last_map_symbol
;
733 /* Decide whether to print the data or instruction by default, in case
734 we can not find the corresponding mapping symbols. */
737 && info
->section
->flags
& SEC_CODE
)
741 if (info
->symtab_size
== 0
742 || bfd_asymbol_flavour (*info
->symtab
) != bfd_target_elf_flavour
)
745 /* Reset the last_map_symbol if we start to dump a new section. */
747 last_map_symbol
= -1;
749 /* If the last stop offset is different from the current one, then
750 don't use the last_map_symbol to search. We usually reset the
751 info->stop_offset when handling a new section. */
752 from_last_map_symbol
= (last_map_symbol
>= 0
753 && info
->stop_offset
== last_stop_offset
);
755 /* Start scanning at the start of the function, or wherever
756 we finished last time. */
757 n
= info
->symtab_pos
+ 1;
758 if (from_last_map_symbol
&& n
>= last_map_symbol
)
761 /* Find the suitable mapping symbol to dump. */
762 for (; n
< info
->symtab_size
; n
++)
764 bfd_vma addr
= bfd_asymbol_value (info
->symtab
[n
]);
765 /* We have searched all possible symbols in the range. */
768 if (riscv_get_map_state (n
, &mstate
, info
))
772 /* Do not stop searching, in case there are some mapping
773 symbols have the same value, but have different names.
778 /* We can not find the suitable mapping symbol above. Therefore, we
779 look forwards and try to find it again, but don't go pass the start
780 of the section. Otherwise a data section without mapping symbols
781 can pick up a text mapping symbol of a preceeding section. */
784 n
= info
->symtab_pos
;
785 if (from_last_map_symbol
&& n
>= last_map_symbol
)
790 bfd_vma addr
= bfd_asymbol_value (info
->symtab
[n
]);
791 /* We have searched all possible symbols in the range. */
792 if (addr
< (info
->section
? info
->section
->vma
: 0))
794 /* Stop searching once we find the closed mapping symbol. */
795 if (riscv_get_map_state (n
, &mstate
, info
))
804 /* Save the information for next use. */
805 last_map_symbol
= symbol
;
806 last_stop_offset
= info
->stop_offset
;
811 /* Decide which data size we should print. */
814 riscv_data_length (bfd_vma memaddr
,
815 disassemble_info
*info
)
821 if (info
->symtab_size
!= 0
822 && bfd_asymbol_flavour (*info
->symtab
) == bfd_target_elf_flavour
823 && last_map_symbol
>= 0)
826 enum riscv_seg_mstate m
= MAP_NONE
;
827 for (n
= last_map_symbol
+ 1; n
< info
->symtab_size
; n
++)
829 bfd_vma addr
= bfd_asymbol_value (info
->symtab
[n
]);
831 && riscv_get_map_state (n
, &m
, info
))
833 if (addr
- memaddr
< length
)
834 length
= addr
- memaddr
;
842 /* Do not set the length which exceeds the section size. */
843 bfd_vma offset
= info
->section
->vma
+ info
->section
->size
;
845 length
= (offset
< length
) ? offset
: length
;
847 length
= length
== 3 ? 2 : length
;
851 /* Dump the data contents. */
854 riscv_disassemble_data (bfd_vma memaddr ATTRIBUTE_UNUSED
,
856 disassemble_info
*info
)
858 info
->display_endian
= info
->endian
;
860 switch (info
->bytes_per_chunk
)
863 info
->bytes_per_line
= 6;
864 (*info
->fprintf_func
) (info
->stream
, ".byte\t0x%02llx",
865 (unsigned long long) data
);
868 info
->bytes_per_line
= 8;
869 (*info
->fprintf_func
) (info
->stream
, ".short\t0x%04llx",
870 (unsigned long long) data
);
873 info
->bytes_per_line
= 8;
874 (*info
->fprintf_func
) (info
->stream
, ".word\t0x%08llx",
875 (unsigned long long) data
);
878 info
->bytes_per_line
= 8;
879 (*info
->fprintf_func
) (info
->stream
, ".dword\t0x%016llx",
880 (unsigned long long) data
);
885 return info
->bytes_per_chunk
;
889 print_insn_riscv (bfd_vma memaddr
, struct disassemble_info
*info
)
895 enum riscv_seg_mstate mstate
;
896 int (*riscv_disassembler
) (bfd_vma
, insn_t
, struct disassemble_info
*);
898 if (info
->disassembler_options
!= NULL
)
900 parse_riscv_dis_options (info
->disassembler_options
);
901 /* Avoid repeatedly parsing the options. */
902 info
->disassembler_options
= NULL
;
904 else if (riscv_gpr_names
== NULL
)
905 set_default_riscv_dis_options ();
907 mstate
= riscv_search_mapping_symbol (memaddr
, info
);
908 /* Save the last mapping state. */
909 last_map_state
= mstate
;
911 /* Set the size to dump. */
912 if (mstate
== MAP_DATA
913 && (info
->flags
& DISASSEMBLE_DATA
) == 0)
915 dump_size
= riscv_data_length (memaddr
, info
);
916 info
->bytes_per_chunk
= dump_size
;
917 riscv_disassembler
= riscv_disassemble_data
;
921 /* Get the first 2-bytes to check the lenghth of instruction. */
922 status
= (*info
->read_memory_func
) (memaddr
, packet
, 2, info
);
925 (*info
->memory_error_func
) (status
, memaddr
, info
);
928 insn
= (insn_t
) bfd_getl16 (packet
);
929 dump_size
= riscv_insn_length (insn
);
930 riscv_disassembler
= riscv_disassemble_insn
;
933 /* Fetch the instruction to dump. */
934 status
= (*info
->read_memory_func
) (memaddr
, packet
, dump_size
, info
);
937 (*info
->memory_error_func
) (status
, memaddr
, info
);
940 insn
= (insn_t
) bfd_get_bits (packet
, dump_size
* 8, false);
942 return (*riscv_disassembler
) (memaddr
, insn
, info
);
946 riscv_get_disassembler (bfd
*abfd
)
948 const char *default_arch
= "rv64gc";
952 const struct elf_backend_data
*ebd
= get_elf_backend_data (abfd
);
955 const char *sec_name
= ebd
->obj_attrs_section
;
956 if (bfd_get_section_by_name (abfd
, sec_name
) != NULL
)
958 obj_attribute
*attr
= elf_known_obj_attributes_proc (abfd
);
959 unsigned int Tag_a
= Tag_RISCV_priv_spec
;
960 unsigned int Tag_b
= Tag_RISCV_priv_spec_minor
;
961 unsigned int Tag_c
= Tag_RISCV_priv_spec_revision
;
962 riscv_get_priv_spec_class_from_numbers (attr
[Tag_a
].i
,
966 default_arch
= attr
[Tag_RISCV_arch
].s
;
971 riscv_release_subset_list (&riscv_subsets
);
972 riscv_parse_subset (&riscv_rps_dis
, default_arch
);
973 return print_insn_riscv
;
976 /* Prevent use of the fake labels that are generated as part of the DWARF
977 and for relaxable relocations in the assembler. */
980 riscv_symbol_is_valid (asymbol
* sym
,
981 struct disassemble_info
* info ATTRIBUTE_UNUSED
)
988 name
= bfd_asymbol_name (sym
);
990 return (strcmp (name
, RISCV_FAKE_LABEL_NAME
) != 0
991 && !riscv_elf_is_mapping_symbols (name
));
995 print_riscv_disassembler_options (FILE *stream
)
997 fprintf (stream
, _("\n\
998 The following RISC-V-specific disassembler options are supported for use\n\
999 with the -M switch (multiple options should be separated by commas):\n"));
1001 fprintf (stream
, _("\n\
1002 numeric Print numeric register names, rather than ABI names.\n"));
1004 fprintf (stream
, _("\n\
1005 no-aliases Disassemble only into canonical instructions, rather\n\
1006 than into pseudoinstructions.\n"));
1008 fprintf (stream
, _("\n\
1009 priv-spec=PRIV Print the CSR according to the chosen privilege spec\n\
1010 (1.9, 1.9.1, 1.10, 1.11).\n"));
1012 fprintf (stream
, _("\n"));