2 Copyright (C) 2011-2021 Free Software Foundation, Inc.
4 Contributed by Andrew Waterman (andrew@sifive.com).
7 This file is part of the GNU opcodes library.
9 This library is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING3. If not,
21 see <http://www.gnu.org/licenses/>. */
24 #include "disassemble.h"
25 #include "libiberty.h"
26 #include "opcode/riscv.h"
29 #include "elf/riscv.h"
30 #include "elfxx-riscv.h"
35 static enum riscv_spec_class default_isa_spec
= ISA_SPEC_CLASS_DRAFT
- 1;
36 static enum riscv_spec_class default_priv_spec
= PRIV_SPEC_CLASS_NONE
;
40 static riscv_subset_list_t riscv_subsets
;
41 static riscv_parse_subset_t riscv_rps_dis
=
43 &riscv_subsets
, /* subset_list. */
44 opcodes_error_handler
,/* error_handler. */
46 &default_isa_spec
, /* isa_spec. */
47 false, /* check_unknown_prefixed_ext. */
50 struct riscv_private_data
54 bfd_vma hi_addr
[OP_MASK_RD
+ 1];
57 /* Used for mapping symbols. */
58 static int last_map_symbol
= -1;
59 static bfd_vma last_stop_offset
= 0;
60 enum riscv_seg_mstate last_map_state
;
62 static const char * const *riscv_gpr_names
;
63 static const char * const *riscv_fpr_names
;
65 /* If set, disassemble as most general instruction. */
66 static int no_aliases
;
69 set_default_riscv_dis_options (void)
71 riscv_gpr_names
= riscv_gpr_names_abi
;
72 riscv_fpr_names
= riscv_fpr_names_abi
;
77 parse_riscv_dis_option_without_args (const char *option
)
79 if (strcmp (option
, "no-aliases") == 0)
81 else if (strcmp (option
, "numeric") == 0)
83 riscv_gpr_names
= riscv_gpr_names_numeric
;
84 riscv_fpr_names
= riscv_fpr_names_numeric
;
92 parse_riscv_dis_option (const char *option
)
96 if (parse_riscv_dis_option_without_args (option
))
99 equal
= strchr (option
, '=');
102 /* The option without '=' should be defined above. */
103 opcodes_error_handler (_("unrecognized disassembler option: %s"), option
);
107 || *(equal
+ 1) == '\0')
109 /* Invalid options with '=', no option name before '=',
110 and no value after '='. */
111 opcodes_error_handler (_("unrecognized disassembler option with '=': %s"),
118 if (strcmp (option
, "priv-spec") == 0)
120 enum riscv_spec_class priv_spec
= PRIV_SPEC_CLASS_NONE
;
121 const char *name
= NULL
;
123 RISCV_GET_PRIV_SPEC_CLASS (value
, priv_spec
);
124 if (priv_spec
== PRIV_SPEC_CLASS_NONE
)
125 opcodes_error_handler (_("unknown privileged spec set by %s=%s"),
127 else if (default_priv_spec
== PRIV_SPEC_CLASS_NONE
)
128 default_priv_spec
= priv_spec
;
129 else if (default_priv_spec
!= priv_spec
)
131 RISCV_GET_PRIV_SPEC_NAME (name
, default_priv_spec
);
132 opcodes_error_handler (_("mis-matched privilege spec set by %s=%s, "
133 "the elf privilege attribute is %s"),
134 option
, value
, name
);
139 /* xgettext:c-format */
140 opcodes_error_handler (_("unrecognized disassembler option: %s"), option
);
145 parse_riscv_dis_options (const char *opts_in
)
147 char *opts
= xstrdup (opts_in
), *opt
= opts
, *opt_end
= opts
;
149 set_default_riscv_dis_options ();
151 for ( ; opt_end
!= NULL
; opt
= opt_end
+ 1)
153 if ((opt_end
= strchr (opt
, ',')) != NULL
)
155 parse_riscv_dis_option (opt
);
161 /* Print one argument from an array. */
164 arg_print (struct disassemble_info
*info
, unsigned long val
,
165 const char* const* array
, size_t size
)
167 const char *s
= val
>= size
|| array
[val
] == NULL
? "unknown" : array
[val
];
168 (*info
->fprintf_func
) (info
->stream
, "%s", s
);
172 maybe_print_address (struct riscv_private_data
*pd
, int base_reg
, int offset
,
175 if (pd
->hi_addr
[base_reg
] != (bfd_vma
)-1)
177 pd
->print_addr
= (base_reg
!= 0 ? pd
->hi_addr
[base_reg
] : 0) + offset
;
178 pd
->hi_addr
[base_reg
] = -1;
180 else if (base_reg
== X_GP
&& pd
->gp
!= (bfd_vma
)-1)
181 pd
->print_addr
= pd
->gp
+ offset
;
182 else if (base_reg
== X_TP
|| base_reg
== 0)
183 pd
->print_addr
= offset
;
185 /* Sign-extend a 32-bit value to a 64-bit value. */
187 pd
->print_addr
= (bfd_vma
)(int32_t) pd
->print_addr
;
190 /* Print insn arguments for 32/64-bit code. */
193 print_insn_args (const char *oparg
, insn_t l
, bfd_vma pc
, disassemble_info
*info
)
195 struct riscv_private_data
*pd
= info
->private_data
;
196 int rs1
= (l
>> OP_SH_RS1
) & OP_MASK_RS1
;
197 int rd
= (l
>> OP_SH_RD
) & OP_MASK_RD
;
198 fprintf_ftype print
= info
->fprintf_func
;
199 const char *opargStart
;
202 print (info
->stream
, "\t");
204 for (; *oparg
!= '\0'; oparg
++)
212 case 's': /* RS1 x8-x15. */
213 case 'w': /* RS1 x8-x15. */
214 print (info
->stream
, "%s",
215 riscv_gpr_names
[EXTRACT_OPERAND (CRS1S
, l
) + 8]);
217 case 't': /* RS2 x8-x15. */
218 case 'x': /* RS2 x8-x15. */
219 print (info
->stream
, "%s",
220 riscv_gpr_names
[EXTRACT_OPERAND (CRS2S
, l
) + 8]);
222 case 'U': /* RS1, constrained to equal RD. */
223 print (info
->stream
, "%s", riscv_gpr_names
[rd
]);
225 case 'c': /* RS1, constrained to equal sp. */
226 print (info
->stream
, "%s", riscv_gpr_names
[X_SP
]);
229 print (info
->stream
, "%s",
230 riscv_gpr_names
[EXTRACT_OPERAND (CRS2
, l
)]);
234 if (((l
& MASK_C_ADDI
) == MATCH_C_ADDI
) && rd
!= 0)
235 maybe_print_address (pd
, rd
, EXTRACT_CITYPE_IMM (l
), 0);
236 if (info
->mach
== bfd_mach_riscv64
237 && ((l
& MASK_C_ADDIW
) == MATCH_C_ADDIW
) && rd
!= 0)
238 maybe_print_address (pd
, rd
, EXTRACT_CITYPE_IMM (l
), 1);
239 print (info
->stream
, "%d", (int)EXTRACT_CITYPE_IMM (l
));
242 print (info
->stream
, "%d", (int)EXTRACT_CLTYPE_LW_IMM (l
));
245 print (info
->stream
, "%d", (int)EXTRACT_CLTYPE_LD_IMM (l
));
248 print (info
->stream
, "%d", (int)EXTRACT_CITYPE_LWSP_IMM (l
));
251 print (info
->stream
, "%d", (int)EXTRACT_CITYPE_LDSP_IMM (l
));
254 print (info
->stream
, "%d", (int)EXTRACT_CIWTYPE_ADDI4SPN_IMM (l
));
257 print (info
->stream
, "%d", (int)EXTRACT_CITYPE_ADDI16SP_IMM (l
));
260 print (info
->stream
, "%d", (int)EXTRACT_CSSTYPE_SWSP_IMM (l
));
263 print (info
->stream
, "%d", (int)EXTRACT_CSSTYPE_SDSP_IMM (l
));
266 info
->target
= EXTRACT_CBTYPE_IMM (l
) + pc
;
267 (*info
->print_address_func
) (info
->target
, info
);
270 info
->target
= EXTRACT_CJTYPE_IMM (l
) + pc
;
271 (*info
->print_address_func
) (info
->target
, info
);
274 print (info
->stream
, "0x%x",
275 (int)(EXTRACT_CITYPE_IMM (l
) & (RISCV_BIGIMM_REACH
-1)));
278 print (info
->stream
, "0x%x", (int)EXTRACT_CITYPE_IMM (l
) & 0x3f);
281 print (info
->stream
, "0x%x", (int)EXTRACT_CITYPE_IMM (l
) & 0x1f);
283 case 'T': /* Floating-point RS2. */
284 print (info
->stream
, "%s",
285 riscv_fpr_names
[EXTRACT_OPERAND (CRS2
, l
)]);
287 case 'D': /* Floating-point RS2 x8-x15. */
288 print (info
->stream
, "%s",
289 riscv_fpr_names
[EXTRACT_OPERAND (CRS2S
, l
) + 8]);
299 print (info
->stream
, "%c", *oparg
);
303 /* Only print constant 0 if it is the last argument. */
305 print (info
->stream
, "0");
310 if ((l
& MASK_JALR
) == MATCH_JALR
)
311 maybe_print_address (pd
, rs1
, 0, 0);
312 print (info
->stream
, "%s", riscv_gpr_names
[rs1
]);
316 print (info
->stream
, "%s",
317 riscv_gpr_names
[EXTRACT_OPERAND (RS2
, l
)]);
321 print (info
->stream
, "0x%x",
322 (unsigned)EXTRACT_UTYPE_IMM (l
) >> RISCV_IMM_BITS
);
326 arg_print (info
, EXTRACT_OPERAND (RM
, l
),
327 riscv_rm
, ARRAY_SIZE (riscv_rm
));
331 arg_print (info
, EXTRACT_OPERAND (PRED
, l
),
332 riscv_pred_succ
, ARRAY_SIZE (riscv_pred_succ
));
336 arg_print (info
, EXTRACT_OPERAND (SUCC
, l
),
337 riscv_pred_succ
, ARRAY_SIZE (riscv_pred_succ
));
341 maybe_print_address (pd
, rs1
, EXTRACT_ITYPE_IMM (l
), 0);
344 if (((l
& MASK_ADDI
) == MATCH_ADDI
&& rs1
!= 0)
345 || (l
& MASK_JALR
) == MATCH_JALR
)
346 maybe_print_address (pd
, rs1
, EXTRACT_ITYPE_IMM (l
), 0);
347 if (info
->mach
== bfd_mach_riscv64
348 && ((l
& MASK_ADDIW
) == MATCH_ADDIW
) && rs1
!= 0)
349 maybe_print_address (pd
, rs1
, EXTRACT_ITYPE_IMM (l
), 1);
350 print (info
->stream
, "%d", (int)EXTRACT_ITYPE_IMM (l
));
354 maybe_print_address (pd
, rs1
, EXTRACT_STYPE_IMM (l
), 0);
355 print (info
->stream
, "%d", (int)EXTRACT_STYPE_IMM (l
));
359 info
->target
= EXTRACT_JTYPE_IMM (l
) + pc
;
360 (*info
->print_address_func
) (info
->target
, info
);
364 info
->target
= EXTRACT_BTYPE_IMM (l
) + pc
;
365 (*info
->print_address_func
) (info
->target
, info
);
369 if ((l
& MASK_AUIPC
) == MATCH_AUIPC
)
370 pd
->hi_addr
[rd
] = pc
+ EXTRACT_UTYPE_IMM (l
);
371 else if ((l
& MASK_LUI
) == MATCH_LUI
)
372 pd
->hi_addr
[rd
] = EXTRACT_UTYPE_IMM (l
);
373 else if ((l
& MASK_C_LUI
) == MATCH_C_LUI
)
374 pd
->hi_addr
[rd
] = EXTRACT_CITYPE_LUI_IMM (l
);
375 print (info
->stream
, "%s", riscv_gpr_names
[rd
]);
379 print (info
->stream
, "%s", riscv_gpr_names
[0]);
383 print (info
->stream
, "0x%x", (int)EXTRACT_OPERAND (SHAMT
, l
));
387 print (info
->stream
, "0x%x", (int)EXTRACT_OPERAND (SHAMTW
, l
));
392 print (info
->stream
, "%s", riscv_fpr_names
[rs1
]);
396 print (info
->stream
, "%s", riscv_fpr_names
[EXTRACT_OPERAND (RS2
, l
)]);
400 print (info
->stream
, "%s", riscv_fpr_names
[rd
]);
404 print (info
->stream
, "%s", riscv_fpr_names
[EXTRACT_OPERAND (RS3
, l
)]);
409 static const char *riscv_csr_hash
[4096]; /* Total 2^12 CSRs. */
410 static bool init_csr
= false;
411 unsigned int csr
= EXTRACT_OPERAND (CSR
, l
);
416 for (i
= 0; i
< 4096; i
++)
417 riscv_csr_hash
[i
] = NULL
;
419 /* Set to the newest privileged version. */
420 if (default_priv_spec
== PRIV_SPEC_CLASS_NONE
)
421 default_priv_spec
= PRIV_SPEC_CLASS_DRAFT
- 1;
423 #define DECLARE_CSR(name, num, class, define_version, abort_version) \
424 if (riscv_csr_hash[num] == NULL \
425 && ((define_version == PRIV_SPEC_CLASS_NONE \
426 && abort_version == PRIV_SPEC_CLASS_NONE) \
427 || (default_priv_spec >= define_version \
428 && default_priv_spec < abort_version))) \
429 riscv_csr_hash[num] = #name;
430 #define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \
431 DECLARE_CSR (name, num, class, define_version, abort_version)
432 #include "opcode/riscv-opc.h"
436 if (riscv_csr_hash
[csr
] != NULL
)
437 print (info
->stream
, "%s", riscv_csr_hash
[csr
]);
439 print (info
->stream
, "0x%x", csr
);
444 print (info
->stream
, "%d", rs1
);
448 /* xgettext:c-format */
449 print (info
->stream
, _("# internal error, undefined modifier (%c)"),
456 /* Print the RISC-V instruction at address MEMADDR in debugged memory,
457 on using INFO. Returns length of the instruction, in bytes.
458 BIGENDIAN must be 1 if this is big-endian code, 0 if
459 this is little-endian code. */
462 riscv_disassemble_insn (bfd_vma memaddr
, insn_t word
, disassemble_info
*info
)
464 const struct riscv_opcode
*op
;
465 static bool init
= 0;
466 static const struct riscv_opcode
*riscv_hash
[OP_MASK_OP
+ 1];
467 struct riscv_private_data
*pd
;
470 #define OP_HASH_IDX(i) ((i) & (riscv_insn_length (i) == 2 ? 0x3 : OP_MASK_OP))
472 /* Build a hash table to shorten the search time. */
475 for (op
= riscv_opcodes
; op
->name
; op
++)
476 if (!riscv_hash
[OP_HASH_IDX (op
->match
)])
477 riscv_hash
[OP_HASH_IDX (op
->match
)] = op
;
482 if (info
->private_data
== NULL
)
486 pd
= info
->private_data
= xcalloc (1, sizeof (struct riscv_private_data
));
489 for (i
= 0; i
< (int)ARRAY_SIZE (pd
->hi_addr
); i
++)
492 for (i
= 0; i
< info
->symtab_size
; i
++)
493 if (strcmp (bfd_asymbol_name (info
->symtab
[i
]), RISCV_GP_SYMBOL
) == 0)
494 pd
->gp
= bfd_asymbol_value (info
->symtab
[i
]);
497 pd
= info
->private_data
;
499 insnlen
= riscv_insn_length (word
);
501 /* RISC-V instructions are always little-endian. */
502 info
->endian_code
= BFD_ENDIAN_LITTLE
;
504 info
->bytes_per_chunk
= insnlen
% 4 == 0 ? 4 : 2;
505 info
->bytes_per_line
= 8;
506 /* We don't support constant pools, so this must be code. */
507 info
->display_endian
= info
->endian_code
;
508 info
->insn_info_valid
= 1;
509 info
->branch_delay_insns
= 0;
511 info
->insn_type
= dis_nonbranch
;
515 op
= riscv_hash
[OP_HASH_IDX (word
)];
518 /* If XLEN is not known, get its value from the ELF class. */
519 if (info
->mach
== bfd_mach_riscv64
)
521 else if (info
->mach
== bfd_mach_riscv32
)
523 else if (info
->section
!= NULL
)
525 Elf_Internal_Ehdr
*ehdr
= elf_elfheader (info
->section
->owner
);
526 xlen
= ehdr
->e_ident
[EI_CLASS
] == ELFCLASS64
? 64 : 32;
529 for (; op
->name
; op
++)
531 /* Does the opcode match? */
532 if (! (op
->match_func
) (op
, word
))
534 /* Is this a pseudo-instruction and may we print it as such? */
535 if (no_aliases
&& (op
->pinfo
& INSN_ALIAS
))
537 /* Is this instruction restricted to a certain value of XLEN? */
538 if ((op
->xlen_requirement
!= 0) && (op
->xlen_requirement
!= xlen
))
541 if (!riscv_multi_subset_supports (&riscv_rps_dis
, op
->insn_class
))
545 (*info
->fprintf_func
) (info
->stream
, "%s", op
->name
);
546 print_insn_args (op
->args
, word
, memaddr
, info
);
548 /* Try to disassemble multi-instruction addressing sequences. */
549 if (pd
->print_addr
!= (bfd_vma
)-1)
551 info
->target
= pd
->print_addr
;
552 (*info
->fprintf_func
) (info
->stream
, " # ");
553 (*info
->print_address_func
) (info
->target
, info
);
557 /* Finish filling out insn_info fields. */
558 switch (op
->pinfo
& INSN_TYPE
)
561 info
->insn_type
= dis_branch
;
563 case INSN_CONDBRANCH
:
564 info
->insn_type
= dis_condbranch
;
567 info
->insn_type
= dis_jsr
;
570 info
->insn_type
= dis_dref
;
576 if (op
->pinfo
& INSN_DATA_SIZE
)
578 int size
= ((op
->pinfo
& INSN_DATA_SIZE
)
579 >> INSN_DATA_SIZE_SHIFT
);
580 info
->data_size
= 1 << (size
- 1);
587 /* We did not find a match, so just print the instruction bits. */
588 info
->insn_type
= dis_noninsn
;
594 (*info
->fprintf_func
) (info
->stream
, ".%dbyte\t0x%llx",
595 insnlen
, (unsigned long long) word
);
600 (*info
->fprintf_func
) (info
->stream
, ".byte\t");
601 for (i
= 0; i
< insnlen
; ++i
)
604 (*info
->fprintf_func
) (info
->stream
, ", ");
605 (*info
->fprintf_func
) (info
->stream
, "0x%02x",
606 (unsigned int) (word
& 0xff));
615 /* Return true if we find the suitable mapping symbol,
616 and also update the STATE. Otherwise, return false. */
619 riscv_get_map_state (int n
,
620 enum riscv_seg_mstate
*state
,
621 struct disassemble_info
*info
)
625 /* If the symbol is in a different section, ignore it. */
626 if (info
->section
!= NULL
627 && info
->section
!= info
->symtab
[n
]->section
)
630 name
= bfd_asymbol_name(info
->symtab
[n
]);
631 if (strcmp (name
, "$x") == 0)
633 else if (strcmp (name
, "$d") == 0)
641 /* Check the sorted symbol table (sorted by the symbol value), find the
642 suitable mapping symbols. */
644 static enum riscv_seg_mstate
645 riscv_search_mapping_symbol (bfd_vma memaddr
,
646 struct disassemble_info
*info
)
648 enum riscv_seg_mstate mstate
;
649 bool from_last_map_symbol
;
654 /* Decide whether to print the data or instruction by default, in case
655 we can not find the corresponding mapping symbols. */
658 && info
->section
->flags
& SEC_CODE
)
662 if (info
->symtab_size
== 0
663 || bfd_asymbol_flavour (*info
->symtab
) != bfd_target_elf_flavour
)
666 /* Reset the last_map_symbol if we start to dump a new section. */
668 last_map_symbol
= -1;
670 /* If the last stop offset is different from the current one, then
671 don't use the last_map_symbol to search. We usually reset the
672 info->stop_offset when handling a new section. */
673 from_last_map_symbol
= (last_map_symbol
>= 0
674 && info
->stop_offset
== last_stop_offset
);
676 /* Start scanning at the start of the function, or wherever
677 we finished last time. */
678 n
= info
->symtab_pos
+ 1;
679 if (from_last_map_symbol
&& n
>= last_map_symbol
)
682 /* Find the suitable mapping symbol to dump. */
683 for (; n
< info
->symtab_size
; n
++)
685 bfd_vma addr
= bfd_asymbol_value (info
->symtab
[n
]);
686 /* We have searched all possible symbols in the range. */
689 if (riscv_get_map_state (n
, &mstate
, info
))
693 /* Do not stop searching, in case there are some mapping
694 symbols have the same value, but have different names.
699 /* We can not find the suitable mapping symbol above. Therefore, we
700 look forwards and try to find it again, but don't go pass the start
701 of the section. Otherwise a data section without mapping symbols
702 can pick up a text mapping symbol of a preceeding section. */
705 n
= info
->symtab_pos
;
706 if (from_last_map_symbol
&& n
>= last_map_symbol
)
711 bfd_vma addr
= bfd_asymbol_value (info
->symtab
[n
]);
712 /* We have searched all possible symbols in the range. */
713 if (addr
< (info
->section
? info
->section
->vma
: 0))
715 /* Stop searching once we find the closed mapping symbol. */
716 if (riscv_get_map_state (n
, &mstate
, info
))
725 /* Save the information for next use. */
726 last_map_symbol
= symbol
;
727 last_stop_offset
= info
->stop_offset
;
732 /* Decide which data size we should print. */
735 riscv_data_length (bfd_vma memaddr
,
736 disassemble_info
*info
)
742 if (info
->symtab_size
!= 0
743 && bfd_asymbol_flavour (*info
->symtab
) == bfd_target_elf_flavour
744 && last_map_symbol
>= 0)
747 enum riscv_seg_mstate m
= MAP_NONE
;
748 for (n
= last_map_symbol
+ 1; n
< info
->symtab_size
; n
++)
750 bfd_vma addr
= bfd_asymbol_value (info
->symtab
[n
]);
752 && riscv_get_map_state (n
, &m
, info
))
754 if (addr
- memaddr
< length
)
755 length
= addr
- memaddr
;
763 /* Do not set the length which exceeds the section size. */
764 bfd_vma offset
= info
->section
->vma
+ info
->section
->size
;
766 length
= (offset
< length
) ? offset
: length
;
768 length
= length
== 3 ? 2 : length
;
772 /* Dump the data contents. */
775 riscv_disassemble_data (bfd_vma memaddr ATTRIBUTE_UNUSED
,
777 disassemble_info
*info
)
779 info
->display_endian
= info
->endian
;
781 switch (info
->bytes_per_chunk
)
784 info
->bytes_per_line
= 6;
785 (*info
->fprintf_func
) (info
->stream
, ".byte\t0x%02llx",
786 (unsigned long long) data
);
789 info
->bytes_per_line
= 8;
790 (*info
->fprintf_func
) (info
->stream
, ".short\t0x%04llx",
791 (unsigned long long) data
);
794 info
->bytes_per_line
= 8;
795 (*info
->fprintf_func
) (info
->stream
, ".word\t0x%08llx",
796 (unsigned long long) data
);
799 info
->bytes_per_line
= 8;
800 (*info
->fprintf_func
) (info
->stream
, ".dword\t0x%016llx",
801 (unsigned long long) data
);
806 return info
->bytes_per_chunk
;
810 print_insn_riscv (bfd_vma memaddr
, struct disassemble_info
*info
)
816 enum riscv_seg_mstate mstate
;
817 int (*riscv_disassembler
) (bfd_vma
, insn_t
, struct disassemble_info
*);
819 if (info
->disassembler_options
!= NULL
)
821 parse_riscv_dis_options (info
->disassembler_options
);
822 /* Avoid repeatedly parsing the options. */
823 info
->disassembler_options
= NULL
;
825 else if (riscv_gpr_names
== NULL
)
826 set_default_riscv_dis_options ();
828 mstate
= riscv_search_mapping_symbol (memaddr
, info
);
829 /* Save the last mapping state. */
830 last_map_state
= mstate
;
832 /* Set the size to dump. */
833 if (mstate
== MAP_DATA
834 && (info
->flags
& DISASSEMBLE_DATA
) == 0)
836 dump_size
= riscv_data_length (memaddr
, info
);
837 info
->bytes_per_chunk
= dump_size
;
838 riscv_disassembler
= riscv_disassemble_data
;
842 /* Get the first 2-bytes to check the lenghth of instruction. */
843 status
= (*info
->read_memory_func
) (memaddr
, packet
, 2, info
);
846 (*info
->memory_error_func
) (status
, memaddr
, info
);
849 insn
= (insn_t
) bfd_getl16 (packet
);
850 dump_size
= riscv_insn_length (insn
);
851 riscv_disassembler
= riscv_disassemble_insn
;
854 /* Fetch the instruction to dump. */
855 status
= (*info
->read_memory_func
) (memaddr
, packet
, dump_size
, info
);
858 (*info
->memory_error_func
) (status
, memaddr
, info
);
861 insn
= (insn_t
) bfd_get_bits (packet
, dump_size
* 8, false);
863 return (*riscv_disassembler
) (memaddr
, insn
, info
);
867 riscv_get_disassembler (bfd
*abfd
)
869 const char *default_arch
= "rv64gc";
873 const struct elf_backend_data
*ebd
= get_elf_backend_data (abfd
);
876 const char *sec_name
= ebd
->obj_attrs_section
;
877 if (bfd_get_section_by_name (abfd
, sec_name
) != NULL
)
879 obj_attribute
*attr
= elf_known_obj_attributes_proc (abfd
);
880 unsigned int Tag_a
= Tag_RISCV_priv_spec
;
881 unsigned int Tag_b
= Tag_RISCV_priv_spec_minor
;
882 unsigned int Tag_c
= Tag_RISCV_priv_spec_revision
;
883 riscv_get_priv_spec_class_from_numbers (attr
[Tag_a
].i
,
887 default_arch
= attr
[Tag_RISCV_arch
].s
;
892 riscv_release_subset_list (&riscv_subsets
);
893 riscv_parse_subset (&riscv_rps_dis
, default_arch
);
894 return print_insn_riscv
;
897 /* Prevent use of the fake labels that are generated as part of the DWARF
898 and for relaxable relocations in the assembler. */
901 riscv_symbol_is_valid (asymbol
* sym
,
902 struct disassemble_info
* info ATTRIBUTE_UNUSED
)
909 name
= bfd_asymbol_name (sym
);
911 return (strcmp (name
, RISCV_FAKE_LABEL_NAME
) != 0
912 && !riscv_elf_is_mapping_symbols (name
));
916 print_riscv_disassembler_options (FILE *stream
)
918 fprintf (stream
, _("\n\
919 The following RISC-V-specific disassembler options are supported for use\n\
920 with the -M switch (multiple options should be separated by commas):\n"));
922 fprintf (stream
, _("\n\
923 numeric Print numeric register names, rather than ABI names.\n"));
925 fprintf (stream
, _("\n\
926 no-aliases Disassemble only into canonical instructions, rather\n\
927 than into pseudoinstructions.\n"));
929 fprintf (stream
, _("\n\
930 priv-spec=PRIV Print the CSR according to the chosen privilege spec\n\
931 (1.9, 1.9.1, 1.10, 1.11).\n"));
933 fprintf (stream
, _("\n"));