1 /* to sanitize this file, grep -v v9 < sparc.h > clean-sparc.h */
3 /* Table of opcodes for the sparc.
4 Copyright 1989, 1991, 1992 Free Software Foundation, Inc.
6 This file is part of the BFD library.
8 BFD is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 BFD is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with this software; see the file COPYING. If not, write to
20 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* FIXME-someday: perhaps the ,a's and such should be embedded in the
23 instruction's name rather than the args. This would make gas faster, pinsn
24 slower, but would mess up some macros a bit. xoxorich. */
26 /* v9 FIXME: Doesn't accept `iprefetch', `setX', `signx', `cleartop', `cas',
27 `casx', `clrx', `clruw' synthetic instructions for v9. */
31 #define BFD_EMIT_TABLE
32 #include "opcode/sparc.h"
34 const char *architecture_pname
[] = {
43 /* v9: This file is correct for SPARC Version 9 Draft 1.1. */
45 #define COND(x) (((x)&0xf)<<25)
46 #define MCOND(x,i_or_f) ((((i_or_f)&1)<<18)|(((x)>>11)&(0xf<<14))) /* v9 */
48 #define CONDA (COND(0x8))
49 #define CONDCC (COND(0xd))
50 #define CONDCS (COND(0x5))
51 #define CONDE (COND(0x1))
52 #define CONDG (COND(0xa))
53 #define CONDGE (COND(0xb))
54 #define CONDGU (COND(0xc))
55 #define CONDL (COND(0x3))
56 #define CONDLE (COND(0x2))
57 #define CONDLEU (COND(0x4))
58 #define CONDN (COND(0x0))
59 #define CONDNE (COND(0x9))
60 #define CONDNEG (COND(0x6))
61 #define CONDPOS (COND(0xe))
62 #define CONDVC (COND(0xf))
63 #define CONDVS (COND(0x7))
67 #define CONDGEU CONDCC
70 #define FCONDA (COND(0x8))
71 #define FCONDE (COND(0x9))
72 #define FCONDG (COND(0x6))
73 #define FCONDGE (COND(0xb))
74 #define FCONDL (COND(0x4))
75 #define FCONDLE (COND(0xd))
76 #define FCONDLG (COND(0x2))
77 #define FCONDN (COND(0x0))
78 #define FCONDNE (COND(0x1))
79 #define FCONDO (COND(0xf))
80 #define FCONDU (COND(0x7))
81 #define FCONDUE (COND(0xa))
82 #define FCONDUG (COND(0x5))
83 #define FCONDUGE (COND(0xc))
84 #define FCONDUL (COND(0x3))
85 #define FCONDULE (COND(0xe))
87 #define FCONDNZ FCONDNE
90 #define ICC (0) /* v9 */
91 #define XCC (1<<11) /* v9 */
92 #define FCC(x) (((x)&0x3)<<11) /* v9 */
93 #define FBFCC(x) (((x)&0x3)<<20) /* v9 */
95 /* The order of the opcodes in the table is significant:
97 * The assembler requires that all instances of the same mnemonic must
98 be consecutive. If they aren't, the assembler will bomb at runtime.
100 * The disassembler should not care about the order of the opcodes.
104 struct sparc_opcode sparc_opcodes
[] = {
106 { "ld", F3(3, 0x00, 0), F3(~3, ~0x00, ~0), "[1+2],d", 0, v6
},
107 { "ld", F3(3, 0x00, 0), F3(~3, ~0x00, ~0)|RS2_G0
, "[1],d", 0, v6
}, /* ld [rs1+%g0],d */
108 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[1+i],d", 0, v6
},
109 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[i+1],d", 0, v6
},
110 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|RS1_G0
, "[i],d", 0, v6
},
111 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ld [rs1+0],d */
112 { "ld", F3(3, 0x20, 0), F3(~3, ~0x20, ~0), "[1+2],g", 0, v6
},
113 { "ld", F3(3, 0x20, 0), F3(~3, ~0x20, ~0)|RS2_G0
, "[1],g", 0, v6
}, /* ld [rs1+%g0],d */
114 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1), "[1+i],g", 0, v6
},
115 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1), "[i+1],g", 0, v6
},
116 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1)|RS1_G0
, "[i],g", 0, v6
},
117 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1)|SIMM13(~0), "[1],g", 0, v6
}, /* ld [rs1+0],d */
119 { "ld", F3(3, 0x21, 0), F3(~3, ~0x21, ~0)|RD(~0), "[1+2],F", 0, v6
},
120 { "ld", F3(3, 0x21, 0), F3(~3, ~0x21, ~0)|RS2_G0
|RD(~0),"[1],F", 0, v6
}, /* ld [rs1+%g0],d */
121 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RD(~0), "[1+i],F", 0, v6
},
122 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RD(~0), "[i+1],F", 0, v6
},
123 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RS1_G0
|RD(~0),"[i],F", 0, v6
},
124 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~0),"[1],F", 0, v6
}, /* ld [rs1+0],d */
126 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
127 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
128 { "ld", F3(3, 0x30, 0), F3(~3, ~0x30, ~0), "[1+2],D", F_ALIAS
, v6
},
129 { "ld", F3(3, 0x30, 0), F3(~3, ~0x30, ~0)|RS2_G0
, "[1],D", F_ALIAS
, v6
}, /* ld [rs1+%g0],d */
130 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[1+i],D", F_ALIAS
, v6
},
131 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[i+1],D", F_ALIAS
, v6
},
132 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0
, "[i],D", F_ALIAS
, v6
},
133 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0), "[1],D", F_ALIAS
, v6
}, /* ld [rs1+0],d */
134 { "ld", F3(3, 0x31, 0), F3(~3, ~0x31, ~0), "[1+2],C", 0, v6
},
135 { "ld", F3(3, 0x31, 0), F3(~3, ~0x31, ~0)|RS2_G0
, "[1],C", 0, v6
}, /* ld [rs1+%g0],d */
136 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1), "[1+i],C", 0, v6
},
137 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1), "[i+1],C", 0, v6
},
138 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1)|RS1_G0
, "[i],C", 0, v6
},
139 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1)|SIMM13(~0), "[1],C", 0, v6
}, /* ld [rs1+0],d */
141 /* The v9 LDUW is the same as the old 'ld' opcode, it is not the same as the
142 'ld' pseudo-op in v9. */
143 { "lduw", F3(3, 0x00, 0), F3(~3, ~0x00, ~0), "[1+2],d", F_ALIAS
, v9
},
144 { "lduw", F3(3, 0x00, 0), F3(~3, ~0x00, ~0)|RS2_G0
, "[1],d", F_ALIAS
, v9
}, /* ld [rs1+%g0],d */
145 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[1+i],d", F_ALIAS
, v9
},
146 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[i+1],d", F_ALIAS
, v9
},
147 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|RS1_G0
, "[i],d", F_ALIAS
, v9
},
148 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|SIMM13(~0), "[1],d", F_ALIAS
, v9
}, /* ld [rs1+0],d */
150 { "ldd", F3(3, 0x03, 0), F3(~3, ~0x03, ~0)|ASI(~0), "[1+2],d", 0, v6
},
151 { "ldd", F3(3, 0x03, 0), F3(~3, ~0x03, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldd [rs1+%g0],d */
152 { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1), "[1+i],d", 0, v6
},
153 { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1), "[i+1],d", 0, v6
},
154 { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1)|RS1_G0
, "[i],d", 0, v6
},
155 { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldd [rs1+0],d */
156 { "ldd", F3(3, 0x23, 0), F3(~3, ~0x23, ~0)|ASI(~0), "[1+2],H", 0, v6
},
157 { "ldd", F3(3, 0x23, 0), F3(~3, ~0x23, ~0)|ASI_RS2(~0), "[1],H", 0, v6
}, /* ldd [rs1+%g0],d */
158 { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1), "[1+i],H", 0, v6
},
159 { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1), "[i+1],H", 0, v6
},
160 { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1)|RS1_G0
, "[i],H", 0, v6
},
161 { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1)|SIMM13(~0), "[1],H", 0, v6
}, /* ldd [rs1+0],d */
162 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
163 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
164 { "ldd", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|ASI(~0), "[1+2],D", F_ALIAS
, v6
},
165 { "ldd", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|ASI_RS2(~0), "[1],D", F_ALIAS
, v6
}, /* ldd [rs1+%g0],d */
166 { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[1+i],D", F_ALIAS
, v6
},
167 { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[i+1],D", F_ALIAS
, v6
},
168 { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|RS1_G0
, "[i],D", F_ALIAS
, v6
},
169 { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|SIMM13(~0), "[1],D", F_ALIAS
, v6
}, /* ldd [rs1+0],d */
171 { "ldq", F3(3, 0x22, 0), F3(~3, ~0x22, ~0)|ASI(~0), "[1+2],J", 0, v9
},
172 { "ldq", F3(3, 0x22, 0), F3(~3, ~0x22, ~0)|ASI_RS2(~0), "[1],J", 0, v9
}, /* ldd [rs1+%g0],d */
173 { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1), "[1+i],J", 0, v9
},
174 { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1), "[i+1],J", 0, v9
},
175 { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1)|RS1_G0
, "[i],J", 0, v9
},
176 { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1)|SIMM13(~0), "[1],J", 0, v9
}, /* ldd [rs1+0],d */
178 { "ldsb", F3(3, 0x09, 0), F3(~3, ~0x09, ~0)|ASI(~0), "[1+2],d", 0, v6
},
179 { "ldsb", F3(3, 0x09, 0), F3(~3, ~0x09, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldsb [rs1+%g0],d */
180 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1), "[1+i],d", 0, v6
},
181 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1), "[i+1],d", 0, v6
},
182 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1)|RS1_G0
, "[i],d", 0, v6
},
183 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldsb [rs1+0],d */
185 { "ldsh", F3(3, 0x0a, 0), F3(~3, ~0x0a, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldsh [rs1+%g0],d */
186 { "ldsh", F3(3, 0x0a, 0), F3(~3, ~0x0a, ~0)|ASI(~0), "[1+2],d", 0, v6
},
187 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1), "[1+i],d", 0, v6
},
188 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1), "[i+1],d", 0, v6
},
189 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1)|RS1_G0
, "[i],d", 0, v6
},
190 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldsh [rs1+0],d */
192 { "ldstub", F3(3, 0x0d, 0), F3(~3, ~0x0d, ~0)|ASI(~0), "[1+2],d", 0, v6
},
193 { "ldstub", F3(3, 0x0d, 0), F3(~3, ~0x0d, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldstub [rs1+%g0],d */
194 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1), "[1+i],d", 0, v6
},
195 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1), "[i+1],d", 0, v6
},
196 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1)|RS1_G0
, "[i],d", 0, v6
},
197 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldstub [rs1+0],d */
199 { "ldsw", F3(3, 0x08, 0), F3(~3, ~0x08, ~0)|ASI(~0), "[1+2],d", 0, v9
},
200 { "ldsw", F3(3, 0x08, 0), F3(~3, ~0x08, ~0)|ASI_RS2(~0), "[1],d", 0, v9
}, /* ldsw [rs1+%g0],d */
201 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1), "[1+i],d", 0, v9
},
202 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1), "[i+1],d", 0, v9
},
203 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1)|RS1_G0
, "[i],d", 0, v9
},
204 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1)|SIMM13(~0), "[1],d", 0, v9
}, /* ldsw [rs1+0],d */
206 { "ldub", F3(3, 0x01, 0), F3(~3, ~0x01, ~0)|ASI(~0), "[1+2],d", 0, v6
},
207 { "ldub", F3(3, 0x01, 0), F3(~3, ~0x01, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldub [rs1+%g0],d */
208 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1), "[1+i],d", 0, v6
},
209 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1), "[i+1],d", 0, v6
},
210 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1)|RS1_G0
, "[i],d", 0, v6
},
211 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldub [rs1+0],d */
213 { "lduh", F3(3, 0x02, 0), F3(~3, ~0x02, ~0)|ASI(~0), "[1+2],d", 0, v6
},
214 { "lduh", F3(3, 0x02, 0), F3(~3, ~0x02, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* lduh [rs1+%g0],d */
215 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1), "[1+i],d", 0, v6
},
216 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1), "[i+1],d", 0, v6
},
217 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1)|RS1_G0
, "[i],d", 0, v6
},
218 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* lduh [rs1+0],d */
220 { "ldx", F3(3, 0x0b, 0), F3(~3, ~0x0b, ~0)|ASI(~0), "[1+2],d", 0, v9
},
221 { "ldx", F3(3, 0x0b, 0), F3(~3, ~0x0b, ~0)|ASI_RS2(~0), "[1],d", 0, v9
}, /* ldx [rs1+%g0],d */
222 { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1), "[1+i],d", 0, v9
},
223 { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1), "[i+1],d", 0, v9
},
224 { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1)|RS1_G0
, "[i],d", 0, v9
},
225 { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1)|SIMM13(~0), "[1],d", 0, v9
}, /* ldx [rs1+0],d */
227 { "ldx", F3(3, 0x21, 0)|RD(1), F3(~3, ~0x21, ~0)|RD(~1), "[1+2],F", 0, v9
},
228 { "ldx", F3(3, 0x21, 0)|RD(1), F3(~3, ~0x21, ~0)|RS2_G0
|RD(~1), "[1],F", 0, v9
}, /* ld [rs1+%g0],d */
229 { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RD(~1), "[1+i],F", 0, v9
},
230 { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RD(~1), "[i+1],F", 0, v9
},
231 { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RS1_G0
|RD(~1), "[i],F", 0, v9
},
232 { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~1),"[1],F", 0, v9
}, /* ld [rs1+0],d */
234 { "lda", F3(3, 0x10, 0), F3(~3, ~0x10, ~0), "[1+2]A,d", 0, v6
},
235 { "lda", F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* lda [rs1+%g0],d */
236 { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[1+i]o,d", 0, v9
},
237 { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[i+1]o,d", 0, v9
},
238 { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
239 { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
240 { "lda", F3(3, 0x30, 0), F3(~3, ~0x30, ~0), "[1+2]A,g", 0, v9
},
241 { "lda", F3(3, 0x30, 0), F3(~3, ~0x30, ~0)|RS2_G0
, "[1]A,g", 0, v9
}, /* lda [rs1+%g0],d */
242 { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[1+i]o,g", 0, v9
},
243 { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[i+1]o,g", 0, v9
},
244 { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0
, "[i]o,g", 0, v9
},
245 { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0), "[1]o,g", 0, v9
}, /* ld [rs1+0],d */
247 { "ldda", F3(3, 0x13, 0), F3(~3, ~0x13, ~0), "[1+2]A,d", 0, v6
},
248 { "ldda", F3(3, 0x13, 0), F3(~3, ~0x13, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* ldda [rs1+%g0],d */
249 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1), "[1+i]o,d", 0, v9
},
250 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1), "[i+1]o,d", 0, v9
},
251 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
252 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
254 { "ldda", F3(3, 0x33, 0), F3(~3, ~0x33, ~0), "[1+2]A,H", 0, v9
},
255 { "ldda", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|RS2_G0
, "[1]A,H", 0, v9
}, /* ldda [rs1+%g0],d */
256 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[1+i]o,H", 0, v9
},
257 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[i+1]o,H", 0, v9
},
258 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|RS1_G0
, "[i]o,H", 0, v9
},
259 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|SIMM13(~0), "[1]o,H", 0, v9
}, /* ld [rs1+0],d */
261 { "ldqa", F3(3, 0x32, 0), F3(~3, ~0x32, ~0), "[1+2]A,J", 0, v9
},
262 { "ldqa", F3(3, 0x32, 0), F3(~3, ~0x32, ~0)|RS2_G0
, "[1]A,J", 0, v9
}, /* ldd [rs1+%g0],d */
263 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1), "[1+i]o,J", 0, v9
},
264 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1), "[i+1]o,J", 0, v9
},
265 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1)|RS1_G0
, "[i]o,J", 0, v9
},
266 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1)|SIMM13(~0), "[1]o,J", 0, v9
}, /* ldd [rs1+0],d */
268 { "ldsba", F3(3, 0x19, 0), F3(~3, ~0x19, ~0), "[1+2]A,d", 0, v6
},
269 { "ldsba", F3(3, 0x19, 0), F3(~3, ~0x19, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* ldsba [rs1+%g0],d */
270 { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1), "[1+i]o,d", 0, v9
},
271 { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1), "[i+1]o,d", 0, v9
},
272 { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
273 { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
275 { "ldsha", F3(3, 0x1a, 0), F3(~3, ~0x1a, ~0), "[1+2]A,d", 0, v6
},
276 { "ldsha", F3(3, 0x1a, 0), F3(~3, ~0x1a, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* ldsha [rs1+%g0],d */
277 { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1), "[1+i]o,d", 0, v9
},
278 { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1), "[i+1]o,d", 0, v9
},
279 { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
280 { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
282 { "ldstuba", F3(3, 0x1d, 0), F3(~3, ~0x1d, ~0), "[1+2]A,d", 0, v6
},
283 { "ldstuba", F3(3, 0x1d, 0), F3(~3, ~0x1d, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* ldstuba [rs1+%g0],d */
284 { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1), "[1+i]o,d", 0, v9
},
285 { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1), "[i+1]o,d", 0, v9
},
286 { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
287 { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
289 { "ldswa", F3(3, 0x18, 0), F3(~3, ~0x18, ~0), "[1+2]A,d", 0, v9
},
290 { "ldswa", F3(3, 0x18, 0), F3(~3, ~0x18, ~0)|RS2_G0
, "[1]A,d", 0, v9
}, /* lda [rs1+%g0],d */
291 { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1), "[1+i]o,d", 0, v9
},
292 { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1), "[i+1]o,d", 0, v9
},
293 { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
294 { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
296 { "lduba", F3(3, 0x11, 0), F3(~3, ~0x11, ~0), "[1+2]A,d", 0, v6
},
297 { "lduba", F3(3, 0x11, 0), F3(~3, ~0x11, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* lduba [rs1+%g0],d */
298 { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1), "[1+i]o,d", 0, v9
},
299 { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1), "[i+1]o,d", 0, v9
},
300 { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
301 { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
303 { "lduha", F3(3, 0x12, 0), F3(~3, ~0x12, ~0), "[1+2]A,d", 0, v6
},
304 { "lduha", F3(3, 0x12, 0), F3(~3, ~0x12, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* lduha [rs1+%g0],d */
305 { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1), "[1+i]o,d", 0, v9
},
306 { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1), "[i+1]o,d", 0, v9
},
307 { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
308 { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
310 { "lduwa", F3(3, 0x10, 0), F3(~3, ~0x10, ~0), "[1+2]A,d", F_ALIAS
, v9
}, /* lduwa === lda */
311 { "lduwa", F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0
, "[1]A,d", F_ALIAS
, v9
}, /* lda [rs1+%g0],d */
312 { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[1+i]o,d", F_ALIAS
, v9
},
313 { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[i+1]o,d", F_ALIAS
, v9
},
314 { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|RS1_G0
, "[i]o,d", F_ALIAS
, v9
},
315 { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|SIMM13(~0), "[1]o,d", F_ALIAS
, v9
}, /* ld [rs1+0],d */
317 { "ldxa", F3(3, 0x1b, 0), F3(~3, ~0x1b, ~0), "[1+2]A,d", 0, v9
}, /* lduwa === lda */
318 { "ldxa", F3(3, 0x1b, 0), F3(~3, ~0x1b, ~0)|RS2_G0
, "[1]A,d", 0, v9
}, /* lda [rs1+%g0],d */
319 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1), "[1+i]o,d", 0, v9
},
320 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1), "[i+1]o,d", 0, v9
},
321 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
322 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
324 { "st", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", 0, v6
},
325 { "st", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", 0, v6
}, /* st d,[rs1+%g0] */
326 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", 0, v6
},
327 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", 0, v6
},
328 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0
, "d,[i]", 0, v6
},
329 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", 0, v6
}, /* st d,[rs1+0] */
330 { "st", F3(3, 0x24, 0), F3(~3, ~0x24, ~0)|ASI(~0), "g,[1+2]", 0, v6
},
331 { "st", F3(3, 0x24, 0), F3(~3, ~0x24, ~0)|ASI_RS2(~0), "g,[1]", 0, v6
}, /* st d[rs1+%g0] */
332 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1), "g,[1+i]", 0, v6
},
333 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1), "g,[i+1]", 0, v6
},
334 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1)|RS1_G0
, "g,[i]", 0, v6
},
335 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1)|SIMM13(~0), "g,[1]", 0, v6
}, /* st d,[rs1+0] */
336 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
337 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
338 { "st", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|ASI(~0), "D,[1+2]", F_ALIAS
, v6
},
339 { "st", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|ASI_RS2(~0), "D,[1]", F_ALIAS
, v6
}, /* st d,[rs1+%g0] */
340 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "D,[1+i]", F_ALIAS
, v6
},
341 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "D,[i+1]", F_ALIAS
, v6
},
342 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|RS1_G0
, "D,[i]", F_ALIAS
, v6
},
343 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|SIMM13(~0), "D,[1]", F_ALIAS
, v6
}, /* st d,[rs1+0] */
344 { "st", F3(3, 0x35, 0), F3(~3, ~0x35, ~0)|ASI(~0), "C,[1+2]", 0, v6
},
345 { "st", F3(3, 0x35, 0), F3(~3, ~0x35, ~0)|ASI_RS2(~0), "C,[1]", 0, v6
}, /* st d,[rs1+%g0] */
346 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1), "C,[1+i]", 0, v6
},
347 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1), "C,[i+1]", 0, v6
},
348 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1)|RS1_G0
, "C,[i]", 0, v6
},
349 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1)|SIMM13(~0), "C,[1]", 0, v6
}, /* st d,[rs1+0] */
351 { "st", F3(3, 0x25, 0), F3(~3, ~0x25, ~0)|RD_G0
|ASI(~0), "F,[1+2]", 0, v6
},
352 { "st", F3(3, 0x25, 0), F3(~3, ~0x25, ~0)|RD_G0
|ASI_RS2(~0), "F,[1]", 0, v6
}, /* st d,[rs1+%g0] */
353 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0
, "F,[1+i]", 0, v6
},
354 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0
, "F,[i+1]", 0, v6
},
355 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0
|RS1_G0
, "F,[i]", 0, v6
},
356 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0
|SIMM13(~0), "F,[1]", 0, v6
}, /* st d,[rs1+0] */
358 /* The v9 STW/STUW/STSW are the same as the old 'st' opcode, they are not
359 the same as the 'st' psuedo-op in v9. */
360 { "stw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
361 { "stw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+%g0] */
362 { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", F_ALIAS
, v9
},
363 { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", F_ALIAS
, v9
},
364 { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
365 { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+0] */
367 { "stuw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
368 { "stuw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+%g0] */
369 { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", F_ALIAS
, v9
},
370 { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", F_ALIAS
, v9
},
371 { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
372 { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+0] */
374 { "stsw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
}, /* stsw === st */
375 { "stsw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+%g0] */
376 { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", F_ALIAS
, v9
},
377 { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", F_ALIAS
, v9
},
378 { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
379 { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+0] */
381 { "sta", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", 0, v6
},
382 { "sta", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", 0, v6
}, /* sta d,[rs1+%g0] */
383 { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", 0, v9
},
384 { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", 0, v9
},
385 { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
386 { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* st d,[rs1+0] */
388 { "sta", F3(3, 0x34, 0), F3(~3, ~0x34, ~0), "g,[1+2]A", 0, v9
},
389 { "sta", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|RS2(~0), "g,[1]A", 0, v9
}, /* sta d,[rs1+%g0] */
390 { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "g,[1+i]o", 0, v9
},
391 { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "g,[i+1]o", 0, v9
},
392 { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|RS1_G0
, "g,[i]o", 0, v9
},
393 { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|SIMM13(~0), "g,[1]o", 0, v9
}, /* st d,[rs1+0] */
395 { "stwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", F_ALIAS
, v9
},
396 { "stwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* sta d,[rs1+%g0] */
397 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", F_ALIAS
, v9
},
398 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", F_ALIAS
, v9
},
399 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
400 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* st d,[rs1+0] */
402 { "stswa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", F_ALIAS
, v9
},
403 { "stswa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* sta d,[rs1+%g0] */
404 { "stswa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", F_ALIAS
, v9
},
405 { "stswa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", F_ALIAS
, v9
},
406 { "stswa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
407 { "stswa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* st d,[rs1+0] */
409 { "stuwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", F_ALIAS
, v9
},
410 { "stuwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* sta d,[rs1+%g0] */
411 { "stuwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", F_ALIAS
, v9
},
412 { "stuwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", F_ALIAS
, v9
},
413 { "stuwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
414 { "stuwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* st d,[rs1+0] */
416 { "stb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0), "d,[1+2]", 0, v6
},
417 { "stb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0), "d,[1]", 0, v6
}, /* stb d,[rs1+%g0] */
418 { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[1+i]", 0, v6
},
419 { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[i+1]", 0, v6
},
420 { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0
, "d,[i]", 0, v6
},
421 { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", 0, v6
}, /* stb d,[rs1+0] */
423 { "stub", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
424 { "stub", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* stb d,[rs1+%g0] */
425 { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[1+i]", F_ALIAS
, v9
},
426 { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[i+1]", F_ALIAS
, v9
},
427 { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
428 { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* stb d,[rs1+0] */
430 { "stsb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
431 { "stsb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* stb d,[rs1+%g0] */
432 { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[1+i]", F_ALIAS
, v9
},
433 { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[i+1]", F_ALIAS
, v9
},
434 { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
435 { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* stb d,[rs1+0] */
437 { "stba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0), "d,[1+2]A", 0, v6
},
438 { "stba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", 0, v6
}, /* stba d,[rs1+%g0] */
439 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[1+i]o", 0, v9
},
440 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[i+1]o", 0, v9
},
441 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
442 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* stb d,[rs1+0] */
444 { "stsba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0), "d,[1+2]A", F_ALIAS
, v9
},
445 { "stsba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* stba d,[rs1+%g0] */
446 { "stsba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[1+i]o", F_ALIAS
, v9
},
447 { "stsba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[i+1]o", F_ALIAS
, v9
},
448 { "stsba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
449 { "stsba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* stb d,[rs1+0] */
451 { "stuba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0), "d,[1+2]A", F_ALIAS
, v9
},
452 { "stuba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* stba d,[rs1+%g0] */
453 { "stuba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[1+i]o", F_ALIAS
, v9
},
454 { "stuba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[i+1]o", F_ALIAS
, v9
},
455 { "stuba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
456 { "stuba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* stb d,[rs1+0] */
458 { "std", F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI(~0), "d,[1+2]", 0, v6
},
459 { "std", F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI_RS2(~0), "d,[1]", 0, v6
}, /* std d,[rs1+%g0] */
460 { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1), "d,[1+i]", 0, v6
},
461 { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1), "d,[i+1]", 0, v6
},
462 { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|RS1_G0
, "d,[i]", 0, v6
},
463 { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|SIMM13(~0), "d,[1]", 0, v6
}, /* std d,[rs1+0] */
464 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
465 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
466 { "std", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI(~0), "q,[1+2]", F_ALIAS
, v6
},
467 { "std", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI_RS2(~0), "q,[1]", F_ALIAS
, v6
}, /* std d,[rs1+%g0] */
468 { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "q,[1+i]", F_ALIAS
, v6
},
469 { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "q,[i+1]", F_ALIAS
, v6
},
470 { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|RS1_G0
, "q,[i]", F_ALIAS
, v6
},
471 { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|SIMM13(~0), "q,[1]", F_ALIAS
, v6
}, /* std d,[rs1+0] */
472 { "std", F3(3, 0x27, 0), F3(~3, ~0x27, ~0)|ASI(~0), "H,[1+2]", 0, v6
},
473 { "std", F3(3, 0x27, 0), F3(~3, ~0x27, ~0)|ASI_RS2(~0), "H,[1]", 0, v6
}, /* std d,[rs1+%g0] */
474 { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1), "H,[1+i]", 0, v6
},
475 { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1), "H,[i+1]", 0, v6
},
476 { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1)|RS1_G0
, "H,[i]", 0, v6
},
477 { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1)|SIMM13(~0), "H,[1]", 0, v6
}, /* std d,[rs1+0] */
478 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
479 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
480 { "std", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI(~0), "Q,[1+2]", F_ALIAS
, v6
},
481 { "std", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI_RS2(~0), "Q,[1]", F_ALIAS
, v6
}, /* std d,[rs1+%g0] */
482 { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "Q,[1+i]", F_ALIAS
, v6
},
483 { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "Q,[i+1]", F_ALIAS
, v6
},
484 { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|RS1_G0
, "Q,[i]", F_ALIAS
, v6
},
485 { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|SIMM13(~0), "Q,[1]", F_ALIAS
, v6
}, /* std d,[rs1+0] */
486 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
487 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
488 { "std", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|ASI(~0), "D,[1+2]", F_ALIAS
, v6
},
489 { "std", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|ASI_RS2(~0), "D,[1]", F_ALIAS
, v6
}, /* std d,[rs1+%g0] */
490 { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "D,[1+i]", F_ALIAS
, v6
},
491 { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "D,[i+1]", F_ALIAS
, v6
},
492 { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|RS1_G0
, "D,[i]", F_ALIAS
, v6
},
493 { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|SIMM13(~0), "D,[1]", F_ALIAS
, v6
}, /* std d,[rs1+0] */
495 { "stda", F3(3, 0x17, 0), F3(~3, ~0x17, ~0), "d,[1+2]A", 0, v6
},
496 { "stda", F3(3, 0x17, 0), F3(~3, ~0x17, ~0)|RS2(~0), "d,[1]A", 0, v6
}, /* stda d,[rs1+%g0] */
497 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1), "d,[1+i]o", 0, v9
},
498 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1), "d,[i+1]o", 0, v9
},
499 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
500 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* std d,[rs1+0] */
501 { "stda", F3(3, 0x37, 0), F3(~3, ~0x37, ~0), "H,[1+2]A", 0, v9
},
502 { "stda", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|RS2(~0), "H,[1]A", 0, v9
}, /* stda d,[rs1+%g0] */
503 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "H,[1+i]o", 0, v9
},
504 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "H,[i+1]o", 0, v9
},
505 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|RS1_G0
, "H,[i]o", 0, v9
},
506 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|SIMM13(~0), "H,[1]o", 0, v9
}, /* std d,[rs1+0] */
508 { "sth", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0), "d,[1+2]", 0, v6
},
509 { "sth", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0), "d,[1]", 0, v6
}, /* sth d,[rs1+%g0] */
510 { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[1+i]", 0, v6
},
511 { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[i+1]", 0, v6
},
512 { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0
, "d,[i]", 0, v6
},
513 { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", 0, v6
}, /* sth d,[+] */
515 { "stsh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
516 { "stsh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* sth d,[rs1+%g0] */
517 { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[1+i]", F_ALIAS
, v9
},
518 { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[i+1]", F_ALIAS
, v9
},
519 { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
520 { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* sth d,[rs1+0] */
522 { "stuh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
523 { "stuh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* sth d,[rs1+%g0] */
524 { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[1+i]", F_ALIAS
, v9
},
525 { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[i+1]", F_ALIAS
, v9
},
526 { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
527 { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* sth d,[rs1+0] */
529 { "stha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0), "d,[1+2]A", 0, v6
},
530 { "stha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", 0, v6
}, /* stha ,[+%] */
531 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[1+i]o", 0, v9
},
532 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[i+1]o", 0, v9
},
533 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
534 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* sth d,[+] */
536 { "stsha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0), "d,[1+2]A", F_ALIAS
, v9
},
537 { "stsha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* stha d,[rs1+%g0] */
538 { "stsha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[1+i]o", F_ALIAS
, v9
},
539 { "stsha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[i+1]o", F_ALIAS
, v9
},
540 { "stsha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
541 { "stsha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* sth d,[+] */
543 { "stuha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0), "d,[1+2]A", F_ALIAS
, v9
},
544 { "stuha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* stha d,[rs1+%g0] */
545 { "stuha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[1+i]o", F_ALIAS
, v9
},
546 { "stuha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[i+1]o", F_ALIAS
, v9
},
547 { "stuha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
548 { "stuha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* sth d,[+] */
550 { "stx", F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|ASI(~0), "d,[1+2]", 0, v9
},
551 { "stx", F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|ASI_RS2(~0), "d,[1]", 0, v9
}, /* stx d,[rs1+%g0] */
552 { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1), "d,[1+i]", 0, v9
},
553 { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1), "d,[i+1]", 0, v9
},
554 { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RS1_G0
, "d,[i]", 0, v9
},
555 { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|SIMM13(~0), "d,[1]", 0, v9
}, /* stx d,[rs1+0] */
557 { "stx", F3(3, 0x25, 0)|RD(1), F3(~3, ~0x25, ~0)|ASI(~0)|RD(~1), "F,[1+2]", 0, v9
},
558 { "stx", F3(3, 0x25, 0)|RD(1), F3(~3, ~0x25, ~0)|ASI_RS2(~0)|RD(~1),"F,[1]", 0, v9
}, /* st d,[rs1+%g0] */
559 { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RD(~1), "F,[1+i]", 0, v9
},
560 { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RD(~1), "F,[i+1]", 0, v9
},
561 { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RS1_G0
|RD(~1), "F,[i]", 0, v9
},
562 { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|SIMM13(~0)|RD(~1),"F,[1]", 0, v9
}, /* st d,[rs1+0] */
564 { "stxa", F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0), "d,[1+2]A", 0, v9
},
565 { "stxa", F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0)|RS2(~0), "d,[1]A", 0, v9
}, /* stha d,[rs1+%g0] */
566 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1), "d,[1+i]o", 0, v9
},
567 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1), "d,[i+1]o", 0, v9
},
568 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
569 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* stx d,[rs1+0] */
571 { "stq", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI(~0), "J,[1+2]", 0, v9
},
572 { "stq", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI_RS2(~0), "J,[1]", 0, v9
}, /* st d[rs1+%g0] */
573 { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "J,[1+i]", 0, v9
},
574 { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "J,[i+1]", 0, v9
},
575 { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|RS1_G0
, "J,[i]", 0, v9
},
576 { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|SIMM13(~0), "J,[1]", 0, v9
}, /* st d,[rs1+0] */
578 { "stqa", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI(~0), "J,[1+2]A", 0, v9
},
579 { "stqa", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI_RS2(~0), "J,[1]A", 0, v9
}, /* st d[rs1+%g0] */
580 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "J,[1+i]o", 0, v9
},
581 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "J,[i+1]o", 0, v9
},
582 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|RS1_G0
, "J,[i]o", 0, v9
},
583 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|SIMM13(~0), "J,[1]o", 0, v9
}, /* st d,[rs1+0] */
585 { "swap", F3(3, 0x0f, 0), F3(~3, ~0x0f, ~0)|ASI(~0), "[1+2],d", 0, v7
},
586 { "swap", F3(3, 0x0f, 0), F3(~3, ~0x0f, ~0)|ASI_RS2(~0), "[1],d", 0, v7
}, /* swap [rs1+%g0],d */
587 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1), "[1+i],d", 0, v7
},
588 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1), "[i+1],d", 0, v7
},
589 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1)|RS1_G0
, "[i],d", 0, v7
},
590 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1)|SIMM13(~0), "[1],d", 0, v7
}, /* swap [rs1+0],d */
592 { "swapa", F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0), "[1+2]A,d", 0, v7
},
593 { "swapa", F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0)|RS2(~0), "[1]A,d", 0, v7
}, /* swapa [rs1+%g0],d */
594 { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1), "[1+i]o,d", 0, v9
},
595 { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1), "[i+1]o,d", 0, v9
},
596 { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
597 { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* swap [rs1+0],d */
599 { "restore", F3(2, 0x3d, 0), F3(~2, ~0x3d, ~0)|ASI(~0), "1,2,d", 0, v6
},
600 { "restore", F3(2, 0x3d, 0), F3(~2, ~0x3d, ~0)|RD_G0
|RS1_G0
|ASI_RS2(~0), "", 0, v6
}, /* restore %g0,%g0,%g0 */
601 { "restore", F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1), "1,i,d", 0, v6
},
602 { "restore", F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1)|RD_G0
|RS1_G0
|SIMM13(~0), "", 0, v6
}, /* restore %g0,0,%g0 */
604 { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0
|ASI(~0), "1+2", F_DELAYED
, v6
}, /* rett rs1+rs2 */
605 { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0
|ASI_RS2(~0), "1", F_DELAYED
, v6
}, /* rett rs1,%g0 */
606 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
, "1+i", F_DELAYED
, v6
}, /* rett rs1+X */
607 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
, "i+1", F_DELAYED
, v6
}, /* rett X+rs1 */
608 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
|RS1_G0
,"i", F_DELAYED
, v6
}, /* rett X+rs1 */
609 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
|RS1_G0
, "i", F_DELAYED
, v6
}, /* rett X */
610 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
|SIMM13(~0), "1", F_DELAYED
, v6
}, /* rett rs1+0 */
612 { "save", F3(2, 0x3c, 0), F3(~2, ~0x3c, ~0)|ASI(~0), "1,2,d", 0, v6
},
613 { "save", F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1), "1,i,d", 0, v6
},
614 { "save", 0x81e00000, ~0x81e00000, "", F_ALIAS
, v6
},
616 { "ret", F3(2, 0x38, 1)|RS1(0x1f)|SIMM13(8), F3(~2, ~0x38, ~1)|SIMM13(~8), "", F_DELAYED
, v6
}, /* jmpl %i7+8,%g0 */
617 { "retl", F3(2, 0x38, 1)|RS1(0x0f)|SIMM13(8), F3(~2, ~0x38, ~1)|RS1(~0x0f)|SIMM13(~8), "", F_DELAYED
, v6
}, /* jmpl %o7+8,%g0 */
619 { "jmpl", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|ASI(~0), "1+2,d", F_DELAYED
, v6
},
620 { "jmpl", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|ASI_RS2(~0), "1,d", F_DELAYED
, v6
}, /* jmpl rs1+%g0,d */
621 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|SIMM13(~0), "1,d", F_DELAYED
, v6
}, /* jmpl rs1+0,d */
622 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RS1_G0
, "i,d", F_DELAYED
, v6
}, /* jmpl %g0+i,d */
623 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1), "1+i,d", F_DELAYED
, v6
},
624 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1), "i+1,d", F_DELAYED
, v6
},
626 { "done", F3(2, 0x3e, 1)|RD(0), F3(~2, ~0x3e, ~1)|RD(~0)|RS1_G0
|SIMM13(~0), "", 0, v9
},
627 { "retry", F3(2, 0x3e, 1)|RD(1), F3(~2, ~0x3e, ~1)|RD(~1)|RS1_G0
|SIMM13(~0), "", 0, v9
},
628 { "saved", F3(2, 0x31, 1)|RD(0), F3(~2, ~0x31, ~1)|RD(~0)|RS1_G0
|SIMM13(~0), "", 0, v9
},
629 { "restored", F3(2, 0x31, 1)|RD(1), F3(~2, ~0x31, ~1)|RD(~1)|RS1_G0
|SIMM13(~0), "", 0, v9
},
630 { "sigm", F3(2, 0x30, 0)|RD(0xf), F3(~2, ~0x30, ~0)|RD(~0xf)|RS1_G0
|SIMM13(~0), "", 0, v9
},
632 { "flush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0), "1+2", 0, v8
},
633 { "flush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0), "1", 0, v8
}, /* flush rs1+%g0 */
634 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0), "1", 0, v8
}, /* flush rs1+0 */
635 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0
, "i", 0, v8
}, /* flush %g0+i */
636 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "1+i", 0, v8
},
637 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "i+1", 0, v8
},
639 /* IFLUSH was renamed to FLUSH in v8. */
640 { "iflush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0), "1+2", F_ALIAS
, v6
},
641 { "iflush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0), "1", F_ALIAS
, v6
}, /* flush rs1+%g0 */
642 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0), "1", F_ALIAS
, v6
}, /* flush rs1+0 */
643 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0
, "i", F_ALIAS
, v6
},
644 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "1+i", F_ALIAS
, v6
},
645 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "i+1", F_ALIAS
, v6
},
647 { "return", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|ASI(~0), "1+2", 0, v9
},
648 { "return", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|ASI_RS2(~0), "1", 0, v9
}, /* return rs1+%g0 */
649 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|SIMM13(~0), "1", 0, v9
}, /* return rs1+0 */
650 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RS1_G0
, "i", 0, v9
}, /* return %g0+i */
651 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1), "1+i", 0, v9
},
652 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1), "i+1", 0, v9
},
654 { "flushw", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RD_G0
|RS1_G0
|ASI_RS2(~0), "", 0, v9
},
656 { "membar", F3(2, 0x28, 1)|RS1(0xf), F3(~2, ~0x28, ~1)|RD_G0
|RS1(~0xf)|ASI(~0), "K", 0, v9
},
657 { "stbar", F3(2, 0x28, 0)|RS1(0xf), F3(~2, ~0x28, ~0)|RD_G0
|RS1(~0xf)|SIMM13(~0), "", 0, v8
},
659 { "prefetch", F3(3, 0x2d, 0), F3(~3, ~0x2d, ~0), "[1+2],*", 0, v9
},
660 { "prefetch", F3(3, 0x2d, 0), F3(~3, ~0x2d, ~0)|RS2_G0
, "[1],*", 0, v9
}, /* prefetch [rs1+%g0],prefetch_fcn */
661 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1), "[1+i],*", 0, v9
},
662 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1), "[i+1],*", 0, v9
},
663 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1)|RS1_G0
, "[i],*", 0, v9
},
664 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1)|SIMM13(~0), "[1],*", 0, v9
}, /* prefetch [rs1+0],prefetch_fcn */
665 { "prefetcha", F3(3, 0x3d, 0), F3(~3, ~0x3d, ~0), "[1+2]A,*", 0, v9
},
666 { "prefetcha", F3(3, 0x3d, 0), F3(~3, ~0x3d, ~0)|RS2_G0
, "[1]A,*", 0, v9
}, /* prefetcha [rs1+%g0],prefetch_fcn */
667 { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1), "[1+i]o,d", 0, v9
},
668 { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1), "[i+1]o,d", 0, v9
},
669 { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
670 { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* prefetcha [rs1+0],d */
672 /* The 1<<12 is a long story. It is necessary. For more info, please contact rich@cygnus.com */
673 { "sll", F3(2, 0x25, 0), F3(~2, ~0x25, ~0)|(1<<12)|ASI(~0), "1,2,d", 0, v6
},
674 { "sll", F3(2, 0x25, 1), F3(~2, ~0x25, ~1)|(1<<12), "1,i,d", 0, v6
},
675 { "sra", F3(2, 0x27, 0), F3(~2, ~0x27, ~0)|(1<<12)|ASI(~0), "1,2,d", 0, v6
},
676 { "sra", F3(2, 0x27, 1), F3(~2, ~0x27, ~1)|(1<<12), "1,i,d", 0, v6
},
677 { "srl", F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|ASI(~0), "1,2,d", 0, v6
},
678 { "srl", F3(2, 0x26, 1), F3(~2, ~0x26, ~1)|(1<<12), "1,i,d", 0, v6
},
680 { "sllx", F3(2, 0x25, 0)|(1<<12), F3(~2, ~0x25, ~0)|(ASI(~0)^(1<<12)), "1,2,d", 0, v9
},
681 { "sllx", F3(2, 0x25, 1)|(1<<12), F3(~2, ~0x25, ~1), "1,i,d", 0, v9
},
682 { "srax", F3(2, 0x27, 0)|(1<<12), F3(~2, ~0x27, ~0)|(ASI(~0)^(1<<12)), "1,2,d", 0, v9
},
683 { "srax", F3(2, 0x27, 1)|(1<<12), F3(~2, ~0x27, ~1), "1,i,d", 0, v9
},
684 { "srlx", F3(2, 0x26, 0)|(1<<12), F3(~2, ~0x26, ~0)|(ASI(~0)^(1<<12)), "1,2,d", 0, v9
},
685 { "srlx", F3(2, 0x26, 1)|(1<<12), F3(~2, ~0x26, ~1), "1,i,d", 0, v9
},
687 { "mulscc", F3(2, 0x24, 0), F3(~2, ~0x24, ~0)|ASI(~0), "1,2,d", 0, v6
},
688 { "mulscc", F3(2, 0x24, 1), F3(~2, ~0x24, ~1), "1,i,d", 0, v6
},
690 { "divscc", F3(2, 0x1d, 0), F3(~2, ~0x1d, ~0)|ASI(~0), "1,2,d", 0, sparclite
},
691 { "divscc", F3(2, 0x1d, 1), F3(~2, ~0x1d, ~1), "1,i,d", 0, sparclite
},
693 { "scan", F3(2, 0x2c, 0), F3(~2, ~0x2c, ~0)|ASI(~0), "1,2,d", 0, sparclite
},
694 { "scan", F3(2, 0x2c, 1), F3(~2, ~0x2c, ~1), "1,i,d", 0, sparclite
},
696 { "popc", F3(2, 0x2e, 0), F3(~2, ~0x2e, ~0)|RS2_G0
|ASI(~0),"2,d", 0, v9
},
697 { "popc", F3(2, 0x2e, 1), F3(~2, ~0x2e, ~1)|RS2_G0
, "i,d", 0, v9
},
699 { "clr", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RD_G0
|RS1_G0
|ASI_RS2(~0), "d", F_ALIAS
, v6
}, /* or %g0,%g0,d */
700 { "clr", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0
|SIMM13(~0), "d", F_ALIAS
, v6
}, /* or %g0,0,d */
701 { "clr", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|RD_G0
|ASI(~0), "[1+2]", F_ALIAS
, v6
},
702 { "clr", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|RD_G0
|ASI_RS2(~0), "[1]", F_ALIAS
, v6
}, /* st %g0,[rs1+%g0] */
703 { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0
, "[1+i]", F_ALIAS
, v6
},
704 { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0
, "[i+1]", F_ALIAS
, v6
},
705 { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0
|RS1_G0
, "[i]", F_ALIAS
, v6
},
706 { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0
|SIMM13(~0), "[1]", F_ALIAS
, v6
}, /* st %g0,[rs1+0] */
708 { "clrb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|RD_G0
|ASI(~0), "[1+2]", F_ALIAS
, v6
},
709 { "clrb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|RD_G0
|ASI_RS2(~0), "[1]", F_ALIAS
, v6
}, /* stb %g0,[rs1+%g0] */
710 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0
, "[1+i]", F_ALIAS
, v6
},
711 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0
, "[i+1]", F_ALIAS
, v6
},
712 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0
|RS1_G0
, "[i]", F_ALIAS
, v6
},
713 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0
|SIMM13(~0), "[1]", F_ALIAS
, v6
}, /* clrb [rs1+0],d */
715 { "clrh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|RD_G0
|ASI(~0), "[1+2]", F_ALIAS
, v6
},
716 { "clrh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|RD_G0
|ASI_RS2(~0), "[1]", F_ALIAS
, v6
}, /* sth %g0,[rs1+%g0] */
717 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0
, "[1+i]", F_ALIAS
, v6
},
718 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0
, "[i+1]", F_ALIAS
, v6
},
719 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0
|RS1_G0
, "[i]", F_ALIAS
, v6
},
720 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0
|SIMM13(~0), "[1]", F_ALIAS
, v6
}, /* clrb [rs1+0],d */
722 { "orcc", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|ASI(~0), "1,2,d", 0, v6
},
723 { "orcc", F3(2, 0x12, 1), F3(~2, ~0x12, ~1), "1,i,d", 0, v6
},
724 { "orcc", F3(2, 0x12, 1), F3(~2, ~0x12, ~1), "i,1,d", 0, v6
},
726 /* This is not a commutative instruction. */
727 { "orncc", F3(2, 0x16, 0), F3(~2, ~0x16, ~0)|ASI(~0), "1,2,d", 0, v6
},
728 { "orncc", F3(2, 0x16, 1), F3(~2, ~0x16, ~1), "1,i,d", 0, v6
},
730 /* This is not a commutative instruction. */
731 { "orn", F3(2, 0x06, 0), F3(~2, ~0x06, ~0)|ASI(~0), "1,2,d", 0, v6
},
732 { "orn", F3(2, 0x06, 1), F3(~2, ~0x06, ~1), "1,i,d", 0, v6
},
734 { "tst", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0
|ASI_RS2(~0), "1", 0, v6
}, /* orcc rs1, %g0, %g0 */
735 { "tst", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0
|RS1_G0
|ASI(~0), "2", 0, v6
}, /* orcc %g0, rs2, %g0 */
736 { "tst", F3(2, 0x12, 1), F3(~2, ~0x12, ~1)|RD_G0
|SIMM13(~0), "1", 0, v6
}, /* orcc rs1, 0, %g0 */
738 { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0), "1,2,m", 0, v8
}, /* wr r,r,%asrX */
739 { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0
|ASI(~0), "1,2,y", 0, v6
}, /* wr r,r,%y */
740 { "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "1,i,m", 0, v8
}, /* wr r,i,%asrX */
741 { "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0
, "1,i,y", 0, v6
}, /* wr r,i,%y */
742 { "wr", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0
|ASI(~0), "1,2,p", 0, v6
}, /* wr r,r,%psr */
743 { "wr", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0
, "1,i,p", 0, v6
}, /* wr r,i,%psr */
744 { "wr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0
|ASI(~0), "1,2,w", 0, v6
}, /* wr r,r,%wim */
745 { "wr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0
, "1,i,w", 0, v6
}, /* wr r,i,%wim */
746 { "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0
|ASI(~0), "1,2,t", 0, v6
}, /* wr r,r,%tbr */
747 { "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0
|ASI(~0), "1,2,o", 0, v9
}, /* wr r,r,%asi */
748 { "wr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0
, "1,i,t", 0, v6
}, /* wr r,i,%tbr */
749 { "wr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0
, "1,i,o", 0, v9
}, /* wr r,i,%asi */
751 { "wr", F3(2, 0x30, 0)|RD(0), F3(~2, ~0x30, ~0)|RD(~0)|ASI(~0), "1,2,y", 0, v9
},
752 { "wr", F3(2, 0x30, 1)|RD(0), F3(~2, ~0x30, ~1)|RD(~0), "1,i,y", 0, v9
},
753 { "wr", F3(2, 0x30, 0)|RD(2), F3(~2, ~0x30, ~0)|RD(~2)|ASI(~0), "1,2,E", 0, v9
},
754 { "wr", F3(2, 0x30, 1)|RD(2), F3(~2, ~0x30, ~1)|RD(~2), "1,i,E", 0, v9
},
755 { "wr", F3(2, 0x30, 0)|RD(3), F3(~2, ~0x30, ~0)|RD(~3)|ASI(~0), "1,2,o", 0, v9
},
756 { "wr", F3(2, 0x30, 1)|RD(3), F3(~2, ~0x30, ~1)|RD(~3), "1,i,o", 0, v9
},
757 { "wr", F3(2, 0x30, 0)|RD(6), F3(~2, ~0x30, ~0)|RD(~6)|ASI(~0), "1,2,s", 0, v9
},
758 { "wr", F3(2, 0x30, 1)|RD(6), F3(~2, ~0x30, ~1)|RD(~6), "1,i,s", 0, v9
},
760 { "rd", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|SIMM13(~0), "M,d", 0, v8
}, /* rd %asr1,r */
761 { "rd", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|RS1_G0
|SIMM13(~0), "y,d", 0, v6
}, /* rd %y,r */
762 { "rd", F3(2, 0x29, 0), F3(~2, ~0x29, ~0)|RS1_G0
|SIMM13(~0), "p,d", 0, v6
}, /* rd %psr,r */
763 { "rd", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|RS1_G0
|SIMM13(~0), "w,d", 0, v6
}, /* rd %wim,r */
764 { "rd", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RS1_G0
|SIMM13(~0), "t,d", 0, v6
}, /* rd %tbr,r */
766 { "rd", F3(2, 0x28, 0)|RS1(2), F3(~2, ~0x28, ~0)|RS1(~2)|SIMM13(~0), "E,d", 0, v9
}, /* rd %ccr,r */
767 { "rd", F3(2, 0x28, 0)|RS1(3), F3(~2, ~0x28, ~0)|RS1(~3)|SIMM13(~0), "o,d", 0, v9
}, /* rd %asi,r */
768 { "rd", F3(2, 0x28, 0)|RS1(4), F3(~2, ~0x28, ~0)|RS1(~4)|SIMM13(~0), "W,d", 0, v9
}, /* rd %tick,r */
769 { "rd", F3(2, 0x28, 0)|RS1(5), F3(~2, ~0x28, ~0)|RS1(~5)|SIMM13(~0), "P,d", 0, v9
}, /* rd %pc,r */
770 { "rd", F3(2, 0x2b, 0)|RS1(6), F3(~2, ~0x2b, ~0)|RS1(~6)|SIMM13(~0), "s,d", 0, v9
}, /* rd %fprs,r */
772 { "rdpr", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|SIMM13(~0), "?,d", 0, v9
}, /* rdpr %priv_reg,r */
773 { "wrpr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|SIMM13(~0), "1,2,!", 0, v9
},
774 { "wrpr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|SIMM13(~0), "1,!", 0, v9
},
775 { "wrpr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|SIMM13(~0), "!", 0, v9
},
776 { "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "1,i,!", 0, v9
},
777 { "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "i,1,!", 0, v9
},
778 { "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "i,!", 0, v9
},
780 { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0), "1,2,m", F_ALIAS
, v8
}, /* wr r,r,%asrX */
781 { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0
|ASI(~0), "1,2,y", F_ALIAS
, v6
}, /* wr r,r,%y */
782 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "1,i,m", F_ALIAS
, v8
}, /* wr r,i,%asrX */
783 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0
, "1,i,y", F_ALIAS
, v6
}, /* wr r,i,%y */
784 { "mov", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0
|ASI(~0), "1,2,p", F_ALIAS
, v6
}, /* wr r,r,%psr */
785 { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0
, "1,i,p", F_ALIAS
, v6
}, /* wr r,i,%psr */
786 { "mov", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0
|ASI(~0), "1,2,w", F_ALIAS
, v6
}, /* wr r,r,%wim */
787 { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0
, "1,i,w", F_ALIAS
, v6
}, /* wr r,i,%wim */
788 { "mov", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0
|ASI(~0), "1,2,t", F_ALIAS
, v6
}, /* wr r,r,%tbr */
789 { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0
, "1,i,t", F_ALIAS
, v6
}, /* wr r,i,%tbr */
791 { "mov", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|SIMM13(~0), "M,d", F_ALIAS
, v8
}, /* rd %asr1,r */
792 { "mov", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|RS1_G0
|SIMM13(~0), "y,d", F_ALIAS
, v6
}, /* rd %y,r */
793 { "mov", F3(2, 0x29, 0), F3(~2, ~0x29, ~0)|RS1_G0
|SIMM13(~0), "p,d", F_ALIAS
, v6
}, /* rd %psr,r */
794 { "mov", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|RS1_G0
|SIMM13(~0), "w,d", F_ALIAS
, v6
}, /* rd %wim,r */
795 { "mov", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RS1_G0
|SIMM13(~0), "t,d", F_ALIAS
, v6
}, /* rd %tbr,r */
797 { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI_RS2(~0), "1,y", F_ALIAS
, v6
}, /* wr rs1,%g0,%y */
798 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "i,y", F_ALIAS
, v6
},
799 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|SIMM13(~0), "1,y", F_ALIAS
, v6
}, /* wr rs1,0,%y */
800 { "mov", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|ASI_RS2(~0), "1,p", F_ALIAS
, v6
}, /* wr rs1,%g0,%psr */
801 { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1), "i,p", F_ALIAS
, v6
},
802 { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|SIMM13(~0), "1,p", F_ALIAS
, v6
}, /* wr rs1,0,%psr */
803 { "mov", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|ASI_RS2(~0), "1,w", F_ALIAS
, v6
}, /* wr rs1,%g0,%wim */
804 { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "i,w", F_ALIAS
, v6
},
805 { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|SIMM13(~0), "1,w", F_ALIAS
, v6
}, /* wr rs1,0,%wim */
806 { "mov", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|ASI_RS2(~0), "1,t", F_ALIAS
, v6
}, /* wr rs1,%g0,%tbr */
807 { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1), "i,t", F_ALIAS
, v6
},
808 { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|SIMM13(~0), "1,t", F_ALIAS
, v6
}, /* wr rs1,0,%tbr */
810 { "mov", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RS1_G0
|ASI(~0), "2,d", 0, v6
}, /* or %g0,rs2,d */
811 { "mov", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0
, "i,d", 0, v6
}, /* or %g0,i,d */
812 { "mov", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI_RS2(~0), "1,d", 0, v6
}, /* or rs1,%g0,d */
813 { "mov", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|SIMM13(~0), "1,d", 0, v6
}, /* or rs1,0,d */
815 { "or", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0), "1,2,d", 0, v6
},
816 { "or", F3(2, 0x02, 1), F3(~2, ~0x02, ~1), "1,i,d", 0, v6
},
817 { "or", F3(2, 0x02, 1), F3(~2, ~0x02, ~1), "i,1,d", 0, v6
},
819 { "bset", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0), "2,r", F_ALIAS
, v6
}, /* or rd,rs2,rd */
820 { "bset", F3(2, 0x02, 1), F3(~2, ~0x02, ~1), "i,r", F_ALIAS
, v6
}, /* or rd,i,rd */
822 /* This is not a commutative instruction. */
823 { "andn", F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0), "1,2,d", 0, v6
},
824 { "andn", F3(2, 0x05, 1), F3(~2, ~0x05, ~1), "1,i,d", 0, v6
},
826 /* This is not a commutative instruction. */
827 { "andncc", F3(2, 0x15, 0), F3(~2, ~0x15, ~0)|ASI(~0), "1,2,d", 0, v6
},
828 { "andncc", F3(2, 0x15, 1), F3(~2, ~0x15, ~1), "1,i,d", 0, v6
},
830 { "bclr", F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0), "2,r", F_ALIAS
, v6
}, /* andn rd,rs2,rd */
831 { "bclr", F3(2, 0x05, 1), F3(~2, ~0x05, ~1), "i,r", F_ALIAS
, v6
}, /* andn rd,i,rd */
833 { "cmp", F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|RD_G0
|ASI(~0), "1,2", 0, v6
}, /* subcc rs1,rs2,%g0 */
834 { "cmp", F3(2, 0x14, 1), F3(~2, ~0x14, ~1)|RD_G0
, "1,i", 0, v6
}, /* subcc rs1,i,%g0 */
836 { "sub", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|ASI(~0), "1,2,d", 0, v6
},
837 { "sub", F3(2, 0x04, 1), F3(~2, ~0x04, ~1), "1,i,d", 0, v6
},
839 { "subcc", F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|ASI(~0), "1,2,d", 0, v6
},
840 { "subcc", F3(2, 0x14, 1), F3(~2, ~0x14, ~1), "1,i,d", 0, v6
},
842 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
843 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
844 { "subx", F3(2, 0x0c, 0), F3(~2, ~0x0c, ~0)|ASI(~0), "1,2,d", F_ALIAS
, v6
},
845 { "subx", F3(2, 0x0c, 1), F3(~2, ~0x0c, ~1), "1,i,d", F_ALIAS
, v6
},
846 { "subc", F3(2, 0x0c, 0), F3(~2, ~0x0c, ~0)|ASI(~0), "1,2,d", 0, v9
},
847 { "subc", F3(2, 0x0c, 1), F3(~2, ~0x0c, ~1), "1,i,d", 0, v9
},
849 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
850 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
851 { "subxcc", F3(2, 0x1c, 0), F3(~2, ~0x1c, ~0)|ASI(~0), "1,2,d", F_ALIAS
, v6
},
852 { "subxcc", F3(2, 0x1c, 1), F3(~2, ~0x1c, ~1), "1,i,d", F_ALIAS
, v6
},
853 { "subccc", F3(2, 0x1c, 0), F3(~2, ~0x1c, ~0)|ASI(~0), "1,2,d", 0, v9
},
854 { "subccc", F3(2, 0x1c, 1), F3(~2, ~0x1c, ~1), "1,i,d", 0, v9
},
856 { "and", F3(2, 0x01, 0), F3(~2, ~0x01, ~0)|ASI(~0), "1,2,d", 0, v6
},
857 { "and", F3(2, 0x01, 1), F3(~2, ~0x01, ~1), "1,i,d", 0, v6
},
858 { "and", F3(2, 0x01, 1), F3(~2, ~0x01, ~1), "i,1,d", 0, v6
},
860 { "andcc", F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|ASI(~0), "1,2,d", 0, v6
},
861 { "andcc", F3(2, 0x11, 1), F3(~2, ~0x11, ~1), "1,i,d", 0, v6
},
862 { "andcc", F3(2, 0x11, 1), F3(~2, ~0x11, ~1), "i,1,d", 0, v6
},
864 { "dec", F3(2, 0x04, 1)|SIMM13(0x1), F3(~2, ~0x04, ~1)|SIMM13(~0x0001), "r", F_ALIAS
, v6
}, /* sub rd,1,rd */
865 { "dec", F3(2, 0x04, 1), F3(~2, ~0x04, ~1), "i,r", F_ALIAS
, v8
}, /* sub rd,imm,rd */
866 { "deccc", F3(2, 0x14, 1)|SIMM13(0x1), F3(~2, ~0x14, ~1)|SIMM13(~0x0001), "r", F_ALIAS
, v6
}, /* subcc rd,1,rd */
867 { "deccc", F3(2, 0x14, 1), F3(~2, ~0x14, ~1), "i,r", F_ALIAS
, v8
}, /* subcc rd,imm,rd */
868 { "inc", F3(2, 0x00, 1)|SIMM13(0x1), F3(~2, ~0x00, ~1)|SIMM13(~0x0001), "r", F_ALIAS
, v6
}, /* add rd,1,rd */
869 { "inc", F3(2, 0x00, 1), F3(~2, ~0x00, ~1), "i,r", F_ALIAS
, v8
}, /* add rd,imm,rd */
870 { "inccc", F3(2, 0x10, 1)|SIMM13(0x1), F3(~2, ~0x10, ~1)|SIMM13(~0x0001), "r", F_ALIAS
, v6
}, /* addcc rd,1,rd */
871 { "inccc", F3(2, 0x10, 1), F3(~2, ~0x10, ~1), "i,r", F_ALIAS
, v8
}, /* addcc rd,imm,rd */
873 { "btst", F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|RD_G0
|ASI(~0), "1,2", F_ALIAS
, v6
}, /* andcc rs1,rs2,%g0 */
874 { "btst", F3(2, 0x11, 1), F3(~2, ~0x11, ~1)|RD_G0
, "i,1", F_ALIAS
, v6
}, /* andcc rs1,i,%g0 */
876 { "neg", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0
|ASI(~0), "2,d", F_ALIAS
, v6
}, /* sub %g0,rs2,rd */
877 { "neg", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0
|ASI(~0), "r", F_ALIAS
, v6
}, /* sub %g0,rd,rd */
879 { "add", F3(2, 0x00, 0), F3(~2, ~0x00, ~0)|ASI(~0), "1,2,d", 0, v6
},
880 { "add", F3(2, 0x00, 1), F3(~2, ~0x00, ~1), "1,i,d", 0, v6
},
881 { "add", F3(2, 0x00, 1), F3(~2, ~0x00, ~1), "i,1,d", 0, v6
},
882 { "addcc", F3(2, 0x10, 0), F3(~2, ~0x10, ~0)|ASI(~0), "1,2,d", 0, v6
},
883 { "addcc", F3(2, 0x10, 1), F3(~2, ~0x10, ~1), "1,i,d", 0, v6
},
884 { "addcc", F3(2, 0x10, 1), F3(~2, ~0x10, ~1), "i,1,d", 0, v6
},
885 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
886 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
887 { "addx", F3(2, 0x08, 0), F3(~2, ~0x08, ~0)|ASI(~0), "1,2,d", F_ALIAS
, v6
},
888 { "addx", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "1,i,d", F_ALIAS
, v6
},
889 { "addx", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "i,1,d", F_ALIAS
, v6
},
890 { "addc", F3(2, 0x08, 0), F3(~2, ~0x08, ~0)|ASI(~0), "1,2,d", 0, v9
},
891 { "addc", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "1,i,d", 0, v9
},
892 { "addc", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "i,1,d", 0, v9
},
893 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
894 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
895 { "addxcc", F3(2, 0x18, 0), F3(~2, ~0x18, ~0)|ASI(~0), "1,2,d", F_ALIAS
, v6
},
896 { "addxcc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "1,i,d", F_ALIAS
, v6
},
897 { "addxcc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "i,1,d", F_ALIAS
, v6
},
898 { "addccc", F3(2, 0x18, 0), F3(~2, ~0x18, ~0)|ASI(~0), "1,2,d", 0, v9
},
899 { "addccc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "1,i,d", 0, v9
},
900 { "addccc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "i,1,d", 0, v9
},
902 { "smul", F3(2, 0x0b, 0), F3(~2, ~0x0b, ~0)|ASI(~0), "1,2,d", 0, v8
},
903 { "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1), "1,i,d", 0, v8
},
904 { "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1), "i,1,d", 0, v8
},
905 { "smulcc", F3(2, 0x1b, 0), F3(~2, ~0x1b, ~0)|ASI(~0), "1,2,d", 0, v8
},
906 { "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1), "1,i,d", 0, v8
},
907 { "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1), "i,1,d", 0, v8
},
908 { "umul", F3(2, 0x0a, 0), F3(~2, ~0x0a, ~0)|ASI(~0), "1,2,d", 0, v8
},
909 { "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1), "1,i,d", 0, v8
},
910 { "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1), "i,1,d", 0, v8
},
911 { "umulcc", F3(2, 0x1a, 0), F3(~2, ~0x1a, ~0)|ASI(~0), "1,2,d", 0, v8
},
912 { "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1), "1,i,d", 0, v8
},
913 { "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1), "i,1,d", 0, v8
},
914 { "sdiv", F3(2, 0x0f, 0), F3(~2, ~0x0f, ~0)|ASI(~0), "1,2,d", 0, v8
},
915 { "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1), "1,i,d", 0, v8
},
916 { "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1), "i,1,d", 0, v8
},
917 { "sdivcc", F3(2, 0x1f, 0), F3(~2, ~0x1f, ~0)|ASI(~0), "1,2,d", 0, v8
},
918 { "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1), "1,i,d", 0, v8
},
919 { "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1), "i,1,d", 0, v8
},
920 { "udiv", F3(2, 0x0e, 0), F3(~2, ~0x0e, ~0)|ASI(~0), "1,2,d", 0, v8
},
921 { "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1), "1,i,d", 0, v8
},
922 { "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1), "i,1,d", 0, v8
},
923 { "udivcc", F3(2, 0x1e, 0), F3(~2, ~0x1e, ~0)|ASI(~0), "1,2,d", 0, v8
},
924 { "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1), "1,i,d", 0, v8
},
925 { "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1), "i,1,d", 0, v8
},
927 { "mulx", F3(2, 0x09, 0), F3(~2, ~0x09, ~0)|ASI(~0), "1,2,d", 0, v9
},
928 { "mulx", F3(2, 0x09, 1), F3(~2, ~0x09, ~1), "1,i,d", 0, v9
},
929 { "sdivx", F3(2, 0x2d, 0), F3(~2, ~0x2d, ~0)|ASI(~0), "1,2,d", 0, v9
},
930 { "sdivx", F3(2, 0x2d, 1), F3(~2, ~0x2d, ~1), "1,i,d", 0, v9
},
931 { "udivx", F3(2, 0x0d, 0), F3(~2, ~0x0d, ~0)|ASI(~0), "1,2,d", 0, v9
},
932 { "udivx", F3(2, 0x0d, 1), F3(~2, ~0x0d, ~1), "1,i,d", 0, v9
},
934 { "call", F1(0x1), F1(~0x1), "L", F_DELAYED
, v6
},
935 { "call", F1(0x1), F1(~0x1), "L,#", F_DELAYED
, v6
},
936 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI_RS2(~0), "1", F_DELAYED
, v6
}, /* jmpl rs1+%g0, %o7 */
937 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI_RS2(~0), "1,#", F_DELAYED
, v6
},
939 /* Conditional instructions.
941 Because this part of the table was such a mess earlier, I have
942 macrofied it so that all the branches and traps are generated from
943 a single-line description of each condition value. John Gilmore. */
945 /* Define branches -- one annulled, one without, etc. */
946 #define br(opcode, mask, lose, flags) \
947 { opcode, (mask)|ANNUL, (lose), ",a l", (flags), v6 }, \
948 { opcode, (mask) , (lose)|ANNUL, "l", (flags), v6 }
950 #define brx(opcode, mask, lose, flags) /* v9 */ \
951 { opcode, (mask)|(2<<20), (lose)|ANNUL|BPRED, "Z,G", (flags), v9 }, \
952 { opcode, (mask)|(2<<20), (lose)|ANNUL|BPRED, ",N Z,G", (flags), v9 }, \
953 { opcode, (mask)|(2<<20)|ANNUL, (lose)|BPRED, ",a Z,G", (flags), v9 }, \
954 { opcode, (mask)|(2<<20)|ANNUL, (lose)|BPRED, ",a,N Z,G", (flags), v9 }, \
955 { opcode, (mask)|(2<<20)|BPRED, (lose)|ANNUL, ",T Z,G", (flags), v9 }, \
956 { opcode, (mask)|(2<<20)|ANNUL|BPRED, (lose), ",a,T Z,G", (flags), v9 }, \
957 { opcode, (mask), (lose)|(2<<20)|ANNUL|BPRED, "z,G", (flags), v9 }, \
958 { opcode, (mask), (lose)|(2<<20)|ANNUL|BPRED, ",N z,G", (flags), v9 }, \
959 { opcode, (mask)|ANNUL, (lose)|(2<<20)|BPRED, ",a z,G", (flags), v9 }, \
960 { opcode, (mask)|ANNUL, (lose)|(2<<20)|BPRED, ",a,N z,G", (flags), v9 }, \
961 { opcode, (mask)|BPRED, (lose)|(2<<20)|ANNUL, ",T z,G", (flags), v9 }, \
962 { opcode, (mask)|ANNUL|BPRED, (lose)|(2<<20), ",a,T z,G", (flags), v9 }
964 /* Define four traps: reg+reg, reg + immediate, immediate alone, reg alone. */
965 #define tr(opcode, mask, lose, flags) \
966 { opcode, (mask)|(2<<11)|IMMED, (lose)|RS1_G0, "Z,i", (flags), v9 }, /* %g0 + imm */ \
967 { opcode, (mask)|(2<<11)|IMMED, (lose), "Z,1+i", (flags), v9 }, /* rs1 + imm */ \
968 { opcode, (mask)|(2<<11), IMMED|(lose), "Z,1+2", (flags), v9 }, /* rs1 + rs2 */ \
969 { opcode, (mask)|(2<<11), IMMED|(lose)|RS2_G0, "Z,1", (flags), v9 }, /* rs1 + %g0 */ \
970 { opcode, (mask)|IMMED, (lose)|RS1_G0, "z,i", (flags)|F_ALIAS, v9 }, /* %g0 + imm */ \
971 { opcode, (mask)|IMMED, (lose), "z,1+i", (flags)|F_ALIAS, v9 }, /* rs1 + imm */ \
972 { opcode, (mask), IMMED|(lose), "z,1+2", (flags)|F_ALIAS, v9 }, /* rs1 + rs2 */ \
973 { opcode, (mask), IMMED|(lose)|RS2_G0, "z,1", (flags)|F_ALIAS, v9 }, /* rs1 + %g0 */ \
974 { opcode, (mask)|IMMED, (lose)|RS1_G0, "i", (flags), v6 }, /* %g0 + imm */ \
975 { opcode, (mask)|IMMED, (lose), "1+i", (flags), v6 }, /* rs1 + imm */ \
976 { opcode, (mask), IMMED|(lose), "1+2", (flags), v6 }, /* rs1 + rs2 */ \
977 { opcode, (mask), IMMED|(lose)|RS2_G0, "1", (flags), v6 } /* rs1 + %g0 */
979 /* v9: We must put `brx' before `br', to ensure that we never match something
980 v9: against an expression unless it is an expression. Otherwise, we end
981 v9: up with undefined symbol tables entries, because they get added, but
982 v9: are not deleted if the pattern fails to match. */
984 /* Define both branches and traps based on condition mask */
985 #define cond(bop, top, mask, flags) \
986 brx(bop, F2(0, 1)|(mask), F2(~0, ~1)|((~mask)&COND(~0)), F_DELAYED|(flags)), /* v9 */ \
987 br(bop, F2(0, 2)|(mask), F2(~0, ~2)|((~mask)&COND(~0)), F_DELAYED|(flags)), \
988 tr(top, F3(2, 0x3a, 0)|(mask), F3(~2, ~0x3a, 0)|((~mask)&COND(~0)), (flags))
990 /* Define all the conditions, all the branches, all the traps. */
992 cond ("b", "t", CONDA
, 0),
993 cond ("ba", "ta", CONDA
, F_ALIAS
), /* for nothing */
994 cond ("bcc", "tcc", CONDCC
, 0),
995 cond ("bcs", "tcs", CONDCS
, 0),
996 cond ("be", "te", CONDE
, 0),
997 cond ("bg", "tg", CONDG
, 0),
998 cond ("bgt", "tgt", CONDG
, F_ALIAS
),
999 cond ("bge", "tge", CONDGE
, 0),
1000 cond ("bgeu", "tgeu", CONDGEU
, F_ALIAS
), /* for cc */
1001 cond ("bgu", "tgu", CONDGU
, 0),
1002 cond ("bl", "tl", CONDL
, 0),
1003 cond ("blt", "tlt", CONDL
, F_ALIAS
),
1004 cond ("ble", "tle", CONDLE
, 0),
1005 cond ("bleu", "tleu", CONDLEU
, 0),
1006 cond ("blu", "tlu", CONDLU
, F_ALIAS
), /* for cs */
1007 cond ("bn", "tn", CONDN
, 0),
1008 cond ("bne", "tne", CONDNE
, 0),
1009 cond ("bneg", "tneg", CONDNEG
, 0),
1010 cond ("bnz", "tnz", CONDNZ
, F_ALIAS
), /* for ne */
1011 cond ("bpos", "tpos", CONDPOS
, 0),
1012 cond ("bvc", "tvc", CONDVC
, 0),
1013 cond ("bvs", "tvs", CONDVS
, 0),
1014 cond ("bz", "tz", CONDZ
, F_ALIAS
), /* for e */
1021 #define brr(opcode, mask, lose, flags) /* v9 */ \
1022 { opcode, (mask), (lose)|ANNUL|BPRED, "1,k", F_DELAYED|(flags), v9 }, \
1023 { opcode, (mask), (lose)|ANNUL|BPRED, ",N 1,k", F_DELAYED|(flags), v9 }, \
1024 { opcode, (mask)|ANNUL, (lose)|BPRED, ",a 1,k", F_DELAYED|(flags), v9 }, \
1025 { opcode, (mask)|ANNUL, (lose)|BPRED, ",a,N 1,k", F_DELAYED|(flags), v9 }, \
1026 { opcode, (mask)|BPRED, (lose)|ANNUL, ",T 1,k", F_DELAYED|(flags), v9 }, \
1027 { opcode, (mask)|ANNUL|BPRED, (lose), ",a,T 1,k", F_DELAYED|(flags), v9 }
1029 #define condr(bop, mask, flags) /* v9 */ \
1030 brr(bop, F2(0, 3)|COND(mask), F2(~0, ~3)|COND(~(mask)), (flags)) /* v9 */
1032 /* v9 */ condr("brnz", 0x5, 0),
1033 /* v9 */ condr("brz", 0x1, 0),
1034 /* v9 */ condr("brgez", 0x7, 0),
1035 /* v9 */ condr("brlz", 0x3, 0),
1036 /* v9 */ condr("brlez", 0x2, 0),
1037 /* v9 */ condr("brgz", 0x6, 0),
1039 #undef condr /* v9 */
1042 #define movr(opcode, mask, flags) /* v9 */ \
1043 { opcode, F3(2, 0x2f, 0)|COND(mask), F3(~2, ~0x2f, ~0)|COND(~(mask)), "1,2,d", (flags), v9 }, \
1044 { opcode, F3(2, 0x2f, 1)|COND(mask), F3(~2, ~0x2f, ~1)|COND(~(mask)), "1,j,d", (flags), v9 }
1046 #define fmrrs(opcode, mask, lose, flags) /* v9 */ \
1047 { opcode, (mask), (lose), "1,f,g", (flags), v9 }
1048 #define fmrrd(opcode, mask, lose, flags) /* v9 */ \
1049 { opcode, (mask), (lose), "1,B,H", (flags), v9 }
1050 #define fmrrq(opcode, mask, lose, flags) /* v9 */ \
1051 { opcode, (mask), (lose), "1,R,J", (flags), v9 }
1053 #define fmovrs(mop, mask, flags) /* v9 */ \
1054 fmrrs(mop, F3(2, 0x35, 0)|OPF_LOW5(5)|COND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~5)|COND(~(mask)), (flags)) /* v9 */
1055 #define fmovrd(mop, mask, flags) /* v9 */ \
1056 fmrrd(mop, F3(2, 0x35, 0)|OPF_LOW5(6)|COND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~6)|COND(~(mask)), (flags)) /* v9 */
1057 #define fmovrq(mop, mask, flags) /* v9 */ \
1058 fmrrq(mop, F3(2, 0x35, 0)|OPF_LOW5(7)|COND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~7)|COND(~(mask)), (flags)) /* v9 */
1060 /* v9 */ movr("movrne", 0x5, 0),
1061 /* v9 */ movr("movre", 0x1, 0),
1062 /* v9 */ movr("movrgez", 0x7, 0),
1063 /* v9 */ movr("movrlz", 0x3, 0),
1064 /* v9 */ movr("movrlez", 0x2, 0),
1065 /* v9 */ movr("movrgz", 0x6, 0),
1066 /* v9 */ movr("movrnz", 0x5, F_ALIAS
),
1067 /* v9 */ movr("movrz", 0x1, F_ALIAS
),
1069 /* v9 */ fmovrs("fmovrsne", 0x5, 0),
1070 /* v9 */ fmovrs("fmovrse", 0x1, 0),
1071 /* v9 */ fmovrs("fmovrsgez", 0x7, 0),
1072 /* v9 */ fmovrs("fmovrslz", 0x3, 0),
1073 /* v9 */ fmovrs("fmovrslez", 0x2, 0),
1074 /* v9 */ fmovrs("fmovrsgz", 0x6, 0),
1075 /* v9 */ fmovrs("fmovrsnz", 0x5, F_ALIAS
),
1076 /* v9 */ fmovrs("fmovrsz", 0x1, F_ALIAS
),
1078 /* v9 */ fmovrd("fmovrdne", 0x5, 0),
1079 /* v9 */ fmovrd("fmovrde", 0x1, 0),
1080 /* v9 */ fmovrd("fmovrdgez", 0x7, 0),
1081 /* v9 */ fmovrd("fmovrdlz", 0x3, 0),
1082 /* v9 */ fmovrd("fmovrdlez", 0x2, 0),
1083 /* v9 */ fmovrd("fmovrdgz", 0x6, 0),
1084 /* v9 */ fmovrd("fmovrdnz", 0x5, F_ALIAS
),
1085 /* v9 */ fmovrd("fmovrdz", 0x1, F_ALIAS
),
1087 /* v9 */ fmovrq("fmovrqne", 0x5, 0),
1088 /* v9 */ fmovrq("fmovrqe", 0x1, 0),
1089 /* v9 */ fmovrq("fmovrqgez", 0x7, 0),
1090 /* v9 */ fmovrq("fmovrqlz", 0x3, 0),
1091 /* v9 */ fmovrq("fmovrqlez", 0x2, 0),
1092 /* v9 */ fmovrq("fmovrqgz", 0x6, 0),
1093 /* v9 */ fmovrq("fmovrqnz", 0x5, F_ALIAS
),
1094 /* v9 */ fmovrq("fmovrqz", 0x1, F_ALIAS
),
1096 #undef movr /* v9 */
1097 #undef fmovr /* v9 */
1098 #undef fmrr /* v9 */
1100 { "mova", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDA
,0), MCOND(~FCONDA
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1101 { "mova", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDA
,0), MCOND(~FCONDA
,~0)|FCC(~0)|F3(~2, ~0x2c,~1), "6,I,d", 0, v9
},
1102 { "mova", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDA
,0), MCOND(~FCONDA
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1103 { "mova", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDA
,0), MCOND(~FCONDA
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1104 { "mova", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDA
,0), MCOND(~FCONDA
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1105 { "mova", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDA
,0), MCOND(~FCONDA
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1106 { "mova", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDA
,0), MCOND(~FCONDA
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1107 { "mova", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDA
,0), MCOND(~FCONDA
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1108 { "mova", F3(2, 0x2c, 0)|MCOND(CONDA
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDA
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1109 { "mova", F3(2, 0x2c, 1)|MCOND(CONDA
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDA
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1110 { "mova", F3(2, 0x2c, 0)|MCOND(CONDA
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDA
,~1)|(1<<12), "Z,2,d", 0, v9
},
1111 { "mova", F3(2, 0x2c, 1)|MCOND(CONDA
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDA
,~1)|(1<<12), "Z,I,d", 0, v9
},
1112 { "movcc", F3(2, 0x2c, 0)|MCOND(CONDCC
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDCC
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1113 { "movcc", F3(2, 0x2c, 1)|MCOND(CONDCC
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDCC
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1114 { "movcc", F3(2, 0x2c, 0)|MCOND(CONDCC
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDCC
,~1)|(1<<12), "Z,2,d", 0, v9
},
1115 { "movcc", F3(2, 0x2c, 1)|MCOND(CONDCC
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDCC
,~1)|(1<<12), "Z,I,d", 0, v9
},
1116 { "movgeu", F3(2, 0x2c, 0)|MCOND(CONDGEU
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDGEU
,~1)|XCC
|(1<<12), "z,2,d", F_ALIAS
, v9
},
1117 { "movgeu", F3(2, 0x2c, 1)|MCOND(CONDGEU
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDGEU
,~1)|XCC
|(1<<12), "z,I,d", F_ALIAS
, v9
},
1118 { "movgeu", F3(2, 0x2c, 0)|MCOND(CONDGEU
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDGEU
,~1)|(1<<12), "Z,2,d", F_ALIAS
, v9
},
1119 { "movgeu", F3(2, 0x2c, 1)|MCOND(CONDGEU
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDGEU
,~1)|(1<<12), "Z,I,d", F_ALIAS
, v9
},
1120 { "movcs", F3(2, 0x2c, 0)|MCOND(CONDCS
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDCS
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1121 { "movcs", F3(2, 0x2c, 1)|MCOND(CONDCS
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDCS
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1122 { "movcs", F3(2, 0x2c, 0)|MCOND(CONDCS
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDCS
,~1)|(1<<12), "Z,2,d", 0, v9
},
1123 { "movcs", F3(2, 0x2c, 1)|MCOND(CONDCS
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDCS
,~1)|(1<<12), "Z,I,d", 0, v9
},
1124 { "movlu", F3(2, 0x2c, 0)|MCOND(CONDLU
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDLU
,~1)|XCC
|(1<<12), "z,2,d", F_ALIAS
, v9
},
1125 { "movlu", F3(2, 0x2c, 1)|MCOND(CONDLU
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDLU
,~1)|XCC
|(1<<12), "z,I,d", F_ALIAS
, v9
},
1126 { "movlu", F3(2, 0x2c, 0)|MCOND(CONDLU
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDLU
,~1)|(1<<12), "Z,2,d", F_ALIAS
, v9
},
1127 { "movlu", F3(2, 0x2c, 1)|MCOND(CONDLU
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDLU
,~1)|(1<<12), "Z,I,d", F_ALIAS
, v9
},
1128 { "move", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDE
,0), MCOND(~FCONDE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1129 { "move", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDE
,0), MCOND(~FCONDE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1130 { "move", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDE
,0), MCOND(~FCONDE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1131 { "move", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDE
,0), MCOND(~FCONDE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1132 { "move", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDE
,0), MCOND(~FCONDE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1133 { "move", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDE
,0), MCOND(~FCONDE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1134 { "move", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDE
,0), MCOND(~FCONDE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1135 { "move", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDE
,0), MCOND(~FCONDE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1136 { "move", F3(2, 0x2c, 0)|MCOND(CONDE
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDE
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1137 { "move", F3(2, 0x2c, 1)|MCOND(CONDE
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDE
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1138 { "move", F3(2, 0x2c, 0)|MCOND(CONDE
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDE
,~1)|(1<<12), "Z,2,d", 0, v9
},
1139 { "move", F3(2, 0x2c, 1)|MCOND(CONDE
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDE
,~1)|(1<<12), "Z,I,d", 0, v9
},
1140 { "movg", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDG
,0), MCOND(~FCONDG
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1141 { "movg", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDG
,0), MCOND(~FCONDG
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1142 { "movg", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDG
,0), MCOND(~FCONDG
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1143 { "movg", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDG
,0), MCOND(~FCONDG
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1144 { "movg", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDG
,0), MCOND(~FCONDG
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1145 { "movg", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDG
,0), MCOND(~FCONDG
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1146 { "movg", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDG
,0), MCOND(~FCONDG
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1147 { "movg", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDG
,0), MCOND(~FCONDG
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1148 { "movg", F3(2, 0x2c, 0)|MCOND(CONDG
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDG
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1149 { "movg", F3(2, 0x2c, 1)|MCOND(CONDG
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDG
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1150 { "movg", F3(2, 0x2c, 0)|MCOND(CONDG
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDG
,~1)|(1<<12), "Z,2,d", 0, v9
},
1151 { "movg", F3(2, 0x2c, 1)|MCOND(CONDG
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDG
,~1)|(1<<12), "Z,I,d", 0, v9
},
1152 { "movge", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDGE
,0), MCOND(~FCONDGE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1153 { "movge", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDGE
,0), MCOND(~FCONDGE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1154 { "movge", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDGE
,0), MCOND(~FCONDGE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1155 { "movge", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDGE
,0), MCOND(~FCONDGE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1156 { "movge", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDGE
,0), MCOND(~FCONDGE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1157 { "movge", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDGE
,0), MCOND(~FCONDGE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1158 { "movge", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDGE
,0), MCOND(~FCONDGE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1159 { "movge", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDGE
,0), MCOND(~FCONDGE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1160 { "movge", F3(2, 0x2c, 0)|MCOND(CONDGE
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDGE
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1161 { "movge", F3(2, 0x2c, 1)|MCOND(CONDGE
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDGE
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1162 { "movge", F3(2, 0x2c, 0)|MCOND(CONDGE
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDGE
,~1)|(1<<12), "Z,2,d", 0, v9
},
1163 { "movge", F3(2, 0x2c, 1)|MCOND(CONDGE
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDGE
,~1)|(1<<12), "Z,I,d", 0, v9
},
1164 { "movgu", F3(2, 0x2c, 0)|MCOND(CONDGU
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDGU
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1165 { "movgu", F3(2, 0x2c, 1)|MCOND(CONDGU
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDGU
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1166 { "movgu", F3(2, 0x2c, 0)|MCOND(CONDGU
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDGU
,~1)|(1<<12), "Z,2,d", 0, v9
},
1167 { "movgu", F3(2, 0x2c, 1)|MCOND(CONDGU
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDGU
,~1)|(1<<12), "Z,I,d", 0, v9
},
1168 { "movl", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDL
,0), MCOND(~FCONDL
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1169 { "movl", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDL
,0), MCOND(~FCONDL
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1170 { "movl", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDL
,0), MCOND(~FCONDL
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1171 { "movl", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDL
,0), MCOND(~FCONDL
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1172 { "movl", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDL
,0), MCOND(~FCONDL
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1173 { "movl", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDL
,0), MCOND(~FCONDL
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1174 { "movl", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDL
,0), MCOND(~FCONDL
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1175 { "movl", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDL
,0), MCOND(~FCONDL
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1176 { "movl", F3(2, 0x2c, 0)|MCOND(CONDL
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDL
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1177 { "movl", F3(2, 0x2c, 1)|MCOND(CONDL
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDL
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1178 { "movl", F3(2, 0x2c, 0)|MCOND(CONDL
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDL
,~1)|(1<<12), "Z,2,d", 0, v9
},
1179 { "movl", F3(2, 0x2c, 1)|MCOND(CONDL
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDL
,~1)|(1<<12), "Z,I,d", 0, v9
},
1180 { "movle", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDLE
,0), MCOND(~FCONDLE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1181 { "movle", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDLE
,0), MCOND(~FCONDLE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1182 { "movle", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDLE
,0), MCOND(~FCONDLE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1183 { "movle", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDLE
,0), MCOND(~FCONDLE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1184 { "movle", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDLE
,0), MCOND(~FCONDLE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1185 { "movle", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDLE
,0), MCOND(~FCONDLE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1186 { "movle", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDLE
,0), MCOND(~FCONDLE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1187 { "movle", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDLE
,0), MCOND(~FCONDLE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1188 { "movle", F3(2, 0x2c, 0)|MCOND(CONDLE
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDLE
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1189 { "movle", F3(2, 0x2c, 1)|MCOND(CONDLE
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDLE
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1190 { "movle", F3(2, 0x2c, 0)|MCOND(CONDLE
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDLE
,~1)|(1<<12), "Z,2,d", 0, v9
},
1191 { "movle", F3(2, 0x2c, 1)|MCOND(CONDLE
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDLE
,~1)|(1<<12), "Z,I,d", 0, v9
},
1192 { "movleu", F3(2, 0x2c, 0)|MCOND(CONDLEU
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDLEU
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1193 { "movleu", F3(2, 0x2c, 1)|MCOND(CONDLEU
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDLEU
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1194 { "movleu", F3(2, 0x2c, 0)|MCOND(CONDLEU
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDLEU
,~1)|(1<<12), "Z,2,d", 0, v9
},
1195 { "movleu", F3(2, 0x2c, 1)|MCOND(CONDLEU
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDLEU
,~1)|(1<<12), "Z,I,d", 0, v9
},
1196 { "movlg", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDLG
,0), MCOND(~FCONDLG
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1197 { "movlg", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDLG
,0), MCOND(~FCONDLG
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1198 { "movlg", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDLG
,0), MCOND(~FCONDLG
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1199 { "movlg", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDLG
,0), MCOND(~FCONDLG
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1200 { "movlg", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDLG
,0), MCOND(~FCONDLG
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1201 { "movlg", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDLG
,0), MCOND(~FCONDLG
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1202 { "movlg", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDLG
,0), MCOND(~FCONDLG
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1203 { "movlg", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDLG
,0), MCOND(~FCONDLG
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1204 { "movn", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDN
,0), MCOND(~FCONDN
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1205 { "movn", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDN
,0), MCOND(~FCONDN
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1206 { "movn", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDN
,0), MCOND(~FCONDN
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1207 { "movn", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDN
,0), MCOND(~FCONDN
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1208 { "movn", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDN
,0), MCOND(~FCONDN
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1209 { "movn", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDN
,0), MCOND(~FCONDN
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1210 { "movn", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDN
,0), MCOND(~FCONDN
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1211 { "movn", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDN
,0), MCOND(~FCONDN
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1212 { "movn", F3(2, 0x2c, 0)|MCOND(CONDN
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDN
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1213 { "movn", F3(2, 0x2c, 1)|MCOND(CONDN
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDN
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1214 { "movn", F3(2, 0x2c, 0)|MCOND(CONDN
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDN
,~1)|(1<<12), "Z,2,d", 0, v9
},
1215 { "movn", F3(2, 0x2c, 1)|MCOND(CONDN
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDN
,~1)|(1<<12), "Z,I,d", 0, v9
},
1216 { "movne", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDNE
,0), MCOND(~FCONDNE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1217 { "movne", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDNE
,0), MCOND(~FCONDNE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1218 { "movne", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDNE
,0), MCOND(~FCONDNE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1219 { "movne", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDNE
,0), MCOND(~FCONDNE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1220 { "movne", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDNE
,0), MCOND(~FCONDNE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1221 { "movne", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDNE
,0), MCOND(~FCONDNE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1222 { "movne", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDNE
,0), MCOND(~FCONDNE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1223 { "movne", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDNE
,0), MCOND(~FCONDNE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1224 { "movne", F3(2, 0x2c, 0)|MCOND(CONDNE
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDNE
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1225 { "movne", F3(2, 0x2c, 1)|MCOND(CONDNE
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDNE
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1226 { "movne", F3(2, 0x2c, 0)|MCOND(CONDNE
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDNE
,~1)|(1<<12), "Z,2,d", 0, v9
},
1227 { "movne", F3(2, 0x2c, 1)|MCOND(CONDNE
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDNE
,~1)|(1<<12), "Z,I,d", 0, v9
},
1228 { "movneg", F3(2, 0x2c, 0)|MCOND(CONDNEG
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDNEG
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1229 { "movneg", F3(2, 0x2c, 1)|MCOND(CONDNEG
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDNEG
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1230 { "movneg", F3(2, 0x2c, 0)|MCOND(CONDNEG
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDNEG
,~1)|(1<<12), "Z,2,d", 0, v9
},
1231 { "movneg", F3(2, 0x2c, 1)|MCOND(CONDNEG
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDNEG
,~1)|(1<<12), "Z,I,d", 0, v9
},
1232 { "movnz", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDNZ
,0), MCOND(~FCONDNZ
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", F_ALIAS
, v9
},
1233 { "movnz", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDNZ
,0), MCOND(~FCONDNZ
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", F_ALIAS
, v9
},
1234 { "movnz", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDNZ
,0), MCOND(~FCONDNZ
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", F_ALIAS
, v9
},
1235 { "movnz", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDNZ
,0), MCOND(~FCONDNZ
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", F_ALIAS
, v9
},
1236 { "movnz", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDNZ
,0), MCOND(~FCONDNZ
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", F_ALIAS
, v9
},
1237 { "movnz", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDNZ
,0), MCOND(~FCONDNZ
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", F_ALIAS
, v9
},
1238 { "movnz", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDNZ
,0), MCOND(~FCONDNZ
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", F_ALIAS
, v9
},
1239 { "movnz", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDNZ
,0), MCOND(~FCONDNZ
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", F_ALIAS
, v9
},
1240 { "movnz", F3(2, 0x2c, 0)|MCOND(CONDNZ
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDNZ
,~1)|XCC
|(1<<12), "z,2,d", F_ALIAS
, v9
},
1241 { "movnz", F3(2, 0x2c, 1)|MCOND(CONDNZ
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDNZ
,~1)|XCC
|(1<<12), "z,I,d", F_ALIAS
, v9
},
1242 { "movnz", F3(2, 0x2c, 0)|MCOND(CONDNZ
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDNZ
,~1)|(1<<12), "Z,2,d", F_ALIAS
, v9
},
1243 { "movnz", F3(2, 0x2c, 1)|MCOND(CONDNZ
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDNZ
,~1)|(1<<12), "Z,I,d", F_ALIAS
, v9
},
1244 { "movo", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDO
,0), MCOND(~FCONDO
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1245 { "movo", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDO
,0), MCOND(~FCONDO
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1246 { "movo", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDO
,0), MCOND(~FCONDO
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1247 { "movo", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDO
,0), MCOND(~FCONDO
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1248 { "movo", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDO
,0), MCOND(~FCONDO
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1249 { "movo", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDO
,0), MCOND(~FCONDO
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1250 { "movo", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDO
,0), MCOND(~FCONDO
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1251 { "movo", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDO
,0), MCOND(~FCONDO
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1252 { "movpos", F3(2, 0x2c, 0)|MCOND(CONDPOS
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDPOS
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1253 { "movpos", F3(2, 0x2c, 1)|MCOND(CONDPOS
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDPOS
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1254 { "movpos", F3(2, 0x2c, 0)|MCOND(CONDPOS
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDPOS
,~1)|(1<<12), "Z,2,d", 0, v9
},
1255 { "movpos", F3(2, 0x2c, 1)|MCOND(CONDPOS
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDPOS
,~1)|(1<<12), "Z,I,d", 0, v9
},
1256 { "movu", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDU
,0), MCOND(~FCONDU
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1257 { "movu", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDU
,0), MCOND(~FCONDU
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1258 { "movu", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDU
,0), MCOND(~FCONDU
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1259 { "movu", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDU
,0), MCOND(~FCONDU
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1260 { "movu", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDU
,0), MCOND(~FCONDU
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1261 { "movu", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDU
,0), MCOND(~FCONDU
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1262 { "movu", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDU
,0), MCOND(~FCONDU
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1263 { "movu", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDU
,0), MCOND(~FCONDU
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1264 { "movue", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDUE
,0), MCOND(~FCONDUE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1265 { "movue", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDUE
,0), MCOND(~FCONDUE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1266 { "movue", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDUE
,0), MCOND(~FCONDUE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1267 { "movue", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDUE
,0), MCOND(~FCONDUE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1268 { "movue", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDUE
,0), MCOND(~FCONDUE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1269 { "movue", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDUE
,0), MCOND(~FCONDUE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1270 { "movue", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDUE
,0), MCOND(~FCONDUE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1271 { "movue", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDUE
,0), MCOND(~FCONDUE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1272 { "movug", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDUG
,0), MCOND(~FCONDUG
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1273 { "movug", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDUG
,0), MCOND(~FCONDUG
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1274 { "movug", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDUG
,0), MCOND(~FCONDUG
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1275 { "movug", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDUG
,0), MCOND(~FCONDUG
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1276 { "movug", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDUG
,0), MCOND(~FCONDUG
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1277 { "movug", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDUG
,0), MCOND(~FCONDUG
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1278 { "movug", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDUG
,0), MCOND(~FCONDUG
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1279 { "movug", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDUG
,0), MCOND(~FCONDUG
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1280 { "movuge", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDUGE
,0), MCOND(~FCONDUGE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1281 { "movuge", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDUGE
,0), MCOND(~FCONDUGE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1282 { "movuge", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDUGE
,0), MCOND(~FCONDUGE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1283 { "movuge", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDUGE
,0), MCOND(~FCONDUGE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1284 { "movuge", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDUGE
,0), MCOND(~FCONDUGE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1285 { "movuge", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDUGE
,0), MCOND(~FCONDUGE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1286 { "movuge", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDUGE
,0), MCOND(~FCONDUGE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1287 { "movuge", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDUGE
,0), MCOND(~FCONDUGE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1288 { "movul", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDUL
,0), MCOND(~FCONDUL
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1289 { "movul", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDUL
,0), MCOND(~FCONDUL
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1290 { "movul", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDUL
,0), MCOND(~FCONDUL
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1291 { "movul", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDUL
,0), MCOND(~FCONDUL
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1292 { "movul", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDUL
,0), MCOND(~FCONDUL
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1293 { "movul", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDUL
,0), MCOND(~FCONDUL
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1294 { "movul", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDUL
,0), MCOND(~FCONDUL
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1295 { "movul", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDUL
,0), MCOND(~FCONDUL
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1296 { "movule", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDULE
,0), MCOND(~FCONDULE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9
},
1297 { "movule", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDULE
,0), MCOND(~FCONDULE
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9
},
1298 { "movule", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDULE
,0), MCOND(~FCONDULE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9
},
1299 { "movule", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDULE
,0), MCOND(~FCONDULE
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9
},
1300 { "movule", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDULE
,0), MCOND(~FCONDULE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9
},
1301 { "movule", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDULE
,0), MCOND(~FCONDULE
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9
},
1302 { "movule", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDULE
,0), MCOND(~FCONDULE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9
},
1303 { "movule", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDULE
,0), MCOND(~FCONDULE
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9
},
1304 { "movvc", F3(2, 0x2c, 0)|MCOND(CONDVC
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDVC
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1305 { "movvc", F3(2, 0x2c, 1)|MCOND(CONDVC
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDVC
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1306 { "movvc", F3(2, 0x2c, 0)|MCOND(CONDVC
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDVC
,~1)|(1<<12), "Z,2,d", 0, v9
},
1307 { "movvc", F3(2, 0x2c, 1)|MCOND(CONDVC
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDVC
,~1)|(1<<12), "Z,I,d", 0, v9
},
1308 { "movvs", F3(2, 0x2c, 0)|MCOND(CONDVS
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDVS
,~1)|XCC
|(1<<12), "z,2,d", 0, v9
},
1309 { "movvs", F3(2, 0x2c, 1)|MCOND(CONDVS
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDVS
,~1)|XCC
|(1<<12), "z,I,d", 0, v9
},
1310 { "movvs", F3(2, 0x2c, 0)|MCOND(CONDVS
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDVS
,~1)|(1<<12), "Z,2,d", 0, v9
},
1311 { "movvs", F3(2, 0x2c, 1)|MCOND(CONDVS
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDVS
,~1)|(1<<12), "Z,I,d", 0, v9
},
1312 { "movz", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDZ
,0), MCOND(~FCONDZ
,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", F_ALIAS
, v9
},
1313 { "movz", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDZ
,0), MCOND(~FCONDZ
,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", F_ALIAS
, v9
},
1314 { "movz", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDZ
,0), MCOND(~FCONDZ
,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", F_ALIAS
, v9
},
1315 { "movz", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDZ
,0), MCOND(~FCONDZ
,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", F_ALIAS
, v9
},
1316 { "movz", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDZ
,0), MCOND(~FCONDZ
,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", F_ALIAS
, v9
},
1317 { "movz", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDZ
,0), MCOND(~FCONDZ
,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", F_ALIAS
, v9
},
1318 { "movz", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDZ
,0), MCOND(~FCONDZ
,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", F_ALIAS
, v9
},
1319 { "movz", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDZ
,0), MCOND(~FCONDZ
,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", F_ALIAS
, v9
},
1320 { "movz", F3(2, 0x2c, 0)|MCOND(CONDZ
,1)|ICC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDZ
,~1)|XCC
|(1<<12), "z,2,d", F_ALIAS
, v9
},
1321 { "movz", F3(2, 0x2c, 1)|MCOND(CONDZ
,1)|ICC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDZ
,~1)|XCC
|(1<<12), "z,I,d", F_ALIAS
, v9
},
1322 { "movz", F3(2, 0x2c, 0)|MCOND(CONDZ
,1)|XCC
, F3(~2, ~0x2c, ~0)|MCOND(~CONDZ
,~1)|(1<<12), "Z,2,d", F_ALIAS
, v9
},
1323 { "movz", F3(2, 0x2c, 1)|MCOND(CONDZ
,1)|XCC
, F3(~2, ~0x2c, ~1)|MCOND(~CONDZ
,~1)|(1<<12), "Z,I,d", F_ALIAS
, v9
},
1325 { "fmovda", F3F(2, 0x35, 0x102)|MCOND(CONDA
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDA
,~0), "z,f,g", 0, v9
},
1326 { "fmovda", F3F(2, 0x35, 0x082)|MCOND(FCONDA
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDA
,~0), "6,f,g", 0, v9
},
1327 { "fmovda", F3F(2, 0x35, 0x182)|MCOND(CONDA
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDA
,~0), "Z,f,g", 0, v9
},
1328 { "fmovda", F3F(2, 0x35, 0x0a2)|MCOND(FCONDA
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDA
,~0), "7,f,g", 0, v9
},
1329 { "fmovda", F3F(2, 0x35, 0x0c2)|MCOND(FCONDA
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDA
,~0), "8,f,g", 0, v9
},
1330 { "fmovda", F3F(2, 0x35, 0x0e2)|MCOND(FCONDA
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDA
,~0), "9,f,g", 0, v9
},
1331 { "fmovqa", F3F(2, 0x35, 0x103)|MCOND(CONDA
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDA
,~0), "z,f,g", 0, v9
},
1332 { "fmovqa", F3F(2, 0x35, 0x083)|MCOND(FCONDA
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDA
,~0), "6,f,g", 0, v9
},
1333 { "fmovqa", F3F(2, 0x35, 0x183)|MCOND(CONDA
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDA
,~0), "Z,f,g", 0, v9
},
1334 { "fmovqa", F3F(2, 0x35, 0x0a3)|MCOND(FCONDA
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDA
,~0), "7,f,g", 0, v9
},
1335 { "fmovqa", F3F(2, 0x35, 0x0c3)|MCOND(FCONDA
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDA
,~0), "8,f,g", 0, v9
},
1336 { "fmovqa", F3F(2, 0x35, 0x0e3)|MCOND(FCONDA
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDA
,~0), "9,f,g", 0, v9
},
1337 { "fmovsa", F3F(2, 0x35, 0x101)|MCOND(CONDA
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDA
,~0), "z,f,g", 0, v9
},
1338 { "fmovsa", F3F(2, 0x35, 0x081)|MCOND(FCONDA
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDA
,~0), "6,f,g", 0, v9
},
1339 { "fmovsa", F3F(2, 0x35, 0x181)|MCOND(CONDA
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDA
,~0), "Z,f,g", 0, v9
},
1340 { "fmovsa", F3F(2, 0x35, 0x0a1)|MCOND(FCONDA
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDA
,~0), "7,f,g", 0, v9
},
1341 { "fmovsa", F3F(2, 0x35, 0x0c1)|MCOND(FCONDA
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDA
,~0), "8,f,g", 0, v9
},
1342 { "fmovsa", F3F(2, 0x35, 0x0e1)|MCOND(FCONDA
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDA
,~0), "9,f,g", 0, v9
},
1343 { "fmovdcc", F3F(2, 0x35, 0x102)|MCOND(CONDCC
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDCC
,~0), "z,f,g", 0, v9
},
1344 { "fmovdcc", F3F(2, 0x35, 0x182)|MCOND(CONDCC
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDCC
,~0), "Z,f,g", 0, v9
},
1345 { "fmovqcc", F3F(2, 0x35, 0x103)|MCOND(CONDCC
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDCC
,~0), "z,f,g", 0, v9
},
1346 { "fmovqcc", F3F(2, 0x35, 0x183)|MCOND(CONDCC
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDCC
,~0), "Z,f,g", 0, v9
},
1347 { "fmovscc", F3F(2, 0x35, 0x101)|MCOND(CONDCC
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDCC
,~0), "z,f,g", 0, v9
},
1348 { "fmovscc", F3F(2, 0x35, 0x181)|MCOND(CONDCC
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDCC
,~0), "Z,f,g", 0, v9
},
1349 { "fmovdcs", F3F(2, 0x35, 0x102)|MCOND(CONDCS
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDCS
,~0), "z,f,g", 0, v9
},
1350 { "fmovdcs", F3F(2, 0x35, 0x182)|MCOND(CONDCS
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDCS
,~0), "Z,f,g", 0, v9
},
1351 { "fmovqcs", F3F(2, 0x35, 0x103)|MCOND(CONDCS
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDCS
,~0), "z,f,g", 0, v9
},
1352 { "fmovqcs", F3F(2, 0x35, 0x183)|MCOND(CONDCS
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDCS
,~0), "Z,f,g", 0, v9
},
1353 { "fmovscs", F3F(2, 0x35, 0x101)|MCOND(CONDCS
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDCS
,~0), "z,f,g", 0, v9
},
1354 { "fmovscs", F3F(2, 0x35, 0x181)|MCOND(CONDCS
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDCS
,~0), "Z,f,g", 0, v9
},
1355 { "fmovde", F3F(2, 0x35, 0x102)|MCOND(CONDE
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDE
,~0), "z,f,g", 0, v9
},
1356 { "fmovde", F3F(2, 0x35, 0x082)|MCOND(FCONDE
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDE
,~0), "6,f,g", 0, v9
},
1357 { "fmovde", F3F(2, 0x35, 0x182)|MCOND(CONDE
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDE
,~0), "Z,f,g", 0, v9
},
1358 { "fmovde", F3F(2, 0x35, 0x0a2)|MCOND(FCONDE
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDE
,~0), "7,f,g", 0, v9
},
1359 { "fmovde", F3F(2, 0x35, 0x0c2)|MCOND(FCONDE
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDE
,~0), "8,f,g", 0, v9
},
1360 { "fmovde", F3F(2, 0x35, 0x0e2)|MCOND(FCONDE
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDE
,~0), "9,f,g", 0, v9
},
1361 { "fmovqe", F3F(2, 0x35, 0x103)|MCOND(CONDE
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDE
,~0), "z,f,g", 0, v9
},
1362 { "fmovqe", F3F(2, 0x35, 0x083)|MCOND(FCONDE
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDE
,~0), "6,f,g", 0, v9
},
1363 { "fmovqe", F3F(2, 0x35, 0x183)|MCOND(CONDE
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDE
,~0), "Z,f,g", 0, v9
},
1364 { "fmovqe", F3F(2, 0x35, 0x0a3)|MCOND(FCONDE
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDE
,~0), "7,f,g", 0, v9
},
1365 { "fmovqe", F3F(2, 0x35, 0x0c3)|MCOND(FCONDE
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDE
,~0), "8,f,g", 0, v9
},
1366 { "fmovqe", F3F(2, 0x35, 0x0e3)|MCOND(FCONDE
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDE
,~0), "9,f,g", 0, v9
},
1367 { "fmovse", F3F(2, 0x35, 0x101)|MCOND(CONDE
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDE
,~0), "z,f,g", 0, v9
},
1368 { "fmovse", F3F(2, 0x35, 0x081)|MCOND(FCONDE
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDE
,~0), "6,f,g", 0, v9
},
1369 { "fmovse", F3F(2, 0x35, 0x181)|MCOND(CONDE
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDE
,~0), "Z,f,g", 0, v9
},
1370 { "fmovse", F3F(2, 0x35, 0x0a1)|MCOND(FCONDE
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDE
,~0), "7,f,g", 0, v9
},
1371 { "fmovse", F3F(2, 0x35, 0x0c1)|MCOND(FCONDE
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDE
,~0), "8,f,g", 0, v9
},
1372 { "fmovse", F3F(2, 0x35, 0x0e1)|MCOND(FCONDE
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDE
,~0), "9,f,g", 0, v9
},
1373 { "fmovdg", F3F(2, 0x35, 0x102)|MCOND(CONDG
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDG
,~0), "z,f,g", 0, v9
},
1374 { "fmovdg", F3F(2, 0x35, 0x082)|MCOND(FCONDG
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDG
,~0), "6,f,g", 0, v9
},
1375 { "fmovdg", F3F(2, 0x35, 0x182)|MCOND(CONDG
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDG
,~0), "Z,f,g", 0, v9
},
1376 { "fmovdg", F3F(2, 0x35, 0x0a2)|MCOND(FCONDG
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDG
,~0), "7,f,g", 0, v9
},
1377 { "fmovdg", F3F(2, 0x35, 0x0c2)|MCOND(FCONDG
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDG
,~0), "8,f,g", 0, v9
},
1378 { "fmovdg", F3F(2, 0x35, 0x0e2)|MCOND(FCONDG
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDG
,~0), "9,f,g", 0, v9
},
1379 { "fmovqg", F3F(2, 0x35, 0x103)|MCOND(CONDG
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDG
,~0), "z,f,g", 0, v9
},
1380 { "fmovqg", F3F(2, 0x35, 0x083)|MCOND(FCONDG
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDG
,~0), "6,f,g", 0, v9
},
1381 { "fmovqg", F3F(2, 0x35, 0x183)|MCOND(CONDG
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDG
,~0), "Z,f,g", 0, v9
},
1382 { "fmovqg", F3F(2, 0x35, 0x0a3)|MCOND(FCONDG
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDG
,~0), "7,f,g", 0, v9
},
1383 { "fmovqg", F3F(2, 0x35, 0x0c3)|MCOND(FCONDG
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDG
,~0), "8,f,g", 0, v9
},
1384 { "fmovqg", F3F(2, 0x35, 0x0e3)|MCOND(FCONDG
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDG
,~0), "9,f,g", 0, v9
},
1385 { "fmovsg", F3F(2, 0x35, 0x101)|MCOND(CONDG
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDG
,~0), "z,f,g", 0, v9
},
1386 { "fmovsg", F3F(2, 0x35, 0x081)|MCOND(FCONDG
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDG
,~0), "6,f,g", 0, v9
},
1387 { "fmovsg", F3F(2, 0x35, 0x181)|MCOND(CONDG
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDG
,~0), "Z,f,g", 0, v9
},
1388 { "fmovsg", F3F(2, 0x35, 0x0a1)|MCOND(FCONDG
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDG
,~0), "7,f,g", 0, v9
},
1389 { "fmovsg", F3F(2, 0x35, 0x0c1)|MCOND(FCONDG
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDG
,~0), "8,f,g", 0, v9
},
1390 { "fmovsg", F3F(2, 0x35, 0x0e1)|MCOND(FCONDG
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDG
,~0), "9,f,g", 0, v9
},
1391 { "fmovdge", F3F(2, 0x35, 0x102)|MCOND(CONDGE
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDGE
,~0), "z,f,g", 0, v9
},
1392 { "fmovdge", F3F(2, 0x35, 0x082)|MCOND(FCONDGE
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDGE
,~0), "6,f,g", 0, v9
},
1393 { "fmovdge", F3F(2, 0x35, 0x182)|MCOND(CONDGE
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDGE
,~0), "Z,f,g", 0, v9
},
1394 { "fmovdge", F3F(2, 0x35, 0x0a2)|MCOND(FCONDGE
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDGE
,~0), "7,f,g", 0, v9
},
1395 { "fmovdge", F3F(2, 0x35, 0x0c2)|MCOND(FCONDGE
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDGE
,~0), "8,f,g", 0, v9
},
1396 { "fmovdge", F3F(2, 0x35, 0x0e2)|MCOND(FCONDGE
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDGE
,~0), "9,f,g", 0, v9
},
1397 { "fmovqge", F3F(2, 0x35, 0x103)|MCOND(CONDGE
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDGE
,~0), "z,f,g", 0, v9
},
1398 { "fmovqge", F3F(2, 0x35, 0x083)|MCOND(FCONDGE
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDGE
,~0), "6,f,g", 0, v9
},
1399 { "fmovqge", F3F(2, 0x35, 0x183)|MCOND(CONDGE
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDGE
,~0), "Z,f,g", 0, v9
},
1400 { "fmovqge", F3F(2, 0x35, 0x0a3)|MCOND(FCONDGE
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDGE
,~0), "7,f,g", 0, v9
},
1401 { "fmovqge", F3F(2, 0x35, 0x0c3)|MCOND(FCONDGE
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDGE
,~0), "8,f,g", 0, v9
},
1402 { "fmovqge", F3F(2, 0x35, 0x0e3)|MCOND(FCONDGE
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDGE
,~0), "9,f,g", 0, v9
},
1403 { "fmovsge", F3F(2, 0x35, 0x101)|MCOND(CONDGE
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDGE
,~0), "z,f,g", 0, v9
},
1404 { "fmovsge", F3F(2, 0x35, 0x081)|MCOND(FCONDGE
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDGE
,~0), "6,f,g", 0, v9
},
1405 { "fmovsge", F3F(2, 0x35, 0x181)|MCOND(CONDGE
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDGE
,~0), "Z,f,g", 0, v9
},
1406 { "fmovsge", F3F(2, 0x35, 0x0a1)|MCOND(FCONDGE
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDGE
,~0), "7,f,g", 0, v9
},
1407 { "fmovsge", F3F(2, 0x35, 0x0c1)|MCOND(FCONDGE
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDGE
,~0), "8,f,g", 0, v9
},
1408 { "fmovsge", F3F(2, 0x35, 0x0e1)|MCOND(FCONDGE
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDGE
,~0), "9,f,g", 0, v9
},
1409 { "fmovdgeu", F3F(2, 0x35, 0x102)|MCOND(CONDGEU
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDGEU
,~0), "z,f,g", F_ALIAS
, v9
},
1410 { "fmovdgeu", F3F(2, 0x35, 0x182)|MCOND(CONDGEU
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDGEU
,~0), "Z,f,g", F_ALIAS
, v9
},
1411 { "fmovqgeu", F3F(2, 0x35, 0x103)|MCOND(CONDGEU
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDGEU
,~0), "z,f,g", F_ALIAS
, v9
},
1412 { "fmovqgeu", F3F(2, 0x35, 0x183)|MCOND(CONDGEU
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDGEU
,~0), "Z,f,g", F_ALIAS
, v9
},
1413 { "fmovsgeu", F3F(2, 0x35, 0x101)|MCOND(CONDGEU
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDGEU
,~0), "z,f,g", F_ALIAS
, v9
},
1414 { "fmovsgeu", F3F(2, 0x35, 0x181)|MCOND(CONDGEU
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDGEU
,~0), "Z,f,g", F_ALIAS
, v9
},
1415 { "fmovdgu", F3F(2, 0x35, 0x102)|MCOND(CONDGU
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDGU
,~0), "z,f,g", 0, v9
},
1416 { "fmovdgu", F3F(2, 0x35, 0x182)|MCOND(CONDGU
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDGU
,~0), "Z,f,g", 0, v9
},
1417 { "fmovqgu", F3F(2, 0x35, 0x103)|MCOND(CONDGU
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDGU
,~0), "z,f,g", 0, v9
},
1418 { "fmovqgu", F3F(2, 0x35, 0x183)|MCOND(CONDGU
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDGU
,~0), "Z,f,g", 0, v9
},
1419 { "fmovsgu", F3F(2, 0x35, 0x101)|MCOND(CONDGU
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDGU
,~0), "z,f,g", 0, v9
},
1420 { "fmovsgu", F3F(2, 0x35, 0x181)|MCOND(CONDGU
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDGU
,~0), "Z,f,g", 0, v9
},
1421 { "fmovdl", F3F(2, 0x35, 0x102)|MCOND(CONDL
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDL
,~0), "z,f,g", 0, v9
},
1422 { "fmovdl", F3F(2, 0x35, 0x082)|MCOND(FCONDL
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDL
,~0), "6,f,g", 0, v9
},
1423 { "fmovdl", F3F(2, 0x35, 0x182)|MCOND(CONDL
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDL
,~0), "Z,f,g", 0, v9
},
1424 { "fmovdl", F3F(2, 0x35, 0x0a2)|MCOND(FCONDL
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDL
,~0), "7,f,g", 0, v9
},
1425 { "fmovdl", F3F(2, 0x35, 0x0c2)|MCOND(FCONDL
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDL
,~0), "8,f,g", 0, v9
},
1426 { "fmovdl", F3F(2, 0x35, 0x0e2)|MCOND(FCONDL
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDL
,~0), "9,f,g", 0, v9
},
1427 { "fmovql", F3F(2, 0x35, 0x103)|MCOND(CONDL
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDL
,~0), "z,f,g", 0, v9
},
1428 { "fmovql", F3F(2, 0x35, 0x083)|MCOND(FCONDL
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDL
,~0), "6,f,g", 0, v9
},
1429 { "fmovql", F3F(2, 0x35, 0x183)|MCOND(CONDL
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDL
,~0), "Z,f,g", 0, v9
},
1430 { "fmovql", F3F(2, 0x35, 0x0a3)|MCOND(FCONDL
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDL
,~0), "7,f,g", 0, v9
},
1431 { "fmovql", F3F(2, 0x35, 0x0c3)|MCOND(FCONDL
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDL
,~0), "8,f,g", 0, v9
},
1432 { "fmovql", F3F(2, 0x35, 0x0e3)|MCOND(FCONDL
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDL
,~0), "9,f,g", 0, v9
},
1433 { "fmovsl", F3F(2, 0x35, 0x101)|MCOND(CONDL
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDL
,~0), "z,f,g", 0, v9
},
1434 { "fmovsl", F3F(2, 0x35, 0x081)|MCOND(FCONDL
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDL
,~0), "6,f,g", 0, v9
},
1435 { "fmovsl", F3F(2, 0x35, 0x181)|MCOND(CONDL
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDL
,~0), "Z,f,g", 0, v9
},
1436 { "fmovsl", F3F(2, 0x35, 0x0a1)|MCOND(FCONDL
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDL
,~0), "7,f,g", 0, v9
},
1437 { "fmovsl", F3F(2, 0x35, 0x0c1)|MCOND(FCONDL
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDL
,~0), "8,f,g", 0, v9
},
1438 { "fmovsl", F3F(2, 0x35, 0x0e1)|MCOND(FCONDL
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDL
,~0), "9,f,g", 0, v9
},
1439 { "fmovdle", F3F(2, 0x35, 0x102)|MCOND(CONDLE
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDLE
,~0), "z,f,g", 0, v9
},
1440 { "fmovdle", F3F(2, 0x35, 0x082)|MCOND(FCONDLE
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDLE
,~0), "6,f,g", 0, v9
},
1441 { "fmovdle", F3F(2, 0x35, 0x182)|MCOND(CONDLE
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDLE
,~0), "Z,f,g", 0, v9
},
1442 { "fmovdle", F3F(2, 0x35, 0x0a2)|MCOND(FCONDLE
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDLE
,~0), "7,f,g", 0, v9
},
1443 { "fmovdle", F3F(2, 0x35, 0x0c2)|MCOND(FCONDLE
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDLE
,~0), "8,f,g", 0, v9
},
1444 { "fmovdle", F3F(2, 0x35, 0x0e2)|MCOND(FCONDLE
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDLE
,~0), "9,f,g", 0, v9
},
1445 { "fmovqle", F3F(2, 0x35, 0x103)|MCOND(CONDLE
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDLE
,~0), "z,f,g", 0, v9
},
1446 { "fmovqle", F3F(2, 0x35, 0x083)|MCOND(FCONDLE
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDLE
,~0), "6,f,g", 0, v9
},
1447 { "fmovqle", F3F(2, 0x35, 0x183)|MCOND(CONDLE
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDLE
,~0), "Z,f,g", 0, v9
},
1448 { "fmovqle", F3F(2, 0x35, 0x0a3)|MCOND(FCONDLE
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDLE
,~0), "7,f,g", 0, v9
},
1449 { "fmovqle", F3F(2, 0x35, 0x0c3)|MCOND(FCONDLE
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDLE
,~0), "8,f,g", 0, v9
},
1450 { "fmovqle", F3F(2, 0x35, 0x0e3)|MCOND(FCONDLE
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDLE
,~0), "9,f,g", 0, v9
},
1451 { "fmovsle", F3F(2, 0x35, 0x101)|MCOND(CONDLE
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDLE
,~0), "z,f,g", 0, v9
},
1452 { "fmovsle", F3F(2, 0x35, 0x081)|MCOND(FCONDLE
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDLE
,~0), "6,f,g", 0, v9
},
1453 { "fmovsle", F3F(2, 0x35, 0x181)|MCOND(CONDLE
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDLE
,~0), "Z,f,g", 0, v9
},
1454 { "fmovsle", F3F(2, 0x35, 0x0a1)|MCOND(FCONDLE
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDLE
,~0), "7,f,g", 0, v9
},
1455 { "fmovsle", F3F(2, 0x35, 0x0c1)|MCOND(FCONDLE
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDLE
,~0), "8,f,g", 0, v9
},
1456 { "fmovsle", F3F(2, 0x35, 0x0e1)|MCOND(FCONDLE
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDLE
,~0), "9,f,g", 0, v9
},
1457 { "fmovdleu", F3F(2, 0x35, 0x102)|MCOND(CONDLEU
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDLEU
,~0), "z,f,g", 0, v9
},
1458 { "fmovdleu", F3F(2, 0x35, 0x182)|MCOND(CONDLEU
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDLEU
,~0), "Z,f,g", 0, v9
},
1459 { "fmovqleu", F3F(2, 0x35, 0x103)|MCOND(CONDLEU
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDLEU
,~0), "z,f,g", 0, v9
},
1460 { "fmovqleu", F3F(2, 0x35, 0x183)|MCOND(CONDLEU
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDLEU
,~0), "Z,f,g", 0, v9
},
1461 { "fmovsleu", F3F(2, 0x35, 0x101)|MCOND(CONDLEU
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDLEU
,~0), "z,f,g", 0, v9
},
1462 { "fmovsleu", F3F(2, 0x35, 0x181)|MCOND(CONDLEU
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDLEU
,~0), "Z,f,g", 0, v9
},
1463 { "fmovdlg", F3F(2, 0x35, 0x082)|MCOND(FCONDLG
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDLG
,~0), "6,f,g", 0, v9
},
1464 { "fmovdlg", F3F(2, 0x35, 0x0a2)|MCOND(FCONDLG
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDLG
,~0), "7,f,g", 0, v9
},
1465 { "fmovdlg", F3F(2, 0x35, 0x0c2)|MCOND(FCONDLG
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDLG
,~0), "8,f,g", 0, v9
},
1466 { "fmovdlg", F3F(2, 0x35, 0x0e2)|MCOND(FCONDLG
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDLG
,~0), "9,f,g", 0, v9
},
1467 { "fmovqlg", F3F(2, 0x35, 0x083)|MCOND(FCONDLG
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDLG
,~0), "6,f,g", 0, v9
},
1468 { "fmovqlg", F3F(2, 0x35, 0x0a3)|MCOND(FCONDLG
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDLG
,~0), "7,f,g", 0, v9
},
1469 { "fmovqlg", F3F(2, 0x35, 0x0c3)|MCOND(FCONDLG
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDLG
,~0), "8,f,g", 0, v9
},
1470 { "fmovqlg", F3F(2, 0x35, 0x0e3)|MCOND(FCONDLG
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDLG
,~0), "9,f,g", 0, v9
},
1471 { "fmovslg", F3F(2, 0x35, 0x081)|MCOND(FCONDLG
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDLG
,~0), "6,f,g", 0, v9
},
1472 { "fmovslg", F3F(2, 0x35, 0x0a1)|MCOND(FCONDLG
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDLG
,~0), "7,f,g", 0, v9
},
1473 { "fmovslg", F3F(2, 0x35, 0x0c1)|MCOND(FCONDLG
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDLG
,~0), "8,f,g", 0, v9
},
1474 { "fmovslg", F3F(2, 0x35, 0x0e1)|MCOND(FCONDLG
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDLG
,~0), "9,f,g", 0, v9
},
1475 { "fmovdlu", F3F(2, 0x35, 0x102)|MCOND(CONDLU
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDLU
,~0), "z,f,g", F_ALIAS
, v9
},
1476 { "fmovdlu", F3F(2, 0x35, 0x182)|MCOND(CONDLU
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDLU
,~0), "Z,f,g", F_ALIAS
, v9
},
1477 { "fmovqlu", F3F(2, 0x35, 0x103)|MCOND(CONDLU
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDLU
,~0), "z,f,g", F_ALIAS
, v9
},
1478 { "fmovqlu", F3F(2, 0x35, 0x183)|MCOND(CONDLU
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDLU
,~0), "Z,f,g", F_ALIAS
, v9
},
1479 { "fmovslu", F3F(2, 0x35, 0x101)|MCOND(CONDLU
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDLU
,~0), "z,f,g", F_ALIAS
, v9
},
1480 { "fmovslu", F3F(2, 0x35, 0x181)|MCOND(CONDLU
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDLU
,~0), "Z,f,g", F_ALIAS
, v9
},
1481 { "fmovdn", F3F(2, 0x35, 0x102)|MCOND(CONDN
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDN
,~0), "z,f,g", 0, v9
},
1482 { "fmovdn", F3F(2, 0x35, 0x082)|MCOND(FCONDN
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDN
,~0), "6,f,g", 0, v9
},
1483 { "fmovdn", F3F(2, 0x35, 0x182)|MCOND(CONDN
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDN
,~0), "Z,f,g", 0, v9
},
1484 { "fmovdn", F3F(2, 0x35, 0x0a2)|MCOND(FCONDN
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDN
,~0), "7,f,g", 0, v9
},
1485 { "fmovdn", F3F(2, 0x35, 0x0c2)|MCOND(FCONDN
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDN
,~0), "8,f,g", 0, v9
},
1486 { "fmovdn", F3F(2, 0x35, 0x0e2)|MCOND(FCONDN
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDN
,~0), "9,f,g", 0, v9
},
1487 { "fmovqn", F3F(2, 0x35, 0x103)|MCOND(CONDN
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDN
,~0), "z,f,g", 0, v9
},
1488 { "fmovqn", F3F(2, 0x35, 0x083)|MCOND(FCONDN
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDN
,~0), "6,f,g", 0, v9
},
1489 { "fmovqn", F3F(2, 0x35, 0x183)|MCOND(CONDN
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDN
,~0), "Z,f,g", 0, v9
},
1490 { "fmovqn", F3F(2, 0x35, 0x0a3)|MCOND(FCONDN
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDN
,~0), "7,f,g", 0, v9
},
1491 { "fmovqn", F3F(2, 0x35, 0x0c3)|MCOND(FCONDN
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDN
,~0), "8,f,g", 0, v9
},
1492 { "fmovqn", F3F(2, 0x35, 0x0e3)|MCOND(FCONDN
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDN
,~0), "9,f,g", 0, v9
},
1493 { "fmovsn", F3F(2, 0x35, 0x101)|MCOND(CONDN
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDN
,~0), "z,f,g", 0, v9
},
1494 { "fmovsn", F3F(2, 0x35, 0x081)|MCOND(FCONDN
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDN
,~0), "6,f,g", 0, v9
},
1495 { "fmovsn", F3F(2, 0x35, 0x181)|MCOND(CONDN
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDN
,~0), "Z,f,g", 0, v9
},
1496 { "fmovsn", F3F(2, 0x35, 0x0a1)|MCOND(FCONDN
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDN
,~0), "7,f,g", 0, v9
},
1497 { "fmovsn", F3F(2, 0x35, 0x0c1)|MCOND(FCONDN
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDN
,~0), "8,f,g", 0, v9
},
1498 { "fmovsn", F3F(2, 0x35, 0x0e1)|MCOND(FCONDN
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDN
,~0), "9,f,g", 0, v9
},
1499 { "fmovdne", F3F(2, 0x35, 0x102)|MCOND(CONDNE
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDNE
,~0), "z,f,g", 0, v9
},
1500 { "fmovdne", F3F(2, 0x35, 0x082)|MCOND(FCONDNE
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDNE
,~0), "6,f,g", 0, v9
},
1501 { "fmovdne", F3F(2, 0x35, 0x182)|MCOND(CONDNE
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDNE
,~0), "Z,f,g", 0, v9
},
1502 { "fmovdne", F3F(2, 0x35, 0x0a2)|MCOND(FCONDNE
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDNE
,~0), "7,f,g", 0, v9
},
1503 { "fmovdne", F3F(2, 0x35, 0x0c2)|MCOND(FCONDNE
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDNE
,~0), "8,f,g", 0, v9
},
1504 { "fmovdne", F3F(2, 0x35, 0x0e2)|MCOND(FCONDNE
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDNE
,~0), "9,f,g", 0, v9
},
1505 { "fmovqne", F3F(2, 0x35, 0x103)|MCOND(CONDNE
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDNE
,~0), "z,f,g", 0, v9
},
1506 { "fmovqne", F3F(2, 0x35, 0x083)|MCOND(FCONDNE
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDNE
,~0), "6,f,g", 0, v9
},
1507 { "fmovqne", F3F(2, 0x35, 0x183)|MCOND(CONDNE
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDNE
,~0), "Z,f,g", 0, v9
},
1508 { "fmovqne", F3F(2, 0x35, 0x0a3)|MCOND(FCONDNE
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDNE
,~0), "7,f,g", 0, v9
},
1509 { "fmovqne", F3F(2, 0x35, 0x0c3)|MCOND(FCONDNE
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDNE
,~0), "8,f,g", 0, v9
},
1510 { "fmovqne", F3F(2, 0x35, 0x0e3)|MCOND(FCONDNE
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDNE
,~0), "9,f,g", 0, v9
},
1511 { "fmovsne", F3F(2, 0x35, 0x101)|MCOND(CONDNE
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDNE
,~0), "z,f,g", 0, v9
},
1512 { "fmovsne", F3F(2, 0x35, 0x081)|MCOND(FCONDNE
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDNE
,~0), "6,f,g", 0, v9
},
1513 { "fmovsne", F3F(2, 0x35, 0x181)|MCOND(CONDNE
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDNE
,~0), "Z,f,g", 0, v9
},
1514 { "fmovsne", F3F(2, 0x35, 0x0a1)|MCOND(FCONDNE
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDNE
,~0), "7,f,g", 0, v9
},
1515 { "fmovsne", F3F(2, 0x35, 0x0c1)|MCOND(FCONDNE
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDNE
,~0), "8,f,g", 0, v9
},
1516 { "fmovsne", F3F(2, 0x35, 0x0e1)|MCOND(FCONDNE
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDNE
,~0), "9,f,g", 0, v9
},
1517 { "fmovdneg", F3F(2, 0x35, 0x102)|MCOND(CONDNEG
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDNEG
,~0), "z,f,g", 0, v9
},
1518 { "fmovdneg", F3F(2, 0x35, 0x182)|MCOND(CONDNEG
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDNEG
,~0), "Z,f,g", 0, v9
},
1519 { "fmovqneg", F3F(2, 0x35, 0x103)|MCOND(CONDNEG
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDNEG
,~0), "z,f,g", 0, v9
},
1520 { "fmovqneg", F3F(2, 0x35, 0x183)|MCOND(CONDNEG
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDNEG
,~0), "Z,f,g", 0, v9
},
1521 { "fmovsneg", F3F(2, 0x35, 0x101)|MCOND(CONDNEG
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDNEG
,~0), "z,f,g", 0, v9
},
1522 { "fmovsneg", F3F(2, 0x35, 0x181)|MCOND(CONDNEG
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDNEG
,~0), "Z,f,g", 0, v9
},
1523 { "fmovdnz", F3F(2, 0x35, 0x102)|MCOND(CONDNZ
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDNZ
,~0), "z,f,g", F_ALIAS
, v9
},
1524 { "fmovdnz", F3F(2, 0x35, 0x082)|MCOND(FCONDNZ
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDNZ
,~0), "6,f,g", F_ALIAS
, v9
},
1525 { "fmovdnz", F3F(2, 0x35, 0x182)|MCOND(CONDNZ
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDNZ
,~0), "Z,f,g", F_ALIAS
, v9
},
1526 { "fmovdnz", F3F(2, 0x35, 0x0a2)|MCOND(FCONDNZ
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDNZ
,~0), "7,f,g", F_ALIAS
, v9
},
1527 { "fmovdnz", F3F(2, 0x35, 0x0c2)|MCOND(FCONDNZ
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDNZ
,~0), "8,f,g", F_ALIAS
, v9
},
1528 { "fmovdnz", F3F(2, 0x35, 0x0e2)|MCOND(FCONDNZ
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDNZ
,~0), "9,f,g", F_ALIAS
, v9
},
1529 { "fmovqnz", F3F(2, 0x35, 0x103)|MCOND(CONDNZ
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDNZ
,~0), "z,f,g", F_ALIAS
, v9
},
1530 { "fmovqnz", F3F(2, 0x35, 0x083)|MCOND(FCONDNZ
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDNZ
,~0), "6,f,g", F_ALIAS
, v9
},
1531 { "fmovqnz", F3F(2, 0x35, 0x183)|MCOND(CONDNZ
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDNZ
,~0), "Z,f,g", F_ALIAS
, v9
},
1532 { "fmovqnz", F3F(2, 0x35, 0x0a3)|MCOND(FCONDNZ
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDNZ
,~0), "7,f,g", F_ALIAS
, v9
},
1533 { "fmovqnz", F3F(2, 0x35, 0x0c3)|MCOND(FCONDNZ
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDNZ
,~0), "8,f,g", F_ALIAS
, v9
},
1534 { "fmovqnz", F3F(2, 0x35, 0x0e3)|MCOND(FCONDNZ
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDNZ
,~0), "9,f,g", F_ALIAS
, v9
},
1535 { "fmovsnz", F3F(2, 0x35, 0x101)|MCOND(CONDNZ
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDNZ
,~0), "z,f,g", F_ALIAS
, v9
},
1536 { "fmovsnz", F3F(2, 0x35, 0x081)|MCOND(FCONDNZ
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDNZ
,~0), "6,f,g", F_ALIAS
, v9
},
1537 { "fmovsnz", F3F(2, 0x35, 0x181)|MCOND(CONDNZ
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDNZ
,~0), "Z,f,g", F_ALIAS
, v9
},
1538 { "fmovsnz", F3F(2, 0x35, 0x0a1)|MCOND(FCONDNZ
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDNZ
,~0), "7,f,g", F_ALIAS
, v9
},
1539 { "fmovsnz", F3F(2, 0x35, 0x0c1)|MCOND(FCONDNZ
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDNZ
,~0), "8,f,g", F_ALIAS
, v9
},
1540 { "fmovsnz", F3F(2, 0x35, 0x0e1)|MCOND(FCONDNZ
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDNZ
,~0), "9,f,g", F_ALIAS
, v9
},
1541 { "fmovdo", F3F(2, 0x35, 0x082)|MCOND(FCONDO
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDO
,~0), "6,f,g", 0, v9
},
1542 { "fmovdo", F3F(2, 0x35, 0x0a2)|MCOND(FCONDO
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDO
,~0), "7,f,g", 0, v9
},
1543 { "fmovdo", F3F(2, 0x35, 0x0c2)|MCOND(FCONDO
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDO
,~0), "8,f,g", 0, v9
},
1544 { "fmovdo", F3F(2, 0x35, 0x0e2)|MCOND(FCONDO
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDO
,~0), "9,f,g", 0, v9
},
1545 { "fmovqo", F3F(2, 0x35, 0x083)|MCOND(FCONDO
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDO
,~0), "6,f,g", 0, v9
},
1546 { "fmovqo", F3F(2, 0x35, 0x0a3)|MCOND(FCONDO
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDO
,~0), "7,f,g", 0, v9
},
1547 { "fmovqo", F3F(2, 0x35, 0x0c3)|MCOND(FCONDO
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDO
,~0), "8,f,g", 0, v9
},
1548 { "fmovqo", F3F(2, 0x35, 0x0e3)|MCOND(FCONDO
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDO
,~0), "9,f,g", 0, v9
},
1549 { "fmovso", F3F(2, 0x35, 0x081)|MCOND(FCONDO
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDO
,~0), "6,f,g", 0, v9
},
1550 { "fmovso", F3F(2, 0x35, 0x0a1)|MCOND(FCONDO
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDO
,~0), "7,f,g", 0, v9
},
1551 { "fmovso", F3F(2, 0x35, 0x0c1)|MCOND(FCONDO
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDO
,~0), "8,f,g", 0, v9
},
1552 { "fmovso", F3F(2, 0x35, 0x0e1)|MCOND(FCONDO
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDO
,~0), "9,f,g", 0, v9
},
1553 { "fmovdpos", F3F(2, 0x35, 0x102)|MCOND(CONDPOS
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDPOS
,~0), "z,f,g", 0, v9
},
1554 { "fmovdpos", F3F(2, 0x35, 0x182)|MCOND(CONDPOS
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDPOS
,~0), "Z,f,g", 0, v9
},
1555 { "fmovqpos", F3F(2, 0x35, 0x103)|MCOND(CONDPOS
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDPOS
,~0), "z,f,g", 0, v9
},
1556 { "fmovqpos", F3F(2, 0x35, 0x183)|MCOND(CONDPOS
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDPOS
,~0), "Z,f,g", 0, v9
},
1557 { "fmovspos", F3F(2, 0x35, 0x101)|MCOND(CONDPOS
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDPOS
,~0), "z,f,g", 0, v9
},
1558 { "fmovspos", F3F(2, 0x35, 0x181)|MCOND(CONDPOS
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDPOS
,~0), "Z,f,g", 0, v9
},
1559 { "fmovdu", F3F(2, 0x35, 0x082)|MCOND(FCONDU
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDU
,~0), "6,f,g", 0, v9
},
1560 { "fmovdu", F3F(2, 0x35, 0x0a2)|MCOND(FCONDU
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDU
,~0), "7,f,g", 0, v9
},
1561 { "fmovdu", F3F(2, 0x35, 0x0c2)|MCOND(FCONDU
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDU
,~0), "8,f,g", 0, v9
},
1562 { "fmovdu", F3F(2, 0x35, 0x0e2)|MCOND(FCONDU
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDU
,~0), "9,f,g", 0, v9
},
1563 { "fmovqu", F3F(2, 0x35, 0x083)|MCOND(FCONDU
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDU
,~0), "6,f,g", 0, v9
},
1564 { "fmovqu", F3F(2, 0x35, 0x0a3)|MCOND(FCONDU
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDU
,~0), "7,f,g", 0, v9
},
1565 { "fmovqu", F3F(2, 0x35, 0x0c3)|MCOND(FCONDU
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDU
,~0), "8,f,g", 0, v9
},
1566 { "fmovqu", F3F(2, 0x35, 0x0e3)|MCOND(FCONDU
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDU
,~0), "9,f,g", 0, v9
},
1567 { "fmovsu", F3F(2, 0x35, 0x081)|MCOND(FCONDU
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDU
,~0), "6,f,g", 0, v9
},
1568 { "fmovsu", F3F(2, 0x35, 0x0a1)|MCOND(FCONDU
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDU
,~0), "7,f,g", 0, v9
},
1569 { "fmovsu", F3F(2, 0x35, 0x0c1)|MCOND(FCONDU
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDU
,~0), "8,f,g", 0, v9
},
1570 { "fmovsu", F3F(2, 0x35, 0x0e1)|MCOND(FCONDU
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDU
,~0), "9,f,g", 0, v9
},
1571 { "fmovdue", F3F(2, 0x35, 0x082)|MCOND(FCONDUE
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDUE
,~0), "6,f,g", 0, v9
},
1572 { "fmovdue", F3F(2, 0x35, 0x0a2)|MCOND(FCONDUE
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDUE
,~0), "7,f,g", 0, v9
},
1573 { "fmovdue", F3F(2, 0x35, 0x0c2)|MCOND(FCONDUE
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDUE
,~0), "8,f,g", 0, v9
},
1574 { "fmovdue", F3F(2, 0x35, 0x0e2)|MCOND(FCONDUE
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDUE
,~0), "9,f,g", 0, v9
},
1575 { "fmovque", F3F(2, 0x35, 0x083)|MCOND(FCONDUE
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDUE
,~0), "6,f,g", 0, v9
},
1576 { "fmovque", F3F(2, 0x35, 0x0a3)|MCOND(FCONDUE
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDUE
,~0), "7,f,g", 0, v9
},
1577 { "fmovque", F3F(2, 0x35, 0x0c3)|MCOND(FCONDUE
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDUE
,~0), "8,f,g", 0, v9
},
1578 { "fmovque", F3F(2, 0x35, 0x0e3)|MCOND(FCONDUE
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDUE
,~0), "9,f,g", 0, v9
},
1579 { "fmovsue", F3F(2, 0x35, 0x081)|MCOND(FCONDUE
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDUE
,~0), "6,f,g", 0, v9
},
1580 { "fmovsue", F3F(2, 0x35, 0x0a1)|MCOND(FCONDUE
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDUE
,~0), "7,f,g", 0, v9
},
1581 { "fmovsue", F3F(2, 0x35, 0x0c1)|MCOND(FCONDUE
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDUE
,~0), "8,f,g", 0, v9
},
1582 { "fmovsue", F3F(2, 0x35, 0x0e1)|MCOND(FCONDUE
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDUE
,~0), "9,f,g", 0, v9
},
1583 { "fmovdug", F3F(2, 0x35, 0x082)|MCOND(FCONDUG
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDUG
,~0), "6,f,g", 0, v9
},
1584 { "fmovdug", F3F(2, 0x35, 0x0a2)|MCOND(FCONDUG
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDUG
,~0), "7,f,g", 0, v9
},
1585 { "fmovdug", F3F(2, 0x35, 0x0c2)|MCOND(FCONDUG
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDUG
,~0), "8,f,g", 0, v9
},
1586 { "fmovdug", F3F(2, 0x35, 0x0e2)|MCOND(FCONDUG
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDUG
,~0), "9,f,g", 0, v9
},
1587 { "fmovqug", F3F(2, 0x35, 0x083)|MCOND(FCONDUG
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDUG
,~0), "6,f,g", 0, v9
},
1588 { "fmovqug", F3F(2, 0x35, 0x0a3)|MCOND(FCONDUG
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDUG
,~0), "7,f,g", 0, v9
},
1589 { "fmovqug", F3F(2, 0x35, 0x0c3)|MCOND(FCONDUG
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDUG
,~0), "8,f,g", 0, v9
},
1590 { "fmovqug", F3F(2, 0x35, 0x0e3)|MCOND(FCONDUG
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDUG
,~0), "9,f,g", 0, v9
},
1591 { "fmovsug", F3F(2, 0x35, 0x081)|MCOND(FCONDUG
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDUG
,~0), "6,f,g", 0, v9
},
1592 { "fmovsug", F3F(2, 0x35, 0x0a1)|MCOND(FCONDUG
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDUG
,~0), "7,f,g", 0, v9
},
1593 { "fmovsug", F3F(2, 0x35, 0x0c1)|MCOND(FCONDUG
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDUG
,~0), "8,f,g", 0, v9
},
1594 { "fmovsug", F3F(2, 0x35, 0x0e1)|MCOND(FCONDUG
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDUG
,~0), "9,f,g", 0, v9
},
1595 { "fmovduge", F3F(2, 0x35, 0x082)|MCOND(FCONDUGE
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDUGE
,~0), "6,f,g", 0, v9
},
1596 { "fmovduge", F3F(2, 0x35, 0x0a2)|MCOND(FCONDUGE
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDUGE
,~0), "7,f,g", 0, v9
},
1597 { "fmovduge", F3F(2, 0x35, 0x0c2)|MCOND(FCONDUGE
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDUGE
,~0), "8,f,g", 0, v9
},
1598 { "fmovduge", F3F(2, 0x35, 0x0e2)|MCOND(FCONDUGE
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDUGE
,~0), "9,f,g", 0, v9
},
1599 { "fmovquge", F3F(2, 0x35, 0x083)|MCOND(FCONDUGE
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDUGE
,~0), "6,f,g", 0, v9
},
1600 { "fmovquge", F3F(2, 0x35, 0x0a3)|MCOND(FCONDUGE
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDUGE
,~0), "7,f,g", 0, v9
},
1601 { "fmovquge", F3F(2, 0x35, 0x0c3)|MCOND(FCONDUGE
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDUGE
,~0), "8,f,g", 0, v9
},
1602 { "fmovquge", F3F(2, 0x35, 0x0e3)|MCOND(FCONDUGE
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDUGE
,~0), "9,f,g", 0, v9
},
1603 { "fmovsuge", F3F(2, 0x35, 0x081)|MCOND(FCONDUGE
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDUGE
,~0), "6,f,g", 0, v9
},
1604 { "fmovsuge", F3F(2, 0x35, 0x0a1)|MCOND(FCONDUGE
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDUGE
,~0), "7,f,g", 0, v9
},
1605 { "fmovsuge", F3F(2, 0x35, 0x0c1)|MCOND(FCONDUGE
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDUGE
,~0), "8,f,g", 0, v9
},
1606 { "fmovsuge", F3F(2, 0x35, 0x0e1)|MCOND(FCONDUGE
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDUGE
,~0), "9,f,g", 0, v9
},
1607 { "fmovdul", F3F(2, 0x35, 0x082)|MCOND(FCONDUL
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDUL
,~0), "6,f,g", 0, v9
},
1608 { "fmovdul", F3F(2, 0x35, 0x0a2)|MCOND(FCONDUL
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDUL
,~0), "7,f,g", 0, v9
},
1609 { "fmovdul", F3F(2, 0x35, 0x0c2)|MCOND(FCONDUL
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDUL
,~0), "8,f,g", 0, v9
},
1610 { "fmovdul", F3F(2, 0x35, 0x0e2)|MCOND(FCONDUL
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDUL
,~0), "9,f,g", 0, v9
},
1611 { "fmovqul", F3F(2, 0x35, 0x083)|MCOND(FCONDUL
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDUL
,~0), "6,f,g", 0, v9
},
1612 { "fmovqul", F3F(2, 0x35, 0x0a3)|MCOND(FCONDUL
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDUL
,~0), "7,f,g", 0, v9
},
1613 { "fmovqul", F3F(2, 0x35, 0x0c3)|MCOND(FCONDUL
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDUL
,~0), "8,f,g", 0, v9
},
1614 { "fmovqul", F3F(2, 0x35, 0x0e3)|MCOND(FCONDUL
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDUL
,~0), "9,f,g", 0, v9
},
1615 { "fmovsul", F3F(2, 0x35, 0x081)|MCOND(FCONDUL
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDUL
,~0), "6,f,g", 0, v9
},
1616 { "fmovsul", F3F(2, 0x35, 0x0a1)|MCOND(FCONDUL
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDUL
,~0), "7,f,g", 0, v9
},
1617 { "fmovsul", F3F(2, 0x35, 0x0c1)|MCOND(FCONDUL
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDUL
,~0), "8,f,g", 0, v9
},
1618 { "fmovsul", F3F(2, 0x35, 0x0e1)|MCOND(FCONDUL
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDUL
,~0), "9,f,g", 0, v9
},
1619 { "fmovdule", F3F(2, 0x35, 0x082)|MCOND(FCONDULE
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDULE
,~0), "6,f,g", 0, v9
},
1620 { "fmovdule", F3F(2, 0x35, 0x0a2)|MCOND(FCONDULE
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDULE
,~0), "7,f,g", 0, v9
},
1621 { "fmovdule", F3F(2, 0x35, 0x0c2)|MCOND(FCONDULE
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDULE
,~0), "8,f,g", 0, v9
},
1622 { "fmovdule", F3F(2, 0x35, 0x0e2)|MCOND(FCONDULE
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDULE
,~0), "9,f,g", 0, v9
},
1623 { "fmovqule", F3F(2, 0x35, 0x083)|MCOND(FCONDULE
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDULE
,~0), "6,f,g", 0, v9
},
1624 { "fmovqule", F3F(2, 0x35, 0x0a3)|MCOND(FCONDULE
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDULE
,~0), "7,f,g", 0, v9
},
1625 { "fmovqule", F3F(2, 0x35, 0x0c3)|MCOND(FCONDULE
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDULE
,~0), "8,f,g", 0, v9
},
1626 { "fmovqule", F3F(2, 0x35, 0x0e3)|MCOND(FCONDULE
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDULE
,~0), "9,f,g", 0, v9
},
1627 { "fmovsule", F3F(2, 0x35, 0x081)|MCOND(FCONDULE
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDULE
,~0), "6,f,g", 0, v9
},
1628 { "fmovsule", F3F(2, 0x35, 0x0a1)|MCOND(FCONDULE
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDULE
,~0), "7,f,g", 0, v9
},
1629 { "fmovsule", F3F(2, 0x35, 0x0c1)|MCOND(FCONDULE
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDULE
,~0), "8,f,g", 0, v9
},
1630 { "fmovsule", F3F(2, 0x35, 0x0e1)|MCOND(FCONDULE
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDULE
,~0), "9,f,g", 0, v9
},
1631 { "fmovdvc", F3F(2, 0x35, 0x102)|MCOND(CONDVC
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDVC
,~0), "z,f,g", 0, v9
},
1632 { "fmovdvc", F3F(2, 0x35, 0x182)|MCOND(CONDVC
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDVC
,~0), "Z,f,g", 0, v9
},
1633 { "fmovqvc", F3F(2, 0x35, 0x103)|MCOND(CONDVC
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDVC
,~0), "z,f,g", 0, v9
},
1634 { "fmovqvc", F3F(2, 0x35, 0x183)|MCOND(CONDVC
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDVC
,~0), "Z,f,g", 0, v9
},
1635 { "fmovsvc", F3F(2, 0x35, 0x101)|MCOND(CONDVC
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDVC
,~0), "z,f,g", 0, v9
},
1636 { "fmovsvc", F3F(2, 0x35, 0x181)|MCOND(CONDVC
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDVC
,~0), "Z,f,g", 0, v9
},
1637 { "fmovdvs", F3F(2, 0x35, 0x102)|MCOND(CONDVS
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDVS
,~0), "z,f,g", 0, v9
},
1638 { "fmovdvs", F3F(2, 0x35, 0x182)|MCOND(CONDVS
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDVS
,~0), "Z,f,g", 0, v9
},
1639 { "fmovqvs", F3F(2, 0x35, 0x103)|MCOND(CONDVS
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDVS
,~0), "z,f,g", 0, v9
},
1640 { "fmovqvs", F3F(2, 0x35, 0x183)|MCOND(CONDVS
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDVS
,~0), "Z,f,g", 0, v9
},
1641 { "fmovsvs", F3F(2, 0x35, 0x101)|MCOND(CONDVS
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDVS
,~0), "z,f,g", 0, v9
},
1642 { "fmovsvs", F3F(2, 0x35, 0x181)|MCOND(CONDVS
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDVS
,~0), "Z,f,g", 0, v9
},
1643 { "fmovdz", F3F(2, 0x35, 0x102)|MCOND(CONDZ
,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDZ
,~0), "z,f,g", F_ALIAS
, v9
},
1644 { "fmovdz", F3F(2, 0x35, 0x082)|MCOND(FCONDZ
,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDZ
,~0), "6,f,g", F_ALIAS
, v9
},
1645 { "fmovdz", F3F(2, 0x35, 0x182)|MCOND(CONDZ
,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDZ
,~0), "Z,f,g", F_ALIAS
, v9
},
1646 { "fmovdz", F3F(2, 0x35, 0x0a2)|MCOND(FCONDZ
,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDZ
,~0), "7,f,g", F_ALIAS
, v9
},
1647 { "fmovdz", F3F(2, 0x35, 0x0c2)|MCOND(FCONDZ
,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDZ
,~0), "8,f,g", F_ALIAS
, v9
},
1648 { "fmovdz", F3F(2, 0x35, 0x0e2)|MCOND(FCONDZ
,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDZ
,~0), "9,f,g", F_ALIAS
, v9
},
1649 { "fmovqz", F3F(2, 0x35, 0x103)|MCOND(CONDZ
,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDZ
,~0), "z,f,g", F_ALIAS
, v9
},
1650 { "fmovqz", F3F(2, 0x35, 0x083)|MCOND(FCONDZ
,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDZ
,~0), "6,f,g", F_ALIAS
, v9
},
1651 { "fmovqz", F3F(2, 0x35, 0x183)|MCOND(CONDZ
,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDZ
,~0), "Z,f,g", F_ALIAS
, v9
},
1652 { "fmovqz", F3F(2, 0x35, 0x0a3)|MCOND(FCONDZ
,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDZ
,~0), "7,f,g", F_ALIAS
, v9
},
1653 { "fmovqz", F3F(2, 0x35, 0x0c3)|MCOND(FCONDZ
,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDZ
,~0), "8,f,g", F_ALIAS
, v9
},
1654 { "fmovqz", F3F(2, 0x35, 0x0e3)|MCOND(FCONDZ
,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDZ
,~0), "9,f,g", F_ALIAS
, v9
},
1655 { "fmovsz", F3F(2, 0x35, 0x101)|MCOND(CONDZ
,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDZ
,~0), "z,f,g", F_ALIAS
, v9
},
1656 { "fmovsz", F3F(2, 0x35, 0x081)|MCOND(FCONDZ
,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDZ
,~0), "6,f,g", F_ALIAS
, v9
},
1657 { "fmovsz", F3F(2, 0x35, 0x181)|MCOND(CONDZ
,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDZ
,~0), "Z,f,g", F_ALIAS
, v9
},
1658 { "fmovsz", F3F(2, 0x35, 0x0a1)|MCOND(FCONDZ
,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDZ
,~0), "7,f,g", F_ALIAS
, v9
},
1659 { "fmovsz", F3F(2, 0x35, 0x0c1)|MCOND(FCONDZ
,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDZ
,~0), "8,f,g", F_ALIAS
, v9
},
1660 { "fmovsz", F3F(2, 0x35, 0x0e1)|MCOND(FCONDZ
,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDZ
,~0), "9,f,g", F_ALIAS
, v9
},
1662 #define brfc(opcode, mask, lose, flags) \
1663 { opcode, (mask), ANNUL|(lose), "l", flags|F_DELAYED, v6 }, \
1664 { opcode, (mask)|ANNUL, (lose), ",a l", flags|F_DELAYED, v6 }
1666 #define brfcx(opcode, mask, lose, flags) /* v9 */ \
1667 { opcode, FBFCC(0)|(mask), ANNUL|BPRED|FBFCC(~0)|(lose), "6,G", flags|F_DELAYED, v9 }, \
1668 { opcode, FBFCC(0)|(mask)|ANNUL, BPRED|FBFCC(~0)|(lose), ",a 6,G", flags|F_DELAYED, v9 }, \
1669 { opcode, FBFCC(0)|(mask), ANNUL|BPRED|FBFCC(~0)|(lose), ",N 6,G", flags|F_DELAYED, v9 }, \
1670 { opcode, FBFCC(0)|(mask)|ANNUL, BPRED|FBFCC(~0)|(lose), ",a,N 6,G", flags|F_DELAYED, v9 }, \
1671 { opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), ",T 6,G", flags|F_DELAYED, v9 }, \
1672 { opcode, FBFCC(0)|(mask)|BPRED|ANNUL, FBFCC(~0)|(lose), ",a,T 6,G", flags|F_DELAYED, v9 }, \
1673 { opcode, FBFCC(1)|(mask), ANNUL|BPRED|FBFCC(~1)|(lose), "7,G", flags|F_DELAYED, v9 }, \
1674 { opcode, FBFCC(1)|(mask)|ANNUL, BPRED|FBFCC(~1)|(lose), ",a 7,G", flags|F_DELAYED, v9 }, \
1675 { opcode, FBFCC(1)|(mask), ANNUL|BPRED|FBFCC(~1)|(lose), ",N 7,G", flags|F_DELAYED, v9 }, \
1676 { opcode, FBFCC(1)|(mask)|ANNUL, BPRED|FBFCC(~1)|(lose), ",a,N 7,G", flags|F_DELAYED, v9 }, \
1677 { opcode, FBFCC(1)|(mask)|BPRED, ANNUL|FBFCC(~1)|(lose), ",T 7,G", flags|F_DELAYED, v9 }, \
1678 { opcode, FBFCC(1)|(mask)|BPRED|ANNUL, FBFCC(~1)|(lose), ",a,T 7,G", flags|F_DELAYED, v9 }, \
1679 { opcode, FBFCC(2)|(mask), ANNUL|BPRED|FBFCC(~2)|(lose), "8,G", flags|F_DELAYED, v9 }, \
1680 { opcode, FBFCC(2)|(mask)|ANNUL, BPRED|FBFCC(~2)|(lose), ",a 8,G", flags|F_DELAYED, v9 }, \
1681 { opcode, FBFCC(2)|(mask), ANNUL|BPRED|FBFCC(~2)|(lose), ",N 8,G", flags|F_DELAYED, v9 }, \
1682 { opcode, FBFCC(2)|(mask)|ANNUL, BPRED|FBFCC(~2)|(lose), ",a,N 8,G", flags|F_DELAYED, v9 }, \
1683 { opcode, FBFCC(2)|(mask)|BPRED, ANNUL|FBFCC(~2)|(lose), ",T 8,G", flags|F_DELAYED, v9 }, \
1684 { opcode, FBFCC(2)|(mask)|BPRED|ANNUL, FBFCC(~2)|(lose), ",a,T 8,G", flags|F_DELAYED, v9 }, \
1685 { opcode, FBFCC(3)|(mask), ANNUL|BPRED|FBFCC(~3)|(lose), "9,G", flags|F_DELAYED, v9 }, \
1686 { opcode, FBFCC(3)|(mask)|ANNUL, BPRED|FBFCC(~3)|(lose), ",a 9,G", flags|F_DELAYED, v9 }, \
1687 { opcode, FBFCC(3)|(mask), ANNUL|BPRED|FBFCC(~3)|(lose), ",N 9,G", flags|F_DELAYED, v9 }, \
1688 { opcode, FBFCC(3)|(mask)|ANNUL, BPRED|FBFCC(~3)|(lose), ",a,N 9,G", flags|F_DELAYED, v9 }, \
1689 { opcode, FBFCC(3)|(mask)|BPRED, ANNUL|FBFCC(~3)|(lose), ",T 9,G", flags|F_DELAYED, v9 }, \
1690 { opcode, FBFCC(3)|(mask)|BPRED|ANNUL, FBFCC(~3)|(lose), ",a,T 9,G", flags|F_DELAYED, v9 }
1692 /* v9: We must put `brfcx' before `brfc', to ensure that we never match
1693 v9: something against an expression unless it is an expression. Otherwise,
1694 v9: we end up with undefined symbol tables entries, because they get added,
1695 v9: but are not deleted if the pattern fails to match. */
1697 #define condfc(fop, cop, mask, flags) \
1698 brfcx(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
1699 brfc(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \
1700 brfc(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags)
1702 #define condf(fop, mask, flags) \
1703 brfcx(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
1704 brfc(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags)
1706 condfc("fb", "cb", 0x8, 0),
1707 condfc("fba", "cba", 0x8, F_ALIAS
),
1708 condfc("fbe", "cb0", 0x9, 0),
1709 condf("fbz", 0x9, F_ALIAS
),
1710 condfc("fbg", "cb2", 0x6, 0),
1711 condfc("fbge", "cb02", 0xb, 0),
1712 condfc("fbl", "cb1", 0x4, 0),
1713 condfc("fble", "cb01", 0xd, 0),
1714 condfc("fblg", "cb12", 0x2, 0),
1715 condfc("fbn", "cbn", 0x0, 0),
1716 condfc("fbne", "cb123", 0x1, 0),
1717 condf("fbnz", 0x1, F_ALIAS
),
1718 condfc("fbo", "cb012", 0xf, 0),
1719 condfc("fbu", "cb3", 0x7, 0),
1720 condfc("fbue", "cb03", 0xa, 0),
1721 condfc("fbug", "cb23", 0x5, 0),
1722 condfc("fbuge", "cb023", 0xc, 0),
1723 condfc("fbul", "cb13", 0x3, 0),
1724 condfc("fbule", "cb013", 0xe, 0),
1728 #undef brfcx /* v9 */
1730 { "jmp", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0
|ASI(~0), "1+2", F_DELAYED
, v6
}, /* jmpl rs1+rs2,%g0 */
1731 { "jmp", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0
|ASI_RS2(~0), "1", F_DELAYED
, v6
}, /* jmpl rs1+%g0,%g0 */
1732 { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0
, "1+i", F_DELAYED
, v6
}, /* jmpl rs1+i,%g0 */
1733 { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0
, "i+1", F_DELAYED
, v6
}, /* jmpl i+rs1,%g0 */
1734 { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0
|RS1_G0
, "i", F_DELAYED
, v6
}, /* jmpl %g0+i,%g0 */
1735 { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0
|SIMM13(~0), "1", F_DELAYED
, v6
}, /* jmpl rs1+0,%g0 */
1737 { "nop", F2(0, 4), 0xfeffffff, "", 0, v6
}, /* sethi 0, %g0 */
1739 { "set", F2(0x0, 0x4), F2(~0x0, ~0x4), "Sh,d", F_ALIAS
, v6
},
1741 { "sethi", F2(0x0, 0x4), F2(~0x0, ~0x4), "h,d", 0, v6
},
1743 { "taddcc", F3(2, 0x20, 0), F3(~2, ~0x20, ~0)|ASI(~0), "1,2,d", 0, v6
},
1744 { "taddcc", F3(2, 0x20, 1), F3(~2, ~0x20, ~1), "1,i,d", 0, v6
},
1745 { "taddcc", F3(2, 0x20, 1), F3(~2, ~0x20, ~1), "i,1,d", 0, v6
},
1746 { "taddcctv", F3(2, 0x22, 0), F3(~2, ~0x22, ~0)|ASI(~0), "1,2,d", 0, v6
},
1747 { "taddcctv", F3(2, 0x22, 1), F3(~2, ~0x22, ~1), "1,i,d", 0, v6
},
1748 { "taddcctv", F3(2, 0x22, 1), F3(~2, ~0x22, ~1), "i,1,d", 0, v6
},
1750 { "tsubcc", F3(2, 0x21, 0), F3(~2, ~0x21, ~0)|ASI(~0), "1,2,d", 0, v6
},
1751 { "tsubcc", F3(2, 0x21, 1), F3(~2, ~0x21, ~1), "1,i,d", 0, v6
},
1752 { "tsubcctv", F3(2, 0x23, 0), F3(~2, ~0x23, ~0)|ASI(~0), "1,2,d", 0, v6
},
1753 { "tsubcctv", F3(2, 0x23, 1), F3(~2, ~0x23, ~1), "1,i,d", 0, v6
},
1755 /* FIXME Thise is marked F_ALIAS, so that it won't conflict with new v9
1756 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
1757 { "unimp", F2(0x0, 0x0), 0xffc00000, "n", F_ALIAS
, v6
},
1758 { "illtrap", F2(0, 0), F2(~0, ~0)|RD_G0
, "n", 0, v9
},
1760 /* This *is* a commutative instruction. */
1761 { "xnor", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "1,2,d", 0, v6
},
1762 { "xnor", F3(2, 0x07, 1), F3(~2, ~0x07, ~1), "1,i,d", 0, v6
},
1763 { "xnor", F3(2, 0x07, 1), F3(~2, ~0x07, ~1), "i,1,d", 0, v6
},
1764 /* This *is* a commutative instruction. */
1765 { "xnorcc", F3(2, 0x17, 0), F3(~2, ~0x17, ~0)|ASI(~0), "1,2,d", 0, v6
},
1766 { "xnorcc", F3(2, 0x17, 1), F3(~2, ~0x17, ~1), "1,i,d", 0, v6
},
1767 { "xnorcc", F3(2, 0x17, 1), F3(~2, ~0x17, ~1), "i,1,d", 0, v6
},
1768 { "xor", F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0), "1,2,d", 0, v6
},
1769 { "xor", F3(2, 0x03, 1), F3(~2, ~0x03, ~1), "1,i,d", 0, v6
},
1770 { "xor", F3(2, 0x03, 1), F3(~2, ~0x03, ~1), "i,1,d", 0, v6
},
1771 { "xorcc", F3(2, 0x13, 0), F3(~2, ~0x13, ~0)|ASI(~0), "1,2,d", 0, v6
},
1772 { "xorcc", F3(2, 0x13, 1), F3(~2, ~0x13, ~1), "1,i,d", 0, v6
},
1773 { "xorcc", F3(2, 0x13, 1), F3(~2, ~0x13, ~1), "i,1,d", 0, v6
},
1775 { "not", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "1,d", F_ALIAS
, v6
}, /* xnor rs1,%0,rd */
1776 { "not", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "r", F_ALIAS
, v6
}, /* xnor rd,%0,rd */
1778 { "btog", F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0), "2,r", F_ALIAS
, v6
}, /* xor rd,rs2,rd */
1779 { "btog", F3(2, 0x03, 1), F3(~2, ~0x03, ~1), "i,r", F_ALIAS
, v6
}, /* xor rd,i,rd */
1781 /* FPop1 and FPop2 are not instructions. Don't accept them. */
1783 { "fdtoi", F3F(2, 0x34, 0x0d2), F3F(~2, ~0x34, ~0x0d2)|RS1_G0
, "B,g", 0, v6
},
1784 { "fstoi", F3F(2, 0x34, 0x0d1), F3F(~2, ~0x34, ~0x0d1)|RS1_G0
, "f,g", 0, v6
},
1785 { "fqtoi", F3F(2, 0x34, 0x0d3), F3F(~2, ~0x34, ~0x0d3)|RS1_G0
, "R,g", 0, v8
},
1787 { "fdtox", F3F(2, 0x34, 0x082), F3F(~2, ~0x34, ~0x082)|RS1_G0
, "B,g", 0, v9
},
1788 { "fstox", F3F(2, 0x34, 0x081), F3F(~2, ~0x34, ~0x081)|RS1_G0
, "f,g", 0, v9
},
1789 { "fqtox", F3F(2, 0x34, 0x083), F3F(~2, ~0x34, ~0x083)|RS1_G0
, "R,g", 0, v9
},
1791 { "fitod", F3F(2, 0x34, 0x0c8), F3F(~2, ~0x34, ~0x0c8)|RS1_G0
, "f,H", 0, v6
},
1792 { "fitos", F3F(2, 0x34, 0x0c4), F3F(~2, ~0x34, ~0x0c4)|RS1_G0
, "f,g", 0, v6
},
1793 { "fitoq", F3F(2, 0x34, 0x0cc), F3F(~2, ~0x34, ~0x0cc)|RS1_G0
, "f,J", 0, v8
},
1795 { "fxtod", F3F(2, 0x34, 0x088), F3F(~2, ~0x34, ~0x088)|RS1_G0
, "f,H", 0, v9
},
1796 { "fxtos", F3F(2, 0x34, 0x084), F3F(~2, ~0x34, ~0x084)|RS1_G0
, "f,g", 0, v9
},
1797 { "fxtoq", F3F(2, 0x34, 0x08c), F3F(~2, ~0x34, ~0x08c)|RS1_G0
, "f,J", 0, v9
},
1799 { "fdtoq", F3F(2, 0x34, 0x0ce), F3F(~2, ~0x34, ~0x0ce)|RS1_G0
, "B,J", 0, v8
},
1800 { "fdtos", F3F(2, 0x34, 0x0c6), F3F(~2, ~0x34, ~0x0c6)|RS1_G0
, "B,g", 0, v6
},
1801 { "fqtod", F3F(2, 0x34, 0x0cb), F3F(~2, ~0x34, ~0x0cb)|RS1_G0
, "R,H", 0, v8
},
1802 { "fqtos", F3F(2, 0x34, 0x0c7), F3F(~2, ~0x34, ~0x0c7)|RS1_G0
, "R,g", 0, v8
},
1803 { "fstod", F3F(2, 0x34, 0x0c9), F3F(~2, ~0x34, ~0x0c9)|RS1_G0
, "f,H", 0, v6
},
1804 { "fstoq", F3F(2, 0x34, 0x0cd), F3F(~2, ~0x34, ~0x0cd)|RS1_G0
, "f,J", 0, v8
},
1806 { "fdivd", F3F(2, 0x34, 0x04e), F3F(~2, ~0x34, ~0x04e), "v,B,H", 0, v6
},
1807 { "fdivq", F3F(2, 0x34, 0x04f), F3F(~2, ~0x34, ~0x04f), "V,R,J", 0, v8
},
1808 { "fdivs", F3F(2, 0x34, 0x04d), F3F(~2, ~0x34, ~0x04d), "e,f,g", 0, v6
},
1809 { "fmuld", F3F(2, 0x34, 0x04a), F3F(~2, ~0x34, ~0x04a), "v,B,H", 0, v6
},
1810 { "fmulq", F3F(2, 0x34, 0x04b), F3F(~2, ~0x34, ~0x04b), "V,R,J", 0, v8
},
1811 { "fmuls", F3F(2, 0x34, 0x049), F3F(~2, ~0x34, ~0x049), "e,f,g", 0, v6
},
1813 { "fdmulq", F3F(2, 0x34, 0x06e), F3F(~2, ~0x34, ~0x06e), "v,B,J", 0, v8
},
1814 { "fsmuld", F3F(2, 0x34, 0x069), F3F(~2, ~0x34, ~0x069), "e,f,H", 0, v8
},
1816 { "fsqrtd", F3F(2, 0x34, 0x02a), F3F(~2, ~0x34, ~0x02a)|RS1_G0
, "B,H", 0, v7
},
1817 { "fsqrtq", F3F(2, 0x34, 0x02b), F3F(~2, ~0x34, ~0x02b)|RS1_G0
, "R,J", 0, v8
},
1818 { "fsqrts", F3F(2, 0x34, 0x029), F3F(~2, ~0x34, ~0x029)|RS1_G0
, "f,g", 0, v7
},
1820 { "fabsd", F3F(2, 0x34, 0x00a), F3F(~2, ~0x34, ~0x00a)|RS1_G0
, "B,H", 0, v9
},
1821 { "fabsq", F3F(2, 0x34, 0x00b), F3F(~2, ~0x34, ~0x00b)|RS1_G0
, "R,J", 0, v9
},
1822 { "fabss", F3F(2, 0x34, 0x009), F3F(~2, ~0x34, ~0x009)|RS1_G0
, "f,g", 0, v6
},
1823 { "fmovd", F3F(2, 0x34, 0x002), F3F(~2, ~0x34, ~0x002)|RS1_G0
, "B,H", 0, v9
},
1824 { "fmovq", F3F(2, 0x34, 0x003), F3F(~2, ~0x34, ~0x003)|RS1_G0
, "R,J", 0, v9
},
1825 { "fmovs", F3F(2, 0x34, 0x001), F3F(~2, ~0x34, ~0x001)|RS1_G0
, "f,g", 0, v6
},
1826 { "fnegd", F3F(2, 0x34, 0x006), F3F(~2, ~0x34, ~0x006)|RS1_G0
, "B,H", 0, v9
},
1827 { "fnegq", F3F(2, 0x34, 0x007), F3F(~2, ~0x34, ~0x007)|RS1_G0
, "R,J", 0, v9
},
1828 { "fnegs", F3F(2, 0x34, 0x005), F3F(~2, ~0x34, ~0x005)|RS1_G0
, "f,g", 0, v6
},
1830 { "faddd", F3F(2, 0x34, 0x042), F3F(~2, ~0x34, ~0x042), "v,B,H", 0, v6
},
1831 { "faddq", F3F(2, 0x34, 0x043), F3F(~2, ~0x34, ~0x043), "V,R,J", 0, v8
},
1832 { "fadds", F3F(2, 0x34, 0x041), F3F(~2, ~0x34, ~0x041), "e,f,g", 0, v6
},
1833 { "fsubd", F3F(2, 0x34, 0x046), F3F(~2, ~0x34, ~0x046), "v,B,H", 0, v6
},
1834 { "fsubq", F3F(2, 0x34, 0x047), F3F(~2, ~0x34, ~0x047), "V,R,J", 0, v8
},
1835 { "fsubs", F3F(2, 0x34, 0x045), F3F(~2, ~0x34, ~0x045), "e,f,g", 0, v6
},
1837 #define CMPFCC(x) (((x)&0x3)<<25)
1839 { "fcmpd", F3F(2, 0x35, 0x052), F3F(~2, ~0x35, ~0x052)|RD_G0
, "v,B", 0, v6
},
1840 { "fcmpd", CMPFCC(0)|F3F(2, 0x35, 0x052), CMPFCC(~0)|F3F(~2, ~0x35, ~0x052), "6,v,B", 0, v9
},
1841 { "fcmpd", CMPFCC(1)|F3F(2, 0x35, 0x052), CMPFCC(~1)|F3F(~2, ~0x35, ~0x052), "7,v,B", 0, v9
},
1842 { "fcmpd", CMPFCC(2)|F3F(2, 0x35, 0x052), CMPFCC(~2)|F3F(~2, ~0x35, ~0x052), "8,v,B", 0, v9
},
1843 { "fcmpd", CMPFCC(3)|F3F(2, 0x35, 0x052), CMPFCC(~3)|F3F(~2, ~0x35, ~0x052), "9,v,B", 0, v9
},
1844 { "fcmped", F3F(2, 0x35, 0x056), F3F(~2, ~0x35, ~0x056)|RD_G0
, "v,B", 0, v6
},
1845 { "fcmped", CMPFCC(0)|F3F(2, 0x35, 0x056), CMPFCC(~0)|F3F(~2, ~0x35, ~0x056), "6,v,B", 0, v9
},
1846 { "fcmped", CMPFCC(1)|F3F(2, 0x35, 0x056), CMPFCC(~1)|F3F(~2, ~0x35, ~0x056), "7,v,B", 0, v9
},
1847 { "fcmped", CMPFCC(2)|F3F(2, 0x35, 0x056), CMPFCC(~2)|F3F(~2, ~0x35, ~0x056), "8,v,B", 0, v9
},
1848 { "fcmped", CMPFCC(3)|F3F(2, 0x35, 0x056), CMPFCC(~3)|F3F(~2, ~0x35, ~0x056), "9,v,B", 0, v9
},
1849 { "fcmpq", F3F(2, 0x34, 0x053), F3F(~2, ~0x34, ~0x053)|RD_G0
, "V,R", 0, v8
},
1850 { "fcmpq", CMPFCC(0)|F3F(2, 0x35, 0x053), CMPFCC(~0)|F3F(~2, ~0x35, ~0x053), "6,V,R", 0, v9
},
1851 { "fcmpq", CMPFCC(1)|F3F(2, 0x35, 0x053), CMPFCC(~1)|F3F(~2, ~0x35, ~0x053), "7,V,R", 0, v9
},
1852 { "fcmpq", CMPFCC(2)|F3F(2, 0x35, 0x053), CMPFCC(~2)|F3F(~2, ~0x35, ~0x053), "8,V,R", 0, v9
},
1853 { "fcmpq", CMPFCC(3)|F3F(2, 0x35, 0x053), CMPFCC(~3)|F3F(~2, ~0x35, ~0x053), "9,V,R", 0, v9
},
1854 { "fcmpeq", F3F(2, 0x34, 0x057), F3F(~2, ~0x34, ~0x057)|RD_G0
, "V,R", 0, v8
},
1855 { "fcmpeq", CMPFCC(0)|F3F(2, 0x35, 0x057), CMPFCC(~0)|F3F(~2, ~0x35, ~0x057), "6,V,R", 0, v9
},
1856 { "fcmpeq", CMPFCC(1)|F3F(2, 0x35, 0x057), CMPFCC(~1)|F3F(~2, ~0x35, ~0x057), "7,V,R", 0, v9
},
1857 { "fcmpeq", CMPFCC(2)|F3F(2, 0x35, 0x057), CMPFCC(~2)|F3F(~2, ~0x35, ~0x057), "8,V,R", 0, v9
},
1858 { "fcmpeq", CMPFCC(3)|F3F(2, 0x35, 0x057), CMPFCC(~3)|F3F(~2, ~0x35, ~0x057), "9,V,R", 0, v9
},
1859 { "fcmps", F3F(2, 0x35, 0x051), F3F(~2, ~0x35, ~0x051)|RD_G0
, "e,f", 0, v6
},
1860 { "fcmps", CMPFCC(0)|F3F(2, 0x35, 0x051), CMPFCC(~0)|F3F(~2, ~0x35, ~0x051), "6,e,f", 0, v9
},
1861 { "fcmps", CMPFCC(1)|F3F(2, 0x35, 0x051), CMPFCC(~1)|F3F(~2, ~0x35, ~0x051), "7,e,f", 0, v9
},
1862 { "fcmps", CMPFCC(2)|F3F(2, 0x35, 0x051), CMPFCC(~2)|F3F(~2, ~0x35, ~0x051), "8,e,f", 0, v9
},
1863 { "fcmps", CMPFCC(3)|F3F(2, 0x35, 0x051), CMPFCC(~3)|F3F(~2, ~0x35, ~0x051), "9,e,f", 0, v9
},
1864 { "fcmpes", F3F(2, 0x35, 0x055), F3F(~2, ~0x35, ~0x055)|RD_G0
, "e,f", 0, v6
},
1865 { "fcmpes", CMPFCC(0)|F3F(2, 0x35, 0x055), CMPFCC(~0)|F3F(~2, ~0x35, ~0x055), "6,e,f", 0, v9
},
1866 { "fcmpes", CMPFCC(1)|F3F(2, 0x35, 0x055), CMPFCC(~1)|F3F(~2, ~0x35, ~0x055), "7,e,f", 0, v9
},
1867 { "fcmpes", CMPFCC(2)|F3F(2, 0x35, 0x055), CMPFCC(~2)|F3F(~2, ~0x35, ~0x055), "8,e,f", 0, v9
},
1868 { "fcmpes", CMPFCC(3)|F3F(2, 0x35, 0x055), CMPFCC(~3)|F3F(~2, ~0x35, ~0x055), "9,e,f", 0, v9
},
1870 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
1871 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
1872 { "cpop1", F3(2, 0x36, 0), F3(~2, ~0x36, ~1), "[1+2],d", F_ALIAS
, v6
},
1873 { "cpop2", F3(2, 0x37, 0), F3(~2, ~0x37, ~1), "[1+2],d", F_ALIAS
, v6
},
1874 { "impdep1", F3(2, 0x36, 0), F3(~2, ~0x36, ~1), "[1+2],d", 0, v9
},
1875 { "impdep2", F3(2, 0x37, 0), F3(~2, ~0x37, ~1), "[1+2],d", 0, v9
},
1877 { "casa", F3(3, 0x3c, 0), F3(~3, ~0x3c, ~0), "[1]A,2,d", 0, v9
},
1878 { "casa", F3(3, 0x3c, 1), F3(~3, ~0x3c, ~1), "[1]o,2,d", 0, v9
},
1879 { "casxa", F3(3, 0x3e, 0), F3(~3, ~0x3e, ~0), "[1]A,2,d", 0, v9
},
1880 { "casxa", F3(3, 0x3e, 1), F3(~3, ~0x3e, ~1), "[1]o,2,d", 0, v9
},
1884 const int bfd_sparc_num_opcodes
= ((sizeof sparc_opcodes
)/(sizeof sparc_opcodes
[0]));
projects / binutils-gdb.git / blob