openpower/isa/bitmanip.mdwn

   1 <!-- Draft Instructions here described in https://libre-soc.org/openpower/sv/bitmanip/ -->
   2 <!-- These instructions are *not yet official* -->
   3
   4 # Ternary Bitwise Logic Immediate
   5
   6 TLI-Form
   7
   8 * ternlogi RT,RA,RB,TLI
   9 * ternlogi. RT,RA,RB,TLI
  10
  11 Pseudo-code:
  12
  13     result <- [0] * XLEN
  14     do i = 0 to XLEN - 1
  15       idx <- (RT)[i] || (RA)[i] || (RB)[i]
  16       result[i] <- TLI[7-idx]
  17     RT <- result
  18
  19 Special Registers Altered:
  20
  21     CR0                    (if Rc=1)
  22
  23 # Generalized Bit-Reverse
  24
  25 X-Form
  26
  27 * grev RT,RA,RB (Rc=0)
  28 * grev. RT,RA,RB (Rc=1)
  29
  30 Pseudo-code:
  31
  32     result <- [0] * XLEN
  33     b <- EXTZ64(RB)
  34     do i = 0 to XLEN - 1
  35       idx <- b[64-log2(XLEN):63] ^ i
  36       result[i] <- (RA)[idx]
  37     RT <- result
  38
  39 Special Registers Altered:
  40
  41     CR0                    (if Rc=1)
  42
  43 # Generalized Bit-Reverse Immediate
  44
  45 XB-Form
  46
  47 * grevi RT,RA,XBI (Rc=0)
  48 * grevi. RT,RA,XBI (Rc=1)
  49
  50 Pseudo-code:
  51
  52     result <- [0] * XLEN
  53     do i = 0 to XLEN - 1
  54       idx <- XBI[6-log2(XLEN):5] ^ i
  55       result[i] <- (RA)[idx]
  56     RT <- result
  57
  58 Special Registers Altered:
  59
  60     CR0                    (if Rc=1)
  61
  62 # Generalized Bit-Reverse Word
  63
  64 X-Form
  65
  66 * grevw RT,RA,RB (Rc=0)
  67 * grevw. RT,RA,RB (Rc=1)
  68
  69 Pseudo-code:
  70
  71     result <- [0] * (XLEN / 2)
  72     a <- (RA)[XLEN/2:XLEN-1]
  73     b <- EXTZ64(RB)
  74     do i = 0 to XLEN / 2 - 1
  75       idx <- b[64-log2(XLEN/2):63] ^ i
  76       result[i] <- a[idx]
  77     RT <- ([0] * (XLEN / 2)) || result
  78
  79 Special Registers Altered:
  80
  81     CR0                    (if Rc=1)
  82
  83 # Generalized Bit-Reverse Word Immediate
  84
  85 X-Form
  86
  87 * grevwi RT,RA,SH (Rc=0)
  88 * grevwi. RT,RA,SH (Rc=1)
  89
  90 Pseudo-code:
  91
  92     result <- [0] * (XLEN / 2)
  93     a <- (RA)[XLEN/2:XLEN-1]
  94     do i = 0 to XLEN / 2 - 1
  95       idx <- SH[5-log2(XLEN/2):4] ^ i
  96       result[i] <- a[idx]
  97     RT <- ([0] * (XLEN / 2)) || result
  98
  99 Special Registers Altered:
 100
 101     CR0                    (if Rc=1)