openpower/isa/comparefixed.mdwn

   1 <!-- Instructions here described in PowerISA Version 3.0 B Book 1 -->
   2
   3 <!-- Section 3.3.10 Fixed-Point Compare Instructions Pages 84 - 88 -->
   4
   5 <!-- The fixed-point Compare instructions compare the contents of register RA with -->
   6 <!-- (1) the sign-extended value of the SI field, (2) the zero-extended value of the -->
   7 <!-- UI field, or (3) the contents of register RB. The comparison is signed for cmpi -->
   8 <!-- and cmp, and unsigned for cmpli and cmpl. -->
   9
  10 # Compare Immediate
  11
  12 D-Form
  13
  14 * cmpi BF,L,RA,SI
  15
  16 Pseudo-code:
  17
  18     if L = 0 then a <- EXTS((RA)[XLEN/2:XLEN-1])
  19     else a <-  (RA)
  20     if      a < EXTS(SI) then c <- 0b100
  21     else if a > EXTS(SI) then c <- 0b010
  22     else                      c <- 0b001
  23     CR[4*BF+32:4*BF+35] <- c || XER[SO]
  24
  25 Special Registers Altered:
  26
  27     CR field BF
  28
  29 # Compare
  30
  31 X-Form
  32
  33 * cmp BF,L,RA,RB
  34
  35 Pseudo-code:
  36
  37     if L = 0 then
  38         a <- EXTS((RA)[XLEN/2:XLEN-1])
  39         b <- EXTS((RB)[XLEN/2:XLEN-1])
  40     else
  41         a <- (RA)
  42         b <- (RB)
  43     if      a < b then c <-  0b100
  44     else if a > b then c <-  0b010
  45     else               c <-  0b001
  46     CR[4*BF+32:4*BF+35] <-  c || XER[SO]
  47
  48 Special Registers Altered:
  49
  50     CR field BF
  51
  52 # Compare Logical Immediate
  53
  54 D-Form
  55
  56 * cmpli BF,L,RA,UI
  57
  58 Pseudo-code:
  59
  60     if L = 0 then a <- [0]*(XLEN/2) || (RA)[XLEN/2:XLEN-1]
  61     else a <- (RA)
  62     if      a <u ([0]*(XLEN-16) || UI) then c <- 0b100
  63     else if a >u ([0]*(XLEN-16) || UI) then c <- 0b010
  64     else                             c <- 0b001
  65     CR[4*BF+32:4*BF+35] <- c || XER[SO]
  66
  67 Special Registers Altered:
  68
  69     CR field BF
  70
  71 # Compare Logical
  72
  73 X-Form
  74
  75 * cmpl BF,L,RA,RB
  76
  77 Pseudo-code:
  78
  79     if L = 0 then
  80         a <- [0]*(XLEN/2) || (RA)[XLEN/2:XLEN-1]
  81         b <- [0]*(XLEN/2) || (RB)[XLEN/2:XLEN-1]
  82     else
  83         a <-  (RA)
  84         b <-  (RB)
  85     if      a <u b then c <- 0b100
  86     else if a >u b then c <- 0b010
  87     else                c <-  0b001
  88     CR[4*BF+32:4*BF+35] <- c || XER[SO]
  89
  90 Special Registers Altered:
  91
  92     CR field BF
  93
  94 # Compare Ranged Byte
  95
  96 X-Form
  97
  98 * cmprb BF,L,RA,RB
  99
 100 Pseudo-code:
 101
 102     src1    <- EXTZ((RA)[56:63])
 103     src21hi <- EXTZ((RB)[32:39])
 104     src21lo <- EXTZ((RB)[40:47])
 105     src22hi <- EXTZ((RB)[48:55])
 106     src22lo <- EXTZ((RB)[56:63])
 107     if L=0 then
 108        in_range <-  (src22lo  <= src1) & (src1 <=  src22hi)
 109     else
 110        in_range <- (((src21lo  <= src1) & (src1 <=  src21hi)) |
 111                     ((src22lo  <= src1) & (src1 <=  src22hi)))
 112     CR[4*BF+32] <- 0b0
 113     CR[4*BF+33] <- in_range
 114     CR[4*BF+34] <- 0b0
 115     CR[4*BF+35] <- 0b0
 116
 117 Special Registers Altered:
 118
 119     CR field BF
 120
 121 # Compare Equal Byte
 122
 123 X-Form
 124
 125 * cmpeqb BF,RA,RB
 126
 127 Pseudo-code:
 128
 129     src1 <- GPR[RA]
 130     src1 <- src1[56:63]
 131     match <- ((src1 = (RB)[00:07]) |
 132               (src1 = (RB)[08:15]) |
 133               (src1 = (RB)[16:23]) |
 134               (src1 = (RB)[24:31]) |
 135               (src1 = (RB)[32:39]) |
 136               (src1 = (RB)[40:47]) |
 137               (src1 = (RB)[48:55]) |
 138               (src1 = (RB)[56:63]))
 139     CR[4*BF+32] <- 0b0
 140     CR[4*BF+33] <- match
 141     CR[4*BF+34] <- 0b0
 142     CR[4*BF+35] <- 0b0
 143
 144 Special Registers Altered:
 145
 146     CR field BF
 147
 148 <!-- Checked March 2021 -->