openpower/isa/condition.mdwn

   1 # Condition Register AND
   2
   3 XL-Form
   4
   5 * crand BT,BA,BB
   6
   7 Pseudo-code:
   8
   9     CR[BT+32] <-  CR[BA+32] & CR[BB+32]
  10
  11 Special Registers Altered:
  12
  13     CR[BT+32]
  14
  15 # Condition Register NAND
  16
  17 XL-Form
  18
  19 * crnand BT,BA,BB
  20
  21 Pseudo-code:
  22
  23     CR[BT+32] <- ¬(CR[BA+32] & CR[BB+32])
  24
  25 Special Registers Altered:
  26
  27     CR[BT+32]
  28
  29 # Condition Register OR
  30
  31 XL-Form
  32
  33 * cror BT,BA,BB
  34
  35 Pseudo-code:
  36
  37     CR[BT+32] <-  CR[BA+32] | CR[BB+32]
  38
  39 Special Registers Altered:
  40
  41     CR[BT+32]
  42
  43 # Condition Register XOR
  44
  45 XL-Form
  46
  47 * crxor     BT,BA,BB
  48
  49 Pseudo-code:
  50
  51     CR[BT+32] <- CR[BA+32] ^ CR[BB+32]
  52
  53 Special Registers Altered:
  54
  55     CR[BT+32]
  56
  57 # Condition Register NOR
  58
  59 XL-Form
  60
  61 * crnor BT,BA,BB
  62
  63 Pseudo-code:
  64
  65     CR[BT+32] <- ¬(CR[BA+32] | CR[BB+32])
  66
  67 Special Registers Altered:
  68
  69     CR[BT+32]
  70
  71 # Condition Register Equivalent
  72
  73 XL-Form
  74
  75 * creqv BT,BA,BB
  76
  77 Pseudo-code:
  78
  79     CR[BT+32] <- ¬(CR[BA+32] ^ CR[BB+32])
  80
  81 Special Registers Altered:
  82
  83     CR[BT+32]
  84
  85 # Condition Register AND with Complement
  86
  87 XL-Form
  88
  89 * crandc BT,BA,BB
  90
  91 Pseudo-code:
  92
  93     CR[BT+32] <- CR[BA+32] &  ¬CR[BB+32]
  94
  95 Special Registers Altered:
  96
  97     CR[BT+32]
  98
  99 # Condition Register OR with Complement
 100
 101 XL-Form
 102
 103 * crorc BT,BA,BB
 104
 105 Pseudo-code:
 106
 107     CR[BT+32] <- CR[BA+32] |  ¬CR[BB+32]
 108
 109 Special Registers Altered:
 110
 111     CR[BT+32]
 112
 113 # Move Condition Register Field
 114
 115 XL-Form
 116
 117 * mcrf BF,BFA
 118
 119 Pseudo-code:
 120
 121     CR[4*BF+32:4*BF+35] <- CR[4*BFA+32:4*BFA+35]
 122
 123 Special Registers Altered:
 124
 125     CR field BF
 126