10 MEM(EA, 1) <- (RS)[56:63]
21 MEM(EA, 1) <- (RS)[56:63]
23 # Store Byte with Update
30 MEM(EA, 1) <- (RS)[56:63]
33 # Store Byte with Update Indexed
40 MEM(EA, 1) <- (RS)[56:63]
51 MEM(EA, 2) <- (RS)[48:63]
53 # Store Halfword Indexed
62 MEM(EA, 2) <- (RS)[48:63]
64 # Store Halfword with Update
71 MEM(EA, 2) <- (RS)[48:63]
74 # Store Halfword with Update Indexed
81 MEM(EA, 2) <- (RS)[48:63]
93 MEM(EA, 4) <- (RS)[32:63]
101 if RA = 0 then b <- 0
104 MEM(EA, 4) <- (RS)[32:63]
106 # Store Word with Update
113 MEM(EA, 4) <- (RS) 32:63
116 # Store Word with Update Indexed
123 MEM(EA, 4) <- (RS) 32:63
132 if RA = 0 then b <- 0
134 EA <- b + EXTS(DS || 0b00)
137 # Store Doubleword Indexed
143 if RA = 0 then b <- 0
148 # Store Doubleword with Update
154 EA <- (RA) + EXTS(DS || 0b00)
158 # Store Doubleword with Update Indexed
174 if RA = 0 then b <- 0
176 EA <- b + EXTS(DS || 0b00)
179 # Store Halfword Byte-Reverse Indexed
185 if RA = 0 then b <- 0
188 MEM(EA, 2) <- (RS) [56:63] || (RS)[48:55]
190 # Store Word Byte-Reverse Indexed
196 if RA = 0 then b <- 0
199 MEM(EA, 4) <- (RS)[56:63] || (RS)[48:55] || (RS)[40:47]
202 # Store Doubleword Byte-Reverse Indexed
208 if RA = 0 then b <- 0
211 MEM(EA, 8) <- (RS) [56:63] || (RS)48:55]
212 || (RS)[40:47] || (RS)[32:39]
213 || (RS)[24:31] || (RS)[16:23]
214 || (RS)[8:15] || (RS)[0:7]
216 # Store Multiple Word
222 if RA = 0 then b <- 0
227 MEM(EA, 4) <- GPR(r)[32:63]