identify SVP64 LD bit-reverse pattern as pseudo-assembler
[openpower-isa.git] / openpower / isatables / LDSTRM-2P-2S1D.csv
1 insn,CONDITIONS,Ptype,Etype,0,1,2,3,in1,in2,in3,out,CR in,CR out,out2
2 lwarx,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
3 ldx,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
4 lwzx,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
5 lbarx,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
6 ldarx,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
7 lbzx,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
8 lharx,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
9 lhzx,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
10 lwax,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
11 lhax,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
12 ldbrx,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
13 lwbrx,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
14 lfsx,,2P,EXTRA2,d:FRT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,FRT,0,0,0
15 lfdx,,2P,EXTRA2,d:FRT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,FRT,0,0,0
16 lwzcix,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
17 lhbrx,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
18 lhzcix,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
19 lbzcix,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
20 lfiwax,,2P,EXTRA2,d:FRT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,FRT,0,0,0
21 ldcix,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0
22 lfiwzx,,2P,EXTRA2,d:FRT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,FRT,0,0,0
23 stwu,,2P,EXTRA2,d:RA,s:RS,s:RA,0,RA_OR_ZERO,0,RS,0,0,0,RA
24 stbu,,2P,EXTRA2,d:RA,s:RS,s:RA,0,RA_OR_ZERO,0,RS,0,0,0,RA
25 sthu,,2P,EXTRA2,d:RA,s:RS,s:RA,0,RA_OR_ZERO,0,RS,0,0,0,RA
26 stfsu,,2P,EXTRA2,d:RA,s:FRS,s:RA,0,RA,0,FRS,0,0,0,RA
27 stfdu,,2P,EXTRA2,d:RA,s:FRS,s:RA,0,RA,0,FRS,0,0,0,RA
28 stdu,,2P,EXTRA2,d:RA,s:RS,s:RA,0,RA_OR_ZERO,0,RS,0,0,0,RA
29 ld,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,0,RC,RT,0,0,0
30 lwa,,2P,EXTRA2,d:RT,s:RA,s:RB,0,RA_OR_ZERO,0,RC,RT,0,0,0
31 ldux,,2P,EXTRA2,d:RT,d:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,RA
32 lwzux,,2P,EXTRA2,d:RT,d:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,RA
33 lbzux,,2P,EXTRA2,d:RT,d:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,RA
34 lhzux,,2P,EXTRA2,d:RT,d:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,RA
35 lwaux,,2P,EXTRA2,d:RT,d:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,RA
36 lhaux,,2P,EXTRA2,d:RT,d:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,RA
37 lfsux,,2P,EXTRA2,d:FRT,d:RA,s:RB,0,RA,RB,0,FRT,0,0,RA
38 lfdux,,2P,EXTRA2,d:FRT,d:RA,s:RB,0,RA,RB,0,FRT,0,0,RA
39 stdux,,2P,EXTRA2,d:RA,s:RSs:RA,s:RB,0,RA_OR_ZERO,RB,RS,0,0,0,RA
40 stwux,,2P,EXTRA2,d:RA,s:RSs:RA,s:RB,0,RA_OR_ZERO,RB,RS,0,0,0,RA
41 stbux,,2P,EXTRA2,d:RA,s:RSs:RA,s:RB,0,RA_OR_ZERO,RB,RS,0,0,0,RA
42 sthux,,2P,EXTRA2,d:RA,s:RSs:RA,s:RB,0,RA_OR_ZERO,RB,RS,0,0,0,RA
43 stfsux,,2P,EXTRA2,d:RA,s:FRSs:RA,s:RB,0,RA,RB,FRS,0,0,0,RA
44 stfdux,,2P,EXTRA2,d:RA,s:FRSs:RA,s:RB,0,RA,RB,FRS,0,0,0,RA