7 | PO | BO| BI | BD |AA|LK |
10 |0 |6 |10 |15 |22 |23 |31|
11 | PO | RS | me | sh | me | XO |Rc|
14 |0 |6 |11 |16 |21 |26 |27 31|
15 | PO | RT | RA | RB |bm |L | XO |
18 |0 |6 |9 |12 |15 |18 |21 |29 |31 |
19 | PO | BF | BFA| BFB| BFC| msk| TLI | XO |msk|
22 |0 |6 |11 |16 |20 |27 |30 |31 |
23 | PO | ///| ///| // | LEV | //| 1| / |
26 |0 |6 |9 |10 |11 |16 |31 |
31 | PO | BF | / | L | RA| SI |
32 | PO | BF | / | L | RA| UI |
38 |0 |6 |11 |16 |30 |31 |
39 | PO | RT | RA | DS | XO |
40 | PO | RS | RA | DS | XO |
41 | PO | RSp | RA | DS | XO |
42 | PO | FRTp | RA | DS | XO |
43 | PO | FRSp | RA | DS | XO |
46 |0 |6 |11 |16 |28|29 |31 |
47 | PO | RTp | RA | DQ | PT |
48 | PO | S | RA | DQ |SX| XO |
49 | PO | T | RA | DQ |TX| XO |
52 |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 |
53 | PO | RT | RA | /// | XO | / |
54 | PO | RT | RA | RB | XO | / |
55 | PO | RT | RA | RB | XO |EH |
56 | PO | RT | RA | NB | XO | / |
57 | PO | RT | /|SR | /// | XO | / |
58 | PO | RT | /// | RB | XO | / |
59 | PO | RT | /// | RB | XO | 1 |
60 | PO | RT | /// | /// | XO | / |
61 | PO | RS | RA | RB | XO |Rc |
62 | PO | RT | RA | RB | XO |Rc |
63 | PO | RS | RA | RB | XO | 1 |
64 | PO | RS | RA | RB | XO | / |
65 | PO | RS | RA | NB | XO | / |
66 | PO | RS | RA | SH | XO |Rc |
67 | PO | RS | RA | /// | XO |Rc |
68 | PO | RS | RA | /// | XO | / |
69 | PO | RS | /|SR | /// | XO | / |
70 | PO | RS | /// | RB | XO | / |
71 | PO | RS | /// | /// | XO | / |
72 | PO | RS | /// |L1| /// | XO | / |
73 | PO | TH | RA | RB | XO | / |
74 | PO | BF |/ | L | RA | RB | XO | / |
75 | PO | BF |// | FRA | FRB | XO | / |
76 | PO | BF |// | BFA | // | /// | XO | / |
77 | PO | BF |// | /// |W | U |/ | XO |Rc |
78 | PO | BF |// | /// | /// | XO | / |
79 | PO | TH | RA | RB | XO | / |
80 | PO | /| CT | /// | /// | XO | / |
81 | PO | /| CT | RA | RB | XO | / |
82 | PO | /// | L2 | RA | RB | XO | / |
83 | PO | /// | L2 | /// | RB | XO | / |
84 | PO | /// | L2 | /// | /// | XO | / |
85 | PO | /// | L2 | /| E | /// | XO | / |
86 | PO | TO | RA | RB | XO | / |
87 | PO | FRT | RA | RB | XO | / |
88 | PO | FRT | FRA | FRB | XO | / |
89 | PO | FRTp | RA | RB | XO | / |
90 | PO | FRT | /// | FRB | XO |Rc |
91 | PO | FRT | /// | FRBp | XO |Rc |
92 | PO | FRT | /// | /// | XO |Rc |
93 | PO | FRTp | /// | FRB | XO |Rc |
94 | PO | FRTp | /// | FRBp | XO |Rc |
95 | PO | FRTp | FRA | FRBp | XO |Rc |
96 | PO | FRTp | FRAp | FRBp | XO |Rc |
97 | PO | BF |// | FRA | FRBp | XO | / |
98 | PO | BF |// | FRAp | FRBp | XO | / |
99 | PO | FRT |S | | FRB | XO |Rc |
100 | PO | FRTp |S | | FRBp | XO |Rc |
101 | PO | FRS | RA | RB | XO | / |
102 | PO | FRSp | RA | RB | XO | / |
103 | PO | BT | /// | /// | XO |Rc |
104 | PO | /// | RA | RB | XO | / |
105 | PO | /// | /// | RB | XO | / |
106 | PO | /// | /// | /// | XO | / |
107 | PO | /// | /// | E|/// | XO | / |
108 | PO | //|IH | /// | /// | XO | / |
109 | PO | A|// | /// | /// | XO | 1 |
110 | PO | A|// |R | /// | /// | XO | 1 |
111 | PO | /// | RA | RB | XO | 1 |
112 | PO | /// |WC | /// | /// | XO | / |
113 | PO | /// |T | RA | RB | XO | / |
114 | PO | VRT | RA | RB | XO | / |
115 | PO | VRS | RA | RB | XO | / |
116 | PO | MO | /// | /// | XO | / |
117 | PO | RT | /// |L3 | /// | XO | / |
120 |0 |6 |9 |11 |14 |16 |19|20|21 |31 |
121 | PO | BT | BA | BB | XO | / |
122 | PO | BO | BI | /// |BH | XO |LK |
123 | PO | | /// |S | XO | / |
124 | PO | BF |// |BFA |// | /// | XO | / |
125 | PO | /// | XO | / |
129 |0 |6 |11|12 |20|21 |31 |
130 | PO | RT | spr | XO | / |
131 | PO | RT | tbr | XO | / |
132 | PO | RT |0 | /// | XO | / |
133 | PO | RT |1 | FXM |/ | XO | / |
134 | PO | RT | dcr | XO | / |
135 | PO | RT | pmrn | XO | / |
136 | PO | RT | BHRBE | XO | / |
137 | PO | DUI | DUIS | XO | / |
138 | PO | RS |0 | FXM |/ | XO | / |
139 | PO | RS |1 | FXM |/ | XO | / |
140 | PO | RS | spr | XO | / |
141 | PO | RS | dcr | XO | / |
142 | PO | RS | pmrn | XO | / |
145 |0 |6|7 |15|16 |21 |31 |
146 | PO |L| FLM |W |FRB | XO |Rc |
149 |0 |6 |11 |16 |21 |31 |
150 | PO | T | RA | RB | XO |TX |
151 | PO | S | RA | RB | XO |SX |
154 |0 |6 |9 |11 |14 |16 |21 |30|31 |
155 | PO | T | /// | B |XO |BX|TX |
156 | PO | T | /// |UIM | B |XO |BX|TX |
157 | PO | BF | //| /// | B |XO |BX| / |
160 |0 |6 |9 |11 |16 |21 |22 |24 |29|30|31 |
161 | PO | T | A | B | XO |AX|BX|TX |
162 | PO | T | A | B |Rc | XO |AX|BX|TX |
163 | PO | BF | // | A | B | XO |AX|BX|/ |
164 | PO | T | A | B |XO |SHW | XO |AX|BX|TX |
165 | PO | T | A | B |XO |DM | XO |AX|BX|TX |
168 |0 |6 |11 |16 |21 |26 |28|29 |30|31 |
169 | PO | T | A | B | C | XO |CX|AX |BX|TX |
172 |0 |6 |11 |16 |21 |30|31 |
173 | PO | RS | RA | sh | XO |sh|Rc |
176 |0 |6 |11 |16 |22 |31 |
177 | PO | RT | RA | XBI | XO |Rc |
180 |0 |6 |11 |16 |21 |22 |31 |
181 | PO | RT| RA| RB |OE | XO |Rc |
182 | PO | RT| RA| RB | /| XO |Rc |
183 | PO | RT| RA| RB | /| XO | / |
184 | PO | RT| RA| /// |OE | XO |Rc |
187 |0 |6 |11 |16 |21 |26 |31 |
188 | PO | FRT | FRA | FRB | FRC | XO |Rc |
189 | PO | FRT | FRA | FRB | /// | XO |Rc |
190 | PO | FRT | FRA | /// | FRC | XO |Rc |
191 | PO | FRT | /// | FRB | /// | XO |Rc |
192 | PO | RT | RA | RB | BC | XO | /|
195 |0 |6 |11 |16 |21 |26 |31|
196 | PO | RS | RA | RB | MB | ME |Rc|
197 | PO | RS | RA | SH | MB | ME |Rc|
200 |0 |6 |11 |16 |21 |27|30|31|
201 | PO | RS | RA | sh | mb |XO|sh|Rc|
202 | PO | RS | RA | sh | me |XO|sh|Rc|
205 |0 |6 |11 |16 |21 |27 |31|
206 | PO | RS | RA | RB | mb | XO |Rc|
207 | PO | RS | RA | RB | me | XO |Rc|
210 |0 |6 |11 |16 |21|22 |25|26 |31|
211 | PO | RT | RA | RB | RC | XO |
212 | PO | VRT | VRA | VRB | VRC | XO |
213 | PO | VRT | VRA | VRB | /|SHB | XO |
214 | PO | VRT | VRA | VRB | /|BFA|/ | XO |
217 |0 |6 |11 |16 |21 |24|26 |31|
218 | PO | RT | RA | RB | RC | XO |Rc|
221 |0 |6 |11 |16 |21|22 |31|
222 | PO | VRT | VRA | VRB |Rc| XO |
225 |0 |6 |11 |16 |21 |31|
226 | PO | VRT | VRA | VRB | XO |
227 | PO | VRT | /// | VRB | XO |
228 | PO | VRT | UIM | VRB | XO |
229 | PO | VRT | / UIM | VRB | XO |
230 | PO | VRT | // UIM | VRB | XO |
231 | PO | VRT | /// UIM | VRB | XO |
232 | PO | VRT | SIM | ///| XO |
233 | PO | VRT | ///| | XO |
234 | PO | |/// | VRB | XO |
237 |0 |6 |9 |11 |16 |21 |31|
238 | PO | RS | RA | RB | XO |
239 | PO | RS | RA | UI | XO |
240 | PO | RT | ///| RB | XO |
241 | PO | RT | RA | RB | XO |
242 | PO | RT | RA | ///| XO |
243 | PO | RT | UI | RB | XO |
244 | PO | BF|//| RA | RB | XO |
245 | PO | RT | RA | UI | XO |
246 | PO | RT | SI | ///| XO |
249 |0 |6 |11 |16 |21 |29 |31 |
250 | PO | RT| RA | RB | XO |BFA |
253 |0 |6 |9 |11 |16 |22 |31 |
254 | PO | BF|//| FRA | DCM | XO | / |
255 | PO | BF|//| FRAp | DCM | XO | / |
256 | PO | BF|//| FRA | DGM | XO | / |
257 | PO | BF|//| FRAp | DGM | XO | / |
258 | PO | FRT | FRA | SH | XO |Rc |
259 | PO | FRTp| FRAp | SH | XO |Rc |
262 |0 |6 |11 |15 |16 |21 |23 |31 |
263 | PO | FRT | TE | FRB |RMC| XO |Rc |
264 | PO | FRTp| TE | FRBp |RMC| XO |Rc |
265 | PO | FRT | FRA | FRB |RMC| XO |Rc |
266 | PO | FRTp| FRA | FRBp |RMC| XO |Rc |
267 | PO | FRTp| FRAp | FRBp |RMC| XO |Rc |
268 | PO | FRT | /// | R | FRB |RMC| XO |Rc |
269 | PO | FRTp| /// | R | FRBp |RMC| XO |Rc |
271 # V3.0B 1.6.6 DX-FORM
272 |0 |6 |11 |16 |26 |31
273 | PO | RT| d1| d0| XO|d2
276 |0 |6 |11 |16 |23 |24 |25 |26 |31 |
277 | PO | RT | RA | SVi |ms |vs |vf | XO |Rc |
281 | PO | SCi | SCm | SCimm |
285 | PO | SCi | SCm | SRbr | SRimm |
288 |0 |6 |11 |16 |21 |31 |
289 | PO | RT | RA| RC | SVD |
290 | PO | RS | RA| RC | SVD |
291 | PO | FRT | RA| RC | SVD |
292 | PO | FRS | RA| RC | SVD |
295 |0 |6 |11 |16 |21 |30 |31 |
296 | PO | RT | RA | RC | SVDS | XO |
297 | PO | RS | RA | RC | SVDS | XO |
300 |0 |6 |11 |16 |21 |25 |26 |31 |
301 | PO | SVxd | SVyd | SVzd | SVRM |vf | XO |
304 |0 |6 |11 |13 |15 |17 |19 |21 |22 |26 |31 |
305 | PO | SVme |mi0 | mi1 | mi2 | mo0 | mo1 |pst |/// | XO |
308 |0 |6 |11 |16 |21 |29 |31 |
309 | PO | RT | RA | RB | TLI | XO |Rc |
310 | PO | RT | RA | RB | TLI | XO |L |
312 # 1.6.28 Instruction Fields
314 Field used by the tbegin. instruction to specify an
315 implementation-specific function.
316 Field used by the tend. instruction to specify the
317 completion of the outer transaction and all nested
322 0 The immediate field represents an address
323 relative to the current instruction address. For
324 I-form branches the effective address of the
325 branch target is the sum of the LI field
326 sign-extended to 64 bits and the address of
327 the branch instruction. For B-form branches
328 the effective address of the branch target is
329 the sum of the BD field sign-extended to 64
330 bits and the address of the branch instruction.
331 1 The immediate field represents an absolute
332 address. For I-form branches the effective
333 address of the branch target is the LI field
334 sign-extended to 64 bits. For B-form branches
335 the effective address of the branch target is
336 the BD field sign-extended to 64 bits.
339 Fields that are concatenated to specify a VSR to
343 Field used to specify a bit in the CR to be used as
347 Field used to specify a bit in the CR to be used as
351 Field used to specify a bit in the CR to be used as
355 Immediate field used to specify a 14-bit signed
356 two's complement branch displacement which is
357 concatenated on the right with 0b00 and
358 sign-extended to 64 bits.
361 Field used to specify one of the CR fields or one of
362 the FPSCR fields to be used as a target.
363 Formats: D, X, XL, XX2, XX3, Z22
365 Field used to specify one of the CR fields
366 to be used as a source.
369 Field used to specify one of the CR fields or one of
370 the FPSCR fields to be used as a source.
373 Field used to specify one of the CR fields or one of
374 the FPSCR fields to be used as a source.
377 Field used to specify a hint in the Branch Condi-
378 tional to Link Register and Branch Conditional to
379 Count Register instructions. The encoding is
380 described in Section 2.4, 'Branch Instructions'.
383 Field used to identify the BHRB entry to be used
384 as a source by the Move From Branch History
385 Rolling Buffer instruction.
388 Field used to specify a bit in the CR to be tested by
389 a Branch Conditional instruction.
392 Field used to specify the Bit-mask Mode for bmask
395 Field used to specify options for the Branch Condi-
396 tional instructions. The encoding is described in
397 Section 2.4, 'Branch Instructions'.
398 Formats: B, XL, X, XL
400 Field used to specify a bit in the CR or in the
401 FPSCR to be used as a target.
404 Fields that are concatenated to specify a VSR to
406 Formats: XX2, XX3, XX4
408 Field used in X-form instructions to specify a cache
409 target (see Section 4.3.2 of Book II).
412 Fields that are concatenated to specify a VSR to
416 Immediate field used to specify a 16-bit signed
417 two's complement integer which is sign-extended
420 d0,d1,d2 (16:25,11:15,31)
421 Immediate fields that are concatenated to specify a
422 16-bit signed two's complement integer which is
423 sign-extended to 64 bits.
425 dc,dm,dx (25,29,11:15)
426 Immediate fields that are concatenated to specify
430 Immediate field used to specify Data Class Mask.
433 Immediate field used to specify Data Class Mask.
436 Immediate field used as the Data Group Mask.
439 Immediate field used by xxpermdi instruction as
440 doubleword permute control.
443 Immediate operand field used to specify new deci-
444 mal floating-point rounding mode.
447 Field used by the dnh instruction (see Book III-E).
450 Field used by the dnh instruction (see Book III-E).
453 Immediate field used to specify a 12-bit signed
454 two's complement integer which is concatenated
455 on the right with 0b0000 and sign-extended to 64
459 Immediate field used to specify a 14-bit signed
460 two's complement integer which is concatenated
461 on the right with 0b00 and sign-extended to 64 bits.
464 Field used by the Write MSR External Enable
465 instruction (see Book III-E).
468 Field used to specify the access types ordered by
469 an Elemental Memory Barrier type of sync instruc-
472 Field used to specify a hint in the Load and
473 Reserve instructions. The meaning is described in
474 Section 4.6.2, 'Load and Reserve and Store Con-
475 ditional Instructions', in Book II.
478 Expanded opcode field
481 Expanded opcode field
484 Field used to specify Inexact form of round to
485 quad-precision integer.
488 Field used to specify the function code in Load/
489 Store Atomic instructions.
492 Field mask used to identify the FPSCR fields that
493 are to be updated by the mtfsf instruction.
496 Field used to specify a FPR to be used as a
498 Formats: A, X, Z22, Z23
500 Field used to specify an even/odd pair of FPRs to
501 be concatenated and used as a source.
504 Field used to specify an FPR to be used as a
506 Formats: A, X, XFL, Z23
508 Field used to specify an even/odd pair of FPRs to
509 be concatenated and used as a source.
512 Field used to specify an FPR to be used as a
516 Field used to specify an FPR to be used as a
520 Field used to specify an even/odd pair of FPRs to
521 be concatenated and used as a source.
524 Field used to specify an FPR to be used as a tar-
526 Formats: A, D, X, Z22, Z23
528 Field used to specify an even/odd pair of FPRs to
529 be concatenated and used as a target.
530 Formats: DS, X, Z22, Z23
532 Field mask used to identify the CR fields that are to
533 be written by the mtcrf and mtocrf instructions, or
534 read by the mfocrf instruction.
537 Immediate field used to specify a 5-bit signed inte-
541 Field used to specify a hint in the SLB Invalidate
542 All instruction. The meaning is described in
543 Section 5.9.3.2, 'SLB Management Instructions',
547 Immediate field used to specify an 8-bit integer.
550 Immediate field used to specify a 5-bit signed inte-
554 Field used to specify whether the mtfsf instruction
555 updates the entire FPSCR.
558 Field used by the Data Cache Block Flush instruc-
559 tion (see Section 4.3.2 of Book II) and also by the
560 Synchronize instruction (see Section 4.6.3 of Book
564 Field used to specify whether a fixed-point Com-
565 pare instruction is to compare 64-bit numbers or
567 Field used by the Compare Range Byte instruction
568 to indicate whether to compare against 1 or 2
572 Field used by the Move To Machine State Register
573 instruction (see Book III).
574 Field used by the SLB Move From Entry VSID and
575 SLB Move From Entry ESID instructions for imple-
576 mentation-specific purposes.
579 Field used by the Deliver A Random Number
580 instruction (see Section 3.3.9, 'Fixed-Point Arith-
581 metic Instructions') to choose the random number
585 Field used to specify whether mask-in occurs in bmask
588 Field used to specify whether the grevlut instruction
589 updates the whole GPR or the first half.
592 Field used by the System Call instructions.
595 Immediate field used to specify a 24-bit signed
596 two's complement integer which is concatenated
597 on the right with 0b00 and sign-extended to 64
602 0 Do not set the Link Register.
603 1 Set the Link Register. The address of the
604 instruction following the Branch instruction is
605 placed into the Link Register.
608 Field used in M-form instructions to specify the first
609 1-bit of a 64-bit mask, as described in
610 Section 3.3.14, 'Fixed-Point Rotate and Shift
611 Instructions' on page 101.
614 Field used in MD-form and MDS-form instructions
615 to specify the first 1-bit of a 64-bit mask, as
616 described in Section 3.3.14, 'Fixed-Point Rotate
617 and Shift Instructions' on page 101.
620 Field used in MD-form and MDS-form instructions
621 to specify the last 1-bit of a 64-bit mask, as
622 described in Section 3.3.14, 'Fixed-Point Rotate
623 and Shift Instructions' on page 101.
626 Field used in M-form instructions to specify the last
627 1-bit of a 64-bit mask, as described in
628 Section 3.3.14, 'Fixed-Point Rotate and Shift
629 Instructions' on page 101.
632 Field used in REMAP to select the SVSHAPE for 1st input register
635 Field used in REMAP to select the SVSHAPE for 2nd input register
638 Field used in REMAP to select the SVSHAPE for 3rd input register
641 Field used in REMAP to select the SVSHAPE for 1st output register
644 Field used in REMAP to select the SVSHAPE for 2nd output register
647 Field used in X-form instructions to specify a sub-
648 set of storage accesses.
651 Field used in Simple-V to specify whether MVL is to be set
654 Field used to specify the number of bytes to move
655 in an immediate Move Assist instruction.
658 Field used by the Embedded Hypervisor Privilege
662 Field used by XO-form instructions to enable set-
663 ting OV and SO in the XER.
666 Primary opcode field.
669 Field used to specify whether to invalidate pro-
670 cess- or partition-scoped entries for tlbie[l].
673 Field used to specify preferred sign for BCD opera-
677 Field used in REMAP to indicate "persistence" mode (REMAP
678 continues to apply to multiple instructions)
681 Immediate field used to specify a 4-bit unsigned
685 Field used by the tbegin. instruction to specify the
689 Immediate field that specifies whether the RMC is
690 specifying the primary or secondary encoding
691 Field used to specify whether to invalidate Radix
692 Tree or HPT entries for tlbie[l].
695 Field used to specify a GPR to be used as a
696 source or as a target.
697 Formats: A, BM2, D, DQ, DQE, DS, M, MD, MDS, TX, VA, VA2, VX, X, XO, XS, SVL, XB
699 Field used to specify a GPR to be used as a
701 Formats: A, BM2, M, MDS, VA, VA2, X, XO
704 0 Do not alter the Condition Register.
705 1 Set Condition Register Field 6 as described in
706 Section 2.3.1, 'Condition Register' on
710 Field used to specify a GPR to be used as a
712 Formats: VA, VA2, SVD, SVDS
715 0 Do not alter the Condition Register.
716 1 Set Condition Register Field 0 or Field 1 as
717 described in Section 2.3.1, 'Condition Regis-
719 Formats: A, M, MD, MDS, VA2, X, XFL, XO, XS, Z22, Z23, SVL, XB, TLI
721 Field used to specify what types of entries to inval-
725 Immediate operand field used to specify new
726 binary floating-point rounding mode.
729 Immediate field used for DFP rounding mode con-
733 Round to Odd override
736 Field used to specify a GPR to be used as a
738 Formats: D, DS, M, MD, MDS, X, XFX, XS
740 Field used to specify an even/odd pair of GPRs to
741 be concatenated and used as a source.
744 Field used to specify a GPR to be used as a target.
745 Formats: A, BM2, D, DQE, DS, DX, VA, VA2, VX, X, XFX, XO, XX2, SVL, XB
747 Field used to specify an even/odd pair of GPRs to
748 be concatenated and used as a target.
751 Immediate field that specifies signed versus
755 Immediate field that specifies whether or not the
756 rfebb instruction re-enables event-based
760 Index to SV Context Propagation SPR
763 SV Context Propagation Mode
766 SV Context Propagation immediate bitfield
769 SV REMAP byte-reversal field.
772 SV REMAP immediate FIFO bitfield
775 Field used to specify a shift amount.
778 Field used to specify a shift amount.
781 Fields that are concatenated to specify a shift
785 Field used to specify a shift amount in bytes.
788 Field used to specify a shift amount in words.
791 Immediate field used to specify a 5-bit signed inte-
795 Immediate field used to specify a 16-bit signed
799 Immediate field used to specify a 5-bit signed inte-
803 Immediate field that specifies signed versus
807 Field used to specify a Special Purpose Register
808 for the mtspr and mfspr instructions.
811 Field used by the Segment Register Manipulation
812 instructions (see Book III).
815 Immediate field used to specify an 11-bit signed
816 two's complement integer which is sign-extended
820 Immediate field used to specify a 9-bit signed
821 two's complement integer which is concatenated
822 on the right with 0b00 and sign-extended to 64 bits.
825 Simple-V immediate field for setting VL or MVL
828 Simple-V "REMAP" map-enable bits (0-4)
831 Simple-V "REMAP" Mode
834 Simple-V "REMAP" x-dimension size
837 Simple-V "REMAP" y-dimension size
840 Simple-V "REMAP" z-dimension size
843 Fields SX and S are concatenated to specify a
844 VSR to be used as a source.
847 Fields SX and S are concatenated to specify a
848 VSR to be used as a source.
851 Field used to specify the type of invalidation done
852 by a TLB Invalidate Local instruction (see Book
856 Field used by the Move From Time Base instruc-
857 tion (see Section 6.1 of Book II).
860 Immediate field that specifies a DFP exponent.
863 Field used by the data stream variant of the dcbt
864 and dcbtst instructions (see Section 4.3.2 of Book
868 Field used by the ternlogi instruction as the
872 Field used to specify the conditions on which to
873 trap. The encoding is described in
874 Section 3.3.10.1, 'Character-Type Compare
875 Instructions' on page 87.
878 Fields that are concatenated to specify a VSR to
879 be used as either a target.
882 Fields that are concatenated to specify a VSR to
883 be used as either a target or a source.
884 Formats: X, XX2, XX3, XX4
886 Immediate field used as the data to be placed into
887 a field in the FPSCR.
890 Immediate field used to specify a 5-bit unsigned
894 Immediate field used to specify a 16-bit unsigned
898 Immediate field used to specify a 5-bit unsigned
902 Immediate field used to specify a 4-bit unsigned
906 Immediate field used to specify a 3-bit unsigned
910 Immediate field used to specify a 2-bit unsigned
914 Field used to specify a VR to be used as a source.
917 Field used to specify a VR to be used as a source.
920 Field used to specify a VR to be used as a source.
923 Field used to specify a VR to be used as a source.
926 Field used to specify a VR to be used as a target.
927 Formats: DS, VA, VC, VX, X
929 Field used in Simple-V to specify whether "Vertical" Mode is set
932 Field used in Simple-V to specify whether VL is to be set
935 Field used by the mtfsfi and mtfsf instructions to
936 specify the target word in the FPSCR.
939 Field used to specify the condition or conditions
940 that cause instruction execution to resume after
941 executing a wait instruction (see Section 4.6.4 of
945 Field used to specify a bit in the XER.
946 Formats: MDS, MDS, TX
948 Field used to specify a 6-bit unsigned immediate for bit manipulation
949 instructions, such as grevi.
952 Extended opcode field.
955 Extended opcode field.
958 Extended opcode field.
961 Extended opcode field.
964 Extended opcode field.
967 Extended opcode field.
968 Formats: X, XFL, XFX, XL
970 Extended opcode field.
973 Extended opcode field.
974 Formats: XO, XX3, Z22, XB
976 Extended opcode field.
979 Extended opcode field.
982 Extended opcode field.
985 Extended opcode field.
988 Extended opcode field.
989 Formats: A, DX, VA2, SVL
991 Extended opcode field.
992 Formats: VA, SVM, SVRM
994 Extended opcode field.
997 Extended opcode field.
1000 Extended opcode field.
1003 Extended opcode field.
1006 Extended opcode field.
1009 Extended opcode field.
1010 Formats: DQE, DS, SC