7 | PO | BO| BI | BD |AA|LK |
10 |0 |6 |10 |15 |22 |23 |31|
11 | PO | RS | me | sh | me | XO |Rc|
14 |0 |6 |11 |16 |21 |26 |27 31|
15 | PO | RT | RA | RB |bm |L | XO |
18 |0 |6 |9 |12 |15 |18 |21 |29 |31 |
19 | PO | BF | BFA| BFB| BFC| msk| TLI | XO |msk|
22 |0 |6 |11 |16 |20 |27 |30 |31 |
23 | PO | ///| ///| // | LEV | //| 1| / |
26 |0 |6 |9 |10 |11 |16 |31 |
31 | PO | BF | / | L | RA| SI |
32 | PO | BF | / | L | RA| UI |
38 |0 |6 |11 |16 |30 |31 |
39 | PO | RT | RA | DS | XO |
40 | PO | RS | RA | DS | XO |
41 | PO | RSp | RA | DS | XO |
42 | PO | FRTp | RA | DS | XO |
43 | PO | FRSp | RA | DS | XO |
46 |0 |6 |11 |16 |28|29 |31 |
47 | PO | RTp | RA | DQ | PT |
48 | PO | S | RA | DQ |SX| XO |
49 | PO | T | RA | DQ |TX| XO |
53 | PO | RT| d1| d0| XO|d2
54 | PO | FRS| d1| d0| XO|d2
58 |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 |
59 | PO | RT | RA | /// | XO | / |
60 | PO | RT | RA | RB | XO | / |
61 | PO | RT | RA | RB | XO |EH |
62 | PO | RT | RA | NB | XO | / |
63 | PO | RT | /|SR | /// | XO | / |
64 | PO | RT | /// | RB | XO | / |
65 | PO | RT | /// | RB | XO | 1 |
66 | PO | RT | /// | /// | XO | / |
67 | PO | RS | RA | RB | XO |Rc |
68 | PO | RT | RA | RB | XO |Rc |
69 | PO | RS | RA | RB | XO | 1 |
70 | PO | RS | RA | RB | XO | / |
71 | PO | RS | RA | NB | XO | / |
72 | PO | RS | RA | SH | XO |Rc |
73 | PO | RS | RA | /// | XO |Rc |
74 | PO | RS | RA | /// | XO | / |
75 | PO | RS | /|SR | /// | XO | / |
76 | PO | RS | /// | RB | XO | / |
77 | PO | RS | /// | /// | XO | / |
78 | PO | RS | /// |L1| /// | XO | / |
79 | PO | TH | RA | RB | XO | / |
80 | PO | BF |/ | L | RA | RB | XO | / |
81 | PO | BF |// | FRA | FRB | XO | / |
82 | PO | BF |// | BFA | // | /// | XO | / |
83 | PO | BF |// | /// |W | U |/ | XO |Rc |
84 | PO | BF |// | /// | /// | XO | / |
85 | PO | TH | RA | RB | XO | / |
86 | PO | /| CT | /// | /// | XO | / |
87 | PO | /| CT | RA | RB | XO | / |
88 | PO | /// | L2 | RA | RB | XO | / |
89 | PO | /// | L2 | /// | RB | XO | / |
90 | PO | /// | L2 | /// | /// | XO | / |
91 | PO | /// | L2 | /| E | /// | XO | / |
92 | PO | TO | RA | RB | XO | / |
93 | PO | FRT | RA | RB | XO | / |
94 | PO | FRT | FRA | FRB | XO | / |
95 | PO | FRTp | RA | RB | XO | / |
96 | PO | FRT | /// | FRB | XO |Rc |
97 | PO | FRT | /// | FRBp | XO |Rc |
98 | PO | FRT | /// | /// | XO |Rc |
99 | PO | FRTp | /// | FRB | XO |Rc |
100 | PO | FRTp | /// | FRBp | XO |Rc |
101 | PO | FRTp | FRA | FRBp | XO |Rc |
102 | PO | FRTp | FRAp | FRBp | XO |Rc |
103 | PO | BF |// | FRA | FRBp | XO | / |
104 | PO | BF |// | FRAp | FRBp | XO | / |
105 | PO | FRT |S | | FRB | XO |Rc |
106 | PO | FRTp |S | | FRBp | XO |Rc |
107 | PO | FRS | RA | RB | XO | / |
108 | PO | FRSp | RA | RB | XO | / |
109 | PO | BT | /// | /// | XO |Rc |
110 | PO | /// | RA | RB | XO | / |
111 | PO | /// | /// | RB | XO | / |
112 | PO | /// | /// | /// | XO | / |
113 | PO | /// | /// | E|/// | XO | / |
114 | PO | //|IH | /// | /// | XO | / |
115 | PO | A|// | /// | /// | XO | 1 |
116 | PO | A|// |R | /// | /// | XO | 1 |
117 | PO | /// | RA | RB | XO | 1 |
118 | PO | /// |WC | /// | /// | XO | / |
119 | PO | /// |T | RA | RB | XO | / |
120 | PO | VRT | RA | RB | XO | / |
121 | PO | VRS | RA | RB | XO | / |
122 | PO | MO | /// | /// | XO | / |
123 | PO | RT | /// |L3 | /// | XO | / |
126 |0 |6 |9 |11 |14 |16 |19|20|21 |31 |
127 | PO | BT | BA | BB | XO | / |
128 | PO | BO | BI | /// |BH | XO |LK |
129 | PO | | /// |S | XO | / |
130 | PO | BF |// |BFA |// | /// | XO | / |
131 | PO | /// | XO | / |
135 |0 |6 |11|12 |20|21 |31 |
136 | PO | RT | spr | XO | / |
137 | PO | RT | tbr | XO | / |
138 | PO | RT |0 | /// | XO | / |
139 | PO | RT |1 | FXM |/ | XO | / |
140 | PO | RT | dcr | XO | / |
141 | PO | RT | pmrn | XO | / |
142 | PO | RT | BHRBE | XO | / |
143 | PO | DUI | DUIS | XO | / |
144 | PO | RS |0 | FXM |/ | XO | / |
145 | PO | RS |1 | FXM |/ | XO | / |
146 | PO | RS | spr | XO | / |
147 | PO | RS | dcr | XO | / |
148 | PO | RS | pmrn | XO | / |
151 |0 |6|7 |15|16 |21 |31 |
152 | PO |L| FLM |W |FRB | XO |Rc |
155 |0 |6 |11 |16 |21 |31 |
156 | PO | T | RA | RB | XO |TX |
157 | PO | S | RA | RB | XO |SX |
160 |0 |6 |9 |11 |14 |16 |21 |30|31 |
161 | PO | T | /// | B |XO |BX|TX |
162 | PO | T | /// |UIM | B |XO |BX|TX |
163 | PO | BF | //| /// | B |XO |BX| / |
166 |0 |6 |9 |11 |16 |21 |22 |24 |29|30|31 |
167 | PO | T | A | B | XO |AX|BX|TX |
168 | PO | T | A | B |Rc | XO |AX|BX|TX |
169 | PO | BF | // | A | B | XO |AX|BX|/ |
170 | PO | T | A | B |XO |SHW | XO |AX|BX|TX |
171 | PO | T | A | B |XO |DM | XO |AX|BX|TX |
174 |0 |6 |11 |16 |21 |26 |28|29 |30|31 |
175 | PO | T | A | B | C | XO |CX|AX |BX|TX |
178 |0 |6 |11 |16 |21 |30|31 |
179 | PO | RS | RA | sh | XO |sh|Rc |
182 |0 |6 |11 |16 |22 |31 |
183 | PO | RT | RA | XBI | XO |Rc |
186 |0 |6 |11 |16 |21 |22 |31 |
187 | PO | RT| RA| RB |OE | XO |Rc |
188 | PO | RT| RA| RB | /| XO |Rc |
189 | PO | RT| RA| RB | /| XO | / |
190 | PO | RT| RA| /// |OE | XO |Rc |
193 |0 |6 |11 |16 |21 |26 |31 |
194 | PO | FRT | FRA | FRB | FRC | XO |Rc |
195 | PO | FRT | FRA | FRB | /// | XO |Rc |
196 | PO | FRT | FRA | /// | FRC | XO |Rc |
197 | PO | FRT | /// | FRB | /// | XO |Rc |
198 | PO | RT | RA | RB | BC | XO | /|
201 |0 |6 |11 |16 |21 |26 |31|
202 | PO | RS | RA | RB | MB | ME |Rc|
203 | PO | RS | RA | SH | MB | ME |Rc|
206 |0 |6 |11 |16 |21 |27|30|31|
207 | PO | RS | RA | sh | mb |XO|sh|Rc|
208 | PO | RS | RA | sh | me |XO|sh|Rc|
211 |0 |6 |11 |16 |21 |27 |31|
212 | PO | RS | RA | RB | mb | XO |Rc|
213 | PO | RS | RA | RB | me | XO |Rc|
216 |0 |6 |11 |16 |21|22 |25|26 |31|
217 | PO | RT | RA | RB | RC | XO |
218 | PO | VRT | VRA | VRB | VRC | XO |
219 | PO | VRT | VRA | VRB | /|SHB | XO |
220 | PO | VRT | VRA | VRB | /|BFA|/ | XO |
223 |0 |6 |11 |16 |21 |24|26 |31|
224 | PO | RT | RA | RB | RC | XO |Rc|
227 |0 |6 |11 |16 |21|22 |31|
228 | PO | VRT | VRA | VRB |Rc| XO |
231 |0 |6 |11 |16 |21 |31|
232 | PO | VRT | VRA | VRB | XO |
233 | PO | VRT | /// | VRB | XO |
234 | PO | VRT | UIM | VRB | XO |
235 | PO | VRT | / UIM | VRB | XO |
236 | PO | VRT | // UIM | VRB | XO |
237 | PO | VRT | /// UIM | VRB | XO |
238 | PO | VRT | SIM | ///| XO |
239 | PO | VRT | ///| | XO |
240 | PO | |/// | VRB | XO |
243 |0 |6 |9 |11 |16 |21 |31|
244 | PO | RS | RA | RB | XO |
245 | PO | RS | RA | UI | XO |
246 | PO | RT | ///| RB | XO |
247 | PO | RT | RA | RB | XO |
248 | PO | RT | RA | ///| XO |
249 | PO | RT | UI | RB | XO |
250 | PO | BF|//| RA | RB | XO |
251 | PO | RT | RA | UI | XO |
252 | PO | RT | SI | ///| XO |
255 |0 |6 |11 |16 |21 |29 |31 |
256 | PO | RT| RA | RB | XO |BFA |
259 |0 |6 |9 |11 |16 |22 |31 |
260 | PO | BF|//| FRA | DCM | XO | / |
261 | PO | BF|//| FRAp | DCM | XO | / |
262 | PO | BF|//| FRA | DGM | XO | / |
263 | PO | BF|//| FRAp | DGM | XO | / |
264 | PO | FRT | FRA | SH | XO |Rc |
265 | PO | FRTp| FRAp | SH | XO |Rc |
268 |0 |6 |11 |15 |16 |21 |23 |31 |
269 | PO | FRT | TE | FRB |RMC| XO |Rc |
270 | PO | FRTp| TE | FRBp |RMC| XO |Rc |
271 | PO | FRT | FRA | FRB |RMC| XO |Rc |
272 | PO | FRTp| FRA | FRBp |RMC| XO |Rc |
273 | PO | FRTp| FRAp | FRBp |RMC| XO |Rc |
274 | PO | FRT | /// | R | FRB |RMC| XO |Rc |
275 | PO | FRTp| /// | R | FRBp |RMC| XO |Rc |
278 |0 |6 |11 |16 |21 |23 |24|25|26 31|
279 | PO | SVG|rmm | SVd |ew |SVyx|mm|sk| XO |
282 |0 |6 |11 |16 |23 |24 |25 |26 |31 |
283 | PO | RT | RA | SVi |ms |vs |vf | XO |Rc |
284 | PO | RT | / | SVi |/ |/ |vf | XO |Rc |
288 | PO | SCi | SCm | SCimm |
292 | PO | SCi | SCm | SRbr | SRimm |
295 |0 |6 |11 |16 |21 |31 |
296 | PO | RT | RA| RC | SVD |
297 | PO | RS | RA| RC | SVD |
298 | PO | FRT | RA| RC | SVD |
299 | PO | FRS | RA| RC | SVD |
302 |0 |6 |11 |16 |21 |30 |31 |
303 | PO | RT | RA | RC | SVDS | XO |
304 | PO | RS | RA | RC | SVDS | XO |
307 |0 |6 |11 |16 |21 |25 |26 |31 |
308 | PO | SVxd | SVyd | SVzd | SVrm |vf | XO |
311 |0 |6 |10 |11 |16 |21 |24|25 |26 |31 |
312 | PO | SVo |SVyx| rmm | SVd |XO |mm|sk | XO |
315 |0 |6 |11 |13 |15 |17 |19 |21 |22 |26 |31 |
316 | PO | SVme |mi0 | mi1 | mi2 | mo0 | mo1 |pst |/// | XO |
319 |0 |6 |11 |16 |21 |29 |31 |
320 | PO | RT | RA | RB | TLI | XO |Rc |
321 | PO | RT | RA | RB | TLI | XO |L |
323 # 1.6.28 Instruction Fields
325 Field used by the tbegin. instruction to specify an
326 implementation-specific function.
327 Field used by the tend. instruction to specify the
328 completion of the outer transaction and all nested
333 0 The immediate field represents an address
334 relative to the current instruction address. For
335 I-form branches the effective address of the
336 branch target is the sum of the LI field
337 sign-extended to 64 bits and the address of
338 the branch instruction. For B-form branches
339 the effective address of the branch target is
340 the sum of the BD field sign-extended to 64
341 bits and the address of the branch instruction.
342 1 The immediate field represents an absolute
343 address. For I-form branches the effective
344 address of the branch target is the LI field
345 sign-extended to 64 bits. For B-form branches
346 the effective address of the branch target is
347 the BD field sign-extended to 64 bits.
350 Fields that are concatenated to specify a VSR to
354 Field used to specify a bit in the CR to be used as
358 Field used to specify a bit in the CR to be used as
362 Field used to specify a bit in the CR to be used as
366 Immediate field used to specify a 14-bit signed
367 two's complement branch displacement which is
368 concatenated on the right with 0b00 and
369 sign-extended to 64 bits.
372 Field used to specify one of the CR fields or one of
373 the FPSCR fields to be used as a target.
374 Formats: D, X, XL, XX2, XX3, Z22
376 Field used to specify one of the CR fields
377 to be used as a source.
380 Field used to specify one of the CR fields or one of
381 the FPSCR fields to be used as a source.
384 Field used to specify one of the CR fields or one of
385 the FPSCR fields to be used as a source.
388 Field used to specify a hint in the Branch Condi-
389 tional to Link Register and Branch Conditional to
390 Count Register instructions. The encoding is
391 described in Section 2.4, 'Branch Instructions'.
394 Field used to identify the BHRB entry to be used
395 as a source by the Move From Branch History
396 Rolling Buffer instruction.
399 Field used to specify a bit in the CR to be tested by
400 a Branch Conditional instruction.
403 Field used to specify the Bit-mask Mode for bmask
406 Field used to specify options for the Branch Condi-
407 tional instructions. The encoding is described in
408 Section 2.4, 'Branch Instructions'.
409 Formats: B, XL, X, XL
411 Field used to specify a bit in the CR or in the
412 FPSCR to be used as a target.
415 Fields that are concatenated to specify a VSR to
417 Formats: XX2, XX3, XX4
419 Field used in X-form instructions to specify a cache
420 target (see Section 4.3.2 of Book II).
423 Fields that are concatenated to specify a VSR to
427 Immediate field used to specify a 16-bit signed
428 two's complement integer which is sign-extended
431 d0,d1,d2 (16:25,11:15,31)
432 Immediate fields that are concatenated to specify a
433 16-bit signed two's complement integer which is
434 sign-extended to 64 bits.
436 dc,dm,dx (25,29,11:15)
437 Immediate fields that are concatenated to specify
441 Immediate field used to specify Data Class Mask.
444 Immediate field used to specify Data Class Mask.
447 Immediate field used as the Data Group Mask.
450 Immediate field used by xxpermdi instruction as
451 doubleword permute control.
454 Immediate operand field used to specify new deci-
455 mal floating-point rounding mode.
458 Field used by the dnh instruction (see Book III-E).
461 Field used by the dnh instruction (see Book III-E).
464 Immediate field used to specify a 12-bit signed
465 two's complement integer which is concatenated
466 on the right with 0b0000 and sign-extended to 64
470 Immediate field used to specify a 14-bit signed
471 two's complement integer which is concatenated
472 on the right with 0b00 and sign-extended to 64 bits.
475 Field used to specify a hint in the Load and
476 Reserve instructions. The meaning is described in
477 Section 4.6.2, 'Load and Reserve and Store Con-
478 ditional Instructions', in Book II.
481 Expanded opcode field
484 Expanded opcode field
487 Field used to specify Inexact form of round to
488 quad-precision integer.
491 Field used to specify the element width for SVI-Form
494 Field used to specify the function code in Load/
495 Store Atomic instructions.
498 Field mask used to identify the FPSCR fields that
499 are to be updated by the mtfsf instruction.
502 Field used to specify a FPR to be used as a
504 Formats: A, X, Z22, Z23
506 Field used to specify an even/odd pair of FPRs to
507 be concatenated and used as a source.
510 Field used to specify an FPR to be used as a
512 Formats: A, X, XFL, Z23
514 Field used to specify an even/odd pair of FPRs to
515 be concatenated and used as a source.
518 Field used to specify an FPR to be used as a
522 Field used to specify an FPR to be used as a
526 Field used to specify an even/odd pair of FPRs to
527 be concatenated and used as a source.
530 Field used to specify an FPR to be used as a tar-
532 Formats: A, D, X, Z22, Z23
534 Field used to specify an even/odd pair of FPRs to
535 be concatenated and used as a target.
536 Formats: DS, X, Z22, Z23
538 Field mask used to identify the CR fields that are to
539 be written by the mtcrf and mtocrf instructions, or
540 read by the mfocrf instruction.
543 Immediate field used to specify a 5-bit signed inte-
547 Field used to specify a hint in the SLB Invalidate
548 All instruction. The meaning is described in
549 Section 5.9.3.2, 'SLB Management Instructions',
553 Immediate field used to specify an 8-bit integer.
556 Immediate field used to specify a 5-bit signed inte-
560 Field used to specify whether the mtfsf instruction
561 updates the entire FPSCR.
564 Field used by the Data Cache Block Flush instruc-
565 tion (see Section 4.3.2 of Book II) and also by the
566 Synchronize instruction (see Section 4.6.3 of Book
570 Field used to specify whether a fixed-point Com-
571 pare instruction is to compare 64-bit numbers or
573 Field used by the Compare Range Byte instruction
574 to indicate whether to compare against 1 or 2
578 Field used by the Move To Machine State Register
579 instruction (see Book III).
580 Field used by the SLB Move From Entry VSID and
581 SLB Move From Entry ESID instructions for imple-
582 mentation-specific purposes.
585 Field used by the Deliver A Random Number
586 instruction (see Section 3.3.9, 'Fixed-Point Arith-
587 metic Instructions') to choose the random number
591 Field used to specify whether mask-in occurs in bmask
594 Field used to specify whether the grevlut instruction
595 updates the whole GPR or the first half.
598 Field used by the System Call instructions.
601 Immediate field used to specify a 24-bit signed
602 two's complement integer which is concatenated
603 on the right with 0b00 and sign-extended to 64
608 0 Do not set the Link Register.
609 1 Set the Link Register. The address of the
610 instruction following the Branch instruction is
611 placed into the Link Register.
614 Field used to specify a REMAP shape for SVI-Form
617 Field used in M-form instructions to specify the first
618 1-bit of a 64-bit mask, as described in
619 Section 3.3.14, 'Fixed-Point Rotate and Shift
620 Instructions' on page 101.
623 Field used in MD-form and MDS-form instructions
624 to specify the first 1-bit of a 64-bit mask, as
625 described in Section 3.3.14, 'Fixed-Point Rotate
626 and Shift Instructions' on page 101.
629 Field used in MD-form and MDS-form instructions
630 to specify the last 1-bit of a 64-bit mask, as
631 described in Section 3.3.14, 'Fixed-Point Rotate
632 and Shift Instructions' on page 101.
635 Field used in M-form instructions to specify the last
636 1-bit of a 64-bit mask, as described in
637 Section 3.3.14, 'Fixed-Point Rotate and Shift
638 Instructions' on page 101.
641 Field used in REMAP to select the SVSHAPE for 1st input register
644 Field used in REMAP to select the SVSHAPE for 2nd input register
647 Field used in REMAP to select the SVSHAPE for 3rd input register
650 Field used to specify the meaning of the rmm field for SVI-Form
654 Field used in REMAP to select the SVSHAPE for 1st output register
657 Field used in REMAP to select the SVSHAPE for 2nd output register
660 Field used in X-form instructions to specify a sub-
661 set of storage accesses.
664 Field used in Simple-V to specify whether MVL is to be set
667 Field used to specify the number of bytes to move
668 in an immediate Move Assist instruction.
671 Field used by the Embedded Hypervisor Privilege
675 Field used by XO-form instructions to enable set-
676 ting OV and SO in the XER.
679 Primary opcode field.
682 Field used to specify whether to invalidate pro-
683 cess- or partition-scoped entries for tlbie[l].
686 Field used to specify preferred sign for BCD opera-
690 Field used in REMAP to indicate "persistence" mode (REMAP
691 continues to apply to multiple instructions)
694 Immediate field used to specify a 4-bit unsigned
698 Field used by the tbegin. instruction to specify the
702 Immediate field that specifies whether the RMC is
703 specifying the primary or secondary encoding
704 Field used to specify whether to invalidate Radix
705 Tree or HPT entries for tlbie[l].
708 Field used to specify a GPR to be used as a
709 source or as a target.
710 Formats: A, BM2, D, DQ, DQE, DS, M, MD, MDS, TX, VA, VA2, VX, X, XO, XS, SVL, XB, TLI
712 Field used to specify a GPR to be used as a
714 Formats: A, BM2, M, MDS, VA, VA2, X, XO, TLI
717 0 Do not alter the Condition Register.
718 1 Set Condition Register Field 6 as described in
719 Section 2.3.1, 'Condition Register' on
723 Field used to specify a GPR to be used as a
725 Formats: VA, VA2, SVD, SVDS
728 0 Do not alter the Condition Register.
729 1 Set Condition Register Field 0 or Field 1 as
730 described in Section 2.3.1, 'Condition Regis-
732 Formats: A, M, MD, MDS, VA2, X, XFL, XO, XS, Z22, Z23, SVL, XB, TLI
734 Field used to specify what types of entries to inval-
738 Immediate operand field used to specify new
739 binary floating-point rounding mode.
742 Immediate field used for DFP rounding mode con-
746 REMAP Mode field for SVI-Form and SVM2-Form
749 Round to Odd override
752 Field used to specify a GPR to be used as a
754 Formats: D, DS, M, MD, MDS, X, XFX, XS
756 Field used to specify an even/odd pair of GPRs to
757 be concatenated and used as a source.
760 Field used to specify a GPR to be used as a target.
761 Formats: A, BM2, D, DQE, DS, DX, VA, VA2, VX, X, XFX, XO, XX2, SVL, XB, TLI
763 Field used to specify an even/odd pair of GPRs to
764 be concatenated and used as a target.
767 Immediate field that specifies signed versus
771 Immediate field that specifies whether or not the
772 rfebb instruction re-enables event-based
776 Index to SV Context Propagation SPR
779 SV Context Propagation Mode
782 SV Context Propagation immediate bitfield
785 SV REMAP byte-reversal field.
788 SV REMAP immediate FIFO bitfield
791 Field used to specify a shift amount.
794 Field used to specify a shift amount.
797 Fields that are concatenated to specify a shift
801 Field used to specify a shift amount in bytes.
804 Field used to specify a shift amount in words.
807 Immediate field used to specify a 5-bit signed inte-
811 Immediate field used to specify a 16-bit signed
815 Immediate field used to specify a 5-bit signed inte-
819 Field used to specify dimensional skipping in svindex
822 Immediate field that specifies signed versus
826 Field used to specify a Special Purpose Register
827 for the mtspr and mfspr instructions.
830 Field used by the Segment Register Manipulation
831 instructions (see Book III).
834 Immediate field used to specify the size of the REMAP dimension
835 in the svindex and svshape2 instructions
838 Immediate field used to specify an 11-bit signed
839 two's complement integer which is sign-extended
843 Immediate field used to specify a 9-bit signed
844 two's complement integer which is concatenated
845 on the right with 0b00 and sign-extended to 64 bits.
848 Field used to specify a GPR to be used as a
852 Simple-V immediate field for setting VL or MVL
855 Simple-V "REMAP" map-enable bits (0-4)
858 Field used by the svshape2 instruction as an offset
861 Simple-V "REMAP" Mode
864 Simple-V "REMAP" x-dimension size
867 Simple-V "REMAP" y-dimension size
870 Simple-V "REMAP" z-dimension size
873 Fields SX and S are concatenated to specify a
874 VSR to be used as a source.
877 Fields SX and S are concatenated to specify a
878 VSR to be used as a source.
881 Field used to specify the type of invalidation done
882 by a TLB Invalidate Local instruction (see Book
886 Field used by the Move From Time Base instruc-
887 tion (see Section 6.1 of Book II).
890 Immediate field that specifies a DFP exponent.
893 Field used by the data stream variant of the dcbt
894 and dcbtst instructions (see Section 4.3.2 of Book
898 Field used by the ternlogi instruction as the
902 Field used to specify the conditions on which to
903 trap. The encoding is described in
904 Section 3.3.10.1, 'Character-Type Compare
905 Instructions' on page 87.
908 Fields that are concatenated to specify a VSR to
909 be used as either a target.
912 Fields that are concatenated to specify a VSR to
913 be used as either a target or a source.
914 Formats: X, XX2, XX3, XX4
916 Immediate field used as the data to be placed into
917 a field in the FPSCR.
920 Immediate field used to specify a 5-bit unsigned
924 Immediate field used to specify a 16-bit unsigned
928 Immediate field used to specify a 5-bit unsigned
932 Immediate field used to specify a 4-bit unsigned
936 Immediate field used to specify a 3-bit unsigned
940 Immediate field used to specify a 2-bit unsigned
944 Field used to specify a VR to be used as a source.
947 Field used to specify a VR to be used as a source.
950 Field used to specify a VR to be used as a source.
953 Field used to specify a VR to be used as a source.
956 Field used to specify a VR to be used as a target.
957 Formats: DS, VA, VC, VX, X
959 Field used in Simple-V to specify whether "Vertical" Mode is set
962 Field used in Simple-V to specify whether VL is to be set
965 Field used by the mtfsfi and mtfsf instructions to
966 specify the target word in the FPSCR.
969 Field used to specify the condition or conditions
970 that cause instruction execution to resume after
971 executing a wait instruction (see Section 4.6.4 of
975 Field used to specify a bit in the XER.
976 Formats: MDS, MDS, TX
978 Field used to specify a 6-bit unsigned immediate for bit manipulation
979 instructions, such as grevi.
982 Extended opcode field.
985 Extended opcode field.
988 Extended opcode field.
991 Extended opcode field.
994 Extended opcode field.
997 Extended opcode field.
1000 Extended opcode field.
1001 Formats: X, XFL, XFX, XL
1003 Extended opcode field.
1006 Extended opcode field.
1007 Formats: XO, XX3, Z22, XB
1009 Extended opcode field.
1012 Extended opcode field.
1015 Extended opcode field.
1018 Extended opcode field.
1021 Extended opcode field.
1022 Formats: A, DX, VA2, SVL
1024 Extended opcode field.
1025 Formats: VA, SVM, SVRM, SVI
1027 Extended opcode field.
1030 Extended opcode field.
1033 Extended opcode field.
1036 Extended opcode field.
1039 Extended opcode field.
1042 Extended opcode field.
1043 Formats: DQE, DS, SC
1045 Field used to specify loop dimension order in svindex
1048 Field used to specify loop dimension order in svshape2