7 | PO | BO| BI | BD |AA|LK |
10 |0 |6 |10 |15 |22 |23 |31|
11 | PO | RS | me | sh | me | XO |Rc|
14 |0 |6 |11 |16 |21 |26 |27 31|
15 | PO | RT | RA | RB |bm |L | XO |
18 |0 |6 |9 |12 |15 |18 |21 |29 |31 |
19 | PO | BF | BFA| BFB| BFC| msk| TLI | XO |msk|
22 |0 |6 |11 |16 |20 |27 |30 |31 |
23 | PO | ///| ///| // | LEV | //| 1| / |
26 |0 |6 |9 |10 |11 |16 |31 |
31 | PO | BF | / | L | RA| SI |
32 | PO | BF | / | L | RA| UI |
38 |0 |6 |11 |16 |30 |31 |
39 | PO | RT | RA | DS | XO |
40 | PO | RS | RA | DS | XO |
41 | PO | RSp | RA | DS | XO |
42 | PO | FRTp | RA | DS | XO |
43 | PO | FRSp | RA | DS | XO |
46 |0 |6 |11 |16 |28|29 |31 |
47 | PO | RTp | RA | DQ | PT |
48 | PO | S | RA | DQ |SX| XO |
49 | PO | T | RA | DQ |TX| XO |
53 | PO | RT| d1| d0| XO|d2
56 |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 |
57 | PO | RT | RA | /// | XO | / |
58 | PO | RT | RA | RB | XO | / |
59 | PO | RT | RA | RB | XO |EH |
60 | PO | RT | RA | NB | XO | / |
61 | PO | RT | /|SR | /// | XO | / |
62 | PO | RT | /// | RB | XO | / |
63 | PO | RT | /// | RB | XO | 1 |
64 | PO | RT | /// | /// | XO | / |
65 | PO | RS | RA | RB | XO |Rc |
66 | PO | RT | RA | RB | XO |Rc |
67 | PO | RS | RA | RB | XO | 1 |
68 | PO | RS | RA | RB | XO | / |
69 | PO | RS | RA | NB | XO | / |
70 | PO | RS | RA | SH | XO |Rc |
71 | PO | RS | RA | /// | XO |Rc |
72 | PO | RS | RA | /// | XO | / |
73 | PO | RS | /|SR | /// | XO | / |
74 | PO | RS | /// | RB | XO | / |
75 | PO | RS | /// | /// | XO | / |
76 | PO | RS | /// |L1| /// | XO | / |
77 | PO | TH | RA | RB | XO | / |
78 | PO | BF |/ | L | RA | RB | XO | / |
79 | PO | BF |// | FRA | FRB | XO | / |
80 | PO | BF |// | BFA | // | /// | XO | / |
81 | PO | BF |// | /// |W | U |/ | XO |Rc |
82 | PO | BF |// | /// | /// | XO | / |
83 | PO | TH | RA | RB | XO | / |
84 | PO | /| CT | /// | /// | XO | / |
85 | PO | /| CT | RA | RB | XO | / |
86 | PO | /// | L2 | RA | RB | XO | / |
87 | PO | /// | L2 | /// | RB | XO | / |
88 | PO | /// | L2 | /// | /// | XO | / |
89 | PO | /// | L2 | /| E | /// | XO | / |
90 | PO | TO | RA | RB | XO | / |
91 | PO | FRT | RA | RB | XO | / |
92 | PO | FRT | FRA | FRB | XO | / |
93 | PO | FRTp | RA | RB | XO | / |
94 | PO | FRT | /// | FRB | XO |Rc |
95 | PO | FRT | /// | FRBp | XO |Rc |
96 | PO | FRT | /// | /// | XO |Rc |
97 | PO | FRTp | /// | FRB | XO |Rc |
98 | PO | FRTp | /// | FRBp | XO |Rc |
99 | PO | FRTp | FRA | FRBp | XO |Rc |
100 | PO | FRTp | FRAp | FRBp | XO |Rc |
101 | PO | BF |// | FRA | FRBp | XO | / |
102 | PO | BF |// | FRAp | FRBp | XO | / |
103 | PO | FRT |S | | FRB | XO |Rc |
104 | PO | FRTp |S | | FRBp | XO |Rc |
105 | PO | FRS | RA | RB | XO | / |
106 | PO | FRSp | RA | RB | XO | / |
107 | PO | BT | /// | /// | XO |Rc |
108 | PO | /// | RA | RB | XO | / |
109 | PO | /// | /// | RB | XO | / |
110 | PO | /// | /// | /// | XO | / |
111 | PO | /// | /// | E|/// | XO | / |
112 | PO | //|IH | /// | /// | XO | / |
113 | PO | A|// | /// | /// | XO | 1 |
114 | PO | A|// |R | /// | /// | XO | 1 |
115 | PO | /// | RA | RB | XO | 1 |
116 | PO | /// |WC | /// | /// | XO | / |
117 | PO | /// |T | RA | RB | XO | / |
118 | PO | VRT | RA | RB | XO | / |
119 | PO | VRS | RA | RB | XO | / |
120 | PO | MO | /// | /// | XO | / |
121 | PO | RT | /// |L3 | /// | XO | / |
124 |0 |6 |9 |11 |14 |16 |19|20|21 |31 |
125 | PO | BT | BA | BB | XO | / |
126 | PO | BO | BI | /// |BH | XO |LK |
127 | PO | | /// |S | XO | / |
128 | PO | BF |// |BFA |// | /// | XO | / |
129 | PO | /// | XO | / |
133 |0 |6 |11|12 |20|21 |31 |
134 | PO | RT | spr | XO | / |
135 | PO | RT | tbr | XO | / |
136 | PO | RT |0 | /// | XO | / |
137 | PO | RT |1 | FXM |/ | XO | / |
138 | PO | RT | dcr | XO | / |
139 | PO | RT | pmrn | XO | / |
140 | PO | RT | BHRBE | XO | / |
141 | PO | DUI | DUIS | XO | / |
142 | PO | RS |0 | FXM |/ | XO | / |
143 | PO | RS |1 | FXM |/ | XO | / |
144 | PO | RS | spr | XO | / |
145 | PO | RS | dcr | XO | / |
146 | PO | RS | pmrn | XO | / |
149 |0 |6|7 |15|16 |21 |31 |
150 | PO |L| FLM |W |FRB | XO |Rc |
153 |0 |6 |11 |16 |21 |31 |
154 | PO | T | RA | RB | XO |TX |
155 | PO | S | RA | RB | XO |SX |
158 |0 |6 |9 |11 |14 |16 |21 |30|31 |
159 | PO | T | /// | B |XO |BX|TX |
160 | PO | T | /// |UIM | B |XO |BX|TX |
161 | PO | BF | //| /// | B |XO |BX| / |
164 |0 |6 |9 |11 |16 |21 |22 |24 |29|30|31 |
165 | PO | T | A | B | XO |AX|BX|TX |
166 | PO | T | A | B |Rc | XO |AX|BX|TX |
167 | PO | BF | // | A | B | XO |AX|BX|/ |
168 | PO | T | A | B |XO |SHW | XO |AX|BX|TX |
169 | PO | T | A | B |XO |DM | XO |AX|BX|TX |
172 |0 |6 |11 |16 |21 |26 |28|29 |30|31 |
173 | PO | T | A | B | C | XO |CX|AX |BX|TX |
176 |0 |6 |11 |16 |21 |30|31 |
177 | PO | RS | RA | sh | XO |sh|Rc |
180 |0 |6 |11 |16 |22 |31 |
181 | PO | RT | RA | XBI | XO |Rc |
184 |0 |6 |11 |16 |21 |22 |31 |
185 | PO | RT| RA| RB |OE | XO |Rc |
186 | PO | RT| RA| RB | /| XO |Rc |
187 | PO | RT| RA| RB | /| XO | / |
188 | PO | RT| RA| /// |OE | XO |Rc |
191 |0 |6 |11 |16 |21 |26 |31 |
192 | PO | FRT | FRA | FRB | FRC | XO |Rc |
193 | PO | FRT | FRA | FRB | /// | XO |Rc |
194 | PO | FRT | FRA | /// | FRC | XO |Rc |
195 | PO | FRT | /// | FRB | /// | XO |Rc |
196 | PO | RT | RA | RB | BC | XO | /|
199 |0 |6 |11 |16 |21 |26 |31|
200 | PO | RS | RA | RB | MB | ME |Rc|
201 | PO | RS | RA | SH | MB | ME |Rc|
204 |0 |6 |11 |16 |21 |27|30|31|
205 | PO | RS | RA | sh | mb |XO|sh|Rc|
206 | PO | RS | RA | sh | me |XO|sh|Rc|
209 |0 |6 |11 |16 |21 |27 |31|
210 | PO | RS | RA | RB | mb | XO |Rc|
211 | PO | RS | RA | RB | me | XO |Rc|
214 |0 |6 |11 |16 |21|22 |25|26 |31|
215 | PO | RT | RA | RB | RC | XO |
216 | PO | VRT | VRA | VRB | VRC | XO |
217 | PO | VRT | VRA | VRB | /|SHB | XO |
218 | PO | VRT | VRA | VRB | /|BFA|/ | XO |
221 |0 |6 |11 |16 |21 |24|26 |31|
222 | PO | RT | RA | RB | RC | XO |Rc|
225 |0 |6 |11 |16 |21|22 |31|
226 | PO | VRT | VRA | VRB |Rc| XO |
229 |0 |6 |11 |16 |21 |31|
230 | PO | VRT | VRA | VRB | XO |
231 | PO | VRT | /// | VRB | XO |
232 | PO | VRT | UIM | VRB | XO |
233 | PO | VRT | / UIM | VRB | XO |
234 | PO | VRT | // UIM | VRB | XO |
235 | PO | VRT | /// UIM | VRB | XO |
236 | PO | VRT | SIM | ///| XO |
237 | PO | VRT | ///| | XO |
238 | PO | |/// | VRB | XO |
241 |0 |6 |9 |11 |16 |21 |31|
242 | PO | RS | RA | RB | XO |
243 | PO | RS | RA | UI | XO |
244 | PO | RT | ///| RB | XO |
245 | PO | RT | RA | RB | XO |
246 | PO | RT | RA | ///| XO |
247 | PO | RT | UI | RB | XO |
248 | PO | BF|//| RA | RB | XO |
249 | PO | RT | RA | UI | XO |
250 | PO | RT | SI | ///| XO |
253 |0 |6 |11 |16 |21 |29 |31 |
254 | PO | RT| RA | RB | XO |BFA |
257 |0 |6 |9 |11 |16 |22 |31 |
258 | PO | BF|//| FRA | DCM | XO | / |
259 | PO | BF|//| FRAp | DCM | XO | / |
260 | PO | BF|//| FRA | DGM | XO | / |
261 | PO | BF|//| FRAp | DGM | XO | / |
262 | PO | FRT | FRA | SH | XO |Rc |
263 | PO | FRTp| FRAp | SH | XO |Rc |
266 |0 |6 |11 |15 |16 |21 |23 |31 |
267 | PO | FRT | TE | FRB |RMC| XO |Rc |
268 | PO | FRTp| TE | FRBp |RMC| XO |Rc |
269 | PO | FRT | FRA | FRB |RMC| XO |Rc |
270 | PO | FRTp| FRA | FRBp |RMC| XO |Rc |
271 | PO | FRTp| FRAp | FRBp |RMC| XO |Rc |
272 | PO | FRT | /// | R | FRB |RMC| XO |Rc |
273 | PO | FRTp| /// | R | FRBp |RMC| XO |Rc |
276 |0 |6 |11 |16 |21 |23|24|25|26 31|
277 | PO | SVG|rmm | SVd |ew |yx|mm|sk| XO |
280 |0 |6 |11 |16 |23 |24 |25 |26 |31 |
281 | PO | RT | RA | SVi |ms |vs |vf | XO |Rc |
282 | PO | RT | / | SVi |/ |/ |vf | XO |Rc |
286 | PO | SCi | SCm | SCimm |
290 | PO | SCi | SCm | SRbr | SRimm |
293 |0 |6 |11 |16 |21 |31 |
294 | PO | RT | RA| RC | SVD |
295 | PO | RS | RA| RC | SVD |
296 | PO | FRT | RA| RC | SVD |
297 | PO | FRS | RA| RC | SVD |
300 |0 |6 |11 |16 |21 |30 |31 |
301 | PO | RT | RA | RC | SVDS | XO |
302 | PO | RS | RA | RC | SVDS | XO |
305 |0 |6 |11 |16 |21 |25 |26 |31 |
306 | PO | SVxd | SVyd | SVzd | SVrm |vf | XO |
309 |0 |6 |11 |13 |15 |17 |19 |21 |22 |26 |31 |
310 | PO | SVme |mi0 | mi1 | mi2 | mo0 | mo1 |pst |/// | XO |
313 |0 |6 |11 |16 |21 |29 |31 |
314 | PO | RT | RA | RB | TLI | XO |Rc |
315 | PO | RT | RA | RB | TLI | XO |L |
317 # 1.6.28 Instruction Fields
319 Field used by the tbegin. instruction to specify an
320 implementation-specific function.
321 Field used by the tend. instruction to specify the
322 completion of the outer transaction and all nested
327 0 The immediate field represents an address
328 relative to the current instruction address. For
329 I-form branches the effective address of the
330 branch target is the sum of the LI field
331 sign-extended to 64 bits and the address of
332 the branch instruction. For B-form branches
333 the effective address of the branch target is
334 the sum of the BD field sign-extended to 64
335 bits and the address of the branch instruction.
336 1 The immediate field represents an absolute
337 address. For I-form branches the effective
338 address of the branch target is the LI field
339 sign-extended to 64 bits. For B-form branches
340 the effective address of the branch target is
341 the BD field sign-extended to 64 bits.
344 Fields that are concatenated to specify a VSR to
348 Field used to specify a bit in the CR to be used as
352 Field used to specify a bit in the CR to be used as
356 Field used to specify a bit in the CR to be used as
360 Immediate field used to specify a 14-bit signed
361 two's complement branch displacement which is
362 concatenated on the right with 0b00 and
363 sign-extended to 64 bits.
366 Field used to specify one of the CR fields or one of
367 the FPSCR fields to be used as a target.
368 Formats: D, X, XL, XX2, XX3, Z22
370 Field used to specify one of the CR fields
371 to be used as a source.
374 Field used to specify one of the CR fields or one of
375 the FPSCR fields to be used as a source.
378 Field used to specify one of the CR fields or one of
379 the FPSCR fields to be used as a source.
382 Field used to specify a hint in the Branch Condi-
383 tional to Link Register and Branch Conditional to
384 Count Register instructions. The encoding is
385 described in Section 2.4, 'Branch Instructions'.
388 Field used to identify the BHRB entry to be used
389 as a source by the Move From Branch History
390 Rolling Buffer instruction.
393 Field used to specify a bit in the CR to be tested by
394 a Branch Conditional instruction.
397 Field used to specify the Bit-mask Mode for bmask
400 Field used to specify options for the Branch Condi-
401 tional instructions. The encoding is described in
402 Section 2.4, 'Branch Instructions'.
403 Formats: B, XL, X, XL
405 Field used to specify a bit in the CR or in the
406 FPSCR to be used as a target.
409 Fields that are concatenated to specify a VSR to
411 Formats: XX2, XX3, XX4
413 Field used in X-form instructions to specify a cache
414 target (see Section 4.3.2 of Book II).
417 Fields that are concatenated to specify a VSR to
421 Immediate field used to specify a 16-bit signed
422 two's complement integer which is sign-extended
425 d0,d1,d2 (16:25,11:15,31)
426 Immediate fields that are concatenated to specify a
427 16-bit signed two's complement integer which is
428 sign-extended to 64 bits.
430 dc,dm,dx (25,29,11:15)
431 Immediate fields that are concatenated to specify
435 Immediate field used to specify Data Class Mask.
438 Immediate field used to specify Data Class Mask.
441 Immediate field used as the Data Group Mask.
444 Immediate field used by xxpermdi instruction as
445 doubleword permute control.
448 Immediate operand field used to specify new deci-
449 mal floating-point rounding mode.
452 Field used by the dnh instruction (see Book III-E).
455 Field used by the dnh instruction (see Book III-E).
458 Immediate field used to specify a 12-bit signed
459 two's complement integer which is concatenated
460 on the right with 0b0000 and sign-extended to 64
464 Immediate field used to specify a 14-bit signed
465 two's complement integer which is concatenated
466 on the right with 0b00 and sign-extended to 64 bits.
469 Field used by the Write MSR External Enable
470 instruction (see Book III-E).
473 Field used to specify the access types ordered by
474 an Elemental Memory Barrier type of sync instruc-
477 Field used to specify a hint in the Load and
478 Reserve instructions. The meaning is described in
479 Section 4.6.2, 'Load and Reserve and Store Con-
480 ditional Instructions', in Book II.
483 Expanded opcode field
486 Expanded opcode field
489 Field used to specify Inexact form of round to
490 quad-precision integer.
493 Field used to specify the element width for SVI-Form
496 Field used to specify the function code in Load/
497 Store Atomic instructions.
500 Field mask used to identify the FPSCR fields that
501 are to be updated by the mtfsf instruction.
504 Field used to specify a FPR to be used as a
506 Formats: A, X, Z22, Z23
508 Field used to specify an even/odd pair of FPRs to
509 be concatenated and used as a source.
512 Field used to specify an FPR to be used as a
514 Formats: A, X, XFL, Z23
516 Field used to specify an even/odd pair of FPRs to
517 be concatenated and used as a source.
520 Field used to specify an FPR to be used as a
524 Field used to specify an FPR to be used as a
528 Field used to specify an even/odd pair of FPRs to
529 be concatenated and used as a source.
532 Field used to specify an FPR to be used as a tar-
534 Formats: A, D, X, Z22, Z23
536 Field used to specify an even/odd pair of FPRs to
537 be concatenated and used as a target.
538 Formats: DS, X, Z22, Z23
540 Field mask used to identify the CR fields that are to
541 be written by the mtcrf and mtocrf instructions, or
542 read by the mfocrf instruction.
545 Immediate field used to specify a 5-bit signed inte-
549 Field used to specify a hint in the SLB Invalidate
550 All instruction. The meaning is described in
551 Section 5.9.3.2, 'SLB Management Instructions',
555 Immediate field used to specify an 8-bit integer.
558 Immediate field used to specify a 5-bit signed inte-
562 Field used to specify whether the mtfsf instruction
563 updates the entire FPSCR.
566 Field used by the Data Cache Block Flush instruc-
567 tion (see Section 4.3.2 of Book II) and also by the
568 Synchronize instruction (see Section 4.6.3 of Book
572 Field used to specify whether a fixed-point Com-
573 pare instruction is to compare 64-bit numbers or
575 Field used by the Compare Range Byte instruction
576 to indicate whether to compare against 1 or 2
580 Field used by the Move To Machine State Register
581 instruction (see Book III).
582 Field used by the SLB Move From Entry VSID and
583 SLB Move From Entry ESID instructions for imple-
584 mentation-specific purposes.
587 Field used by the Deliver A Random Number
588 instruction (see Section 3.3.9, 'Fixed-Point Arith-
589 metic Instructions') to choose the random number
593 Field used to specify whether mask-in occurs in bmask
596 Field used to specify whether the grevlut instruction
597 updates the whole GPR or the first half.
600 Field used by the System Call instructions.
603 Immediate field used to specify a 24-bit signed
604 two's complement integer which is concatenated
605 on the right with 0b00 and sign-extended to 64
610 0 Do not set the Link Register.
611 1 Set the Link Register. The address of the
612 instruction following the Branch instruction is
613 placed into the Link Register.
616 Field used to specify a REMAP shape for SVI-Form
619 Field used in M-form instructions to specify the first
620 1-bit of a 64-bit mask, as described in
621 Section 3.3.14, 'Fixed-Point Rotate and Shift
622 Instructions' on page 101.
625 Field used in MD-form and MDS-form instructions
626 to specify the first 1-bit of a 64-bit mask, as
627 described in Section 3.3.14, 'Fixed-Point Rotate
628 and Shift Instructions' on page 101.
631 Field used in MD-form and MDS-form instructions
632 to specify the last 1-bit of a 64-bit mask, as
633 described in Section 3.3.14, 'Fixed-Point Rotate
634 and Shift Instructions' on page 101.
637 Field used in M-form instructions to specify the last
638 1-bit of a 64-bit mask, as described in
639 Section 3.3.14, 'Fixed-Point Rotate and Shift
640 Instructions' on page 101.
643 Field used in REMAP to select the SVSHAPE for 1st input register
646 Field used in REMAP to select the SVSHAPE for 2nd input register
649 Field used in REMAP to select the SVSHAPE for 3rd input register
652 Field used to specify the meaning of the rmm field for SVI-Form
655 Field used in REMAP to select the SVSHAPE for 1st output register
658 Field used in REMAP to select the SVSHAPE for 2nd output register
661 Field used in X-form instructions to specify a sub-
662 set of storage accesses.
665 Field used in Simple-V to specify whether MVL is to be set
668 Field used to specify the number of bytes to move
669 in an immediate Move Assist instruction.
672 Field used by the Embedded Hypervisor Privilege
676 Field used by XO-form instructions to enable set-
677 ting OV and SO in the XER.
680 Primary opcode field.
683 Field used to specify whether to invalidate pro-
684 cess- or partition-scoped entries for tlbie[l].
687 Field used to specify preferred sign for BCD opera-
691 Field used in REMAP to indicate "persistence" mode (REMAP
692 continues to apply to multiple instructions)
695 Immediate field used to specify a 4-bit unsigned
699 Field used by the tbegin. instruction to specify the
703 Immediate field that specifies whether the RMC is
704 specifying the primary or secondary encoding
705 Field used to specify whether to invalidate Radix
706 Tree or HPT entries for tlbie[l].
709 Field used to specify a GPR to be used as a
710 source or as a target.
711 Formats: A, BM2, D, DQ, DQE, DS, M, MD, MDS, TX, VA, VA2, VX, X, XO, XS, SVL, XB
713 Field used to specify a GPR to be used as a
715 Formats: A, BM2, M, MDS, VA, VA2, X, XO
718 0 Do not alter the Condition Register.
719 1 Set Condition Register Field 6 as described in
720 Section 2.3.1, 'Condition Register' on
724 Field used to specify a GPR to be used as a
726 Formats: VA, VA2, SVD, SVDS
729 0 Do not alter the Condition Register.
730 1 Set Condition Register Field 0 or Field 1 as
731 described in Section 2.3.1, 'Condition Regis-
733 Formats: A, M, MD, MDS, VA2, X, XFL, XO, XS, Z22, Z23, SVL, XB, TLI
735 Field used to specify what types of entries to inval-
739 Immediate operand field used to specify new
740 binary floating-point rounding mode.
743 Immediate field used for DFP rounding mode con-
747 Round to Odd override
750 Field used to specify a GPR to be used as a
752 Formats: D, DS, M, MD, MDS, X, XFX, XS
754 Field used to specify an even/odd pair of GPRs to
755 be concatenated and used as a source.
758 Field used to specify a GPR to be used as a target.
759 Formats: A, BM2, D, DQE, DS, DX, VA, VA2, VX, X, XFX, XO, XX2, SVL, XB
761 Field used to specify an even/odd pair of GPRs to
762 be concatenated and used as a target.
765 Immediate field that specifies signed versus
769 Immediate field that specifies whether or not the
770 rfebb instruction re-enables event-based
774 Index to SV Context Propagation SPR
777 SV Context Propagation Mode
780 SV Context Propagation immediate bitfield
783 SV REMAP byte-reversal field.
786 SV REMAP immediate FIFO bitfield
789 Field used to specify a shift amount.
792 Field used to specify a shift amount.
795 Fields that are concatenated to specify a shift
799 Field used to specify a shift amount in bytes.
802 Field used to specify a shift amount in words.
805 Immediate field used to specify a 5-bit signed inte-
809 Immediate field used to specify a 16-bit signed
813 Immediate field used to specify a 5-bit signed inte-
817 Field used to specify dimensional skipping in svindex
820 Immediate field that specifies signed versus
824 Field used to specify a Special Purpose Register
825 for the mtspr and mfspr instructions.
828 Field used by the Segment Register Manipulation
829 instructions (see Book III).
832 Immediate field used to specify the size of the REMAP dimension
833 in the svindex instruction.
836 Immediate field used to specify an 11-bit signed
837 two's complement integer which is sign-extended
841 Immediate field used to specify a 9-bit signed
842 two's complement integer which is concatenated
843 on the right with 0b00 and sign-extended to 64 bits.
846 Field used to specify a GPR to be used as a
850 Simple-V immediate field for setting VL or MVL
853 Simple-V "REMAP" map-enable bits (0-4)
856 Simple-V "REMAP" Mode
859 Simple-V "REMAP" x-dimension size
862 Simple-V "REMAP" y-dimension size
865 Simple-V "REMAP" z-dimension size
868 Fields SX and S are concatenated to specify a
869 VSR to be used as a source.
872 Fields SX and S are concatenated to specify a
873 VSR to be used as a source.
876 Field used to specify the type of invalidation done
877 by a TLB Invalidate Local instruction (see Book
881 Field used by the Move From Time Base instruc-
882 tion (see Section 6.1 of Book II).
885 Immediate field that specifies a DFP exponent.
888 Field used by the data stream variant of the dcbt
889 and dcbtst instructions (see Section 4.3.2 of Book
893 Field used by the ternlogi instruction as the
897 Field used to specify the conditions on which to
898 trap. The encoding is described in
899 Section 3.3.10.1, 'Character-Type Compare
900 Instructions' on page 87.
903 Fields that are concatenated to specify a VSR to
904 be used as either a target.
907 Fields that are concatenated to specify a VSR to
908 be used as either a target or a source.
909 Formats: X, XX2, XX3, XX4
911 Immediate field used as the data to be placed into
912 a field in the FPSCR.
915 Immediate field used to specify a 5-bit unsigned
919 Immediate field used to specify a 16-bit unsigned
923 Immediate field used to specify a 5-bit unsigned
927 Immediate field used to specify a 4-bit unsigned
931 Immediate field used to specify a 3-bit unsigned
935 Immediate field used to specify a 2-bit unsigned
939 Field used to specify a VR to be used as a source.
942 Field used to specify a VR to be used as a source.
945 Field used to specify a VR to be used as a source.
948 Field used to specify a VR to be used as a source.
951 Field used to specify a VR to be used as a target.
952 Formats: DS, VA, VC, VX, X
954 Field used in Simple-V to specify whether "Vertical" Mode is set
957 Field used in Simple-V to specify whether VL is to be set
960 Field used by the mtfsfi and mtfsf instructions to
961 specify the target word in the FPSCR.
964 Field used to specify the condition or conditions
965 that cause instruction execution to resume after
966 executing a wait instruction (see Section 4.6.4 of
970 Field used to specify a bit in the XER.
971 Formats: MDS, MDS, TX
973 Field used to specify a 6-bit unsigned immediate for bit manipulation
974 instructions, such as grevi.
977 Extended opcode field.
980 Extended opcode field.
983 Extended opcode field.
986 Extended opcode field.
989 Extended opcode field.
992 Extended opcode field.
993 Formats: X, XFL, XFX, XL
995 Extended opcode field.
998 Extended opcode field.
999 Formats: XO, XX3, Z22, XB
1001 Extended opcode field.
1004 Extended opcode field.
1007 Extended opcode field.
1010 Extended opcode field.
1013 Extended opcode field.
1014 Formats: A, DX, VA2, SVL
1016 Extended opcode field.
1017 Formats: VA, SVM, SVRM, SVI
1019 Extended opcode field.
1022 Extended opcode field.
1025 Extended opcode field.
1028 Extended opcode field.
1031 Extended opcode field.
1034 Extended opcode field.
1035 Formats: DQE, DS, SC
1037 Field used to specify loop dimension order in svindex