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59 % set default figure placement to htbp
60 \makeatletter\@addtoreset
{chapter
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69 \chapter*
{Introduction
}
70 \addcontentsline{toc
}{chapter
}{Introduction
} \markboth{INTRODUCTION
}{}
72 This
document is an auto-generated version of the Draft SVP64
73 Specification available at
76 https://libre-soc.org/openpower/sv
79 for which the source code is available at
82 https://git.libre-soc.org/?p=libreriscv.git;a=tree;f=openpower;hb=HEAD
85 This PDF may be created with "make pdf" from the following file:
88 https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/Makefile;hb=HEAD
91 Simple-V Cray-style Vectors have been developed by the Libre-SOC Team,
92 sponsored by the NLnet Foundation and NGI POINTER under
93 EU Grants
871528 and
957073.
95 Simple-V is in DRAFT Status and will be submitted publicly
96 (non-confidentially) through the OPF ISA WG "External Submissions"
97 Process. Funding from NLnet, through their Privacy and Enhanced Trust
98 Programme, requires full transparency.
102 \part{Scalable Vectors
}
104 \chapter{Scalable Vectors for the Power ISA
}
105 \hypertarget{svux2fscalvecpowisa
}{}
106 \hypertarget{SVux7csv
}{}
107 \input{tex_out/sv.tex
}
108 \chapter{Other Vector ISAs
}\hypertarget{svux2fvector_isa_comparison
}{}
109 \input{tex_out/vector_isas.tex
}
110 \chapter{Overview
}\hypertarget{svux2foverview
}{}
111 \input{tex_out/overview.tex
}
112 \chapter{Compliancy Levels
}\hypertarget{svux2fcompliancy_levels
}{}
113 \input{tex_out/compliancy_levels.tex
}
114 \chapter{SVP64
}\hypertarget{svux2fsvp64
}{}
115 \input{tex_out/svp64.tex
}
116 \chapter{SPRs
}\hypertarget{svux2fsprs
}{}
117 \input{tex_out/sprs.tex
}
118 \chapter{Arithmetic Mode
}\hypertarget{svux2fnormal
}{}
119 \input{tex_out/normal.tex
}
120 \chapter{Load/Store Mode
}\hypertarget{svux2fldst
}{}
121 \input{tex_out/ldst.tex
}
122 \chapter{Condition Register Fields Mode
}\hypertarget{svux2fcr_ops
}{}
123 \input{tex_out/cr_ops.tex
}
124 \chapter{Branch Mode
}\hypertarget{svux2fbranches
}{}
125 \input{tex_out/branches.tex
}
126 \chapter{setvl instruction
}\hypertarget{svux2fsetvl
}{}
127 \input{tex_out/setvl.tex
}
128 \chapter{svstep instruction
}\hypertarget{svux2fsvstep
}{}
129 \input{tex_out/svstep.tex
}
130 \chapter{REMAP subsystem
}\hypertarget{svux2fremap
}{}
131 \input{tex_out/remap.tex
}
132 \chapter{Swizzle Move
}\hypertarget{svux2fmv.swizzle
}{}
133 \input{tex_out/mv_swizzle.tex
}
134 \chapter{Pack / Unpack
}\hypertarget{svux2fmv.vec
}{}
135 \input{tex_out/mv_vec.tex
}
138 \chapter{SVP64 Appendix
}\hypertarget{svp64ux2fappendix
}{}
139 \input{tex_out/svp64_appendix.tex
}
140 \chapter{SVP64 Quirks
}\hypertarget{svux2fsvp64_quirks
}{}
141 \input{tex_out/svp64_quirks.tex
}
142 \chapter{Simple-V pseudocode
}\hypertarget{svux2fpseudocode_simplev
}{}
143 \input{tex_out/pseudocode_simplev.tex
}
144 \chapter{SVP64 Augmentation Table
}\hypertarget{opcode_regs_deduped
}{}
147 \fontsize{7}{9}\selectfont
148 \input{tex_out/opcode_regs_deduped.tex
}
153 \part{Scalar Instructions
}
155 \chapter{Vector Assist ops
}\hypertarget{svux2fvector_ops
}{}
156 \input{tex_out/vector_ops.tex
}
157 \chapter{CR Weird ops
}\hypertarget{svux2fcr_int_predication
}{}
158 \input{tex_out/cr_int_predication.tex
}
159 \chapter{Bitmanip ops
}\hypertarget{svux2fbitmanip
}{}
160 \input{tex_out/bitmanip.tex
}