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[libreriscv.git] / openpower / sv / SimpleV_rationale.mdwn
1 [[!tag whitepapers]]
2
3 # Why in the 2020s would you invent a new Vector ISA
4
5 Inventing a new Scalar ISA from scratch is over a decade-long task including
6 simulators and compilers: OpenRISC 1200 took 12 years to mature.
7 A Vector or SIMD ISA to reach stable
8 general-purpose auto-vectorisation compiler support has never been
9 achieved in the history of computing, not with the combined resources of
10 ARM, Intel, AMD, MIPS, Sun Microsystems, SGI, Cray, and many more.
11 GPUs have ultra-specialist compilers, and standards managed by the
12 Khronos Group, with multi-man-century development committment.
13
14 Therefore it begs the question, why on earth would anyone consider this
15 task?