openpower/sv/av_opcodes.mdwn

   1 # Scalar OpenPOWER Audio and Video Opcodes
   2
   3 the fundamental principle of SV is a hardware for-loop. therefore the first (and in nearly 100% of cases only) place to put Vector operations is first and foremost in the *scalar* ISA.  However only by analysing those scalar opcodes *in* a SV Vectorisation context does it become clear why they are needed and how they may be designed.
   4
   5 This page therefore has acompanying discussion at <https://bugs.libre-soc.org/show_bug.cgi?id=230> for evolution of suitable opcodes.
   6
   7 # Audio
   8
   9 TODO
  10
  11 # Video
  12
  13 TODO
  14
  15 ## VSX SIMD
  16
  17 ### vpkpx
  18
  19 vpkpx is a 32-bit to 16-bit 8888 into 1555 conversion
  20
  21 SV notes:
  22
  23 a single 32-bit to 16-bit operation should suffice, fitting cleanly into one single scalar op:
  24
  25     dest[0]     = src[7]
  26     dest[1 : 5] = src[8 :12]
  27     dest[6 :10] = src[16:20]
  28     dest[11:15] = src[24:28]
  29
  30 ### vpks[*][*]s
  31
  32 signed and unsigned, these are N-to-M (N=64/32/16, M=32/16/8) chop/clamp/sign/zero-extend operations
  33
  34 ### vupkhpx / vupklpx
  35
  36 these are 16-bit to 32-bit 1555 to 8888 conversion
  37
  38 ### vavgs*
  39
  40 signed and unsigned, 8/16/32: these are all of the form:
  41
  42     result = truncate((a + b + 1) >> 1))
  43
  44 ### vabsdu*
  45
  46 unsigned 8/16/32: these are all of the form:
  47
  48     result = (src1 > src2) ? truncate(src1-src2) :
  49                              truncate(src2-src1)
  50
  51 ### vmaxs* / vmaxu* (and min)
  52
  53 signed and unsigned, 8/16/32: these are all of the form:
  54
  55     result = (src1 > src2) ? src1 : src2 # max
  56     result = (src1 < src2) ? src1 : src2 # min
  57