openpower/sv/cr_ops.mdwn

   1 # Data-dependent fail-first on CR operations
   2
   3 Data-dependent SVP64 Vectorised Operations involving the creation or
   4 modification of a CR require an extra two bits, which are not available
   5 in the compact space of the `MODE` Field. With the concept of element
   6 width overrides being meaningless for CR Fields it is possible
   7 to use the `ELWIDTH` field for extra fields.
   8
   9 Condition Register based operations such as `mfcr` and `crand`
  10 can thus be made more flexible.  However the rules that apply in
  11 this section also apply to future CR-based instructions.  Note
  12 that these rules and the alternative mapping **only** applies
  13 to instructions that **only** reference a CR Field or CR bit as
  14 the sole exclusive result. This section **does not** apply
  15 to instructions... TODO
  16
  17 SVP64 RM `MODE` (includes `ELWIDTH` bits) for CR-based operations:
  18
  19 | 4 | 5 | 19-20 |  21 | 22   23 |  description     |
  20 | - | - | ----- | --- |---------|----------------- |
  21 |dz |VLi| 01    | inv |  CR-bit | normal mode      |
  22 |sz |VLi| 01    | inv |  dz Rc1 | VLSET mode       |
  23
  24 Operations that actually produce or alter CR Field as a result
  25 do not also in turn have an Rc=1 mode.  However it makes no
  26 sense to try to test the 4 bits of a CR Field for being equal
  27 or not equal to zero. Moreover, the result is already in the
  28 form that is desired: it is a CR field.
  29
  30 There are two primary different types of CR operations:
  31
  32 * Those which have a 3-bit operand field (referring to a CR Field)
  33 * Those which have a 5-bit operand (referring to a bit within the
  34    whole 32-bit CR)
  35
  36 Examining these two as has already been done it is observed that
  37 the difference may be considered to be that the 5-bit variant
  38 provides additional information about which CR Field bit
  39 (EQ, GE, LT, SO) is to be operated on by the instruction.
  40
  41 Thus, logically, we may set the following rule:
  42
  43 * When a 5-bit CR Result field is used in an instruction, the
  44   `inv, VLi and RC1` variant of Data-Dependent Fail-First
  45   must be used. i.e. the bit of the CR field to be tested is
  46   the one that has just been modified by the operation.
  47 * When a 3-bit CR Result field is used the `inv CRbit` variant
  48   must be used in order to select which CR Field bit shall
  49   be tested (EQ, LE, GE, SO).
  50
  51 Examples of the former type:
  52
  53 * crand, cror, crnor. These all are 5-bit (BA, BB, BT). The bit
  54   to be tested against `inv` is the one selected by `BT`
  55 * mcrf. This has only 3-bit (BF, BFA). In order to select the
  56   bit to be tested, the alternative FFirst encoding must be used.
  57
  58 This limits sv.mcrf in that it may not use the `VLi` (VL inclusive)
  59 Mode. This is unfortunste but unavoidable due to encoding pressure
  60 on SVP64.
  61