openpower/sv/cr_ops.mdwn

   1 # Data-dependent fail-first on CR operations
   2
   3 Data-dependent SVP64 Vectorised Operations involving the creation or
   4 modification of a CR require an extra two bits, which are not available
   5 in the compact space of the `MODE` Field. With the concept of element
   6 width overrides being meaningless for CR Fields it is possible to use the
   7 `ELWIDTH` field for extra fields.
   8
   9 Condition Register based operations such as `mfcr` and `crand` can thus
  10 be made more flexible.  However the rules that apply in this section
  11 also apply to future CR-based instructions.  Note that these rules and
  12 the alternative mapping **only** applies to instructions that **only**
  13 reference a CR Field or CR bit as the sole exclusive result. This section
  14 **does not** apply to instructions... TODO
  15
  16 SVP64 RM `MODE` (includes `ELWIDTH` bits) for CR-based operations:
  17
  18 | 4 | 5 | 19-20 |  21 | 22   23 |  description     |
  19 | - | - | ----- | --- |---------|----------------- |
  20 |dz |VLi| 01    | inv |  CR-bit | normal mode      |
  21 |sz |VLi| 01    | inv |  dz Rc1 | VLSET mode       |
  22
  23 Operations that actually produce or alter CR Field as a result do not
  24 also in turn have an Rc=1 mode.  However it makes no sense to try to test
  25 the 4 bits of a CR Field for being equal or not equal to zero. Moreover,
  26 the result is already in the form that is desired: it is a CR field.
  27
  28 There are two primary different types of CR operations:
  29
  30 * Those which have a 3-bit operand field (referring to a CR Field)
  31 * Those which have a 5-bit operand (referring to a bit within the
  32    whole 32-bit CR)
  33
  34 Examining these two as has already been done it is observed that the
  35 difference may be considered to be that the 5-bit variant provides
  36 additional information about which CR Field bit (EQ, GE, LT, SO) is to
  37 be operated on by the instruction.
  38
  39 Thus, logically, we may set the following rule:
  40
  41 * When a 5-bit CR Result field is used in an instruction, the
  42   `inv, VLi and RC1` variant of Data-Dependent Fail-First
  43   must be used. i.e. the bit of the CR field to be tested is
  44   the one that has just been modified by the operation.
  45 * When a 3-bit CR Result field is used the `inv CRbit` variant
  46   must be used in order to select which CR Field bit shall
  47   be tested (EQ, LE, GE, SO).
  48
  49 Examples of the former type:
  50
  51 * crand, cror, crnor. These all are 5-bit (BA, BB, BT). The bit
  52   to be tested against `inv` is the one selected by `BT`
  53 * mcrf. This has only 3-bit (BF, BFA). In order to select the
  54   bit to be tested, the alternative FFirst encoding must be used.
  55
  56 This limits sv.mcrf in that it may not use the `VLi` (VL inclusive)
  57 Mode. This is unfortunste but unavoidable due to encoding pressure
  58 on SVP64.
  59