openpower/sv/fclass.mdwn

   1 # fclass
   2
   3 In SV just as with [[sv/fcvt]] single precision is to be considered half-of-elwidth precision.  Thus when elwidth=FP32 fptstsp will test half that precision, at FP16.
   4
   5 based on xvtstdcsp v3.0B p768 the instruction performs analysis of the FP number to determine if it is Infinity, NaN, Denormalised or Zero and if so which sign.
   6
   7 unlike xvtstdcsp the result is stored in a Condition Register specified by BF.
   8 this allows it to be used as a predicate mask.  setb may be used to create the equivalent of xvtstdcsp if desired.
   9
  10 | 0.5| 6.8 |9..15 | 16.20 | 21...30 |31|  name   | Form    |
  11 | -- | --- | --   | ----- | ------- |--| ------- | ------  |
  12 | PO | BF  | DCMX | FRB   | XO      |dm| fptstsp | XX2-Form|
  13
  14 ```
  15 dcmx <- DCMX || dm
  16 src  <- (FRB)[32:63]
  17 sign  <- src[0]
  18 exponent  <- src[1:8]
  19 fraction  <- src[9:31]
  20 class.Infinity  <- (exponent = 0xFF) & (fraction = 0)
  21 class.NaN  <- (exponent = 0xFF) & (fraction != 0)
  22 class.Zero  <- (exponent = 0x00) & (fraction = 0)
  23 class.Denormal  <- (exponent = 0x00) & (fraction != 0)
  24 CR{BF} <- ((dcmx[0] & class.NaN & !sign)  |
  25            (dcmx[1] & class.NaN & sign))  ||
  26           ((dcmx[6] & class.Denormal & !sign) |
  27            (dcmx[7] & class.Denormal & sign)) ||
  28           ((dcmx[2] & class.Infinity & !sign) |
  29            (dcmx[3] & class.Infinity & sign)) ||
  30           ((dcmx[4] & class.Zero & !sign) |
  31            (dcmx[5] & class.Zero & sign))
  32 ```
  33
  34 64 bit variant fptstdp is as follows:
  35
  36 ```
  37 src  <- (FRB)
  38 sign <- src[0]
  39 exponent <- src[1:11]
  40 fraction <- src[12:63]
  41       exponent & 7FF
  42 ```