6e32b849c1fd5f79d00adc6ce1b91b8f92dee67e
[libreriscv.git] / openpower / sv / mv.swizzle.mdwn
1 # mv.swizzle
2
3 TODO: evaluate whether this will fit with [[mv.vec]]
4
5 # Format
6
7 | 0..5 |6..10|11..15|16.20|21.....25|26.....30|31| name |
8 |------|-----|------|-----|---------|---------|--|----------|
9 | 19 | RT | RA | | XO[0:4] | XO[5:9] |Rc| XL-Form |
10 | 19 | RT | RA |imm | imm | iNNNN |im| mv.swiz |
11 | 19 | RT | RA |imm | imm | iNNNN |im| fmv.swiz |
12
13 also f.mv
14
15 this gives an 11 bit immediate across bits 16 to 26 and bit 31. a permutation based encoding should allow the 12 bits to be covered
16
17 * 3 bits X
18 * 3 bits Y
19 * 3 bits Z
20 * 3 bits W
21
22 except that the options are:
23
24 * 0b1NN index 0 thru 3 to place subelement in pos XYZW
25 * 0b000 to indicate "skip"
26 * 0b001 to indicate "constant 0"
27 * 0b010 to indicate "constant 1" (or 1.0)
28 * 0b011 is not needed.
29
30 Evaluating efforts to encode 12 bit swizzle into less proved unsuccessful: 7^4 wcomes out to 2,400 which is larger than 11 bits