1c06df12c10b232b9c46c51eb1a2c7522266f40b
[libreriscv.git] / openpower / sv / po9_encoding / discussion.mdwn
1 [[!toc]]
2
3 # introduction
4
5 the purpose of this page is to create and evaluate alternative
6 encoding schemes that allow for a hybrid mixture of
7 (ultra-precious) 32-bit and 64-bit (actually `x86 REP`-like
8 prefixed) instructions.
9
10 a specific view to attaining high-speed massive-wide multi-issue decode
11 is a high priority. therefore especially length-detection must be kept
12 brutally simple.
13
14 # **superseded** alternative 32-64 encoding (1)
15
16 conflict to resolve: EXT90x and EXT232. they are indistinguishable.
17
18 ```
19 |0-5| 6-27 28 29|30-31|32|33-35|36-37| 38-59 | 60-63 | Description |
20 |---|-----|-----|-----|--|-----|-----|-------|-------|------------------|
21 |PO9| rm0 | 0 0 | 0 0 | 0 000 rm1 | xxxx | 0000 | SVP64:EXT900 |
22 |PO9| rm0 | 0 0 | 0 0 | 1 000 rm1 | xxxx | 0000 | SSingle:EXT900 |
23 |PO9| xxx | x 0 | 0 0 | x !zero0 | xxxx | !zero1| 55-bit RESERVED |
24 |PO9| xxx | 0 1 | 0 0 | 32-bit EXT900 (Vectorizable) |
25 |PO9| xxx | 1 1 | 0 0 | 32-bit EXT901 (Unvectorizable) |
26 |PO9| !ZERO | 0 0 | 1 | DWi | SSingle:EXT232-263 |
27 |PO9| 0000 | 0 0 | 1 | DWi | Scalar EXT232-263 |
28 |PO9| RM | 1 0 | 1 | DWi | SVP64:EXT232-263 |
29 |PO9| 0000 | 0 1 | Defined Word-instruction | 32-bit Unvec in 64b|
30 |PO9| !ZERO | 0 1 | Defined Word-instruction | SSingle:EXT000-063 |
31 |PO9| RM | 1 1 | Defined Word-instruction | SVP64:EXT000-063 |
32 ```
33
34 Fields:
35
36 * `RM`: 24-bit SVP64 prefix
37 * `RM <- rm0 || rm1` split field
38 * `!zero0 || !zero1` a split field that must not be zero
39
40 Length detection:
41
42 ```
43 if PO1 return 64
44 elif not PO9 return 32
45 elif Word[31] = 1 return 64
46 elif Word[29:30] = 0b10 return 32
47 elif Word[29:30] = 0b00 return 64
48 else return 32
49 ```
50
51 Instruction allocation restrictions:
52
53 * setvl is Unvectorizable but needs more space later: use 55-bit
54 * likewise svshape svindex and svshape2, all these need 32-bit
55 * svstep *is* Vectorizable but needs to be encoded 32-bit in order
56 to reduce loop-size
57 * space for 32-bit instructions is needed: some instructions
58 just make no sense if done as 64-bit because they **replace**
59 two 32-bit instructions.
60 * but those types of space-saving instructions
61 **also need to be Vectorizable*
62
63 # **superseded** alternative 32-64 encoding (2)
64
65 requires reducing SVP64Single to 23 bits. luckily there are 2 spare
66
67 the complexity of attempting to fit 32-bit instructions into
68 PO9 is very high. encoding (1) attempts to fit `setvl` etc. into
69 32-bit but it is very tight. the entire EXT900 area would be
70 taken up by the SVP64 Management instructions, below, defeating
71 the purpose of having it.
72
73 * `setvl` - Unvectorizable, EXT0xx, `RT RA CTR SVSTATE`, 6-bit XO (including Rc=1)
74 * `psetvl` - Unvectorizable, EXT1xx, ditto
75 * `svstep` - Vectorizable, either EXT900 (very precious) or EXT1xx (better), `RT, SVSTATE`, 6-bit XO (including Rc=1)
76 * `svindex` - Unvectorizable, EXT0xx, `SVSTATE,SVSHAPE0-3`, 5-bit XO
77 * `psvindex` - Unvectorizable, EXT1xx, ditto
78 * `svstep(2)` - Unvectorizable, EXT0xx, `SVSTATE,SVSHAPE0-3`, 5-bit XO
79 * `svstep(2)` - Unvectorizable, EXT1xx, ditto
80
81 ```
82 |0-5| 6-28|29 30 31|32|33-36|37 | 38-60 | 61-63 | Description |
83 |---|-----|--------|--|-----|---|-------|-------|------------------|
84 |PO9| rm0 | 1 0 0 | 0 0000 rm1| xxxx | 000 | SVP64:EXT900 |
85 |PO9|!ZERO| 1 0 0 | 0 1000 1 | xxxx | 000 | SSingle:EXT900 |
86 |PO9| xxx | 1 0 0 | 0 !zero0 | xxxx | !zero1| 55-bit RESERVED |
87 |PO9| xxx | 0 0 0 | 32-bit EXT900 |
88 |PO9|!ZERO| 1 0 0 | 1 | DWi | SSingle:EXT232-263 |
89 |PO9| 000 | 1 0 0 | 1 | DWi | Scalar EXT232-263 |
90 |PO9| nnnn | 1 0 | 1 | DWi | SVP64:EXT232-263 |
91 |PO9| 0000 | 0 1 | Defined Word-instruction | 32-bit Unvec in 64b|
92 |PO9|!ZERO | 0 1 | Defined Word-instruction | SSingle:EXT000-063 |
93 |PO9| nnnn | 1 1 | Defined Word-instruction | SVP64:EXT000-063 |
94 ```
95
96 Length detection:
97
98 ```
99 if PO1 return 64
100 elif not PO9 return 32
101 elif Word[29:31] = 0b000 return 32
102 else return 64
103 ```
104
105 # alternative **no 32 encoding** (3) **current**
106
107 aim of this idea is to attempt simplification of area identification
108 and length. the 55-bit area is eliminated and may only be reintroduced
109 by sacrificing parts of EXT200-231, bear in mind that EXT240 is already
110 unavailable (used by EXT900).
111
112 ```
113 |0-5| 6-29 |30 31|32 |33-37 | 38-61 | 62-63 | Description |
114 |---|--------|-----|---|--------|-------|-------|------------------|
115 |PO9| xxxx | 0 0 | (next new instruction) | 32-bit EXT900 |
116 |PO9| 0000 | 1 0 | 0 | 10001 | //// | 00 | RESERVED |
117 |PO9| !ZERO | 1 0 | 0 | 10001 | xxxx | 00 | SSingle:EXT900 |
118 |PO9| SVRM | 1 0 | 0 | 10001 | xxxx | 01 | SVP64:EXT900 |
119 |PO9| //// | 1 0 | 0 | 10001 | //// | 10 | RESERVED |
120 |PO9| //// | 1 0 | 0 | 10001 | //// | 11 | RESERVED |
121 |PO9| !ZERO | 1 0 | 0 | !PO9 | xxxx | SSingle:EXT232-263 |
122 |PO9| 0000 | 1 0 | 0 | !PO9 | xxxx | Scalar EXT232-263 |
123 |PO9| SVRM | 1 0 | 1 | !PO9 | xxxx | SVP64:EXT232-263 |
124 |PO9| 0000 | 0 1 | Defined Word-instruction | 32-bit Unvec in 64b|
125 |PO9| !ZERO | 0 1 | Defined Word-instruction | SSingle:EXT000-063 |
126 |PO9| SVRM | 1 1 | Defined Word-instruction | SVP64:EXT000-063 |
127 ```
128
129 **Notes**:
130
131 * with `setvl` `svindex` `svshape` and `svshape2` being Unvectorizable Management
132 instructions requiring 6-bit `XO` and needing EXT1xx variants later, they are
133 best placed in EXT0xx. EXT900 is Vectorizable and extremely precious. Further
134 complication of Decode to create Vectorized EXT900 and Unvectorized EXT901
135 is inadviseable (rejected in alternative 1)
136 * EXT200-231 is intended to be partially-filled with LD/ST-Immediate-Postincrement
137 and it is strongly recommended that the exact same Primary Opcode be
138 used, matching the lower 5 bits. `lzbu` is EXT033, therefore `lzbup` is
139 recommended to be EXT233. This will greatly simplify Decode.
140 * With no "overlapping" Encodings permitted on top of EXT232-263 (except
141 EXT240) Speculative Decode may begin early in Multi-Issue systems safe
142 that for the most part the 32-bit instruction is either going to be
143 EXT0xx or EXT2xx, regardless of whether it is SVP64-Prefixed.
144 LD/ST-Immediate-Postincrement discernment from
145 LD/ST-Immediate is delayed, but Decode of other EXT232-263 operations
146 are *also delayed* pending identification.
147
148
149 **Identification**:
150
151 The following identification-criteria may be easily verified by taking
152 a copy of the table above and striking out each line that fails each
153 test. Only EXT000-063 is not by a "process of elimination" (if ... return True)
154
155 **Length detection**: (critically-important to be short)
156
157 ```
158 if PO1 return 64
159 elif not PO9 return 32
160 elif Word[30:31] = 0b00 return 32
161 else return 64
162 ```
163
164 **EXT232-263:**
165
166 ```
167 if not PO9 return False
168 # eliminate EXT900
169 if Word[30:31] == 0b00 return False
170 # eliminate EXT0xx
171 if Word[31] == 0b1 return False
172 # eliminate EXT900 and reserved areas
173 if Word[33:37] != 0b10001 return False
174 #
175 return True
176 ```
177
178 **EXT900:**
179
180 ```
181 # easy first step
182 if not PO9 return False
183 # eliminate EXT0xx, 32-Unvec-in-64b
184 if Word[31] = 0b1 return False
185 # eliminate EXT2xx
186 if Word[30:31] = 0b10 and
187 Word[33:37] != 0b10001 return False
188 # eliminate currently-RESERVED areas
189 if Word[30:31] = 0b10 and
190 Word[62] = 0b1 return False
191 # eliminate final RESERVED area
192 if Word[30:31] = 0b10 and
193 Word[62:63] = 0b00 and
194 Word[6:29 ] = 0x000000 return False
195 # last-remaining is EXT900
196 return True
197 ```
198
199 **EXT000-063**: (includes Prefixed)
200
201 ```
202 if PO1 return False # or other reserved
203 if not PO9 return True # prefixed needs more
204 # eliminate EXT900
205 if Word[30:31] = 0b00 return False
206 # eliminate Prefixed-EXT900, RESERVED and EXT200
207 if Word[31] = 0b0 return False
208 # eliminate 32-bit Unvec in 64b area
209 if Word[30:31] = 0b01 and
210 Word[6:29 ] = 0x000000 return False
211 return True
212 ```
213
214 **SVP64**:
215
216 ```
217 # easy-elimination, first
218 if not PO9 return False
219 if Word[30] = 0b0 return False
220 # eliminate anything not SVP64:EXT900
221 if Word[30:31] = 0b10 and
222 Word[33:37] = 0b10001 and
223 Word[62:63] != 0b01 return False
224 # eliminate anything not SVP64:EXT200-231
225 if Word[31:32] = 0b00 return False
226 # all remaining combinations are SVP64:EXTnnn
227 return True
228 ```
229
230 **SVP64Single**:
231
232 ```
233 # easy-elimination, first
234 if not PO9 return False
235 # eliminate 32-bit EXT900
236 if Word[30:31] = 0b00 return False
237 # eliminate SVP64:EXT000-063
238 if Word[30:31] = 0b11 return False
239 # eliminate anything "Identity"
240 if Word[6:29 ] = 0x000000 return False
241 # eliminate SVP64:EXT200-231
242 if Word[30:32] = 0b101 return False
243 # eliminate anything not SSingle:EXT900
244 if Word[30:31] = 0b10 and
245 Word[33:37] = 0b10001 and
246 Word[62:63] != 0b00 return False
247 # everything left is SVP64Single
248 return True
249 ```
250
251 **RESERVED**: (no need to pass for further detailed decode)
252
253 ```
254 # easy-elimination, first
255 if not PO9 return False
256 # eliminate EXT900
257 if Word[30:31] = 0b00 return False
258 # eliminate SVP64:EXT000-031
259 if Word[30:31] = 0b11 return False
260 # eliminate SSingle:EXT000-063
261 if Word[6:29 ] != 0x000000 and
262 Word[30:31] = 0b01 return False
263 # eliminate EXT200-231
264 if Word[30:31] = 0b10 and
265 Word[33:37] = 0b10001 return False
266 # eliminate SSingle:EXT900
267 if Word[30:31] = 0b10 and
268 Word[6:29 ] != 0x000000 and
269 Word[33:37] = 0b10001 and
270 Word[62:63] = 0b00 return False
271 # eliminate SVP64:EXT900
272 if Word[30:31] = 0b10 and
273 Word[33:37] = 0b10001 and
274 Word[62:63] = 0b01 return False
275 # all else needs further detailed decode
276 return True
277 ```
278
279 # alternative 32-64 encoding (4) **current**
280
281 this idea gets even simpler. the 55-bit area is eliminated and may only be
282 reintroduced by sacrificing parts of EXT200-263. however doing so **WILL** damage
283 high-performance decode.
284
285 advantages:
286
287 * brutally simple length detection (multi-issue 1 clock cycle)
288 * extremely easy SVP64 identification
289 * extremely easy SVP64Single identification
290
291
292 ```
293 |0-5| 6-29 |30 31|32-37 | 38-663 | Description |
294 |---|--------|-----|--------|--------|------------------|
295 |PO9| xxxx | x x | 010001 | //// | RESERVED |
296 |PO9| xxxx | x x | 000001 | //// | RESERVED |
297 |PO9| !ZERO | 1 1 | !PO9 | xxxx | SSingle:EXT232-263 |
298 |PO9| 0000 | 1 1 | !PO9 | xxxx | Scalar EXT232-263 |
299 |PO9| SVRM | 1 0 | !PO9 | xxxx | SVP64:EXT232-263 |
300 |PO9| 0000 | 0 1 | Defined Word-instruction | 32-bit EXT300-363 |
301 |PO9| !ZERO | 0 1 | Defined Word-instruction | SSingle:EXT000-063 |
302 |PO9| SVRM | 0 0 | Defined Word-instruction | SVP64:EXT000-063 |
303 ```
304 * bit 31 is "SSingle"
305 * bit 30 is EXT200-263 if set otherwise EXT000-063
306
307 This was one of the original early PO9 Encodings.
308
309 **Identification**:
310
311 The following identification-criteria may be easily verified by taking
312 a copy of the table above and striking out each line that fails each
313 test. Only EXT000-063 is not by a "process of elimination" (if ... return True)
314
315 **Length detection**: (critically-important to be short - 1 clock cycle)
316
317 ```
318 if PO1 or PO9 return 64
319 else return 32
320 ```
321
322 **EXT232-263:**
323
324 ```
325 if not PO9 return False
326 # eliminate EXT0xx
327 if Word[31] == 0b1 return False
328 # remaining is EXT2xx
329 return True
330 ```
331
332
333
334 **EXT000-063**: (includes Prefixed)
335
336 ```
337 if PO1 return False # or other reserved
338 if not PO9 return True # prefixed needs more
339 # eliminate EXT2xx
340 if Word[31] = 0b0 return False
341 # remaining is EXT0xx
342 return True
343 ```
344
345 **SVP64**:
346
347 ```
348 # easy-elimination, first
349 if not PO9 return False
350 # eliminate anything not SVP64:
351 if Word[31] = 0b1 return False
352 # all remaining are SVP64:EXT0xx/EXT2xx
353 return True
354 ```
355
356 **SVP64Single**:
357
358 ```
359 # easy-elimination, first
360 if not PO9 return False
361 # eliminate SVP64:*
362 if Word[31] = 0b0 return False
363 # eliminate anything "Identity"
364 if Word[6:29 ] = 0x000000 return False
365 # everything left is SVP64Single
366 return True
367 ```
368
369 **RESERVED**: (no need to pass for further detailed decode)
370
371 ```
372 # easy-elimination, first
373 if not PO9 return False
374 # eliminate double-PO9 and PO9-PO1
375 if Word[32:37] = 0b010001 return False
376 if Word[32:37] = 0b000001 return False
377 # all else requires detailed decode
378 return True
379 ```