openpower/sv/po9_encoding/discussion.mdwn

   1 [[!toc]]
   2
   3 # introduction
   4
   5 the purpose of this page is to create and evaluate alternative
   6 encoding schemes that allow for a hybrid mixture of
   7 (ultra-precious) 32-bit and 64-bit (actually `x86 REP`-like
   8 prefixed) instructions.
   9
  10 a specific view to attaining high-speed massive-wide multi-issue decode
  11 is a high priority.  therefore especially length-detection must be kept
  12 brutally simple.
  13
  14 # alternative 32-64 encoding (1) **superseded**
  15
  16 conflict to resolve: EXT90x and EXT232. they are indistinguishable.
  17
  18 ```
  19 |0-5| 6-27 28 29|30-31|32|33-35|36-37| 38-59 | 60-63 | Description      |
  20 |---|-----|-----|-----|--|-----|-----|-------|-------|------------------|
  21 |PO9| rm0 | 0 0 | 0 0 | 0  000   rm1 |  xxxx | 0000  | SVP64:EXT900     |
  22 |PO9| rm0 | 0 0 | 0 0 | 1  000   rm1 |  xxxx | 0000  | SSingle:EXT900   |
  23 |PO9| xxx | x 0 | 0 0 | x !zero0     |  xxxx | !zero1| 55-bit RESERVED  |
  24 |PO9| xxx | 0 1 | 0 0 |              32-bit EXT900 (Vectorizable)       |
  25 |PO9| xxx | 1 1 | 0 0 |              32-bit EXT901 (Unvectorizable)     |
  26 |PO9|   !ZERO   | 0 0 |  1 | DWi                   | SSingle:EXT232-263 |
  27 |PO9|   0000    | 0 0 |  1 | DWi                   | Scalar EXT232-263  |
  28 |PO9|   RM      | 1 0 |  1 | DWi                   | SVP64:EXT232-263   |
  29 |PO9|   0000    | 0 1 | Defined Word-instruction   | 32-bit Unvec in 64b|
  30 |PO9|   !ZERO   | 0 1 | Defined Word-instruction   | SSingle:EXT000-063 |
  31 |PO9|   RM      | 1 1 | Defined Word-instruction   | SVP64:EXT000-063   |
  32 ```
  33
  34 Fields:
  35
  36 * `RM`: 24-bit SVP64 prefix
  37 * `RM <- rm0 || rm1` split field
  38 * `!zero0 || !zero1` a split field that must not be zero
  39
  40 Length detection:
  41
  42 ```
  43     if PO1                   return 64
  44     elif not PO9             return 32
  45     elif Word[31] = 1        return 64
  46     elif Word[29:30] = 0b10  return 32
  47     elif Word[29:30] = 0b00  return 64
  48     else                     return 32
  49 ```
  50
  51 Instruction allocation restrictions:
  52
  53 * setvl is Unvectorizable but needs more space later: use 55-bit
  54 * likewise svshape svindex and svshape2, all these need 32-bit
  55 * svstep *is* Vectorizable but needs to be encoded 32-bit in order
  56   to reduce loop-size
  57 * space for 32-bit instructions is needed: some instructions
  58   just make no sense if done as 64-bit because they **replace**
  59   two 32-bit instructions.
  60 * but those types of space-saving instructions
  61   **also need to be Vectorizable*
  62
  63 # alternative 32-64 encoding (2) **superseded**
  64
  65 requires reducing SVP64Single to 23 bits. luckily there are 2 spare
  66
  67 the complexity of attempting to fit 32-bit instructions into
  68 PO9 is very high. encoding (1) attempts to fit `setvl` etc. into
  69 32-bit but it is very tight.  the entire EXT900 area would be
  70 taken up by the SVP64 Management instructions, below, defeating
  71 the purpose of having it.
  72
  73 * `setvl` - Unvectorizable, EXT0xx, `RT RA CTR SVSTATE`, 6-bit XO (including Rc=1)
  74 * `psetvl` - Unvectorizable, EXT1xx, ditto
  75 * `svstep` - Vectorizable, either EXT900 (very precious) or EXT1xx (better), `RT, SVSTATE`, 6-bit XO (including Rc=1)
  76 * `svindex` - Unvectorizable, EXT0xx, `SVSTATE,SVSHAPE0-3`, 5-bit XO
  77 * `psvindex` - Unvectorizable, EXT1xx, ditto
  78 * `svstep(2)` - Unvectorizable, EXT0xx, `SVSTATE,SVSHAPE0-3`, 5-bit XO
  79 * `svstep(2)` - Unvectorizable, EXT1xx, ditto
  80
  81 ```
  82 |0-5| 6-28|29 30 31|32|33-36|37 | 38-60 | 61-63 | Description      |
  83 |---|-----|--------|--|-----|---|-------|-------|------------------|
  84 |PO9| rm0 | 1  0 0 | 0 0000  rm1|  xxxx | 000   | SVP64:EXT900     |
  85 |PO9|!ZERO| 1  0 0 | 0 1000  1  |  xxxx | 000   | SSingle:EXT900   |
  86 |PO9| xxx | 1  0 0 | 0 !zero0   |  xxxx | !zero1| 55-bit RESERVED  |
  87 |PO9| xxx | 0  0 0 |            32-bit EXT900                      |
  88 |PO9|!ZERO| 1  0 0 |  1 | DWi                 | SSingle:EXT232-263 |
  89 |PO9| 000 | 1  0 0 |  1 | DWi                 | Scalar EXT232-263  |
  90 |PO9|  nnnn  | 1 0 |  1 | DWi                 | SVP64:EXT232-263   |
  91 |PO9|  0000  | 0 1 | Defined Word-instruction | 32-bit Unvec in 64b|
  92 |PO9|!ZERO   | 0 1 | Defined Word-instruction | SSingle:EXT000-063 |
  93 |PO9|  nnnn  | 1 1 | Defined Word-instruction | SVP64:EXT000-063   |
  94 ```
  95
  96 Length detection:
  97
  98 ```
  99     if PO1                   return 64
 100     elif not PO9             return 32
 101     elif Word[29:31] = 0b000 return 32
 102     else                     return 64
 103 ```
 104
 105 # alternative 32-64 encoding (3) **current**
 106
 107 aim of this idea is to attempt simplification of area identification
 108 and length.  the 55-bit area is eliminated and may only be reintroduced
 109 by sacrificing parts of EXT200-231, bear in mind that EXT209 is already
 110 unavailable (used by EXT900).
 111
 112
 113 ```
 114 |0-5| 6-29   |30 31|32|33-36|37 | 38-61 | 62-63 | Description      |
 115 |---|--------|-----|--|-----|---|-------|-------|------------------|
 116 |PO9| xxxx   | 0 0 | (next new instruction)     |  32-bit EXT900   |
 117 |PO9| 0000   | 1 0 | 0 1000  1  |  xxxx |  00   | RESERVED         |
 118 |PO9| !ZERO  | 1 0 | 0 1000  1  |  xxxx |  00   | SSingle:EXT900   |
 119 |PO9| nnnn   | 1 0 | 0 1000  1  |  xxxx |  01   | SVP64:EXT900     |
 120 |PO9| xxxx   | 1 0 | 0 1000  1  |  xxxx |  10   | RESERVED         |
 121 |PO9| xxxx   | 1 0 | 0 1000  1  |  xxxx |  11   | RESERVED         |
 122 |PO9| !ZERO  | 1 0 | 0 | !PO9   |     xxxx      | SSingle:EXT200-231 |
 123 |PO9|  0000  | 1 0 | 0 | !PO9   |     xxxx      | Scalar EXT200-231  |
 124 |PO9|  nnnn  | 1 0 | 1 | !PO9   |     xxxx      | SVP64:EXT200-231   |
 125 |PO9|  0000  | 0 1 | Defined Word-instruction | 32-bit Unvec in 64b|
 126 |PO9| !ZERO  | 0 1 | Defined Word-instruction | SSingle:EXT000-063 |
 127 |PO9|  nnnn  | 1 1 | Defined Word-instruction | SVP64:EXT000-063   |
 128 ```
 129
 130 Length detection:
 131
 132 ```
 133     if PO1                   return 64
 134     elif not PO9             return 32
 135     elif Word[30:31] = 0b00  return 32
 136     else                     return 64
 137 ```
 138
 139 EXT200-231:
 140
 141 ```
 142     if not PO9                return False
 143     if Word[30:31] == 0b00    return False
 144     if Word[33:37] != 0b10001 return False
 145     # if Word[33:37] != XXXXX return False # 50-bit
 146     return True
 147 ```
 148
 149 **EXT900:**
 150
 151 ```
 152     # easy first step
 153     if not PO9                 return False
 154     # eliminate EXT0xx, 32-Unvec-in-64b
 155     if Word[31] = 0b1          return False
 156     # eliminate EXT2xx
 157     if Word[30:31] =  0b10 and
 158        Word[33:37] != 0b10001   return False
 159     # eliminate currently-RESERVED areas
 160     if Word[30:31] =  0b10 and
 161        Word[62]    =  0b1      return False
 162     # eliminate final RESERVED area
 163     if Word[30:31] =  0b10 and
 164        Word[62:63] =  0b00 and
 165        Word[6:29 ] =  0x000000 return False
 166     # last-remaining is EXT900
 167     return True
 168 ```
 169
 170 **EXT000-063**: (includes Prefixed)
 171
 172 ```
 173     if PO1                     return False # or other reserved
 174     if not PO9                 return True  # prefixed needs more
 175     # eliminate EXT900
 176     if Word[30:31] =  0b00     return False
 177     # eliminate Prefixed-EXT900, RESERVED and EXT200
 178     if Word[31]    =  0b0      return False
 179     # eliminate 32-bit Unvec in 64b area
 180     if Word[30:31] =  0b01 and
 181        Word[6:29 ] =  0x000000 return False
 182     return True
 183 ```
 184
 185 **SVP64**:
 186
 187 ```
 188     # easy-elimination, first
 189     if not PO9                 return False
 190     if Word[30]    =  0b0      return False
 191     # eliminate anything not SVP64:EXT900
 192     if Word[30:31] =  0b10 and
 193        Word[33:37] = 0b10001 and
 194        Word[62:63] != 0b01    return False
 195     # eliminate anything not SVP64:EXT200-231
 196     if Word[31:32] =  0b00    return False
 197     # all remaining combinations are SVP64:EXTnnn
 198     return True
 199 ```