87120c4d8c8c6adf47b0d1a4ee189f1f6a757ec3
[libreriscv.git] / openpower / sv / preduce.py
1 def preduce_yield(vl, vec, pred):
2 step = 1
3 ix = list(range(vl))
4 while step < vl:
5 step *= 2
6 for i in range(0, vl, step):
7 other = i + step // 2
8 ci = ix[i]
9 oi = ix[other] if other < vl else None
10 other_pred = other < vl and pred[oi]
11 if pred[ci] and other_pred:
12 yield ci, oi
13 elif other_pred:
14 ix[i] = oi
15
16 def preduce_y(vl, vec, pred):
17 for i, other in preduce_yield(vl, vec, pred):
18 vec[i] += vec[other]